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authorRalf Baechle <ralf@linux-mips.org>2000-07-31 03:39:50 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-07-31 03:39:50 +0000
commit17d285e537c498cf18ce79a52ca553ea964f389b (patch)
tree3905f77168a7a6d92c68bbd47b5ddae2664fe203 /include
parentce36512304b7cb5e1a911829b249e403261263ac (diff)
Shave of 50% of lat_mmap. Our cache routines were plain stupid.
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/pgtable.h10
-rw-r--r--include/asm-mips64/pgtable.h8
2 files changed, 7 insertions, 11 deletions
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index f72b7ddd3..71defadb8 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -33,6 +33,8 @@ extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
extern void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
extern void (*_flush_cache_sigtramp)(unsigned long addr);
extern void (*_flush_page_to_ram)(struct page * page);
+extern void (*_flush_icache_page)(struct vm_area_struct *vma,
+ struct page *page, unsigned long addr);
#define flush_cache_all() _flush_cache_all()
#define flush_cache_mm(mm) _flush_cache_mm(mm)
@@ -42,13 +44,7 @@ extern void (*_flush_page_to_ram)(struct page * page);
#define flush_page_to_ram(page) _flush_page_to_ram(page)
#define flush_icache_range(start, end) flush_cache_all()
-
-#define flush_icache_page(vma, page) \
-do { \
- unsigned long addr; \
- addr = page_address(page); \
- _flush_cache_page(vma, addr); \
-} while (0)
+#define flush_icache_page(vma, page, addr) _flush_icache_page(vma, page, addr)
/*
diff --git a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h
index c40380569..94ef5eee8 100644
--- a/include/asm-mips64/pgtable.h
+++ b/include/asm-mips64/pgtable.h
@@ -43,7 +43,7 @@ extern void (*_flush_page_to_ram)(struct page * page);
#define flush_icache_range(start, end) _flush_cache_l1()
-#define flush_icache_page(vma, page) \
+#define flush_icache_page(vma, page, address) \
do { \
unsigned long addr; \
addr = page_address(page); \
@@ -59,16 +59,16 @@ do { \
* are io coherent. The only place where we might be overoptimizing
* out icache flushes are from mprotect (when PROT_EXEC is added).
*/
-extern void andes_flush_icache_page(unsigned long);
+extern void andes_flush_icache_page(unsigned long, unsigned long);
#define flush_cache_mm(mm) do { } while(0)
#define flush_cache_range(mm,start,end) do { } while(0)
#define flush_cache_page(vma,page) do { } while(0)
#define flush_page_to_ram(page) do { } while(0)
#define flush_icache_range(start, end) _flush_cache_l1()
-#define flush_icache_page(vma, page) \
+#define flush_icache_page(vma, page, address) \
do { \
if ((vma)->vm_flags & VM_EXEC) \
- andes_flush_icache_page(page_address(page)); \
+ andes_flush_icache_page(page_address(page), address); \
} while (0)
#endif /* !CONFIG_CPU_R10000 */