diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-04-05 04:55:58 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-04-05 04:55:58 +0000 |
| commit | 74a9f2e1b4d3ab45a9f72cb5b556c9f521524ab3 (patch) | |
| tree | 7c4cdb103ab1b388c9852a88bd6fb1e73eba0b5c /include | |
| parent | ee6374c8b0d333c08061c6a97bc77090d7461225 (diff) | |
Merge with Linux 2.4.3.
Note that mingetty does no longer work with serial console, you have to
switch to another getty like getty_ps. This commit also includes a
fix for a setitimer bug which did prevent getty_ps from working on
older kernels.
Diffstat (limited to 'include')
153 files changed, 4030 insertions, 1314 deletions
diff --git a/include/asm-alpha/io.h b/include/asm-alpha/io.h index ddbdedfa2..3d2b51596 100644 --- a/include/asm-alpha/io.h +++ b/include/asm-alpha/io.h @@ -455,6 +455,23 @@ out: #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ioremap(b),(c)) #define isa_memcpy_toio(a,b,c) memcpy_toio(__ioremap(a),(b),(c)) +static inline int +isa_check_signature(unsigned long io_addr, const unsigned char *signature, + int length) +{ + int retval = 0; + do { + if (isa_readb(io_addr) != *signature) + goto out; + io_addr++; + signature++; + length--; + } while (length); + retval = 1; +out: + return retval; +} + /* * The Alpha Jensen hardware for some rather strange reason puts diff --git a/include/asm-alpha/machvec.h b/include/asm-alpha/machvec.h index 0aad19668..ed340a247 100644 --- a/include/asm-alpha/machvec.h +++ b/include/asm-alpha/machvec.h @@ -21,7 +21,7 @@ struct vm_area_struct; struct linux_hose_info; struct pci_dev; struct pci_ops; -struct pci_controler; +struct pci_controller; struct alpha_machine_vector { @@ -40,7 +40,7 @@ struct alpha_machine_vector unsigned long min_io_address; unsigned long min_mem_address; - void (*mv_pci_tbi)(struct pci_controler *hose, + void (*mv_pci_tbi)(struct pci_controller *hose, dma_addr_t start, dma_addr_t end); unsigned int (*mv_inb)(unsigned long); diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h index 85923e999..781a4882b 100644 --- a/include/asm-alpha/pci.h +++ b/include/asm-alpha/pci.h @@ -16,10 +16,10 @@ struct pci_bus; struct resource; struct pci_iommu_arena; -/* A controler. Used to manage multiple PCI busses. */ +/* A controller. Used to manage multiple PCI busses. */ -struct pci_controler { - struct pci_controler *next; +struct pci_controller { + struct pci_controller *next; struct pci_bus *bus; struct resource *io_space; struct resource *mem_space; diff --git a/include/asm-alpha/semaphore.h b/include/asm-alpha/semaphore.h index 0e4a1e3a6..c2a511ea4 100644 --- a/include/asm-alpha/semaphore.h +++ b/include/asm-alpha/semaphore.h @@ -12,6 +12,7 @@ #include <asm/system.h> #include <asm/atomic.h> #include <asm/compiler.h> /* __builtin_expect */ +#include <linux/wait.h> #define DEBUG_SEMAPHORE 0 #define DEBUG_RW_SEMAPHORE 0 diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h index f11e254f6..2cc52a7e0 100644 --- a/include/asm-alpha/smp.h +++ b/include/asm-alpha/smp.h @@ -57,6 +57,7 @@ extern int __cpu_logical_map[NR_CPUS]; #define smp_processor_id() (current->processor) extern unsigned long cpu_present_mask; +#define cpu_online_map cpu_present_mask #endif /* CONFIG_SMP */ diff --git a/include/asm-arm/arch-integrator/bits.h b/include/asm-arm/arch-integrator/bits.h new file mode 100644 index 000000000..b43a80e79 --- /dev/null +++ b/include/asm-arm/arch-integrator/bits.h @@ -0,0 +1,61 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/* Bit field defintions + * Copyright (C) ARM Limited 1998. All rights reserved. + */ + +#ifndef __bits_h +#define __bits_h 1 + +#define BIT0 0x00000001 +#define BIT1 0x00000002 +#define BIT2 0x00000004 +#define BIT3 0x00000008 +#define BIT4 0x00000010 +#define BIT5 0x00000020 +#define BIT6 0x00000040 +#define BIT7 0x00000080 +#define BIT8 0x00000100 +#define BIT9 0x00000200 +#define BIT10 0x00000400 +#define BIT11 0x00000800 +#define BIT12 0x00001000 +#define BIT13 0x00002000 +#define BIT14 0x00004000 +#define BIT15 0x00008000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-integrator/dma.h b/include/asm-arm/arch-integrator/dma.h new file mode 100644 index 000000000..717179229 --- /dev/null +++ b/include/asm-arm/arch-integrator/dma.h @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-integrator/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff + +#define MAX_DMA_CHANNELS 0 + +#endif /* _ASM_ARCH_DMA_H */ + diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h new file mode 100644 index 000000000..d10bbfe6a --- /dev/null +++ b/include/asm-arm/arch-integrator/hardware.h @@ -0,0 +1,57 @@ +/* + * linux/include/asm-arm/arch-integrator/hardware.h + * + * This file contains the hardware definitions of the Integrator. + * + * Copyright (C) 1999 ARM Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <asm/arch/sizes.h> +#include <asm/arch/platform.h> + +/* + * Where in virtual memory the IO devices (timers, system controllers + * and so on) + */ +#define IO_BASE 0xF0000000 // VA of IO +#define IO_SIZE 0x0B000000 // How much? +#define IO_START INTEGRATOR_HDR_BASE // PA of IO + +/* + * Similar to above, but for PCI addresses (memory, IO, Config and the + * V3 chip itself). WARNING: this has to mirror definitions in platform.h + */ +#define PCI_MEMORY_VADDR 0xe8000000 +#define PCI_CONFIG_VADDR 0xec000000 +#define PCI_V3_VADDR 0xed000000 +#define PCI_IO_VADDR 0xee000000 + +#define PCIO_BASE PCI_IO_VADDR +#define PCIMEM_BASE PCI_MEMORY_VADDR + +/* macro to get at IO space when running virtually */ +#define IO_ADDRESS(x) (((x) >> 4) + IO_BASE) + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x6000 +#define PCIBIOS_MIN_MEM 0x00100000 + +#endif + diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h new file mode 100644 index 000000000..bad7b07ea --- /dev/null +++ b/include/asm-arm/arch-integrator/io.h @@ -0,0 +1,46 @@ +/* + * linux/include/asm-arm/arch-integrator/io.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffff + +#define __io(a) (PCI_IO_VADDR + (a)) +#define __mem_pci(a) ((unsigned long)(a)) +#define __mem_isa(a) (PCI_MEMORY_VADDR + (unsigned long)(a)) + +/* + * Generic virtual read/write + */ +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) + +/* + * Validate the pci memory address for ioremap. + */ +#define iomem_valid_addr(iomem,size) \ + ((iomem) > 0 && (iomem) + (size) <= 0x20000000) + +/* + * Convert PCI memory space to a CPU physical address + */ +#define iomem_to_phys(iomem) ((iomem) + PHYS_PCI_MEM_BASE) + +#endif diff --git a/include/asm-arm/arch-integrator/irq.h b/include/asm-arm/arch-integrator/irq.h new file mode 100644 index 000000000..c07c83cf8 --- /dev/null +++ b/include/asm-arm/arch-integrator/irq.h @@ -0,0 +1,20 @@ +/* + * linux/include/asm-arm/arch-integrator/irq.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define fixup_irq(i) (i) diff --git a/include/asm-arm/arch-integrator/irqs.h b/include/asm-arm/arch-integrator/irqs.h new file mode 100644 index 000000000..da64d1f85 --- /dev/null +++ b/include/asm-arm/arch-integrator/irqs.h @@ -0,0 +1,134 @@ +/* + * linux/include/asm-arm/arch-integrator/irqs.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* Use the integrator definitions */ +#include <asm/arch/platform.h> + +/* + * IRQ interrupts definitions are the same the INT definitions + * held within platform.h + */ +#define IRQ_SOFTINT INT_SOFTINT +#define IRQ_UARTINT0 INT_UARTINT0 +#define IRQ_UARTINT1 INT_UARTINT1 +#define IRQ_KMIINT0 INT_KMIINT0 +#define IRQ_KMIINT1 INT_KMIINT1 +#define IRQ_TIMERINT0 INT_TIMERINT0 +#define IRQ_TIMERINT1 INT_TIMERINT1 +#define IRQ_TIMERINT2 INT_TIMERINT2 +#define IRQ_RTCINT INT_RTCINT +#define IRQ_EXPINT0 INT_EXPINT0 +#define IRQ_EXPINT1 INT_EXPINT1 +#define IRQ_EXPINT2 INT_EXPINT2 +#define IRQ_EXPINT3 INT_EXPINT3 +#define IRQ_PCIINT0 INT_PCIINT0 +#define IRQ_PCIINT1 INT_PCIINT1 +#define IRQ_PCIINT2 INT_PCIINT2 +#define IRQ_PCIINT3 INT_PCIINT3 +#define IRQ_V3INT INT_V3INT +#define IRQ_CPINT0 INT_CPINT0 +#define IRQ_CPINT1 INT_CPINT1 +#define IRQ_LBUSTIMEOUT INT_LBUSTIMEOUT +#define IRQ_APCINT INT_APCINT + +#define IRQMASK_SOFTINT INTMASK_SOFTINT +#define IRQMASK_UARTINT0 INTMASK_UARTINT0 +#define IRQMASK_UARTINT1 INTMASK_UARTINT1 +#define IRQMASK_KMIINT0 INTMASK_KMIINT0 +#define IRQMASK_KMIINT1 INTMASK_KMIINT1 +#define IRQMASK_TIMERINT0 INTMASK_TIMERINT0 +#define IRQMASK_TIMERINT1 INTMASK_TIMERINT1 +#define IRQMASK_TIMERINT2 INTMASK_TIMERINT2 +#define IRQMASK_RTCINT INTMASK_RTCINT +#define IRQMASK_EXPINT0 INTMASK_EXPINT0 +#define IRQMASK_EXPINT1 INTMASK_EXPINT1 +#define IRQMASK_EXPINT2 INTMASK_EXPINT2 +#define IRQMASK_EXPINT3 INTMASK_EXPINT3 +#define IRQMASK_PCIINT0 INTMASK_PCIINT0 +#define IRQMASK_PCIINT1 INTMASK_PCIINT1 +#define IRQMASK_PCIINT2 INTMASK_PCIINT2 +#define IRQMASK_PCIINT3 INTMASK_PCIINT3 +#define IRQMASK_V3INT INTMASK_V3INT +#define IRQMASK_CPINT0 INTMASK_CPINT0 +#define IRQMASK_CPINT1 INTMASK_CPINT1 +#define IRQMASK_LBUSTIMEOUT INTMASK_LBUSTIMEOUT +#define IRQMASK_APCINT INTMASK_APCINT + +/* + * FIQ interrupts definitions are the same the INT definitions. + */ +#define FIQ_SOFTINT INT_SOFTINT +#define FIQ_UARTINT0 INT_UARTINT0 +#define FIQ_UARTINT1 INT_UARTINT1 +#define FIQ_KMIINT0 INT_KMIINT0 +#define FIQ_KMIINT1 INT_KMIINT1 +#define FIQ_TIMERINT0 INT_TIMERINT0 +#define FIQ_TIMERINT1 INT_TIMERINT1 +#define FIQ_TIMERINT2 INT_TIMERINT2 +#define FIQ_RTCINT INT_RTCINT +#define FIQ_EXPINT0 INT_EXPINT0 +#define FIQ_EXPINT1 INT_EXPINT1 +#define FIQ_EXPINT2 INT_EXPINT2 +#define FIQ_EXPINT3 INT_EXPINT3 +#define FIQ_PCIINT0 INT_PCIINT0 +#define FIQ_PCIINT1 INT_PCIINT1 +#define FIQ_PCIINT2 INT_PCIINT2 +#define FIQ_PCIINT3 INT_PCIINT3 +#define FIQ_V3INT INT_V3INT +#define FIQ_CPINT0 INT_CPINT0 +#define FIQ_CPINT1 INT_CPINT1 +#define FIQ_LBUSTIMEOUT INT_LBUSTIMEOUT +#define FIQ_APCINT INT_APCINT + +#define FIQMASK_SOFTINT INTMASK_SOFTINT +#define FIQMASK_UARTINT0 INTMASK_UARTINT0 +#define FIQMASK_UARTINT1 INTMASK_UARTINT1 +#define FIQMASK_KMIINT0 INTMASK_KMIINT0 +#define FIQMASK_KMIINT1 INTMASK_KMIINT1 +#define FIQMASK_TIMERINT0 INTMASK_TIMERINT0 +#define FIQMASK_TIMERINT1 INTMASK_TIMERINT1 +#define FIQMASK_TIMERINT2 INTMASK_TIMERINT2 +#define FIQMASK_RTCINT INTMASK_RTCINT +#define FIQMASK_EXPINT0 INTMASK_EXPINT0 +#define FIQMASK_EXPINT1 INTMASK_EXPINT1 +#define FIQMASK_EXPINT2 INTMASK_EXPINT2 +#define FIQMASK_EXPINT3 INTMASK_EXPINT3 +#define FIQMASK_PCIINT0 INTMASK_PCIINT0 +#define FIQMASK_PCIINT1 INTMASK_PCIINT1 +#define FIQMASK_PCIINT2 INTMASK_PCIINT2 +#define FIQMASK_PCIINT3 INTMASK_PCIINT3 +#define FIQMASK_V3INT INTMASK_V3INT +#define FIQMASK_CPINT0 INTMASK_CPINT0 +#define FIQMASK_CPINT1 INTMASK_CPINT1 +#define FIQMASK_LBUSTIMEOUT INTMASK_LBUSTIMEOUT +#define FIQMASK_APCINT INTMASK_APCINT + +/* + * Misc. interrupt definitions + */ +#define IRQ_KEYBDINT INT_KMIINT0 +#define IRQ_MOUSEINT INT_KMIINT1 + +#define IRQMASK_KEYBDINT INTMASK_KMIINT0 +#define IRQMASK_MOUSEINT INTMASK_KMIINT1 + +#define NR_IRQS (MAXIRQNUM + 1) + diff --git a/include/asm-arm/arch-integrator/keyboard.h b/include/asm-arm/arch-integrator/keyboard.h new file mode 100644 index 000000000..a0d6770f6 --- /dev/null +++ b/include/asm-arm/arch-integrator/keyboard.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/arch-integrator/keyboard.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Keyboard driver definitions for the Integrator architecture + */ +#include <asm/irq.h> + +#define NR_SCANCODES 128 + +extern unsigned char kmi_kbd_sysrq_xlate[NR_SCANCODES]; + +extern int kmi_kbd_setkeycode(u_int scancode, u_int keycode); +extern int kmi_kbd_getkeycode(u_int scancode); +extern int kmi_kbd_translate(u_char scancode, u_char *keycode, char raw_mode); +extern char kmi_kbd_unexpected_up(u_char keycode); +extern void kmi_kbd_leds(u_char leds); +extern int kmi_kbd_init(void); + +#define kbd_setkeycode(sc,kc) kmi_kbd_setkeycode(sc,kc) +#define kbd_getkeycode(sc) kmi_kbd_getkeycode(sc) + +#define kbd_translate(sc, kcp, rm) kmi_kbd_translate(sc,kcp,rm) +#define kbd_unexpected_up(kc) kmi_kbd_unexpected_up(kc) +#define kbd_leds(leds) kmi_kbd_leds(leds) +#define kbd_init_hw() kmi_kbd_init() +#define kbd_sysrq_xlate kmi_kbd_sysrq_xlate +#define kbd_disable_irq() disable_irq(IRQ_KMIINT0) +#define kbd_enable_irq() enable_irq(IRQ_KMIINT0) + +#define SYSRQ_KEY 0x54 diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h new file mode 100644 index 000000000..456050111 --- /dev/null +++ b/include/asm-arm/arch-integrator/memory.h @@ -0,0 +1,61 @@ +/* + * linux/include/asm-arm/arch-integrator/mmu.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_MMU_H +#define __ASM_ARCH_MMU_H + +/* + * Task size: 3GB + */ +#define TASK_SIZE (0xc0000000UL) +#define TASK_SIZE_26 (0x04000000UL) + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* + * Page offset: 3GB + */ +#define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x00000000UL) + +/* + * On integrator, the dram is contiguous + */ +#define __virt_to_phys__is_a_macro +#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET) +#define __phys_to_virt__is_a_macro +#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus__is_a_macro +#define __virt_to_bus(x) (x - PAGE_OFFSET + INTEGRATOR_HDR0_SDRAM_BASE) +#define __bus_to_virt__is_a_macro +#define __bus_to_virt(x) (x - INTEGRATOR_HDR0_SDRAM_BASE + PAGE_OFFSET) + +#endif diff --git a/include/asm-arm/arch-integrator/param.h b/include/asm-arm/arch-integrator/param.h new file mode 100644 index 000000000..b6f105d5e --- /dev/null +++ b/include/asm-arm/arch-integrator/param.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-integrator/param.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define HZ 100 diff --git a/include/asm-arm/arch-integrator/platform.h b/include/asm-arm/arch-integrator/platform.h new file mode 100644 index 000000000..0ce214ada --- /dev/null +++ b/include/asm-arm/arch-integrator/platform.h @@ -0,0 +1,544 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/************************************************************************** + * * Copyright © ARM Limited 1998. All rights reserved. + * ***********************************************************************/ +/* ************************************************************************ + * + * Integrator address map + * + * NOTE: This is a multi-hosted header file for use with uHAL and + * supported debuggers. + * + * $Id: platform.s,v 1.32 2000/02/18 10:51:39 asims Exp $ + * + * ***********************************************************************/ + +#ifndef __address_h +#define __address_h 1 + +/* ======================================================================== + * Integrator definitions + * ======================================================================== + * ------------------------------------------------------------------------ + * Memory definitions + * ------------------------------------------------------------------------ + * Integrator memory map + * + */ +#define INTEGRATOR_BOOT_ROM_LO 0x00000000 +#define INTEGRATOR_BOOT_ROM_HI 0x20000000 +#define INTEGRATOR_BOOT_ROM_BASE INTEGRATOR_BOOT_ROM_HI /* Normal position */ +#define INTEGRATOR_BOOT_ROM_SIZE SZ_512K + +/* + * New Core Modules have different amounts of SSRAM, the amount of SSRAM + * fitted can be found in HDR_STAT. + * + * The symbol INTEGRATOR_SSRAM_SIZE is kept, however this now refers to + * the minimum amount of SSRAM fitted on any core module. + * + * New Core Modules also alias the SSRAM. + * + */ +#define INTEGRATOR_SSRAM_BASE 0x00000000 +#define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000 +#define INTEGRATOR_SSRAM_SIZE SZ_256K + +#define INTEGRATOR_FLASH_BASE 0x24000000 +#define INTEGRATOR_FLASH_SIZE SZ_32M + +#define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000 +#define INTEGRATOR_MBRD_SSRAM_SIZE SZ_512K + +/* + * SDRAM is a SIMM therefore the size is not known. + * + */ +#define INTEGRATOR_SDRAM_BASE 0x00040000 + +#define INTEGRATOR_SDRAM_ALIAS_BASE 0x80000000 +#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000 +#define INTEGRATOR_HDR1_SDRAM_BASE 0x90000000 +#define INTEGRATOR_HDR2_SDRAM_BASE 0xA0000000 +#define INTEGRATOR_HDR3_SDRAM_BASE 0xB0000000 + +/* + * Logic expansion modules + * + */ +#define INTEGRATOR_LOGIC_MODULES_BASE 0xC0000000 +#define INTEGRATOR_LOGIC_MODULE0_BASE 0xC0000000 +#define INTEGRATOR_LOGIC_MODULE1_BASE 0xD0000000 +#define INTEGRATOR_LOGIC_MODULE2_BASE 0xE0000000 +#define INTEGRATOR_LOGIC_MODULE3_BASE 0xF0000000 + +/* ------------------------------------------------------------------------ + * Integrator header card registers + * ------------------------------------------------------------------------ + * + */ +#define INTEGRATOR_HDR_ID_OFFSET 0x00 +#define INTEGRATOR_HDR_PROC_OFFSET 0x04 +#define INTEGRATOR_HDR_OSC_OFFSET 0x08 +#define INTEGRATOR_HDR_CTRL_OFFSET 0x0C +#define INTEGRATOR_HDR_STAT_OFFSET 0x10 +#define INTEGRATOR_HDR_LOCK_OFFSET 0x14 +#define INTEGRATOR_HDR_SDRAM_OFFSET 0x20 +#define INTEGRATOR_HDR_INIT_OFFSET 0x24 /* CM9x6 */ +#define INTEGRATOR_HDR_IC_OFFSET 0x40 +#define INTEGRATOR_HDR_SPDBASE_OFFSET 0x100 +#define INTEGRATOR_HDR_SPDTOP_OFFSET 0x200 + +#define INTEGRATOR_HDR_BASE 0x10000000 +#define INTEGRATOR_HDR_ID (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_ID_OFFSET) +#define INTEGRATOR_HDR_PROC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_PROC_OFFSET) +#define INTEGRATOR_HDR_OSC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_OSC_OFFSET) +#define INTEGRATOR_HDR_CTRL (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_CTRL_OFFSET) +#define INTEGRATOR_HDR_STAT (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_STAT_OFFSET) +#define INTEGRATOR_HDR_LOCK (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_LOCK_OFFSET) +#define INTEGRATOR_HDR_SDRAM (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SDRAM_OFFSET) +#define INTEGRATOR_HDR_INIT (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_INIT_OFFSET) +#define INTEGRATOR_HDR_IC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_IC_OFFSET) +#define INTEGRATOR_HDR_SPDBASE (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDBASE_OFFSET) +#define INTEGRATOR_HDR_SPDTOP (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDTOP_OFFSET) + +#define INTEGRATOR_HDR_CTRL_LED 0x01 +#define INTEGRATOR_HDR_CTRL_MBRD_DETECH 0x02 +#define INTEGRATOR_HDR_CTRL_REMAP 0x04 +#define INTEGRATOR_HDR_CTRL_RESET 0x08 +#define INTEGRATOR_HDR_CTRL_HIGHVECTORS 0x10 +#define INTEGRATOR_HDR_CTRL_BIG_ENDIAN 0x20 +#define INTEGRATOR_HDR_CTRL_FASTBUS 0x40 +#define INTEGRATOR_HDR_CTRL_SYNC 0x80 + +#define INTEGRATOR_HDR_OSC_CORE_10MHz 0x102 +#define INTEGRATOR_HDR_OSC_CORE_15MHz 0x107 +#define INTEGRATOR_HDR_OSC_CORE_20MHz 0x10C +#define INTEGRATOR_HDR_OSC_CORE_25MHz 0x111 +#define INTEGRATOR_HDR_OSC_CORE_30MHz 0x116 +#define INTEGRATOR_HDR_OSC_CORE_35MHz 0x11B +#define INTEGRATOR_HDR_OSC_CORE_40MHz 0x120 +#define INTEGRATOR_HDR_OSC_CORE_45MHz 0x125 +#define INTEGRATOR_HDR_OSC_CORE_50MHz 0x12A +#define INTEGRATOR_HDR_OSC_CORE_55MHz 0x12F +#define INTEGRATOR_HDR_OSC_CORE_60MHz 0x134 +#define INTEGRATOR_HDR_OSC_CORE_65MHz 0x139 +#define INTEGRATOR_HDR_OSC_CORE_70MHz 0x13E +#define INTEGRATOR_HDR_OSC_CORE_75MHz 0x143 +#define INTEGRATOR_HDR_OSC_CORE_80MHz 0x148 +#define INTEGRATOR_HDR_OSC_CORE_85MHz 0x14D +#define INTEGRATOR_HDR_OSC_CORE_90MHz 0x152 +#define INTEGRATOR_HDR_OSC_CORE_95MHz 0x157 +#define INTEGRATOR_HDR_OSC_CORE_100MHz 0x15C +#define INTEGRATOR_HDR_OSC_CORE_105MHz 0x161 +#define INTEGRATOR_HDR_OSC_CORE_110MHz 0x166 +#define INTEGRATOR_HDR_OSC_CORE_115MHz 0x16B +#define INTEGRATOR_HDR_OSC_CORE_120MHz 0x170 +#define INTEGRATOR_HDR_OSC_CORE_125MHz 0x175 +#define INTEGRATOR_HDR_OSC_CORE_130MHz 0x17A +#define INTEGRATOR_HDR_OSC_CORE_135MHz 0x17F +#define INTEGRATOR_HDR_OSC_CORE_140MHz 0x184 +#define INTEGRATOR_HDR_OSC_CORE_145MHz 0x189 +#define INTEGRATOR_HDR_OSC_CORE_150MHz 0x18E +#define INTEGRATOR_HDR_OSC_CORE_155MHz 0x193 +#define INTEGRATOR_HDR_OSC_CORE_160MHz 0x198 +#define INTEGRATOR_HDR_OSC_CORE_MASK 0x7FF + +#define INTEGRATOR_HDR_OSC_MEM_10MHz 0x10C000 +#define INTEGRATOR_HDR_OSC_MEM_15MHz 0x116000 +#define INTEGRATOR_HDR_OSC_MEM_20MHz 0x120000 +#define INTEGRATOR_HDR_OSC_MEM_25MHz 0x12A000 +#define INTEGRATOR_HDR_OSC_MEM_30MHz 0x134000 +#define INTEGRATOR_HDR_OSC_MEM_33MHz 0x13A000 +#define INTEGRATOR_HDR_OSC_MEM_40MHz 0x148000 +#define INTEGRATOR_HDR_OSC_MEM_50MHz 0x15C000 +#define INTEGRATOR_HDR_OSC_MEM_60MHz 0x170000 +#define INTEGRATOR_HDR_OSC_MEM_66MHz 0x17C000 +#define INTEGRATOR_HDR_OSC_MEM_MASK 0x7FF000 + +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM7x0 0x0 +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x0 0x0800000 +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x6 0x1000000 +#define INTEGRATOR_HDR_OSC_BUS_MODE_CM10x00 0x1800000 +#define INTEGRATOR_HDR_OSC_BUS_MODE_MASK 0x1800000 + +#define INTEGRATOR_HDR_SDRAM_SPD_OK (1 << 5) + + +/* ------------------------------------------------------------------------ + * Integrator system registers + * ------------------------------------------------------------------------ + * + */ + +/* + * System Controller + * + */ +#define INTEGRATOR_SC_ID_OFFSET 0x00 +#define INTEGRATOR_SC_OSC_OFFSET 0x04 +#define INTEGRATOR_SC_CTRLS_OFFSET 0x08 +#define INTEGRATOR_SC_CTRLC_OFFSET 0x0C +#define INTEGRATOR_SC_DEC_OFFSET 0x10 +#define INTEGRATOR_SC_ARB_OFFSET 0x14 +#define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 +#define INTEGRATOR_SC_LOCK_OFFSET 0x1C + +#define INTEGRATOR_SC_BASE 0x11000000 +#define INTEGRATOR_SC_ID (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ID_OFFSET) +#define INTEGRATOR_SC_OSC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_OSC_OFFSET) +#define INTEGRATOR_SC_CTRLS (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET) +#define INTEGRATOR_SC_CTRLC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET) +#define INTEGRATOR_SC_DEC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_DEC_OFFSET) +#define INTEGRATOR_SC_ARB (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ARB_OFFSET) +#define INTEGRATOR_SC_PCIENABLE (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET) +#define INTEGRATOR_SC_LOCK (INTEGRATOR_SC_BASE + INTEGRATOR_SC_LOCK_OFFSET) + +#define INTEGRATOR_SC_OSC_SYS_10MHz 0x20 +#define INTEGRATOR_SC_OSC_SYS_15MHz 0x34 +#define INTEGRATOR_SC_OSC_SYS_20MHz 0x48 +#define INTEGRATOR_SC_OSC_SYS_25MHz 0x5C +#define INTEGRATOR_SC_OSC_SYS_33MHz 0x7C +#define INTEGRATOR_SC_OSC_SYS_MASK 0xFF + +#define INTEGRATOR_SC_OSC_PCI_25MHz 0x100 +#define INTEGRATOR_SC_OSC_PCI_33MHz 0x0 +#define INTEGRATOR_SC_OSC_PCI_MASK 0x100 + +#define INTEGRATOR_SC_CTRL_SOFTRST (1 << 0) +#define INTEGRATOR_SC_CTRL_nFLVPPEN (1 << 1) +#define INTEGRATOR_SC_CTRL_nFLWP (1 << 2) +#define INTEGRATOR_SC_CTRL_URTS0 (1 << 4) +#define INTEGRATOR_SC_CTRL_UDTR0 (1 << 5) +#define INTEGRATOR_SC_CTRL_URTS1 (1 << 6) +#define INTEGRATOR_SC_CTRL_UDTR1 (1 << 7) + +/* + * External Bus Interface + * + */ +#define INTEGRATOR_EBI_BASE 0x12000000 + +#define INTEGRATOR_EBI_CSR0_OFFSET 0x00 +#define INTEGRATOR_EBI_CSR1_OFFSET 0x04 +#define INTEGRATOR_EBI_CSR2_OFFSET 0x08 +#define INTEGRATOR_EBI_CSR3_OFFSET 0x0C +#define INTEGRATOR_EBI_LOCK_OFFSET 0x20 + +#define INTEGRATOR_EBI_CSR0 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR0_OFFSET) +#define INTEGRATOR_EBI_CSR1 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET) +#define INTEGRATOR_EBI_CSR2 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR2_OFFSET) +#define INTEGRATOR_EBI_CSR3 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR3_OFFSET) +#define INTEGRATOR_EBI_LOCK (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET) + +#define INTEGRATOR_EBI_8_BIT 0x00 +#define INTEGRATOR_EBI_16_BIT 0x01 +#define INTEGRATOR_EBI_32_BIT 0x02 +#define INTEGRATOR_EBI_WRITE_ENABLE 0x04 +#define INTEGRATOR_EBI_SYNC 0x08 +#define INTEGRATOR_EBI_WS_2 0x00 +#define INTEGRATOR_EBI_WS_3 0x10 +#define INTEGRATOR_EBI_WS_4 0x20 +#define INTEGRATOR_EBI_WS_5 0x30 +#define INTEGRATOR_EBI_WS_6 0x40 +#define INTEGRATOR_EBI_WS_7 0x50 +#define INTEGRATOR_EBI_WS_8 0x60 +#define INTEGRATOR_EBI_WS_9 0x70 +#define INTEGRATOR_EBI_WS_10 0x80 +#define INTEGRATOR_EBI_WS_11 0x90 +#define INTEGRATOR_EBI_WS_12 0xA0 +#define INTEGRATOR_EBI_WS_13 0xB0 +#define INTEGRATOR_EBI_WS_14 0xC0 +#define INTEGRATOR_EBI_WS_15 0xD0 +#define INTEGRATOR_EBI_WS_16 0xE0 +#define INTEGRATOR_EBI_WS_17 0xF0 + + +#define INTEGRATOR_CT_BASE 0x13000000 /* Counter/Timers */ +#define INTEGRATOR_IC_BASE 0x14000000 /* Interrupt Controller */ +#define INTEGRATOR_RTC_BASE 0x15000000 /* Real Time Clock */ +#define INTEGRATOR_UART0_BASE 0x16000000 /* UART 0 */ +#define INTEGRATOR_UART1_BASE 0x17000000 /* UART 1 */ +#define INTEGRATOR_KBD_BASE 0x18000000 /* Keyboard */ +#define INTEGRATOR_MOUSE_BASE 0x19000000 /* Mouse */ + +/* + * LED's & Switches + * + */ +#define INTEGRATOR_DBG_ALPHA_OFFSET 0x00 +#define INTEGRATOR_DBG_LEDS_OFFSET 0x04 +#define INTEGRATOR_DBG_SWITCH_OFFSET 0x08 + +#define INTEGRATOR_DBG_BASE 0x1A000000 +#define INTEGRATOR_DBG_ALPHA (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_ALPHA_OFFSET) +#define INTEGRATOR_DBG_LEDS (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET) +#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET) + + +#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */ + +/* ------------------------------------------------------------------------ + * KMI keyboard/mouse definitions + * ------------------------------------------------------------------------ + */ +/* PS2 Keyboard interface */ +#define KMI0_BASE INTEGRATOR_KBD_BASE + +/* PS2 Mouse interface */ +#define KMI1_BASE INTEGRATOR_MOUSE_BASE + +/* KMI definitions are now in include/asm-arm/hardware/amba_kmi.h -- rmk */ + +/* ------------------------------------------------------------------------ + * Where in the memory map does PCI live? + * ------------------------------------------------------------------------ + * This represents a fairly liberal usage of address space. Even though + * the V3 only has two windows (therefore we need to map stuff on the fly), + * we maintain the same addresses, even if they're not mapped. + * + */ +#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M to xxx */ +/* unused 256M from A0000000-AFFFFFFF might be used for I2O ??? + */ +#define PHYS_PCI_IO_BASE 0x60000000 /* 16M to xxx */ +/* unused (128-16)M from B1000000-B7FFFFFF + */ +#define PHYS_PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */ +/* unused ((128-16)M - 64K) from XXX + */ +#define PHYS_PCI_V3_BASE 0x62000000 + +#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE + +/* 'export' these to UHAL */ +#define UHAL_PCI_IO PCI_IO_BASE +#define UHAL_PCI_MEM PCI_MEM_BASE +#define UHAL_PCI_ALLOC_IO_BASE 0x00004000 +#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE +#define UHAL_PCI_MAX_SLOT 20 + +/* ======================================================================== + * Start of uHAL definitions + * ======================================================================== + */ + +/* ------------------------------------------------------------------------ + * Integrator Interrupt Controllers + * ------------------------------------------------------------------------ + * + * Offsets from interrupt controller base + * + * System Controller interrupt controller base is + * + * INTEGRATOR_IC_BASE + (header_number << 6) + * + * Core Module interrupt controller base is + * + * INTEGRATOR_HDR_IC + * + */ +#define IRQ_STATUS 0 +#define IRQ_RAW_STATUS 0x04 +#define IRQ_ENABLE 0x08 +#define IRQ_ENABLE_SET 0x08 +#define IRQ_ENABLE_CLEAR 0x0C + +#define INT_SOFT_SET 0x10 +#define INT_SOFT_CLEAR 0x14 + +#define FIQ_STATUS 0x20 +#define FIQ_RAW_STATUS 0x24 +#define FIQ_ENABLE 0x28 +#define FIQ_ENABLE_SET 0x28 +#define FIQ_ENABLE_CLEAR 0x2C + + +/* ------------------------------------------------------------------------ + * Interrupts + * ------------------------------------------------------------------------ + * + * + * Each Core Module has two interrupts controllers, one on the core module + * itself and one in the system controller on the motherboard. The + * READ_INT macro in target.s reads both interrupt controllers and returns + * a 32 bit bitmask, bits 0 to 23 are interrupts from the system controller + * and bits 24 to 31 are from the core module. + * + * The following definitions relate to the bitmask returned by READ_INT. + * + */ + +/* + * As the interrupt bit definitions for FIQ/IRQ there is a common + * set of definitions prefixed INT/INTMASK. The FIQ/IRQ definitions + * have been left to maintain backwards compatible. + * + */ + +/* + * Interrupt numbers + * + */ +#define INT_SOFTINT 0 +#define INT_UARTINT0 1 +#define INT_UARTINT1 2 +#define INT_KMIINT0 3 +#define INT_KMIINT1 4 +#define INT_TIMERINT0 5 +#define INT_TIMERINT1 6 +#define INT_TIMERINT2 7 +#define INT_RTCINT 8 +#define INT_EXPINT0 9 +#define INT_EXPINT1 10 +#define INT_EXPINT2 11 +#define INT_EXPINT3 12 +#define INT_PCIINT0 13 +#define INT_PCIINT1 14 +#define INT_PCIINT2 15 +#define INT_PCIINT3 16 +#define INT_V3INT 17 +#define INT_CPINT0 18 +#define INT_CPINT1 19 +#define INT_LBUSTIMEOUT 20 +#define INT_APCINT 21 +#define INT_CM_SOFTINT 24 +#define INT_CM_COMMRX 25 +#define INT_CM_COMMTX 26 + +/* + * Interrupt bit positions + * + */ +#define INTMASK_SOFTINT (1 << INT_SOFTINT) +#define INTMASK_UARTINT0 (1 << INT_UARTINT0) +#define INTMASK_UARTINT1 (1 << INT_UARTINT1) +#define INTMASK_KMIINT0 (1 << INT_KMIINT0) +#define INTMASK_KMIINT1 (1 << INT_KMIINT1) +#define INTMASK_TIMERINT0 (1 << INT_TIMERINT0) +#define INTMASK_TIMERINT1 (1 << INT_TIMERINT1) +#define INTMASK_TIMERINT2 (1 << INT_TIMERINT2) +#define INTMASK_RTCINT (1 << INT_RTCINT) +#define INTMASK_EXPINT0 (1 << INT_EXPINT0) +#define INTMASK_EXPINT1 (1 << INT_EXPINT1) +#define INTMASK_EXPINT2 (1 << INT_EXPINT2) +#define INTMASK_EXPINT3 (1 << INT_EXPINT3) +#define INTMASK_PCIINT0 (1 << INT_PCIINT0) +#define INTMASK_PCIINT1 (1 << INT_PCIINT1) +#define INTMASK_PCIINT2 (1 << INT_PCIINT2) +#define INTMASK_PCIINT3 (1 << INT_PCIINT3) +#define INTMASK_V3INT (1 << INT_V3INT) +#define INTMASK_CPINT0 (1 << INT_CPINT0) +#define INTMASK_CPINT1 (1 << INT_CPINT1) +#define INTMASK_LBUSTIMEOUT (1 << INT_LBUSTIMEOUT) +#define INTMASK_APCINT (1 << INT_APCINT) +#define INTMASK_CM_SOFTINT (1 << INT_CM_SOFTINT) +#define INTMASK_CM_COMMRX (1 << INT_CM_COMMRX) +#define INTMASK_CM_COMMTX (1 << INT_CM_COMMTX) + +/* + * INTEGRATOR_CM_INT0 - Interrupt number of first CM interrupt + * INTEGRATOR_SC_VALID_INT - Mask of valid system controller interrupts + * + */ +#define INTEGRATOR_CM_INT0 INT_CM_SOFTINT +#define INTEGRATOR_SC_VALID_INT 0x003FFFFF + +#define MAXIRQNUM 31 +#define MAXFIQNUM 31 +#define MAXSWINUM 31 + +/* ------------------------------------------------------------------------ + * LED's - The header LED is not accessable via the uHAL API + * ------------------------------------------------------------------------ + * + */ +#define GREEN_LED 0x01 +#define YELLOW_LED 0x02 +#define RED_LED 0x04 +#define GREEN_LED_2 0x08 +#define ALL_LEDS 0x0F + +#define LED_BANK INTEGRATOR_DBG_LEDS + +/* + * Memory definitions - run uHAL out of SSRAM. + * + */ +#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE + +/* + * Application Flash + * + */ +#define FLASH_BASE INTEGRATOR_FLASH_BASE +#define FLASH_SIZE INTEGRATOR_FLASH_SIZE +#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) +#define FLASH_BLOCK_SIZE SZ_128K + +/* + * Boot Flash + * + */ +#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI +#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE +#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) + +/* + * Clean base - dummy + * + */ +#define CLEAN_BASE EPROM_BASE + +/* + * Timer definitions + * + * Only use timer 1 & 2 + * (both run at 24MHz and will need the clock divider set to 16). + * + * Timer 0 runs at bus frequency and therefore could vary and currently + * uHAL can't handle that. + * + */ + +#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE +#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100) +#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200) + +#define MAX_TIMER 2 +#define MAX_PERIOD 699050 +#define TICKS_PER_uSEC 24 + +/* + * These are useconds NOT ticks. + * + */ +#define mSEC_1 1000 +#define mSEC_5 (mSEC_1 * 5) +#define mSEC_10 (mSEC_1 * 10) +#define mSEC_25 (mSEC_1 * 25) +#define SEC_1 (mSEC_1 * 1000) + +#define INTEGRATOR_CSR_BASE 0x10000000 +#define INTEGRATOR_CSR_SIZE 0x10000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-integrator/serial.h b/include/asm-arm/arch-integrator/serial.h new file mode 100644 index 000000000..06ab7379b --- /dev/null +++ b/include/asm-arm/arch-integrator/serial.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-integrator/serial.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +#include <asm/arch/platform.h> +#include <asm/irq.h> + +/* + * This assumes you have a 1.8432 MHz clock for your UART. + * + * It'd be nice if someone built a serial card with a 24.576 MHz + * clock, since the 16550A is capable of handling a top speed of 1.5 + * megabits/second; but this requires the faster clock. + */ +#define BASE_BAUD (1843200 / 16) + +#define _SER_IRQ0 IRQ_UARTINT0 +#define _SER_IRQ1 IRQ_UARTINT1 + +#define RS_TABLE_SIZE 2 + +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) + + /* UART CLK PORT IRQ FLAGS */ +#define STD_SERIAL_PORT_DEFNS \ + { 0, BASE_BAUD, 0x3F8, _SER_IRQ0, STD_COM_FLAGS }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0x2F8, _SER_IRQ1, STD_COM_FLAGS }, /* ttyS1 */ + +#define EXTRA_SERIAL_PORT_DEFNS + +#endif diff --git a/include/asm-arm/arch-integrator/sizes.h b/include/asm-arm/arch-integrator/sizes.h new file mode 100644 index 000000000..f8d92ca12 --- /dev/null +++ b/include/asm-arm/arch-integrator/sizes.h @@ -0,0 +1,52 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/* Size defintions + * Copyright (C) ARM Limited 1998. All rights reserved. + */ + +#ifndef __sizes_h +#define __sizes_h 1 + +/* handy sizes */ +#define SZ_1K 0x00000400 +#define SZ_4K 0x00001000 +#define SZ_8K 0x00002000 +#define SZ_16K 0x00004000 +#define SZ_64K 0x00010000 +#define SZ_128K 0x00020000 +#define SZ_256K 0x00040000 +#define SZ_512K 0x00080000 + +#define SZ_1M 0x00100000 +#define SZ_2M 0x00200000 +#define SZ_4M 0x00400000 +#define SZ_8M 0x00800000 +#define SZ_16M 0x01000000 +#define SZ_32M 0x02000000 +#define SZ_64M 0x04000000 +#define SZ_128M 0x08000000 +#define SZ_256M 0x10000000 +#define SZ_512M 0x20000000 + +#define SZ_1G 0x40000000 +#define SZ_2G 0x80000000 + +#endif + +/* END */ diff --git a/include/asm-arm/arch-integrator/system.h b/include/asm-arm/arch-integrator/system.h new file mode 100644 index 000000000..a330cadc7 --- /dev/null +++ b/include/asm-arm/arch-integrator/system.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-integrator/system.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/arch/platform.h> + +static void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(0); +} + +extern __inline__ void arch_reset(char mode) +{ + unsigned int hdr_ctrl = (IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET); + unsigned int val; + + /* + * To reset, we hit the on-board reset register + * in the system FPGA + */ + val = __raw_readl(hdr_ctrl); + val |= INTEGRATOR_HDR_CTRL_RESET; + __raw_writel(val, hdr_ctrl); +} + +#endif diff --git a/include/asm-arm/arch-integrator/time.h b/include/asm-arm/arch-integrator/time.h new file mode 100644 index 000000000..1dfb5fd68 --- /dev/null +++ b/include/asm-arm/arch-integrator/time.h @@ -0,0 +1,140 @@ +/* + * linux/include/asm-arm/arch-integrator/time.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <asm/system.h> +#include <asm/leds.h> + +/* + * Where is the timer (VA)? + */ +#define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000) +#define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100) +#define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200) +#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) + +/* + * How long is the timer interval? + */ +#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10) +#if TIMER_INTERVAL >= 0x100000 +#define TIMER_RELOAD (TIMER_INTERVAL >> 8) /* Divide by 256 */ +#define TIMER_CTRL 0x88 /* Enable, Clock / 256 */ +#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC) +#elif TIMER_INTERVAL >= 0x10000 +#define TIMER_RELOAD (TIMER_INTERVAL >> 4) /* Divide by 16 */ +#define TIMER_CTRL 0x84 /* Enable, Clock / 16 */ +#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC) +#else +#define TIMER_RELOAD (TIMER_INTERVAL) +#define TIMER_CTRL 0x80 /* Enable */ +#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) +#endif + +/* + * What does it look like? + */ +typedef struct TimerStruct { + unsigned long TimerLoad; + unsigned long TimerValue; + unsigned long TimerControl; + unsigned long TimerClear; +} TimerStruct_t; + +extern unsigned long (*gettimeoffset)(void); + +/* + * Returns number of ms since last clock interrupt. Note that interrupts + * will have been disabled by do_gettimeoffset() + */ +static unsigned long integrator_gettimeoffset(void) +{ + volatile TimerStruct_t *timer1 = (TimerStruct_t *)TIMER1_VA_BASE; + unsigned long ticks1, ticks2, status; + + /* + * Get the current number of ticks. Note that there is a race + * condition between us reading the timer and checking for + * an interrupt. We get around this by ensuring that the + * counter has not reloaded between our two reads. + */ + ticks2 = timer1->TimerValue & 0xffff; + do { + ticks1 = ticks2; + status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS); + ticks2 = timer1->TimerValue & 0xffff; + } while (ticks2 > ticks1); + + /* + * Number of ticks since last interrupt. + */ + ticks1 = TIMER_RELOAD - ticks2; + + /* + * Interrupt pending? If so, we've reloaded once already. + */ + if (status & IRQMASK_TIMERINT1) + ticks1 += TIMER_RELOAD; + + /* + * Convert the ticks to usecs + */ + return TICKS2USECS(ticks1); +} + +/* + * IRQ handler for the timer + */ +static void integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE; + + // ...clear the interrupt + timer1->TimerClear = 1; + + do_leds(); + do_timer(regs); + do_profile(regs); +} + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +extern __inline__ void setup_timer(void) +{ + volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE; + volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE; + volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE; + + timer_irq.handler = integrator_timer_interrupt; + + /* + * Initialise to a known state (all timers off) + */ + timer0->TimerControl = 0; + timer1->TimerControl = 0; + timer2->TimerControl = 0; + + timer1->TimerLoad = TIMER_RELOAD; + timer1->TimerValue = TIMER_RELOAD; + timer1->TimerControl = TIMER_CTRL | 0x40; /* periodic */ + + /* + * Make irqs happen for the system timer + */ + setup_arm_irq(IRQ_TIMERINT1, &timer_irq); + gettimeoffset = integrator_gettimeoffset; +} diff --git a/include/asm-arm/arch-integrator/timex.h b/include/asm-arm/arch-integrator/timex.h new file mode 100644 index 000000000..87a762818 --- /dev/null +++ b/include/asm-arm/arch-integrator/timex.h @@ -0,0 +1,26 @@ +/* + * linux/include/asm-arm/arch-integrator/timex.h + * + * Integrator architecture timex specifications + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * ?? + */ +#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-integrator/uncompress.h b/include/asm-arm/arch-integrator/uncompress.h new file mode 100644 index 000000000..284a4aeb6 --- /dev/null +++ b/include/asm-arm/arch-integrator/uncompress.h @@ -0,0 +1,53 @@ +/* + * linux/include/asm-arm/arch-integrator/uncompress.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define AMBA_UART_DR (*(volatile unsigned char *)0x16000000) +#define AMBA_UART_LCRH (*(volatile unsigned char *)0x16000008) +#define AMBA_UART_LCRM (*(volatile unsigned char *)0x1600000c) +#define AMBA_UART_LCRL (*(volatile unsigned char *)0x16000010) +#define AMBA_UART_CR (*(volatile unsigned char *)0x16000014) +#define AMBA_UART_FR (*(volatile unsigned char *)0x16000018) + +/* + * This does not append a newline + */ +static void puts(const char *s) +{ + while (*s) { + while (AMBA_UART_FR & (1 << 5)); + + AMBA_UART_DR = *s; + + if (*s == '\n') { + while (AMBA_UART_FR & (1 << 5)); + + AMBA_UART_DR = '\r'; + } + s++; + } + while (AMBA_UART_FR & (1 << 3)); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() + +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-integrator/vmalloc.h b/include/asm-arm/arch-integrator/vmalloc.h new file mode 100644 index 000000000..ec8f98d3f --- /dev/null +++ b/include/asm-arm/arch-integrator/vmalloc.h @@ -0,0 +1,32 @@ +/* + * linux/include/asm-arm/arch-integrator/vmalloc.h + * + * Copyright (C) 2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h index 91bca91d8..8c3105066 100644 --- a/include/asm-arm/arch-sa1100/irq.h +++ b/include/asm-arm/arch-sa1100/irq.h @@ -134,7 +134,7 @@ static void sa1100_unmask_GPIO11_27_irq(unsigned int irq) int mask = (1 << GPIO_11_27_IRQ(irq)); if (GPIO_11_27_spurious & mask) { /* - * We don't want to miss an interrupt that would have occured + * We don't want to miss an interrupt that would have occurred * while it was masked. Simulate it if it is the case. */ int state = GPLR; diff --git a/include/asm-arm/hardware/amba_kmi.h b/include/asm-arm/hardware/amba_kmi.h new file mode 100644 index 000000000..a39e5be75 --- /dev/null +++ b/include/asm-arm/hardware/amba_kmi.h @@ -0,0 +1,92 @@ +/* + * linux/include/asm-arm/hardware/amba_kmi.h + * + * Internal header file for AMBA KMI ports + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * + * --------------------------------------------------------------------------- + * From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical + * Reference Manual - ARM DDI 0143B - see http://www.arm.com/ + * --------------------------------------------------------------------------- + */ +#ifndef ASM_ARM_HARDWARE_AMBA_KMI_H +#define ASM_ARM_HARDWARE_AMBA_KMI_H + +/* + * KMI control register: + * KMICR_TYPE 0 = PS2/AT mode, 1 = No line control bit mode + * KMICR_RXINTREN 1 = enable RX interrupts + * KMICR_TXINTREN 1 = enable TX interrupts + * KMICR_EN 1 = enable KMI + * KMICR_FD 1 = force KMI data low + * KMICR_FC 1 = force KMI clock low + */ +#define KMICR (KMI_BASE + 0x00) +#define KMICR_TYPE (1 << 5) +#define KMICR_RXINTREN (1 << 4) +#define KMICR_TXINTREN (1 << 3) +#define KMICR_EN (1 << 2) +#define KMICR_FD (1 << 1) +#define KMICR_FC (1 << 0) + +/* + * KMI status register: + * KMISTAT_TXEMPTY 1 = transmitter register empty + * KMISTAT_TXBUSY 1 = currently sending data + * KMISTAT_RXFULL 1 = receiver register ready to be read + * KMISTAT_RXBUSY 1 = currently receiving data + * KMISTAT_RXPARITY parity of last databyte received + * KMISTAT_IC current level of KMI clock input + * KMISTAT_ID current level of KMI data input + */ +#define KMISTAT (KMI_BASE + 0x04) +#define KMISTAT_TXEMPTY (1 << 6) +#define KMISTAT_TXBUSY (1 << 5) +#define KMISTAT_RXFULL (1 << 4) +#define KMISTAT_RXBUSY (1 << 3) +#define KMISTAT_RXPARITY (1 << 2) +#define KMISTAT_IC (1 << 1) +#define KMISTAT_ID (1 << 0) + +/* + * KMI data register + */ +#define KMIDATA (KMI_BASE + 0x08) + +/* + * KMI clock divisor: to generate 8MHz internal clock + * div = (ref / 8MHz) - 1; 0 <= div <= 15 + */ +#define KMICLKDIV (KMI_BASE + 0x0c) + +/* + * KMI interrupt register: + * KMIIR_TXINTR 1 = transmit interrupt asserted + * KMIIR_RXINTR 1 = receive interrupt asserted + */ +#define KMIIR (KMI_BASE + 0x10) +#define KMIIR_TXINTR (1 << 1) +#define KMIIR_RXINTR (1 << 0) + +/* + * The size of the KMI primecell + */ +#define KMI_SIZE (0x100) + +#endif diff --git a/include/asm-arm/hardware/pci_v3.h b/include/asm-arm/hardware/pci_v3.h index e64cebdd9..28b8e6d7b 100644 --- a/include/asm-arm/hardware/pci_v3.h +++ b/include/asm-arm/hardware/pci_v3.h @@ -88,41 +88,41 @@ /* PCI COMMAND REGISTER bits */ -#define V3_COMMAND_M_FBB_EN BIT9 -#define V3_COMMAND_M_SERR_EN BIT8 -#define V3_COMMAND_M_PAR_EN BIT6 -#define V3_COMMAND_M_MASTER_EN BIT2 -#define V3_COMMAND_M_MEM_EN BIT1 -#define V3_COMMAND_M_IO_EN BIT0 +#define V3_COMMAND_M_FBB_EN (1 << 9) +#define V3_COMMAND_M_SERR_EN (1 << 8) +#define V3_COMMAND_M_PAR_EN (1 << 6) +#define V3_COMMAND_M_MASTER_EN (1 << 2) +#define V3_COMMAND_M_MEM_EN (1 << 1) +#define V3_COMMAND_M_IO_EN (1 << 0) /* SYSTEM REGISTER bits */ -#define V3_SYSTEM_M_RST_OUT BIT15 -#define V3_SYSTEM_M_LOCK BIT14 +#define V3_SYSTEM_M_RST_OUT (1 << 15) +#define V3_SYSTEM_M_LOCK (1 << 14) /* PCI_CFG bits */ -#define V3_PCI_CFG_M_RETRY_EN BIT10 -#define V3_PCI_CFG_M_AD_LOW1 BIT9 -#define V3_PCI_CFG_M_AD_LOW0 BIT8 +#define V3_PCI_CFG_M_RETRY_EN (1 << 10) +#define V3_PCI_CFG_M_AD_LOW1 (1 << 9) +#define V3_PCI_CFG_M_AD_LOW0 (1 << 8) /* PCI_BASE register bits (PCI -> Local Bus) */ #define V3_PCI_BASE_M_ADR_BASE 0xFFF00000 #define V3_PCI_BASE_M_ADR_BASEL 0x000FFF00 -#define V3_PCI_BASE_M_PREFETCH BIT3 -#define V3_PCI_BASE_M_TYPE BIT2+BIT1 -#define V3_PCI_BASE_M_IO BIT0 +#define V3_PCI_BASE_M_PREFETCH (1 << 3) +#define V3_PCI_BASE_M_TYPE (3 << 1) +#define V3_PCI_BASE_M_IO (1 << 0) /* PCI MAP register bits (PCI -> Local bus) */ #define V3_PCI_MAP_M_MAP_ADR 0xFFF00000 -#define V3_PCI_MAP_M_RD_POST_INH BIT15 -#define V3_PCI_MAP_M_ROM_SIZE BIT11+BIT10 -#define V3_PCI_MAP_M_SWAP BIT9+BIT8 +#define V3_PCI_MAP_M_RD_POST_INH (1 << 15) +#define V3_PCI_MAP_M_ROM_SIZE (3 << 10) +#define V3_PCI_MAP_M_SWAP (3 << 8) #define V3_PCI_MAP_M_ADR_SIZE 0x000000F0 -#define V3_PCI_MAP_M_REG_EN BIT1 -#define V3_PCI_MAP_M_ENABLE BIT0 +#define V3_PCI_MAP_M_REG_EN (1 << 1) +#define V3_PCI_MAP_M_ENABLE (1 << 0) /* 9 => 512M window size */ @@ -134,15 +134,15 @@ /* LB_BASE register bits (Local bus -> PCI) */ #define V3_LB_BASE_M_MAP_ADR 0xFFF00000 -#define V3_LB_BASE_M_SWAP BIT9+BIT8 +#define V3_LB_BASE_M_SWAP (3 << 8) #define V3_LB_BASE_M_ADR_SIZE 0x000000F0 -#define V3_LB_BASE_M_PREFETCH BIT3 -#define V3_LB_BASE_M_ENABLE BIT0 +#define V3_LB_BASE_M_PREFETCH (1 << 3) +#define V3_LB_BASE_M_ENABLE (1 << 0) /* LB_MAP register bits (Local bus -> PCI) */ #define V3_LB_MAP_M_MAP_ADR 0xFFF0 #define V3_LB_MAP_M_TYPE 0x000E -#define V3_LB_MAP_M_AD_LOW_EN BIT0 +#define V3_LB_MAP_M_AD_LOW_EN (1 << 0) #endif diff --git a/include/asm-arm/hardware/serial_amba.h b/include/asm-arm/hardware/serial_amba.h index 15bfbb98d..41248a8f9 100644 --- a/include/asm-arm/hardware/serial_amba.h +++ b/include/asm-arm/hardware/serial_amba.h @@ -88,4 +88,7 @@ #define ARM_BAUD_2400 383 #define ARM_BAUD_1200 767 +#define AMBA_UARTRSR_ANY (AMBA_UARTRSR_OE|AMBA_UARTRSR_BE|AMBA_UARTRSR_PE|AMBA_UARTRSR_FE) +#define AMBA_UARTFR_MODEM_ANY (AMBA_UARTFR_DCD|AMBA_UARTFR_DSR|AMBA_UARTFR_CTS) + #endif diff --git a/include/asm-arm/mach/amba_kmi.h b/include/asm-arm/mach/amba_kmi.h new file mode 100644 index 000000000..bb679ec1f --- /dev/null +++ b/include/asm-arm/mach/amba_kmi.h @@ -0,0 +1,39 @@ +/* + * linux/include/asm-arm/mach/amba_kmi.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +struct kmi_info { + u_int base; + u_int irq; + u_char divisor; + u_char type; + u_char state; + u_char prev_rx; + u_char last_tx; + u_char resend_count; + u_short res; + wait_queue_head_t wait_q; + void (*rx)(struct kmi_info *, u_int val, + struct pt_regs *regs); + char name[8]; +}; + +#define KMI_KEYBOARD 0 +#define KMI_MOUSE 1 + +int register_kmi(struct kmi_info *kmi); diff --git a/include/asm-arm/param.h b/include/asm-arm/param.h index 992a9d6a5..67af57ce2 100644 --- a/include/asm-arm/param.h +++ b/include/asm-arm/param.h @@ -31,5 +31,9 @@ /* max length of hostname */ #define MAXHOSTNAMELEN 64 +#ifdef __KERNEL__ +# define CLOCKS_PER_SEC HZ +#endif + #endif diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 008fdde99..16d869626 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -180,8 +180,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* FIXME: this is not correct */ #define kern_addr_valid(addr) (1) -#define io_remap_page_range remap_page_range - #include <asm-generic/pgtable.h> #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/proc-armv/uaccess.h b/include/asm-arm/proc-armv/uaccess.h index 4baee9ce7..9f86fc617 100644 --- a/include/asm-arm/proc-armv/uaccess.h +++ b/include/asm-arm/proc-armv/uaccess.h @@ -24,7 +24,7 @@ extern __inline__ void set_fs (mm_segment_t fs) /* We use 33-bit arithmetic here... */ #define __range_ok(addr,size) ({ \ unsigned long flag, sum; \ - __asm__ __volatile__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \ + __asm__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \ : "=&r" (flag), "=&r" (sum) \ : "r" (addr), "Ir" (size), "0" (current->addr_limit) \ : "cc"); \ @@ -32,7 +32,7 @@ extern __inline__ void set_fs (mm_segment_t fs) #define __addr_ok(addr) ({ \ unsigned long flag; \ - __asm__ __volatile__("cmp %2, %0; movlo %0, #0" \ + __asm__("cmp %2, %0; movlo %0, #0" \ : "=&r" (flag) \ : "0" (current->addr_limit), "r" (addr) \ : "cc"); \ @@ -57,24 +57,8 @@ extern __inline__ void set_fs (mm_segment_t fs) #define __put_user_asm_half(x,addr,err) \ ({ \ unsigned long __temp = (unsigned long)(x); \ - __asm__ __volatile__( \ - "1: strbt %1,[%3],#0\n" \ - "2: strbt %2,[%4],#0\n" \ - "3:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "4: mov %0, %5\n" \ - " b 3b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 4b\n" \ - " .long 2b, 4b\n" \ - " .previous" \ - : "=r" (err) \ - : "r" (__temp), "r" (__temp >> 8), \ - "r" (addr), "r" ((int)(addr) + 1), \ - "i" (-EFAULT), "0" (err)); \ + __put_user_asm_byte(__temp, addr, err); \ + __put_user_asm_byte(__temp >> 8, (int)(addr) + 1, err); \ }) #define __put_user_asm_word(x,addr,err) \ @@ -112,26 +96,10 @@ extern __inline__ void set_fs (mm_segment_t fs) #define __get_user_asm_half(x,addr,err) \ ({ \ - unsigned long __temp; \ - __asm__ __volatile__( \ - "1: ldrbt %1,[%3],#0\n" \ - "2: ldrbt %2,[%4],#0\n" \ - " orr %1, %1, %2, lsl #8\n" \ - "3:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "4: mov %0, %5\n" \ - " mov %1, #0\n" \ - " b 3b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 4b\n" \ - " .long 2b, 4b\n" \ - " .previous" \ - : "=r" (err), "=r" (x), "=&r" (__temp) \ - : "r" (addr), "r" ((int)(addr) + 1), \ - "i" (-EFAULT), "0" (err)); \ + unsigned long __b1, __b2; \ + __get_user_asm_byte(__b1, addr, err); \ + __get_user_asm_byte(__b2, (int)(addr) + 1, err); \ + (x) = __b1 | (__b2 << 8); \ }) diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 18008c510..904001d64 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -28,7 +28,7 @@ #ifdef CONFIG_CPU_32 # define CPU_INCLUDE_NAME "asm/cpu-multi32.h" -# ifdef CONFIG_CPU_ARM6 +# ifdef CONFIG_CPU_ARM610 # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU @@ -36,7 +36,7 @@ # define CPU_NAME arm6 # endif # endif -# ifdef CONFIG_CPU_ARM7 +# ifdef CONFIG_CPU_ARM710 # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU @@ -44,7 +44,7 @@ # define CPU_NAME arm7 # endif # endif -# ifdef CONFIG_CPU_ARM720 +# ifdef CONFIG_CPU_ARM720T # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU @@ -52,7 +52,7 @@ # define CPU_NAME arm720 # endif # endif -# ifdef CONFIG_CPU_ARM920 +# ifdef CONFIG_CPU_ARM920T # ifdef CPU_NAME # undef MULTI_CPU # define MULTI_CPU diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index 7e8040d73..f7aea9b38 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -182,7 +182,8 @@ extern __inline__ long strnlen_user(const char *s, long n) #define __put_user_nocheck(x,ptr,size) \ ({ \ long __pu_err = 0; \ - __put_user_size((x),(ptr),(size),__pu_err); \ + __typeof__(*(ptr)) *__pu_addr = (ptr); \ + __put_user_size((x),__pu_addr,(size),__pu_err); \ __pu_err; \ }) diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 9dcd00962..208a17af2 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -400,7 +400,6 @@ static inline long _exit(int exitcode) static inline pid_t waitpid(pid_t pid, int *wait_stat, int options) { - extern long sys_wait4(int, int *, int, struct rusage *); return sys_wait4((int)pid, wait_stat, options, NULL); } @@ -412,7 +411,6 @@ static inline long delete_module(const char *name) static inline pid_t wait(int * wait_stat) { - extern long sys_wait4(int, int *, int, struct rusage *); return sys_wait4(-1, wait_stat, 0, NULL); } diff --git a/include/asm-arm/xor.h b/include/asm-arm/xor.h index c82eb12a5..a222bbd81 100644 --- a/include/asm-arm/xor.h +++ b/include/asm-arm/xor.h @@ -1 +1,142 @@ +/* + * linux/include/asm-arm/xor.h + * + * Copyright (C) 2001 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + #include <asm-generic/xor.h> + +#define __XOR(a1, a2) a1 ^= a2 + +#define GET_BLOCK_2(dst) \ + __asm__("ldmia %0, {%1, %2}" \ + : "=r" (dst), "=r" (a1), "=r" (a2) \ + : "0" (dst)) + +#define GET_BLOCK_4(dst) \ + __asm__("ldmia %0, {%1, %2, %3, %4}" \ + : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \ + : "0" (dst)) + +#define XOR_BLOCK_2(src) \ + __asm__("ldmia %0!, {%1, %2}" \ + : "=r" (src), "=r" (b1), "=r" (b2) \ + : "0" (src)); \ + __XOR(a1, b1); __XOR(a2, b2); + +#define XOR_BLOCK_4(src) \ + __asm__("ldmia %0!, {%1, %2, %3, %4}" \ + : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \ + : "0" (src)); \ + __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4) + +#define PUT_BLOCK_2(dst) \ + __asm__ __volatile__("stmia %0!, {%2, %3}" \ + : "=r" (dst) \ + : "0" (dst), "r" (a1), "r" (a2)) + +#define PUT_BLOCK_4(dst) \ + __asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \ + : "=r" (dst) \ + : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4)) + +static void +xor_arm4regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 4; + register unsigned int a1 __asm__("r4"); + register unsigned int a2 __asm__("r5"); + register unsigned int a3 __asm__("r6"); + register unsigned int a4 __asm__("r7"); + register unsigned int b1 __asm__("r8"); + register unsigned int b2 __asm__("r9"); + register unsigned int b3 __asm__("ip"); + register unsigned int b4 __asm__("lr"); + + do { + GET_BLOCK_4(p1); + XOR_BLOCK_4(p2); + PUT_BLOCK_4(p1); + } while (--lines); +} + +static void +xor_arm4regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 4; + register unsigned int a1 __asm__("r4"); + register unsigned int a2 __asm__("r5"); + register unsigned int a3 __asm__("r6"); + register unsigned int a4 __asm__("r7"); + register unsigned int b1 __asm__("r8"); + register unsigned int b2 __asm__("r9"); + register unsigned int b3 __asm__("ip"); + register unsigned int b4 __asm__("lr"); + + do { + GET_BLOCK_4(p1); + XOR_BLOCK_4(p2); + XOR_BLOCK_4(p3); + PUT_BLOCK_4(p1); + } while (--lines); +} + +static void +xor_arm4regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 2; + register unsigned int a1 __asm__("r8"); + register unsigned int a2 __asm__("r9"); + register unsigned int b1 __asm__("ip"); + register unsigned int b2 __asm__("lr"); + + do { + GET_BLOCK_2(p1); + XOR_BLOCK_2(p2); + XOR_BLOCK_2(p3); + XOR_BLOCK_2(p4); + PUT_BLOCK_2(p1); + } while (--lines); +} + +static void +xor_arm4regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4, unsigned long *p5) +{ + unsigned int lines = bytes / sizeof(unsigned long) / 2; + register unsigned int a1 __asm__("r8"); + register unsigned int a2 __asm__("r9"); + register unsigned int b1 __asm__("ip"); + register unsigned int b2 __asm__("lr"); + + do { + GET_BLOCK_2(p1); + XOR_BLOCK_2(p2); + XOR_BLOCK_2(p3); + XOR_BLOCK_2(p4); + XOR_BLOCK_2(p5); + PUT_BLOCK_2(p1); + } while (--lines); +} + +static struct xor_block_template xor_block_arm4regs = { + name: "arm4regs", + do_2: xor_arm4regs_2, + do_3: xor_arm4regs_3, + do_4: xor_arm4regs_4, + do_5: xor_arm4regs_5, +}; + +#undef XOR_TRY_TEMPLATES +#define XOR_TRY_TEMPLATES \ + do { \ + xor_speed(&xor_block_arm4regs); \ + xor_speed(&xor_block_8regs); \ + xor_speed(&xor_block_32regs); \ + } while (0) diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h index 94a7ea264..a50b747cd 100644 --- a/include/asm-i386/atomic.h +++ b/include/asm-i386/atomic.h @@ -23,9 +23,33 @@ typedef struct { volatile int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } +/** + * atomic_read - read atomic variable + * @v: pointer of type atomic_t + * + * Atomically reads the value of @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_read(v) ((v)->counter) + +/** + * atomic_set - set atomic variable + * @v: pointer of type atomic_t + * @i: required value + * + * Atomically sets the value of @v to @i. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_set(v,i) (((v)->counter) = (i)) +/** + * atomic_add - add integer to atomic variable + * @i: integer value to add + * @v: pointer of type atomic_t + * + * Atomically adds @i to @v. Note that the guaranteed useful range + * of an atomic_t is only 24 bits. + */ static __inline__ void atomic_add(int i, atomic_t *v) { __asm__ __volatile__( @@ -34,6 +58,14 @@ static __inline__ void atomic_add(int i, atomic_t *v) :"ir" (i), "m" (v->counter)); } +/** + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ void atomic_sub(int i, atomic_t *v) { __asm__ __volatile__( @@ -42,6 +74,16 @@ static __inline__ void atomic_sub(int i, atomic_t *v) :"ir" (i), "m" (v->counter)); } +/** + * atomic_sub_and_test - test variable then subtract + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v and returns + * true if the result is zero, or false for all + * other cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ int atomic_sub_and_test(int i, atomic_t *v) { unsigned char c; @@ -53,6 +95,13 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v) return c; } +/** + * atomic_inc - increment atomic variable + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ void atomic_inc(atomic_t *v) { __asm__ __volatile__( @@ -61,6 +110,13 @@ static __inline__ void atomic_inc(atomic_t *v) :"m" (v->counter)); } +/** + * atomic_dec - decrement the atomic variable + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ void atomic_dec(atomic_t *v) { __asm__ __volatile__( @@ -69,6 +125,15 @@ static __inline__ void atomic_dec(atomic_t *v) :"m" (v->counter)); } +/** + * atomic_dec_and_test - decrement by 1 and test + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1 and + * returns true if the result is 0, or false for all other + * cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ int atomic_dec_and_test(atomic_t *v) { unsigned char c; @@ -80,6 +145,15 @@ static __inline__ int atomic_dec_and_test(atomic_t *v) return c != 0; } +/** + * atomic_inc_and_test - increment by 1 and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ int atomic_inc_and_test(atomic_t *v) { unsigned char c; @@ -91,6 +165,16 @@ static __inline__ int atomic_inc_and_test(atomic_t *v) return c != 0; } +/** + * atomic_add_negative - add and test if negative + * @v: pointer of type atomic_t + * @i: integer value to add + * + * Atomically adds @i to @v and returns true + * if the result is negative, or false when + * result is greater than or equal to zero. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ static __inline__ int atomic_add_negative(int i, atomic_t *v) { unsigned char c; diff --git a/include/asm-i386/highmem.h b/include/asm-i386/highmem.h index dfff7fad0..49c848738 100644 --- a/include/asm-i386/highmem.h +++ b/include/asm-i386/highmem.h @@ -2,14 +2,14 @@ * highmem.h: virtual kernel memory mappings for high memory * * Used in CONFIG_HIGHMEM systems for memory pages which - * are not addressable by direct kernel virtual adresses. + * are not addressable by direct kernel virtual addresses. * * Copyright (C) 1999 Gerhard Wichert, Siemens AG * Gerhard.Wichert@pdb.siemens.de * * * Redesigned the x86 32-bit VM architecture to deal with - * up to 16 Terrabyte physical memory. With current x86 CPUs + * up to 16 Terabyte physical memory. With current x86 CPUs * we now support up to 64 Gigabytes physical RAM. * * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index 074957886..d580f8e71 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -152,6 +152,14 @@ extern inline void pci_dma_sync_sg(struct pci_dev *hwdev, */ extern inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask) { + /* + * we fall back to GFP_DMA when the mask isn't all 1s, + * so we can't guarantee allocations that must be + * within a tighter range than GFP_DMA.. + */ + if(mask < 0x00ffffff) + return 0; + return 1; } diff --git a/include/asm-i386/pgalloc-2level.h b/include/asm-i386/pgalloc-2level.h deleted file mode 100644 index 4ff5ce3b7..000000000 --- a/include/asm-i386/pgalloc-2level.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _I386_PGALLOC_2LEVEL_H -#define _I386_PGALLOC_2LEVEL_H - -/* - * traditional i386 two-level paging, page table allocation routines: - */ - -extern __inline__ pmd_t *get_pmd_fast(void) -{ - return (pmd_t *)0; -} - -extern __inline__ void free_pmd_fast(pmd_t *pmd) { } -extern __inline__ void free_pmd_slow(pmd_t *pmd) { } - -extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address) -{ - if (!pgd) - BUG(); - return (pmd_t *) pgd; -} - -#endif /* _I386_PGALLOC_2LEVEL_H */ diff --git a/include/asm-i386/pgalloc-3level.h b/include/asm-i386/pgalloc-3level.h deleted file mode 100644 index 30099a755..000000000 --- a/include/asm-i386/pgalloc-3level.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef _I386_PGALLOC_3LEVEL_H -#define _I386_PGALLOC_3LEVEL_H - -/* - * Intel Physical Address Extension (PAE) Mode - three-level page - * tables on PPro+ CPUs. Page-table allocation routines. - * - * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> - */ - -extern __inline__ pmd_t *get_pmd_slow(void) -{ - pmd_t *ret = (pmd_t *)__get_free_page(GFP_KERNEL); - - if (ret) - memset(ret, 0, PAGE_SIZE); - return ret; -} - -extern __inline__ pmd_t *get_pmd_fast(void) -{ - unsigned long *ret; - - if ((ret = pmd_quicklist) != NULL) { - pmd_quicklist = (unsigned long *)(*ret); - ret[0] = 0; - pgtable_cache_size--; - } else - ret = (unsigned long *)get_pmd_slow(); - return (pmd_t *)ret; -} - -extern __inline__ void free_pmd_fast(pmd_t *pmd) -{ - *(unsigned long *)pmd = (unsigned long) pmd_quicklist; - pmd_quicklist = (unsigned long *) pmd; - pgtable_cache_size++; -} - -extern __inline__ void free_pmd_slow(pmd_t *pmd) -{ - free_page((unsigned long)pmd); -} - -extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address) -{ - if (!pgd) - BUG(); - address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); - if (pgd_none(*pgd)) { - pmd_t *page = get_pmd_fast(); - - if (!page) - page = get_pmd_slow(); - if (page) { - if (pgd_none(*pgd)) { - set_pgd(pgd, __pgd(1 + __pa(page))); - __flush_tlb(); - return page + address; - } else - free_pmd_fast(page); - } else - return NULL; - } - return (pmd_t *)pgd_page(*pgd) + address; -} - -#endif /* _I386_PGALLOC_3LEVEL_H */ diff --git a/include/asm-i386/pgalloc.h b/include/asm-i386/pgalloc.h index 64a9a7f68..b8c12a6f7 100644 --- a/include/asm-i386/pgalloc.h +++ b/include/asm-i386/pgalloc.h @@ -11,35 +11,56 @@ #define pte_quicklist (current_cpu_data.pte_quick) #define pgtable_cache_size (current_cpu_data.pgtable_cache_sz) -#if CONFIG_X86_PAE -# include <asm/pgalloc-3level.h> -#else -# include <asm/pgalloc-2level.h> -#endif +#define pmd_populate(mm, pmd, pte) \ + set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) /* - * Allocate and free page tables. The xxx_kernel() versions are - * used to allocate a kernel page table - this turns on ASN bits - * if any. + * Allocate and free page tables. */ +#if CONFIG_X86_PAE + +extern void *kmalloc(size_t, int); +extern void kfree(const void *); + extern __inline__ pgd_t *get_pgd_slow(void) { - pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL); + int i; + pgd_t *pgd = kmalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); + + if (pgd) { + for (i = 0; i < USER_PTRS_PER_PGD; i++) { + unsigned long pmd = __get_free_page(GFP_KERNEL); + if (!pmd) + goto out_oom; + clear_page(pmd); + set_pgd(pgd + i, __pgd(1 + __pa(pmd))); + } + memcpy(pgd + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); + } + return pgd; +out_oom: + for (i--; i >= 0; i--) + free_page((unsigned long)__va(pgd_val(pgd[i])-1)); + kfree(pgd); + return NULL; +} - if (ret) { -#if CONFIG_X86_PAE - int i; - for (i = 0; i < USER_PTRS_PER_PGD; i++) - __pgd_clear(ret + i); #else - memset(ret, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); -#endif - memcpy(ret + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); + +extern __inline__ pgd_t *get_pgd_slow(void) +{ + pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL); + + if (pgd) { + memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); + memcpy(pgd + USER_PTRS_PER_PGD, swapper_pg_dir + USER_PTRS_PER_PGD, (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); } - return ret; + return pgd; } +#endif + extern __inline__ pgd_t *get_pgd_fast(void) { unsigned long *ret; @@ -62,17 +83,32 @@ extern __inline__ void free_pgd_fast(pgd_t *pgd) extern __inline__ void free_pgd_slow(pgd_t *pgd) { +#if CONFIG_X86_PAE + int i; + + for (i = 0; i < USER_PTRS_PER_PGD; i++) + free_page((unsigned long)__va(pgd_val(pgd[i])-1)); + kfree(pgd); +#else free_page((unsigned long)pgd); +#endif } -extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); -extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted); +static inline pte_t *pte_alloc_one(struct mm_struct *mm, unsigned long address) +{ + pte_t *pte; -extern __inline__ pte_t *get_pte_fast(void) + pte = (pte_t *) __get_free_page(GFP_KERNEL); + if (pte) + clear_page(pte); + return pte; +} + +static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long address) { unsigned long *ret; - if((ret = (unsigned long *)pte_quicklist) != NULL) { + if ((ret = (unsigned long *)pte_quicklist) != NULL) { pte_quicklist = (unsigned long *)(*ret); ret[0] = ret[1]; pgtable_cache_size--; @@ -80,75 +116,34 @@ extern __inline__ pte_t *get_pte_fast(void) return (pte_t *)ret; } -extern __inline__ void free_pte_fast(pte_t *pte) +extern __inline__ void pte_free_fast(pte_t *pte) { *(unsigned long *)pte = (unsigned long) pte_quicklist; pte_quicklist = (unsigned long *) pte; pgtable_cache_size++; } -extern __inline__ void free_pte_slow(pte_t *pte) +extern __inline__ void pte_free_slow(pte_t *pte) { free_page((unsigned long)pte); } -#define pte_free_kernel(pte) free_pte_slow(pte) -#define pte_free(pte) free_pte_slow(pte) -#define pgd_free(pgd) free_pgd_slow(pgd) -#define pgd_alloc() get_pgd_fast() - -extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) -{ - if (!pmd) - BUG(); - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - if (pmd_none(*pmd)) { - pte_t * page = (pte_t *) get_pte_fast(); - - if (!page) - return get_pte_kernel_slow(pmd, address); - set_pmd(pmd, __pmd(_KERNPG_TABLE + __pa(page))); - return page + address; - } - if (pmd_bad(*pmd)) { - __handle_bad_pmd_kernel(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; -} - -extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) -{ - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - - if (pmd_none(*pmd)) - goto getnew; - if (pmd_bad(*pmd)) - goto fix; - return (pte_t *)pmd_page(*pmd) + address; -getnew: -{ - unsigned long page = (unsigned long) get_pte_fast(); - - if (!page) - return get_pte_slow(pmd, address); - set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(page))); - return (pte_t *)page + address; -} -fix: - __handle_bad_pmd(pmd); - return NULL; -} +#define pte_free(pte) pte_free_slow(pte) +#define pgd_free(pgd) free_pgd_slow(pgd) +#define pgd_alloc() get_pgd_fast() /* * allocating and freeing a pmd is trivial: the 1-entry pmd is * inside the pgd, so has no extra memory associated with it. - * (In the PAE case we free the page.) + * (In the PAE case we free the pmds as part of the pgd.) */ -#define pmd_free(pmd) free_pmd_slow(pmd) -#define pmd_free_kernel pmd_free -#define pmd_alloc_kernel pmd_alloc +#define pmd_alloc_one_fast(mm, addr) ({ BUG(); ((pmd_t *)1); }) +#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) +#define pmd_free_slow(x) do { } while (0) +#define pmd_free_fast(x) do { } while (0) +#define pmd_free(x) do { } while (0) +#define pgd_populate(mm, pmd, pte) BUG() extern int do_check_pgt_cache(int, int); diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h index aac1e3121..6253c0585 100644 --- a/include/asm-i386/pgtable-3level.h +++ b/include/asm-i386/pgtable-3level.h @@ -33,17 +33,9 @@ #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pgd_val(e)) -/* - * Subtle, in PAE mode we cannot have zeroes in the top level - * page directory, the CPU enforces this. (ie. the PGD entry - * always has to have the present bit set.) The CPU caches - * the 4 pgd entries internally, so there is no extra memory - * load on TLB miss, despite one more level of indirection. - */ -#define EMPTY_PGD (__pa(empty_zero_page) + 1) -#define pgd_none(x) (pgd_val(x) == EMPTY_PGD) +extern inline int pgd_none(pgd_t pgd) { return 0; } extern inline int pgd_bad(pgd_t pgd) { return 0; } -extern inline int pgd_present(pgd_t pgd) { return !pgd_none(pgd); } +extern inline int pgd_present(pgd_t pgd) { return 1; } /* Rules for using set_pte: the pte being assigned *must* be * either not present or in a state where the hardware will @@ -63,21 +55,12 @@ static inline void set_pte(pte_t *ptep, pte_t pte) set_64bit((unsigned long long *)(pgdptr),pgd_val(pgdval)) /* - * Pentium-II errata A13: in PAE mode we explicitly have to flush - * the TLB via cr3 if the top-level pgd is changed... This was one tough - * thing to find out - guess i should first read all the documentation - * next time around ;) + * Pentium-II erratum A13: in PAE mode we explicitly have to flush + * the TLB via cr3 if the top-level pgd is changed... + * We do not let the generic code free and clear pgd entries due to + * this erratum. */ -extern inline void __pgd_clear (pgd_t * pgd) -{ - set_pgd(pgd, __pgd(EMPTY_PGD)); -} - -extern inline void pgd_clear (pgd_t * pgd) -{ - __pgd_clear(pgd); - __flush_tlb(); -} +extern inline void pgd_clear (pgd_t * pgd) { } #define pgd_page(pgd) \ ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK)) diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index a25f3bcfd..28f1b7b26 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -243,12 +243,6 @@ extern unsigned long empty_zero_page[1024]; /* page table for 0-4MB for everybody */ extern unsigned long pg0[1024]; -/* - * Handling allocation failures during page table setup. - */ -extern void __handle_bad_pmd(pmd_t * pmd); -extern void __handle_bad_pmd_kernel(pmd_t * pmd); - #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) #define pte_clear(xp) do { set_pte(xp, __pte(0)); } while (0) diff --git a/include/asm-i386/string-486.h b/include/asm-i386/string-486.h index 06022132c..51bfd051b 100644 --- a/include/asm-i386/string-486.h +++ b/include/asm-i386/string-486.h @@ -352,11 +352,6 @@ return (to); #ifdef CONFIG_X86_USE_3DNOW -#include <linux/spinlock.h> -#include <asm/system.h> -#include <asm/ptrace.h> -#include <linux/smp.h> -#include <linux/interrupt.h> #include <asm/mmx.h> /* @@ -365,14 +360,14 @@ return (to); static inline void * __constant_memcpy3d(void * to, const void * from, size_t len) { - if(len<512 || in_interrupt()) + if (len < 512) return __memcpy_c(to, from, len); return _mmx_memcpy(to, from, len); } static inline void *__memcpy3d(void *to, const void *from, size_t len) { - if(len<512 || in_interrupt()) + if(len < 512) return __memcpy_g(to, from, len); return _mmx_memcpy(to, from, len); } diff --git a/include/asm-i386/string.h b/include/asm-i386/string.h index 62bf7916c..0c1ca69b3 100644 --- a/include/asm-i386/string.h +++ b/include/asm-i386/string.h @@ -287,13 +287,6 @@ __asm__ __volatile__( \ #ifdef CONFIG_X86_USE_3DNOW -/* All this just for in_interrupt() ... */ - -#include <asm/system.h> -#include <asm/ptrace.h> -#include <linux/smp.h> -#include <linux/spinlock.h> -#include <linux/interrupt.h> #include <asm/mmx.h> /* @@ -302,14 +295,14 @@ __asm__ __volatile__( \ static inline void * __constant_memcpy3d(void * to, const void * from, size_t len) { - if(len<512 || in_interrupt()) + if (len < 512) return __constant_memcpy(to, from, len); return _mmx_memcpy(to, from, len); } extern __inline__ void *__memcpy3d(void *to, const void *from, size_t len) { - if(len<512 || in_interrupt()) + if (len < 512) return __memcpy(to, from, len); return _mmx_memcpy(to, from, len); } @@ -549,10 +542,10 @@ static inline void * memscan(void * addr, int c, size_t size) { if (!size) return addr; - __asm__("repnz; scasb - jnz 1f - dec %%edi -1: " + __asm__("repnz; scasb\n\t" + "jnz 1f\n\t" + "dec %%edi\n" + "1:" : "=D" (addr), "=c" (size) : "0" (addr), "1" (size), "a" (c)); return addr; diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h index 52e24682e..8da0ce326 100644 --- a/include/asm-i386/system.h +++ b/include/asm-i386/system.h @@ -144,16 +144,17 @@ struct __xchg_dummy { unsigned long a[100]; }; extern inline void __set_64bit (unsigned long long * ptr, unsigned int low, unsigned int high) { -__asm__ __volatile__ ( - "1: movl (%0), %%eax; - movl 4(%0), %%edx; - cmpxchg8b (%0); - jnz 1b" - :: "D"(ptr), + __asm__ __volatile__ ( + "\n1:\t" + "movl (%0), %%eax\n\t" + "movl 4(%0), %%edx\n\t" + "cmpxchg8b (%0)\n\t" + "jnz 1b" + : /* no outputs */ + : "D"(ptr), "b"(low), "c"(high) - : - "ax","dx","memory"); + : "ax","dx","memory"); } extern void inline __set_64bit_constant (unsigned long long *ptr, diff --git a/include/asm-ia64/sn/pci/bridge.h b/include/asm-ia64/sn/pci/bridge.h index f070d6d2c..a83d90ee6 100644 --- a/include/asm-ia64/sn/pci/bridge.h +++ b/include/asm-ia64/sn/pci/bridge.h @@ -373,7 +373,7 @@ typedef struct bridge_err_cmdword_s { ds:2, /* Data size */ gbr:1, /* GBR enable */ vbpm:1, /* VBPM message */ - error:1, /* Error occured */ + error:1, /* Error occurred */ barr:1, /* Barrier op */ rsvd:8; } berr_st; @@ -693,7 +693,7 @@ typedef volatile struct bridge_s { #define BRIDGE_INT_ADDR(x) (BRIDGE_INT_ADDR0+(x)*BRIDGE_INT_ADDR_OFF) #define BRIDGE_INT_VIEW 0x000174 /* Interrupt view */ -#define BRIDGE_MULTIPLE_INT 0x00017c /* Multiple interrupt occured */ +#define BRIDGE_MULTIPLE_INT 0x00017c /* Multiple interrupt occurred */ #define BRIDGE_FORCE_ALWAYS0 0x000184 /* Force an interrupt (always)*/ #define BRIDGE_FORCE_ALWAYS_OFF 0x000008 /* Force Always offset */ diff --git a/include/asm-ia64/sn/pci/pcibr_private.h b/include/asm-ia64/sn/pci/pcibr_private.h index f7f033989..1eb1e8e6f 100644 --- a/include/asm-ia64/sn/pci/pcibr_private.h +++ b/include/asm-ia64/sn/pci/pcibr_private.h @@ -328,7 +328,7 @@ struct pcibr_soft_s { #ifdef IRIX toid_t bserr_toutid; /* Timeout started by errintr */ #endif - iopaddr_t bserr_addr; /* Address where error occured */ + iopaddr_t bserr_addr; /* Address where error occurred */ bridgereg_t bserr_intstat; /* interrupts active at error time */ } bs_errinfo; diff --git a/include/asm-ia64/sn/sn1/hubmd.h b/include/asm-ia64/sn/sn1/hubmd.h index 0f5bada86..681e2fb42 100644 --- a/include/asm-ia64/sn/sn1/hubmd.h +++ b/include/asm-ia64/sn/sn1/hubmd.h @@ -2140,7 +2140,7 @@ typedef union md_mb_ecc_config_u { * corresponds to the valid bit, and bit 1 of each two-bit field * * corresponds to the overrun bit. * * The rule for the valid bit is that it gets set whenever that error * - * occurs, regardless of whether a higher priority error has occured. * + * occurs, regardless of whether a higher priority error has occurred. * * The rule for the overrun bit is that it gets set whenever we are * * unable to record the address information for this particular * * error, due to a previous error of the same or higher priority. * @@ -2221,7 +2221,7 @@ typedef union md_mem_error_u { * corresponds to the valid bit, and bit 1 of each two-bit field * * corresponds to the overrun bit. * * The rule for the valid bit is that it gets set whenever that error * - * occurs, regardless of whether a higher priority error has occured. * + * occurs, regardless of whether a higher priority error has occurred. * * The rule for the overrun bit is that it gets set whenever we are * * unable to record the address information for this particular * * error, due to a previous error of the same or higher priority. * diff --git a/include/asm-ia64/sn/sn1/hubmd_next.h b/include/asm-ia64/sn/sn1/hubmd_next.h index 452167d63..da8e58759 100644 --- a/include/asm-ia64/sn/sn1/hubmd_next.h +++ b/include/asm-ia64/sn/sn1/hubmd_next.h @@ -648,7 +648,7 @@ typedef union md_pdir { #define MD_SDIR_MASK 0xffffffff /* When premium mode is on for probing but standard directory memory - is installed, the vaild directory bits depend on the phys. bank */ + is installed, the valid directory bits depend on the phys. bank */ #define MD_PDIR_PROBE_MASK(pb) 0xffffffffffffffff #define MD_SDIR_PROBE_MASK(pb) (0xffff0000ffff << ((pb) ? 16 : 0)) diff --git a/include/asm-ia64/sn/xtalk/xbow.h b/include/asm-ia64/sn/xtalk/xbow.h index c2b71497b..a15419dcd 100644 --- a/include/asm-ia64/sn/xtalk/xbow.h +++ b/include/asm-ia64/sn/xtalk/xbow.h @@ -494,7 +494,7 @@ typedef union xbw0_cmdword_u { typedef union xbw0_status_u { xbowreg_t statusword; struct { - uint32_t mult_err:1, /* Multiple error occured */ + uint32_t mult_err:1, /* Multiple error occurred */ connect_tout:1, /* Connection timeout */ xtalk_err:1, /* Xtalk pkt with error bit */ /* End of Xbridge only */ @@ -524,7 +524,7 @@ typedef union xbw0_status_u { /* End of Xbridge only */ xtalk_err:1, /* Xtalk pkt with error bit */ connect_tout:1, /* Connection timeout */ - mult_err:1; /* Multiple error occured */ + mult_err:1; /* Multiple error occurred */ } xbw0_stfield; } xbw0_status_t; diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h index 6fd4ce627..af84584a8 100644 --- a/include/asm-ia64/system.h +++ b/include/asm-ia64/system.h @@ -64,7 +64,7 @@ extern struct ia64_boot_param { } console_info; __u16 num_pci_vectors; /* number of ACPI derived PCI IRQ's*/ __u64 pci_vectors; /* physical address of PCI data (pci_vector_struct)*/ - __u64 fpswa; /* physical address of the the fpswa interface */ + __u64 fpswa; /* physical address of the fpswa interface */ __u64 initrd_start; __u64 initrd_size; } ia64_boot_param; diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 12760cc3c..326471707 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -21,7 +21,23 @@ typedef struct { volatile int counter; } atomic_t; #ifdef __KERNEL__ #define ATOMIC_INIT(i) { (i) } +/* + * atomic_read - read atomic variable + * @v: pointer of type atomic_t + * + * Atomically reads the value of @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_read(v) ((v)->counter) + +/* + * atomic_set - set atomic variable + * @v: pointer of type atomic_t + * @i: required value + * + * Atomically sets the value of @v to @i. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_set(v,i) ((v)->counter = (i)) #if !defined(CONFIG_CPU_HAS_LLSC) @@ -31,6 +47,13 @@ typedef struct { volatile int counter; } atomic_t; /* * The MIPS I implementation is only atomic with respect to * interrupts. R3000 based multiprocessor machines are rare anyway ... + * + * atomic_add - add integer to atomic variable + * @i: integer value to add + * @v: pointer of type atomic_t + * + * Atomically adds @i to @v. Note that the guaranteed useful range + * of an atomic_t is only 24 bits. */ extern __inline__ void atomic_add(int i, atomic_t * v) { @@ -42,6 +65,14 @@ extern __inline__ void atomic_add(int i, atomic_t * v) restore_flags(flags); } +/* + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ extern __inline__ void atomic_sub(int i, atomic_t * v) { int flags; @@ -87,6 +118,14 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v) * implementation is SMP safe ... */ +/* + * atomic_add - add integer to atomic variable + * @i: integer value to add + * @v: pointer of type atomic_t + * + * Atomically adds @i to @v. Note that the guaranteed useful range + * of an atomic_t is only 24 bits. + */ extern __inline__ void atomic_add(int i, atomic_t * v) { unsigned long temp; @@ -100,6 +139,14 @@ extern __inline__ void atomic_add(int i, atomic_t * v) : "Ir" (i), "m" (v->counter)); } +/* + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ extern __inline__ void atomic_sub(int i, atomic_t * v) { unsigned long temp; @@ -160,11 +207,71 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) +/* + * atomic_sub_and_test - test variable then subtract + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v and returns + * true if the result is zero, or false for all + * other cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) + +/* + * atomic_inc_and_test - increment by 1 and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ +#define atomic_inc_and_test(v) (atomic_inc_return(1, (v)) == 0) + +/* + * atomic_dec_and_test - decrement by 1 and test + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1 and + * returns true if the result is 0, or false for all other + * cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) +/* + * atomic_inc - increment atomic variable + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_inc(v) atomic_add(1,(v)) + +/* + * atomic_dec - decrement the atomic variable + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_dec(v) atomic_sub(1,(v)) + +/* + * atomic_add_negative - add and test if negative + * @v: pointer of type atomic_t + * @i: integer value to add + * + * Atomically adds @i to @v and returns true + * if the result is negative, or false when + * result is greater than or equal to zero. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + * + * Currently not implemented for MIPS. + */ + #endif /* defined(__KERNEL__) */ #endif /* __ASM_ATOMIC_H */ diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index 78f6a63e9..a5a4ee7b8 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -209,9 +209,18 @@ extern inline void pci_dma_sync_sg(struct pci_dev *hwdev, */ extern inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask) { + /* + * we fall back to GFP_DMA when the mask isn't all 1s, + * so we can't guarantee allocations that must be + * within a tighter range than GFP_DMA.. + */ + if (mask < 0x00ffffff) + return 0; + return 1; } + /* * These macros should be used after a pci_map_sg call has been done * to get bus addresses of each of the SG entries and their lengths. diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h index 0fa39f666..82ac65aac 100644 --- a/include/asm-mips/pgalloc.h +++ b/include/asm-mips/pgalloc.h @@ -33,9 +33,7 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm, /* - * Allocate and free page tables. The xxx_kernel() versions are - * used to allocate a kernel page table - this turns on ASN bits - * if any. + * Allocate and free page tables. */ #define pgd_quicklist (current_cpu_data.pgd_quick) @@ -43,6 +41,8 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm, #define pte_quicklist (current_cpu_data.pte_quick) #define pgtable_cache_size (current_cpu_data.pgtable_cache_sz) +#define pmd_populate(mm, pmd, pte) pmd_set(pmd, pte) + extern __inline__ pgd_t *get_pgd_slow(void) { pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL), *init; @@ -82,7 +82,6 @@ extern __inline__ void free_pgd_slow(pgd_t *pgd) } extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); -extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted); extern __inline__ pte_t *get_pte_fast(void) { @@ -123,67 +122,53 @@ extern __inline__ void free_pmd_slow(pmd_t *pmd) } extern void __bad_pte(pmd_t *pmd); -extern void __bad_pte_kernel(pmd_t *pmd); - -#define pte_free_kernel(pte) free_pte_fast(pte) -#define pte_free(pte) free_pte_fast(pte) -#define pgd_free(pgd) free_pgd_fast(pgd) -#define pgd_alloc() get_pgd_fast() -extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) +static inline pte_t *pte_alloc_one(struct mm_struct *mm, unsigned long address) { - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - - if (pmd_none(*pmd)) { - pte_t *page = get_pte_fast(); - if (page) { - pmd_val(*pmd) = (unsigned long)page; - return page + address; - } - return get_pte_kernel_slow(pmd, address); - } - if (pmd_bad(*pmd)) { - __bad_pte_kernel(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; + pte_t *pte; + + pte = (pte_t *) __get_free_page(GFP_KERNEL); + if (pte) + clear_page(pte); + return pte; } -extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) +static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long address) { - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - - if (pmd_none(*pmd)) { - pte_t *page = get_pte_fast(); - if (page) { - pmd_val(*pmd) = (unsigned long)page; - return page + address; - } - return get_pte_slow(pmd, address); - } - if (pmd_bad(*pmd)) { - __bad_pte(pmd); - return NULL; + unsigned long *ret; + + if ((ret = (unsigned long *)pte_quicklist) != NULL) { + pte_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size--; } - return (pte_t *) pmd_page(*pmd) + address; + return (pte_t *)ret; } -/* - * allocating and freeing a pmd is trivial: the 1-entry pmd is - * inside the pgd, so has no extra memory associated with it. - */ -extern inline void pmd_free(pmd_t * pmd) +extern __inline__ void pte_free_fast(pte_t *pte) { + *(unsigned long *)pte = (unsigned long) pte_quicklist; + pte_quicklist = (unsigned long *) pte; + pgtable_cache_size++; } -extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address) +extern __inline__ void pte_free_slow(pte_t *pte) { - /* Two level page tables. This level is a nop */ - return (pmd_t *) pgd; + free_page((unsigned long)pte); } -#define pmd_free_kernel pmd_free -#define pmd_alloc_kernel pmd_alloc +#define pte_free(pte) pte_free_slow(pte) +#define pgd_free(pgd) free_pgd_fast(pgd) +#define pgd_alloc() get_pgd_fast() + +/* + * allocating and freeing a pmd is trivial: the 1-entry pmd is + * inside the pgd, so has no extra memory associated with it. + */ +#define pmd_alloc_one_fast(mm, addr) ({ BUG(); ((pmd_t *)1); }) +#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) +#define pmd_free(x) do { } while (0) +#define pgd_populate(mm, pmd, pte) BUG() extern int do_check_pgt_cache(int, int); diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index 7ff340656..6b4ebcbc3 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -222,21 +222,9 @@ extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) -/* - * BAD_PAGETABLE is used when we need a bogus page-table, while - * BAD_PAGE is used for a bogus page. - * - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern pte_t __bad_page(void); -extern pte_t *__bad_pagetable(void); - extern unsigned long empty_zero_page; extern unsigned long zero_page_mask; -#define BAD_PAGETABLE __bad_pagetable() -#define BAD_PAGE __bad_page() #define ZERO_PAGE(vaddr) \ (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))) @@ -458,11 +446,6 @@ extern inline pte_t *pte_offset(pmd_t * dir, unsigned long address) */ extern void pgd_init(unsigned long page); -extern void __bad_pte(pmd_t *pmd); -extern void __bad_pte_kernel(pmd_t *pmd); - -#define pte_free_kernel(pte) free_pte_fast(pte) -#define pte_free(pte) free_pte_fast(pte) #define pgd_free(pgd) free_pgd_fast(pgd) #define pgd_alloc() get_pgd_fast() diff --git a/include/asm-mips64/atomic.h b/include/asm-mips64/atomic.h index bef7dfef7..56b57ef6c 100644 --- a/include/asm-mips64/atomic.h +++ b/include/asm-mips64/atomic.h @@ -21,7 +21,23 @@ typedef struct { volatile int counter; } atomic_t; #ifdef __KERNEL__ #define ATOMIC_INIT(i) { (i) } +/* + * atomic_read - read atomic variable + * @v: pointer of type atomic_t + * + * Atomically reads the value of @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_read(v) ((v)->counter) + +/* + * atomic_set - set atomic variable + * @v: pointer of type atomic_t + * @i: required value + * + * Atomically sets the value of @v to @i. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_set(v,i) ((v)->counter = (i)) extern __inline__ void atomic_add(int i, volatile atomic_t * v) @@ -37,6 +53,14 @@ extern __inline__ void atomic_add(int i, volatile atomic_t * v) : "Ir" (i), "m" (v->counter)); } +/* + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ extern __inline__ void atomic_sub(int i, volatile atomic_t * v) { unsigned long temp; @@ -94,11 +118,71 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) +/* + * atomic_sub_and_test - test variable then subtract + * @i: integer value to subtract + * @v: pointer of type atomic_t + * + * Atomically subtracts @i from @v and returns + * true if the result is zero, or false for all + * other cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) + +/* + * atomic_inc_and_test - increment by 1 and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + * atomic_inc_and_test is currently not implemented for mips64. + */ + +/* + * atomic_dec_and_test - decrement by 1 and test + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1 and + * returns true if the result is 0, or false for all other + * cases. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) +/* + * atomic_inc - increment atomic variable + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_inc(v) atomic_add(1,(v)) + +/* + * atomic_dec - decrement the atomic variable + * @v: pointer of type atomic_t + * + * Atomically decrements @v by 1. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + */ #define atomic_dec(v) atomic_sub(1,(v)) + +/* + * atomic_add_negative - add and test if negative + * @v: pointer of type atomic_t + * @i: integer value to add + * + * Atomically adds @i to @v and returns true + * if the result is negative, or false when + * result is greater than or equal to zero. Note that the guaranteed + * useful range of an atomic_t is only 24 bits. + * + * atomic_add_negative is currently not implemented for mips64. + */ + #endif /* defined(__KERNEL__) */ #endif /* _ASM_ATOMIC_H */ diff --git a/include/asm-mips64/pci.h b/include/asm-mips64/pci.h index 0112244e3..a25d50a88 100644 --- a/include/asm-mips64/pci.h +++ b/include/asm-mips64/pci.h @@ -196,6 +196,19 @@ extern inline void pci_dma_sync_sg(struct pci_dev *hwdev, #endif } +extern inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask) +{ + /* + * we fall back to GFP_DMA when the mask isn't all 1s, + * so we can't guarantee allocations that must be + * within a tighter range than GFP_DMA.. + */ + if (mask < 0x00ffffff) + return 0; + + return 1; +} + /* * These macros should be used after a pci_map_sg call has been done * to get bus addresses of each of the SG entries and their lengths. diff --git a/include/asm-mips64/pgalloc.h b/include/asm-mips64/pgalloc.h index 198b0bb3b..bd9489f2c 100644 --- a/include/asm-mips64/pgalloc.h +++ b/include/asm-mips64/pgalloc.h @@ -3,8 +3,8 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1994 - 2000 by Ralf Baechle at alii - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 1994 - 2001 by Ralf Baechle at alii + * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_PGALLOC_H #define _ASM_PGALLOC_H @@ -49,9 +49,7 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm, /* - * Allocate and free page tables. The xxx_kernel() versions are - * used to allocate a kernel page table - this turns on ASN bits - * if any. + * Allocate and free page tables. */ #define pgd_quicklist (current_cpu_data.pgd_quick) @@ -59,6 +57,9 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm, #define pte_quicklist (current_cpu_data.pte_quick) #define pgtable_cache_size (current_cpu_data.pgtable_cache_sz) +#define pmd_populate(mm, pmd, pte) pmd_set(pmd, pte) +#define pgd_populate(mm, pgd, pmd) pgd_set(pgd, pmd) + extern pgd_t *get_pgd_slow(void); extern inline pgd_t *get_pgd_fast(void) @@ -88,8 +89,29 @@ extern inline void free_pgd_slow(pgd_t *pgd) free_pages((unsigned long)pgd, 1); } +static inline pte_t *pte_alloc_one(struct mm_struct *mm, unsigned long address) +{ + pte_t *pte; + + pte = (pte_t *) __get_free_page(GFP_KERNEL); + if (pte) + clear_page(pte); + return pte; +} + +static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long address) +{ + unsigned long *ret; + + if ((ret = (unsigned long *)pte_quicklist) != NULL) { + pte_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size--; + } + return (pte_t *)ret; +} + extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); -extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted); extern inline pte_t *get_pte_fast(void) { @@ -115,8 +137,29 @@ extern inline void free_pte_slow(pte_t *pte) free_pages((unsigned long)pte, 0); } +static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) +{ + pmd_t *pmd; + + pmd = (pmd_t *) __get_free_pages(GFP_KERNEL, 1); + if (pmd) + pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table); + return pmd; +} + +static inline pmd_t *pmd_alloc_one_fast(struct mm_struct *mm, unsigned long address) +{ + unsigned long *ret; + + if ((ret = (unsigned long *)pmd_quicklist) != NULL) { + pmd_quicklist = (unsigned long *)(*ret); + ret[0] = ret[1]; + pgtable_cache_size--; + } + return (pmd_t *)ret; +} + extern pmd_t *get_pmd_slow(pgd_t *pgd, unsigned long address_preadjusted); -extern pmd_t *get_pmd_kernel_slow(pgd_t *pgd, unsigned long address_preadjusted); extern inline pmd_t *get_pmd_fast(void) { @@ -144,62 +187,14 @@ extern inline void free_pmd_slow(pmd_t *pmd) free_pages((unsigned long)pmd, 1); } -extern void __bad_pte(pmd_t *pmd); -extern void __bad_pte_kernel(pmd_t *pmd); -extern void __bad_pmd(pgd_t *pgd); - #define pte_free(pte) free_pte_fast(pte) #define pmd_free(pte) free_pmd_fast(pte) #define pgd_free(pgd) free_pgd_fast(pgd) #define pgd_alloc() get_pgd_fast() -extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) -{ - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - - if (pmd_none(*pmd)) { - pte_t *page = get_pte_fast(); - if (page) { - pmd_val(*pmd) = (unsigned long) page; - return page + address; - } - return get_pte_slow(pmd, address); - } - if (pmd_bad(*pmd)) { - __bad_pte(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; -} - -extern inline pmd_t *pmd_alloc(pgd_t * pgd, unsigned long address) -{ - address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); - if (pgd_none(*pgd)) { - pmd_t *page = get_pmd_fast(); - - if (!page) - return get_pmd_slow(pgd, address); - pgd_set(pgd, page); - return page + address; - } - if (pgd_bad(*pgd)) { - __bad_pmd(pgd); - return NULL; - } - return (pmd_t *) pgd_page(*pgd) + address; -} - extern pte_t kptbl[(PAGE_SIZE<<KPTBL_PAGE_ORDER)/sizeof(pte_t)]; extern pmd_t kpmdtbl[PTRS_PER_PMD]; -#define pmd_alloc_kernel(d,a) (pmd_t *)kpmdtbl - -extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address) -{ - return (kptbl + (address >> PAGE_SHIFT)); -} - extern int do_check_pgt_cache(int, int); #endif /* _ASM_PGALLOC_H */ diff --git a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h index 431b4f9ff..bd925fd6b 100644 --- a/include/asm-mips64/pgtable.h +++ b/include/asm-mips64/pgtable.h @@ -3,8 +3,8 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1994 - 2000 by Ralf Baechle at alii - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 1994 - 2001 by Ralf Baechle at alii + * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc. */ #ifndef _ASM_PGTABLE_H #define _ASM_PGTABLE_H @@ -234,22 +234,13 @@ extern void (*_flush_cache_l1)(void); printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) /* - * BAD_PAGETABLE is used when we need a bogus page-table, while - * BAD_PAGE is used for a bogus page. - * * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ -extern pte_t __bad_page(void); -extern pte_t *__bad_pagetable(void); -extern pmd_t *__bad_pmd_table(void); extern unsigned long empty_zero_page; extern unsigned long zero_page_mask; -#define BAD_PAGETABLE __bad_pagetable() -#define BAD_PMDTABLE __bad_pmd_table() -#define BAD_PAGE __bad_page() #define ZERO_PAGE(vaddr) \ (virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))) @@ -307,7 +298,8 @@ extern inline int pte_present(pte_t pte) return pte_val(pte) & _PAGE_PRESENT; } -/* Certain architectures need to do special things when pte's +/* + * Certain architectures need to do special things when pte's * within a page table are directly modified. Thus, the following * hook is made available. */ @@ -331,7 +323,12 @@ extern inline int pmd_none(pmd_t pmd) extern inline int pmd_bad(pmd_t pmd) { - return pmd_val(pmd) == (unsigned long) empty_bad_page_table; + return pmd_val(pmd) &~ PAGE_MASK; +} + +extern inline int pmd_present(pmd_t pmd) +{ + return pmd_val(pmd) != (unsigned long) invalid_pte_table; } extern inline void pmd_clear(pmd_t *pmdp) @@ -349,7 +346,12 @@ extern inline int pgd_none(pgd_t pgd) extern inline int pgd_bad(pgd_t pgd) { - return pgd_val(pgd) == (unsigned long) empty_bad_pmd_table; + return pgd_val(pgd) &~ PAGE_MASK; +} + +extern inline int pgd_present(pgd_t pgd) +{ + return pgd_val(pgd) != (unsigned long) invalid_pmd_table; } extern inline void pgd_clear(pgd_t *pgdp) @@ -360,7 +362,6 @@ extern inline void pgd_clear(pgd_t *pgdp) /* * Permanent address of a page. On MIPS64 we never have highmem, so this * is simple. - * called on a highmem page. */ #define page_address(page) ((page)->virtual) #ifndef CONFIG_DISCONTIGMEM diff --git a/include/asm-ppc/cpm_8260.h b/include/asm-ppc/cpm_8260.h index b612cf02f..3265bc08d 100644 --- a/include/asm-ppc/cpm_8260.h +++ b/include/asm-ppc/cpm_8260.h @@ -112,7 +112,7 @@ typedef struct cpm_buf_desc { uint cbd_bufaddr; /* Buffer address in host memory */ } cbd_t; -#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ +#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ #define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ #define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ #define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ diff --git a/include/asm-ppc/highmem.h b/include/asm-ppc/highmem.h index 38114e564..0ee36b531 100644 --- a/include/asm-ppc/highmem.h +++ b/include/asm-ppc/highmem.h @@ -4,7 +4,7 @@ * PowerPC version, stolen from the i386 version. * * Used in CONFIG_HIGHMEM systems for memory pages which - * are not addressable by direct kernel virtual adresses. + * are not addressable by direct kernel virtual addresses. * * Copyright (C) 1999 Gerhard Wichert, Siemens AG * Gerhard.Wichert@pdb.siemens.de diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h index 139dfea0c..d3056553e 100644 --- a/include/asm-ppc/irq.h +++ b/include/asm-ppc/irq.h @@ -88,24 +88,32 @@ irq_cannonicalize(int irq) #define SIU_IRQ7 (14) #define SIU_LEVEL7 (15) +/* Now include the board configuration specific associations. +*/ +#include <asm/mpc8xx.h> + /* The internal interrupts we can configure as we see fit. * My personal preference is CPM at level 2, which puts it above the * MBX PCI/ISA/IDE interrupts. */ +#ifndef PIT_INTERRUPT #define PIT_INTERRUPT SIU_LEVEL0 +#endif +#ifndef CPM_INTERRUPT #define CPM_INTERRUPT SIU_LEVEL2 +#endif +#ifndef PCMCIA_INTERRUPT #define PCMCIA_INTERRUPT SIU_LEVEL6 +#endif +#ifndef DEC_INTERRUPT #define DEC_INTERRUPT SIU_LEVEL7 +#endif /* Some internal interrupt registers use an 8-bit mask for the interrupt * level instead of a number. */ #define mk_int_int_mask(IL) (1 << (7 - (IL/2))) -/* Now include the board configuration specific associations. -*/ -#include <asm/mpc8xx.h> - /* always the same on 8xx -- Cort */ static __inline__ int irq_cannonicalize(int irq) { diff --git a/include/asm-ppc/ivms8.h b/include/asm-ppc/ivms8.h new file mode 100644 index 000000000..3976b3f29 --- /dev/null +++ b/include/asm-ppc/ivms8.h @@ -0,0 +1,92 @@ +/* + * A collection of structures, addresses, and values associated with + * Speech Design Integrated Voicemail Systems (IVMS8) boards. + * + * Copyright (c) 2000 Wolfgang Denk (wd@denx.de) + */ +#ifndef __MACH_IVMS8_DEFS +#define __MACH_IVMS8_DEFS + +#ifndef __ASSEMBLY__ + +typedef void (interrupt_handler_t)(void *); + +typedef struct serial_io { + int (*getc)(void); + int (*tstc)(void); + void (*putc)(const char c); + void (*printf)(const char *fmt, ...); +} serial_io_t; + +typedef struct intr_util { + void (*install_hdlr)(int, interrupt_handler_t *, void *); + void (*free_hdlr)(int); +} intr_util_t; + + +/* A Board Information structure that is given to a program when + * ppcboot starts it up. + */ +typedef struct bd_info { + unsigned long bi_memstart; /* start of DRAM memory */ + unsigned long bi_memsize; /* size of DRAM memory in bytes */ + unsigned long bi_flashstart; /* start of FLASH memory */ + unsigned long bi_flashsize; /* size of FLASH memory */ + unsigned long bi_flashoffset; /* reserved area for startup monitor */ + unsigned long bi_sramstart; /* start of SRAM memory */ + unsigned long bi_sramsize; /* size of SRAM memory */ + unsigned long bi_immr_base; /* base of IMMR register */ + unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ + unsigned long bi_ip_addr; /* IP Address */ + unsigned char bi_enetaddr[6]; /* Ethernet adress */ + unsigned char bi_reserved[2]; /* -- just for alignment -- */ + unsigned long bi_intfreq; /* Internal Freq, in MHz */ + unsigned long bi_busfreq; /* Bus Freq, in MHz */ + unsigned long bi_baudrate; /* Console Baudrate */ + serial_io_t bi_serial_io; /* Addr of monitor fnc for Console I/O */ + intr_util_t bi_interrupt; /* Addr of monitor fnc for Interrupts */ +} bd_t; + +#endif /* __ASSEMBLY__ */ + +#define IVMS_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ +#define IVMS_IMAP_SIZE (64 * 1024) /* size of mapped area */ + +#define IMAP_ADDR IVMS_IMMR_BASE /* physical base address of IMMR area */ +#define IMAP_SIZE IVMS_IMAP_SIZE /* mapped size of IMMR area */ + +#define PCMCIA_MEM_ADDR ((uint)0xFE100000) +#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) + +#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */ +#define IDE0_INTERRUPT 10 /* = IRQ5 */ +#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */ +#define PHY_INTERRUPT 12 /* = IRQ6 */ + +#define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */ + +/* + * Definitions for IDE0 Interface + */ +#define IDE0_BASE_OFFSET 0x0000 /* Offset in PCMCIA memory */ +#define IDE0_DATA_REG_OFFSET 0x0000 +#define IDE0_ERROR_REG_OFFSET 0x0081 +#define IDE0_NSECTOR_REG_OFFSET 0x0082 +#define IDE0_SECTOR_REG_OFFSET 0x0083 +#define IDE0_LCYL_REG_OFFSET 0x0084 +#define IDE0_HCYL_REG_OFFSET 0x0085 +#define IDE0_SELECT_REG_OFFSET 0x0086 +#define IDE0_STATUS_REG_OFFSET 0x0087 +#define IDE0_CONTROL_REG_OFFSET 0x0106 +#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */ + +/* We don't use the 8259. +*/ +#define NR_8259_INTS 0 + +/* Generic 8xx type +*/ +#define _MACH_8xx (_MACH_ivms8) + +#endif /* __MACH_IVMS8_DEFS */ + diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h index 2476f7540..499114d00 100644 --- a/include/asm-ppc/mpc8xx.h +++ b/include/asm-ppc/mpc8xx.h @@ -33,12 +33,16 @@ #include <asm/rpxclassic.h> #endif -#if (defined(CONFIG_TQM860) || defined(CONFIG_TQM860L)) -#include <asm/tqm860.h> +#if (defined(CONFIG_TQM860) || defined(CONFIG_TQM8xxL)) +#include <asm/tqm8xx.h> #endif -#ifdef CONFIG_TQM8xxL -#include <asm/tqm8xxL.h> +#if defined(CONFIG_SPD823TS) +#include <asm/spd8xx.h> +#endif + +#if defined(CONFIG_IVMS8) +#include <asm/ivms8.h> #endif /* I need this to get pt_regs....... diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h index a1cfa7d31..4a46b9601 100644 --- a/include/asm-ppc/pci.h +++ b/include/asm-ppc/pci.h @@ -34,6 +34,7 @@ extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource * * * Obsolete ! Drivers should now use pci_resource_to_bus */ +extern unsigned long phys_to_bus(unsigned long pa); extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr); extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr); diff --git a/include/asm-ppc/pgalloc.h b/include/asm-ppc/pgalloc.h index 7da57a6f2..0154dc881 100644 --- a/include/asm-ppc/pgalloc.h +++ b/include/asm-ppc/pgalloc.h @@ -52,48 +52,12 @@ extern unsigned long get_zero_page_fast(void); extern void __bad_pte(pmd_t *pmd); -/* We don't use pmd cache, so this is a dummy routine */ -extern __inline__ pmd_t *get_pmd_fast(void) -{ - return (pmd_t *)0; -} - -extern __inline__ void free_pmd_fast(pmd_t *pmd) -{ -} - -extern __inline__ void free_pmd_slow(pmd_t *pmd) -{ -} - -/* - * allocating and freeing a pmd is trivial: the 1-entry pmd is - * inside the pgd, so has no extra memory associated with it. - */ -extern inline void pmd_free(pmd_t * pmd) -{ -} - -extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address) -{ - return (pmd_t *) pgd; -} - -#define pmd_free_kernel pmd_free -#define pmd_alloc_kernel pmd_alloc -#define pte_alloc_kernel pte_alloc - extern __inline__ pgd_t *get_pgd_slow(void) { - pgd_t *ret, *init; - /*if ( (ret = (pgd_t *)get_zero_page_fast()) == NULL )*/ - if ( (ret = (pgd_t *)__get_free_page(GFP_KERNEL)) != NULL ) - memset (ret, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); - if (ret) { - init = pgd_offset(&init_mm, 0); - memcpy (ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD, - (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); - } + pgd_t *ret; + + if ((ret = (pgd_t *)__get_free_page(GFP_KERNEL)) != NULL) + clear_page(ret); return ret; } @@ -122,9 +86,34 @@ extern __inline__ void free_pgd_slow(pgd_t *pgd) free_page((unsigned long)pgd); } -extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); +#define pgd_free(pgd) free_pgd_fast(pgd) +#define pgd_alloc() get_pgd_fast() + +/* + * We don't have any real pmd's, and this code never triggers because + * the pgd will always be present.. + */ +#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); }) +#define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); }) +#define pmd_free(x) do { } while (0) +#define pgd_populate(mm, pmd, pte) BUG() -extern __inline__ pte_t *get_pte_fast(void) +static inline pte_t *pte_alloc_one(struct mm_struct *mm, unsigned long address) +{ + pte_t *pte; + extern int mem_init_done; + extern void *early_get_page(void); + + if (mem_init_done) + pte = (pte_t *) __get_free_page(GFP_KERNEL); + else + pte = (pte_t *) early_get_page(); + if (pte != NULL) + clear_page(pte); + return pte; +} + +static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long address) { unsigned long *ret; @@ -136,40 +125,21 @@ extern __inline__ pte_t *get_pte_fast(void) return (pte_t *)ret; } -extern __inline__ void free_pte_fast(pte_t *pte) +extern __inline__ void pte_free_fast(pte_t *pte) { *(unsigned long **)pte = pte_quicklist; pte_quicklist = (unsigned long *) pte; pgtable_cache_size++; } -extern __inline__ void free_pte_slow(pte_t *pte) +extern __inline__ void pte_free_slow(pte_t *pte) { free_page((unsigned long)pte); } -#define pte_free_kernel(pte) free_pte_fast(pte) -#define pte_free(pte) free_pte_fast(pte) -#define pgd_free(pgd) free_pgd_fast(pgd) -#define pgd_alloc() get_pgd_fast() +#define pte_free(pte) pte_free_slow(pte) -extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address) -{ - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - if (pmd_none(*pmd)) { - pte_t * page = (pte_t *) get_pte_fast(); - - if (!page) - return get_pte_slow(pmd, address); - pmd_val(*pmd) = (unsigned long) page; - return page + address; - } - if (pmd_bad(*pmd)) { - __bad_pte(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; -} +#define pmd_populate(mm, pmd, pte) (pmd_val(*(pmd)) = (unsigned long) (pte)) extern int do_check_pgt_cache(int, int); diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index cd87f248e..dc96fdcaf 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -516,6 +516,8 @@ #define _MACH_8260 0x00002000 /* Generic 8260 */ #define _MACH_tqm860 0x00004000 /* TQM860/L */ #define _MACH_tqm8xxL 0x00008000 /* TQM8xxL */ +#define _MACH_spd8xxL 0x00010000 /* SPD8xx */ +#define _MACH_ibms8 0x00020000 /* IVMS8 */ /* see residual.h for these */ #define _PREP_Motorola 0x01 /* motorola prep */ diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h index 92063a868..da81ad23e 100644 --- a/include/asm-ppc/semaphore.h +++ b/include/asm-ppc/semaphore.h @@ -119,20 +119,21 @@ struct rw_semaphore #endif }; -#define __RWSEM_INITIALIZER(name, rd, wr) \ +#define RW_LOCK_BIAS 2 /* XXX bogus */ +#define __RWSEM_INITIALIZER(name, count) \ { \ SPIN_LOCK_UNLOCKED, \ - (rd), (wr), \ + (count) == 1, (count) == 0, \ __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ __SEM_DEBUG_INIT(name) \ } -#define __DECLARE_RWSEM_GENERIC(name, rd, wr) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name, rd, wr) +#define __DECLARE_RWSEM_GENERIC(name, count) \ + struct rw_semaphore name = __RWSEM_INITIALIZER(name, count) -#define DECLARE_RWSEM(name) __DECLARE_RWSEM_GENERIC(name, 0, 0) -#define DECLARE_RWSEM_READ_LOCKED(name) __DECLARE_RWSEM_GENERIC(name, 1, 0) -#define DECLAER_RWSEM_WRITE_LOCKED(name) __DECLARE_RWSEM_GENERIC(name, 0, 1) +#define DECLARE_RWSEM(name) __DECLARE_RWSEM_GENERIC(name, RW_LOCK_BIAS) +#define DECLARE_RWSEM_READ_LOCKED(name) __DECLARE_RWSEM_GENERIC(name, RW_LOCK_BIAS-1) +#define DECLARE_RWSEM_WRITE_LOCKED(name) __DECLARE_RWSEM_GENERIC(name, 0) extern inline void init_rwsem(struct rw_semaphore *sem) { diff --git a/include/asm-ppc/spd8xx.h b/include/asm-ppc/spd8xx.h new file mode 100644 index 000000000..543246636 --- /dev/null +++ b/include/asm-ppc/spd8xx.h @@ -0,0 +1,105 @@ +/* + * A collection of structures, addresses, and values associated with + * Speech Design SPD8xxTS boards. + * + * Copyright (c) 2000 Wolfgang Denk (wd@denx.de) + */ +#ifndef __MACH_SPD8xx_DEFS +#define __MACH_SPD8xx_DEFS + +#ifndef __ASSEMBLY__ + +typedef void (interrupt_handler_t)(void *); + +typedef struct serial_io { + int (*getc)(void); + int (*tstc)(void); + void (*putc)(const char c); + void (*printf)(const char *fmt, ...); +} serial_io_t; + +typedef struct intr_util { + void (*install_hdlr)(int, interrupt_handler_t *, void *); + void (*free_hdlr)(int); +} intr_util_t; + + +/* A Board Information structure that is given to a program when + * ppcboot starts it up. + */ +typedef struct bd_info { + unsigned long bi_memstart; /* start of DRAM memory */ + unsigned long bi_memsize; /* size of DRAM memory in bytes */ + unsigned long bi_flashstart; /* start of FLASH memory */ + unsigned long bi_flashsize; /* size of FLASH memory */ + unsigned long bi_flashoffset; /* reserved area for startup monitor */ + unsigned long bi_sramstart; /* start of SRAM memory */ + unsigned long bi_sramsize; /* size of SRAM memory */ + unsigned long bi_immr_base; /* base of IMMR register */ + unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ + unsigned long bi_ip_addr; /* IP Address */ + unsigned char bi_enetaddr[6]; /* Ethernet adress */ + unsigned char bi_reserved[2]; /* -- just for alignment -- */ + unsigned long bi_intfreq; /* Internal Freq, in MHz */ + unsigned long bi_busfreq; /* Bus Freq, in MHz */ + unsigned long bi_baudrate; /* Console Baudrate */ + serial_io_t bi_serial_io; /* Addr of monitor fnc for Console I/O */ + intr_util_t bi_interrupt; /* Addr of monitor fnc for Interrupts */ +} bd_t; + +#endif /* __ASSEMBLY__ */ + +#define SPD_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ +#define SPD_IMAP_SIZE (64 * 1024) /* size of mapped area */ + +#define IMAP_ADDR SPD_IMMR_BASE /* physical base address of IMMR area */ +#define IMAP_SIZE SPD_IMAP_SIZE /* mapped size of IMMR area */ + +#define PCMCIA_MEM_ADDR ((uint)0xFE100000) +#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) + +#define IDE0_INTERRUPT 10 /* = IRQ5 */ +#define IDE1_INTERRUPT 12 /* = IRQ6 */ +#define CPM_INTERRUPT 13 /* = SIU_LEVEL6 (was: SIU_LEVEL2) */ + +#define MAX_HWIFS 2 /* overwrite default in include/asm-ppc/ide.h */ + +/* + * Definitions for IDE0 Interface + */ +#define IDE0_BASE_OFFSET 0x0000 /* Offset in PCMCIA memory */ +#define IDE0_DATA_REG_OFFSET 0x0000 +#define IDE0_ERROR_REG_OFFSET 0x0081 +#define IDE0_NSECTOR_REG_OFFSET 0x0082 +#define IDE0_SECTOR_REG_OFFSET 0x0083 +#define IDE0_LCYL_REG_OFFSET 0x0084 +#define IDE0_HCYL_REG_OFFSET 0x0085 +#define IDE0_SELECT_REG_OFFSET 0x0086 +#define IDE0_STATUS_REG_OFFSET 0x0087 +#define IDE0_CONTROL_REG_OFFSET 0x0106 +#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */ + +/* + * Definitions for IDE1 Interface + */ +#define IDE1_BASE_OFFSET 0x0C00 /* Offset in PCMCIA memory */ +#define IDE1_DATA_REG_OFFSET 0x0000 +#define IDE1_ERROR_REG_OFFSET 0x0081 +#define IDE1_NSECTOR_REG_OFFSET 0x0082 +#define IDE1_SECTOR_REG_OFFSET 0x0083 +#define IDE1_LCYL_REG_OFFSET 0x0084 +#define IDE1_HCYL_REG_OFFSET 0x0085 +#define IDE1_SELECT_REG_OFFSET 0x0086 +#define IDE1_STATUS_REG_OFFSET 0x0087 +#define IDE1_CONTROL_REG_OFFSET 0x0106 +#define IDE1_IRQ_REG_OFFSET 0x000A /* not used */ + +/* We don't use the 8259. +*/ +#define NR_8259_INTS 0 + +/* Generic 8xx type +*/ +#define _MACH_8xx (_MACH_spd8xx) + +#endif /* __MACH_SPD8xx_DEFS */ diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h index 571d2c81f..31354be29 100644 --- a/include/asm-ppc/system.h +++ b/include/asm-ppc/system.h @@ -49,15 +49,6 @@ extern void xmon_irq(int, void *, struct pt_regs *); extern void xmon(struct pt_regs *excp); - - -/* Data cache block flush - write out the cache line containing the - specified address and then invalidate it in the cache. */ -extern __inline__ void dcbf(void *line) -{ - asm("dcbf %0,%1; sync" : : "r" (line), "r" (0)); -} - extern void print_backtrace(unsigned long *); extern void show_regs(struct pt_regs * regs); extern void flush_instruction_cache(void); diff --git a/include/asm-ppc/time.h b/include/asm-ppc/time.h index 8f43219a8..114b97305 100644 --- a/include/asm-ppc/time.h +++ b/include/asm-ppc/time.h @@ -2,7 +2,7 @@ * $Id: time.h,v 1.12 1999/08/27 04:21:23 cort Exp $ * Common time prototypes and such for all ppc machines. * - * Written by Cort Dougan (cort@cs.nmt.edu) to merge + * Written by Cort Dougan (cort@fsmlabs.com) to merge * Paul Mackerras' version and mine for PReP and Pmac. */ @@ -16,6 +16,7 @@ extern unsigned tb_ticks_per_jiffy; extern unsigned tb_to_us; extern unsigned tb_last_stamp; +extern unsigned long disarm_decr[NR_CPUS]; extern void to_tm(int tim, struct rtc_time * tm); extern time_t last_rtc_update; diff --git a/include/asm-ppc/tlb.h b/include/asm-ppc/tlb.h new file mode 100644 index 000000000..69c0faa93 --- /dev/null +++ b/include/asm-ppc/tlb.h @@ -0,0 +1 @@ +#include <asm-generic/tlb.h> diff --git a/include/asm-ppc/tqm860.h b/include/asm-ppc/tqm860.h deleted file mode 100644 index 733dcccdb..000000000 --- a/include/asm-ppc/tqm860.h +++ /dev/null @@ -1,67 +0,0 @@ - -/* - * A collection of structures, addresses, and values associated with - * the TQ Systems TQM860 modules. This was originally created for the - * MBX860, and probably needs revisions for other boards (like the 821). - * When this file gets out of control, we can split it up into more - * meaningful pieces. - * - * Based on mbx.h, Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * Copyright (c) 1999 Wolfgang Denk (wd@denx.de) - */ -#ifdef __KERNEL__ -#ifndef __MACH_TQM860_DEFS -#define __MACH_TQM860_DEFS - -/* A Board Information structure that is given to a program when - * EPPC-Bug starts it up. - */ -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - unsigned long bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_immr_base; /* base of IMMR register */ - unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* Ethernet adress */ - unsigned char bi_reserved[2]; /* -- just for alignment -- */ - unsigned long bi_putchar; /* Addr of monitor putchar() to Console */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ - unsigned long bi_baudrate; /* Console Baudrate */ -} bd_t; - -/* Configuration options for TQ Systems TQM860 mini module - */ - -#define TQM_RESET_ADDR 0x40000100 /* Monitor Reset Entry */ - -#define TQM_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ -#define TQM_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define TQM_CLOCKRATE 50 /* 50 MHz Clock */ -#define TQM_BAUDRATE 115200 /* Console baud rate */ -#define TQM_IP_ADDR 0x0A000063 /* IP addr: 10.0.0.99 */ - -#define TQM_SERVER_IP "10.0.0.3" /* NFS server IP addr */ -#define TQM_SERVER_DIR "/LinuxPPC" /* NFS exported root */ - -#define IMAP_ADDR TQM_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE TQM_IMAP_SIZE /* mapped size of IMMR area */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -/* Generic 8xx type -*/ -#define _MACH_8xx (_MACH_tqm860) - -#endif /* __MACH_TQM860_DEFS */ - -#endif /* __KERNEL__ */ diff --git a/include/asm-ppc/tqm8xx.h b/include/asm-ppc/tqm8xx.h new file mode 100644 index 000000000..2eff8d969 --- /dev/null +++ b/include/asm-ppc/tqm8xx.h @@ -0,0 +1,76 @@ +/* + * A collection of structures, addresses, and values associated with + * the TQ Systems TQM8xx(L) modules. This was originally created for the + * MBX860, and probably needs revisions for other boards (like the 821). + * When this file gets out of control, we can split it up into more + * meaningful pieces. + * + * Based on mbx.h, Copyright (c) 1997 Dan Malek (dmalek@jlc.net) + * + * Copyright (c) 1999,2000 Wolfgang Denk (wd@denx.de) + */ +#ifndef __MACH_TQM8xx_DEFS +#define __MACH_TQM8xx_DEFS + +#ifndef __ASSEMBLY__ + +typedef void (interrupt_handler_t)(void *); + +typedef struct serial_io { + int (*getc)(void); + int (*tstc)(void); + void (*putc)(const char c); + void (*printf)(const char *fmt, ...); +} serial_io_t; + +typedef struct intr_util { + void (*install_hdlr)(int, interrupt_handler_t *, void *); + void (*free_hdlr)(int); +} intr_util_t; + + +/* A Board Information structure that is given to a program when + * ppcboot starts it up. + */ +typedef struct bd_info { + unsigned long bi_memstart; /* start of DRAM memory */ + unsigned long bi_memsize; /* size of DRAM memory in bytes */ + unsigned long bi_flashstart; /* start of FLASH memory */ + unsigned long bi_flashsize; /* size of FLASH memory */ + unsigned long bi_flashoffset; /* reserved area for startup monitor */ + unsigned long bi_sramstart; /* start of SRAM memory */ + unsigned long bi_sramsize; /* size of SRAM memory */ + unsigned long bi_immr_base; /* base of IMMR register */ + unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ + unsigned long bi_ip_addr; /* IP Address */ + unsigned char bi_enetaddr[6]; /* Ethernet adress */ + unsigned char bi_reserved[2]; /* -- just for alignment -- */ + unsigned long bi_intfreq; /* Internal Freq, in MHz */ + unsigned long bi_busfreq; /* Bus Freq, in MHz */ + unsigned long bi_baudrate; /* Console Baudrate */ + serial_io_t bi_serial_io; /* Addr of monitor fnc for Console I/O */ + intr_util_t bi_interrupt; /* Addr of monitor fnc for Interrupts */ +} bd_t; + +#endif /* __ASSEMBLY__ */ + +#define TQM_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ +#define TQM_IMAP_SIZE (64 * 1024) /* size of mapped area */ + +#define IMAP_ADDR TQM_IMMR_BASE /* physical base address of IMMR area */ +#define IMAP_SIZE TQM_IMAP_SIZE /* mapped size of IMMR area */ + +/* We don't use the 8259. +*/ +#define NR_8259_INTS 0 + +/* Generic 8xx type +*/ +#if defined(CONFIG_TQM8xxL) +#define _MACH_8xx (_MACH_tqm8xxL) +#endif +#if defined(CONFIG_TQM860) +#define _MACH_8xx (_MACH_tqm860) +#endif + +#endif /* __MACH_TQM8xx_DEFS */ diff --git a/include/asm-ppc/tqm8xxL.h b/include/asm-ppc/tqm8xxL.h deleted file mode 100644 index 338396aa6..000000000 --- a/include/asm-ppc/tqm8xxL.h +++ /dev/null @@ -1,68 +0,0 @@ - -/* - * A collection of structures, addresses, and values associated with - * the TQ Systems TQM850L modules. This was originally created for the - * MBX860, and probably needs revisions for other boards (like the 821). - * When this file gets out of control, we can split it up into more - * meaningful pieces. - * - * Based on mbx.h, Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * Copyright (c) 1999 Wolfgang Denk (wd@denx.de) - */ -#ifdef __KERNEL__ -#ifndef __MACH_TQM8xxL_DEFS -#define __MACH_TQM8xxL_DEFS - -/* A Board Information structure that is given to a program when - * EPPC-Bug starts it up. - */ -typedef struct bd_info { - unsigned long bi_memstart; /* start of DRAM memory */ - unsigned long bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* reserved area for startup monitor */ - unsigned long bi_sramstart; /* start of SRAM memory */ - unsigned long bi_sramsize; /* size of SRAM memory */ - unsigned long bi_immr_base; /* base of IMMR register */ - unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* Ethernet adress */ - unsigned char bi_reserved[2]; /* -- just for alignment -- */ - unsigned long bi_putchar; /* Addr of monitor putchar() to Console */ - unsigned long bi_intfreq; /* Internal Freq, in MHz */ - unsigned long bi_busfreq; /* Bus Freq, in MHz */ - unsigned long bi_baudrate; /* Console Baudrate */ -} bd_t; - -/* Configuration options for TQ Systems TQM850L mini module - */ - -#define TQM_RESET_ADDR 0x40000100 /* Monitor Reset Entry */ - -#define TQM_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ -#define TQM_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define TQM_CLOCKRATE 50 /* 50 MHz Clock */ -/*#define TQM_BAUDRATE 115200 */ /* Console baud rate */ -#define TQM_BAUDRATE 38400 /* Console baud rate */ -#define TQM_IP_ADDR 0x0A000063 /* IP addr: 10.0.0.99 */ - -#define TQM_SERVER_IP "10.0.0.2" /* NFS server IP addr */ -#define TQM_SERVER_DIR "/LinuxPPC" /* NFS exported root */ - -#define IMAP_ADDR TQM_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE TQM_IMAP_SIZE /* mapped size of IMMR area */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -/* Generic 8xx type -*/ -#define _MACH_8xx (_MACH_tqm8xxL) - -#endif /* __MACH_TQM8xxL_DEFS */ - -#endif /* __KERNEL__ */ diff --git a/include/asm-s390/ccwcache.h b/include/asm-s390/ccwcache.h index cfbb03bf2..fd5efa10d 100644 --- a/include/asm-s390/ccwcache.h +++ b/include/asm-s390/ccwcache.h @@ -59,7 +59,7 @@ typedef struct ccw_req_t { #define CQR_STATUS_FILLED 0x01 /* request is ready to be preocessed */ #define CQR_STATUS_QUEUED 0x02 /* request is queued to be processed */ #define CQR_STATUS_IN_IO 0x03 /* request is currently in IO */ -#define CQR_STATUS_DONE 0x04 /* request is completed sucessfully */ +#define CQR_STATUS_DONE 0x04 /* request is completed successfully */ #define CQR_STATUS_ERROR 0x05 /* request is completed with error */ #define CQR_STATUS_FAILED 0x06 /* request is finally failed */ diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h index cdfa00fa2..59dfe5698 100644 --- a/include/asm-s390/lowcore.h +++ b/include/asm-s390/lowcore.h @@ -124,7 +124,7 @@ struct _lowcore __u8 pad3[0xD8-0xC4]; /* 0x0c4 */ __u32 cpu_timer_save_area[2]; /* 0x0d8 */ __u32 clock_comp_save_area[2]; /* 0x0e0 */ - __u32 mcck_interuption_code[2]; /* 0x0e8 */ + __u32 mcck_interruption_code[2]; /* 0x0e8 */ __u8 pad4[0xf4-0xf0]; /* 0x0f0 */ __u32 external_damage_code; /* 0x0f4 */ __u32 failing_storage_address; /* 0x0f8 */ diff --git a/include/asm-s390x/ccwcache.h b/include/asm-s390x/ccwcache.h index cfbb03bf2..fd5efa10d 100644 --- a/include/asm-s390x/ccwcache.h +++ b/include/asm-s390x/ccwcache.h @@ -59,7 +59,7 @@ typedef struct ccw_req_t { #define CQR_STATUS_FILLED 0x01 /* request is ready to be preocessed */ #define CQR_STATUS_QUEUED 0x02 /* request is queued to be processed */ #define CQR_STATUS_IN_IO 0x03 /* request is currently in IO */ -#define CQR_STATUS_DONE 0x04 /* request is completed sucessfully */ +#define CQR_STATUS_DONE 0x04 /* request is completed successfully */ #define CQR_STATUS_ERROR 0x05 /* request is completed with error */ #define CQR_STATUS_FAILED 0x06 /* request is finally failed */ diff --git a/include/asm-s390x/dasd.h b/include/asm-s390x/dasd.h index d9e4a8363..ea5e43eae 100644 --- a/include/asm-s390x/dasd.h +++ b/include/asm-s390x/dasd.h @@ -203,7 +203,7 @@ struct request; typedef ccw_req_t *(*dasd_erp_action_fn_t) (ccw_req_t * cqr); typedef ccw_req_t *(*dasd_erp_postaction_fn_t) (ccw_req_t * cqr); -typedef int (*dasd_ck_id_fn_t) (dev_info_t *); +typedef int (*dasd_ck_id_fn_t) (s390_dev_info_t *); typedef int (*dasd_ck_characteristics_fn_t) (struct dasd_device_t *); typedef int (*dasd_fill_geometry_fn_t) (struct dasd_device_t *, struct hd_geometry *); typedef ccw_req_t *(*dasd_format_fn_t) (struct dasd_device_t *, struct format_data_t *); @@ -269,7 +269,7 @@ typedef struct dasd_profile_info_t { } dasd_profile_info_t; typedef struct dasd_device_t { - dev_info_t devinfo; + s390_dev_info_t devinfo; dasd_discipline_t *discipline; int level; int open_count; diff --git a/include/asm-s390x/lowcore.h b/include/asm-s390x/lowcore.h index 215b8b8e0..fe03e6351 100644 --- a/include/asm-s390x/lowcore.h +++ b/include/asm-s390x/lowcore.h @@ -116,7 +116,7 @@ struct _lowcore __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ __u32 stfl_fac_list; /* 0x0c8 */ __u8 pad4[0xe8-0xcc]; /* 0x0cc */ - __u32 mcck_interuption_code[2]; /* 0x0e8 */ + __u32 mcck_interruption_code[2]; /* 0x0e8 */ __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ __u32 external_damage_code; /* 0x0f4 */ addr_t failing_storage_address; /* 0x0f8 */ diff --git a/include/asm-s390x/socket.h b/include/asm-s390x/socket.h index 0d00c3b54..e78379203 100644 --- a/include/asm-s390x/socket.h +++ b/include/asm-s390x/socket.h @@ -50,6 +50,7 @@ #define SO_PEERNAME 28 #define SO_TIMESTAMP 29 #define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_ACCEPTCONN 30 /* Nast libc5 fixup - bletch */ #if defined(__KERNEL__) diff --git a/include/asm-s390x/unistd.h b/include/asm-s390x/unistd.h index 1ac8474ee..090fe68de 100644 --- a/include/asm-s390x/unistd.h +++ b/include/asm-s390x/unistd.h @@ -330,7 +330,6 @@ static inline _syscall1(int,_exit,int,exitcode) static inline _syscall1(int,delete_module,const char *,name) static inline _syscall2(long,stat,char *,filename,struct stat *,statbuf) -extern int sys_wait4(int, int *, int, struct rusage *); static inline pid_t waitpid(int pid, int * wait_stat, int flags) { return sys_wait4(pid, wait_stat, flags, NULL); diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h index 1e07b88f7..6c8c16bf4 100644 --- a/include/asm-sparc/atomic.h +++ b/include/asm-sparc/atomic.h @@ -1,6 +1,7 @@ /* atomic.h: These still suck, but the I-cache hit rate is higher. * * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) */ #ifndef __ARCH_SPARC_ATOMIC__ @@ -47,51 +48,12 @@ static __inline__ int atomic_read(atomic_t *v) #define atomic_set(v, i) (((v)->counter) = ((i) << 8)) #endif -/* Make sure gcc doesn't try to be clever and move things around - * on us. We need to use _exactly_ the address the user gave us, - * not some alias that contains the same information. - */ -#define __atomic_fool_gcc(x) ((struct { int a[100]; } *)x) - -static __inline__ void atomic_add(int i, atomic_t *v) -{ - register atomic_t *ptr asm("g1"); - register int increment asm("g2"); - ptr = (atomic_t *) __atomic_fool_gcc(v); - increment = i; - - __asm__ __volatile__(" - mov %%o7, %%g4 - call ___atomic_add - add %%o7, 8, %%o7 -" : "=&r" (increment) - : "0" (increment), "r" (ptr) - : "g3", "g4", "g7", "memory", "cc"); -} - -static __inline__ void atomic_sub(int i, atomic_t *v) +static __inline__ int __atomic_add(int i, atomic_t *v) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); register int increment asm("g2"); - ptr = (atomic_t *) __atomic_fool_gcc(v); - increment = i; - - __asm__ __volatile__(" - mov %%o7, %%g4 - call ___atomic_sub - add %%o7, 8, %%o7 -" : "=&r" (increment) - : "0" (increment), "r" (ptr) - : "g3", "g4", "g7", "memory", "cc"); -} - -static __inline__ int atomic_add_return(int i, atomic_t *v) -{ - register atomic_t *ptr asm("g1"); - register int increment asm("g2"); - - ptr = (atomic_t *) __atomic_fool_gcc(v); + ptr = &v->counter; increment = i; __asm__ __volatile__(" @@ -105,12 +67,12 @@ static __inline__ int atomic_add_return(int i, atomic_t *v) return increment; } -static __inline__ int atomic_sub_return(int i, atomic_t *v) +static __inline__ int __atomic_sub(int i, atomic_t *v) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); register int increment asm("g2"); - ptr = (atomic_t *) __atomic_fool_gcc(v); + ptr = &v->counter; increment = i; __asm__ __volatile__(" @@ -124,16 +86,19 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v) return increment; } -#define atomic_dec_return(v) atomic_sub_return(1,(v)) -#define atomic_inc_return(v) atomic_add_return(1,(v)) +#define atomic_add(i, v) ((void)__atomic_add((i), (v))) +#define atomic_sub(i, v) ((void)__atomic_sub((i), (v))) + +#define atomic_dec_return(v) __atomic_sub(1, (v)) +#define atomic_inc_return(v) __atomic_add(1, (v)) -#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) +#define atomic_sub_and_test(i, v) (__atomic_sub((i), (v)) == 0) +#define atomic_dec_and_test(v) (__atomic_sub(1, (v)) == 0) -#define atomic_inc(v) atomic_add(1,(v)) -#define atomic_dec(v) atomic_sub(1,(v)) +#define atomic_inc(v) ((void)__atomic_add(1, (v))) +#define atomic_dec(v) ((void)__atomic_sub(1, (v))) -#define atomic_add_negative(i, v) (atomic_add_return((i), (v)) < 0) +#define atomic_add_negative(i, v) (__atomic_add((i), (v)) < 0) #endif /* !(__KERNEL__) */ diff --git a/include/asm-sparc/semaphore.h b/include/asm-sparc/semaphore.h index cee9745b6..5a5fc7c33 100644 --- a/include/asm-sparc/semaphore.h +++ b/include/asm-sparc/semaphore.h @@ -64,14 +64,14 @@ extern void __up(struct semaphore * sem); static inline void down(struct semaphore * sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); register int increment asm("g2"); #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &(sem->count.counter); increment = 1; __asm__ __volatile__(" @@ -99,14 +99,14 @@ static inline void down(struct semaphore * sem) static inline int down_interruptible(struct semaphore * sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); register int increment asm("g2"); #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &(sem->count.counter); increment = 1; __asm__ __volatile__(" @@ -137,14 +137,14 @@ static inline int down_interruptible(struct semaphore * sem) static inline int down_trylock(struct semaphore * sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); register int increment asm("g2"); #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &(sem->count.counter); increment = 1; __asm__ __volatile__(" @@ -175,14 +175,14 @@ static inline int down_trylock(struct semaphore * sem) static inline void up(struct semaphore * sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); register int increment asm("g2"); #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &(sem->count.counter); increment = 1; __asm__ __volatile__(" @@ -284,13 +284,13 @@ extern void ___up_write(/* Special calling convention */ void); static inline void down_read(struct rw_semaphore *sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &sem->count; __asm__ __volatile__(" mov %%o7, %%g4 @@ -310,13 +310,13 @@ static inline void down_read(struct rw_semaphore *sem) static inline void down_write(struct rw_semaphore *sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &sem->count; __asm__ __volatile__(" mov %%o7, %%g4 @@ -344,9 +344,9 @@ static inline void down_write(struct rw_semaphore *sem) */ static inline void __up_read(struct rw_semaphore *sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &sem->count; __asm__ __volatile__(" mov %%o7, %%g4 @@ -362,9 +362,9 @@ static inline void __up_read(struct rw_semaphore *sem) */ static inline void __up_write(struct rw_semaphore *sem) { - register atomic_t *ptr asm("g1"); + register volatile int *ptr asm("g1"); - ptr = (atomic_t *) __atomic_fool_gcc(sem); + ptr = &sem->count; __asm__ __volatile__(" mov %%o7, %%g4 diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h index f6504165d..31507b7bc 100644 --- a/include/asm-sparc/smp.h +++ b/include/asm-sparc/smp.h @@ -51,6 +51,7 @@ extern unsigned long cpu_offset[NR_CPUS]; extern int smp_found_cpus; extern unsigned char boot_cpu_id; extern unsigned long cpu_present_map; +#define cpu_online_map cpu_present_map typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); diff --git a/include/asm-sparc64/asi.h b/include/asm-sparc64/asi.h index 06a3b848b..37dd93cd1 100644 --- a/include/asm-sparc64/asi.h +++ b/include/asm-sparc64/asi.h @@ -1,4 +1,4 @@ -/* $Id: asi.h,v 1.1 1996/11/20 12:59:45 davem Exp $ */ +/* $Id: asi.h,v 1.4 2001/03/15 02:08:46 davem Exp $ */ #ifndef _SPARC64_ASI_H #define _SPARC64_ASI_H @@ -23,19 +23,35 @@ #define ASI_PNFL 0x8a /* Primary, no fault, little endian */ #define ASI_SNFL 0x8b /* Secondary, no fault, little endian */ -/* SpitFire extended ASIs. */ +/* SpitFire and later extended ASIs. The "(III)" marker designates + * UltraSparc-III specific ASIs. + */ #define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ -#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-cachable, E-bit */ +#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ #define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian */ -#define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-cachable, E-bit, little endian */ +#define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ #define ASI_NUCLEUS_QUAD_LDD 0x24 /* Cachable, qword load */ #define ASI_NUCLEUS_QUAD_LDD_L 0x2c /* Cachable, qword load, little endian */ +#define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data status RAM diag */ +#define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ +#define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */ +#define ASI_PCACHE_SNOOP_TAG 0x33 /* (III) PCache snoop tag RAM diag */ +#define ASI_WCACHE_VALID_BITS 0x38 /* (III) WCache Valid Bits diag */ +#define ASI_WCACHE_DATA 0x39 /* (III) WCache data RAM diag */ +#define ASI_WCACHE_TAG 0x3a /* (III) WCache tag RAM diag */ +#define ASI_WCACHE_SNOOP_TAG 0x3b /* (III) WCache snoop tag RAM diag */ +#define ASI_DCACHE_INVALIDATE 0x42 /* (III) DCache Invalidate diag */ +#define ASI_DCACHE_UTAG 0x43 /* (III) DCache uTag diag */ +#define ASI_DCACHE_SNOOP_TAG 0x44 /* (III) DCache snoop tag RAM diag */ #define ASI_LSU_CONTROL 0x45 /* Load-store control unit */ +#define ASI_DCU_CONTROL_REG 0x45 /* (III) DCache Unit Control Register */ #define ASI_DCACHE_DATA 0x46 /* Data cache data-ram diag access */ #define ASI_DCACHE_TAG 0x47 /* Data cache tag/valid ram diag access */ #define ASI_INTR_DISPATCH_STAT 0x48 /* IRQ vector dispatch status */ #define ASI_INTR_RECEIVE 0x49 /* IRQ vector receive status */ #define ASI_UPA_CONFIG 0x4a /* UPA config space */ +#define ASI_SAFARI_CONFIG 0x4a /* (III) Safari Config Register */ +#define ASI_SAFARI_ADDRESS 0x4a /* (III) Safari Address Register */ #define ASI_ESTATE_ERROR_EN 0x4b /* E-cache error enable space */ #define ASI_AFSR 0x4c /* Async fault status register */ #define ASI_AFAR 0x4d /* Async fault address register */ @@ -55,16 +71,23 @@ #define ASI_DTLB_DATA_ACCESS 0x5d /* Data-MMU TLB data access register */ #define ASI_DTLB_TAG_READ 0x5e /* Data-MMU TLB tag read register */ #define ASI_DMMU_DEMAP 0x5f /* Data-MMU TLB demap */ +#define ASI_IIU_INST_TRAP 0x60 /* (III) Instruction Breakpoint register */ #define ASI_IC_INSTR 0x66 /* Insn cache instrucion ram diag access */ #define ASI_IC_TAG 0x67 /* Insn cache tag/valid ram diag access */ +#define ASI_IC_STAG 0x68 /* (III) Insn cache snoop tag ram diag */ #define ASI_IC_PRE_DECODE 0x6e /* Insn cache pre-decode ram diag access */ #define ASI_IC_NEXT_FIELD 0x6f /* Insn cache next-field ram diag access */ +#define ASI_BRPRED_ARRAY 0x6f /* (III) Branch Prediction RAM diag */ #define ASI_BLK_AIUP 0x70 /* Primary, user, block load/store */ #define ASI_BLK_AIUS 0x71 /* Secondary, user, block load/store */ +#define ASI_EC_DATA 0x74 /* (III) E-cache data staging register */ +#define ASI_EC_CTRL 0x75 /* (III) E-cache control register */ #define ASI_EC_W 0x76 /* E-cache diag write access */ #define ASI_UDB_ERROR_W 0x77 /* External UDB error registers write */ #define ASI_UDB_CONTROL_W 0x77 /* External UDB control registers write */ -#define ASI_UDB_INTR_W 0x77 /* External UDB IRQ vector dispatch write */ +#define ASI_INTR_W 0x77 /* IRQ vector dispatch write */ +#define ASI_INTR_DATAN_W 0x77 /* (III) Outgoing irq vector data reg N */ +#define ASI_INTR_DISPATCH_W 0x77 /* (III) Interrupt vector dispatch */ #define ASI_BLK_AIUPL 0x78 /* Primary, user, little, blk ld/st */ #define ASI_BLK_AIUSL 0x79 /* Secondary, user, little, blk ld/st */ #define ASI_EC_R 0x7e /* E-cache diag read access */ @@ -72,7 +95,8 @@ #define ASI_UDBL_ERROR_R 0x7f /* External UDB error registers read low */ #define ASI_UDBH_CONTROL_R 0x7f /* External UDB control registers read hi */ #define ASI_UDBL_CONTROL_R 0x7f /* External UDB control registers read low */ -#define ASI_UDB_INTR_R 0x7f /* External UDB IRQ vector dispatch read */ +#define ASI_INTR_R 0x7f /* IRQ vector dispatch read */ +#define ASI_INTR_DATAN_R 0x7f /* (III) Incoming irq vector data reg N */ #define ASI_PST8_P 0xc0 /* Primary, 8 8-bit, partial */ #define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */ #define ASI_PST16_P 0xc2 /* Primary, 4 16-bit, partial */ diff --git a/include/asm-sparc64/bbc.h b/include/asm-sparc64/bbc.h new file mode 100644 index 000000000..765396288 --- /dev/null +++ b/include/asm-sparc64/bbc.h @@ -0,0 +1,225 @@ +/* $Id: bbc.h,v 1.1 2001/03/24 06:03:03 davem Exp $ + * bbc.h: Defines for BootBus Controller found on UltraSPARC-III + * systems. + * + * Copyright (C) 2000 David S. Miller (davem@redhat.com) + */ + +#ifndef _SPARC64_BBC_H +#define _SPARC64_BBC_H + +/* Register sizes are indicated by "B" (Byte, 1-byte), + * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or + * "Q" (Quad, 8 bytes) inside brackets. + */ + +#define BBC_AID 0x00 /* [B] Agent ID */ +#define BBC_DEVP 0x01 /* [B] Device Present */ +#define BBC_ARB 0x02 /* [B] Arbitration */ +#define BBC_QUIESCE 0x03 /* [B] Quiesce */ +#define BBC_WDACTION 0x04 /* [B] Watchdog Action */ +#define BBC_SPG 0x06 /* [B] Soft POR Gen */ +#define BBC_SXG 0x07 /* [B] Soft XIR Gen */ +#define BBC_PSRC 0x08 /* [W] POR Source */ +#define BBC_XSRC 0x0c /* [B] XIR Source */ +#define BBC_CSC 0x0d /* [B] Clock Synthesizers Control*/ +#define BBC_ES_CTRL 0x0e /* [H] Energy Star Control */ +#define BBC_ES_ACT 0x10 /* [W] E* Assert Change Time */ +#define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */ +#define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */ +#define BBC_ES_ABT 0x16 /* [H] E* Assert Bypass Time */ +#define BBC_ES_PST 0x18 /* [W] E* PLL Settle Time */ +#define BBC_ES_FSL 0x1c /* [W] E* Frequency Switch Latency*/ +#define BBC_EBUST 0x20 /* [Q] EBUS Timing */ +#define BBC_JTAG_CMD 0x28 /* [W] JTAG+ Command */ +#define BBC_JTAG_CTRL 0x2c /* [B] JTAG+ Control */ +#define BBC_I2C_SEL 0x2d /* [B] I2C Selection */ +#define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */ +#define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/ +#define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */ +#define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/ +#define BBC_KBD_BEEP 0x32 /* [B] Keyboard Beep */ +#define BBC_KBD_BCNT 0x34 /* [W] Keyboard Beep Counter */ + +#define BBC_REGS_SIZE 0x40 + +/* There is a 2K scratch ram area at offset 0x80000 but I doubt + * we will use it for anything. + */ + +/* Agent ID register. This register shows the Safari Agent ID + * for the processors. The value returned depends upon which + * cpu is reading the register. + */ +#define BBC_AID_ID 0x07 /* Safari ID */ +#define BBC_AID_RESV 0xf8 /* Reserved */ + +/* Device Present register. One can determine which cpus are actually + * present in the machine by interrogating this register. + */ +#define BBC_DEVP_CPU0 0x01 /* Processor 0 present */ +#define BBC_DEVP_CPU1 0x02 /* Processor 1 present */ +#define BBC_DEVP_CPU2 0x04 /* Processor 2 present */ +#define BBC_DEVP_CPU3 0x08 /* Processor 3 present */ +#define BBC_DEVP_RESV 0xf0 /* Reserved */ + +/* Arbitration register. This register is used to block access to + * the BBC from a particular cpu. + */ +#define BBC_ARB_CPU0 0x01 /* Enable cpu 0 BBC arbitratrion */ +#define BBC_ARB_CPU1 0x02 /* Enable cpu 1 BBC arbitratrion */ +#define BBC_ARB_CPU2 0x04 /* Enable cpu 2 BBC arbitratrion */ +#define BBC_ARB_CPU3 0x08 /* Enable cpu 3 BBC arbitratrion */ +#define BBC_ARB_RESV 0xf0 /* Reserved */ + +/* Quiesce register. Bus and BBC segments for cpus can be disabled + * with this register, ie. for hot plugging. + */ +#define BBC_QUIESCE_S02 0x01 /* Quiesce Safari segment for cpu 0 and 2 */ +#define BBC_QUIESCE_S13 0x02 /* Quiesce Safari segment for cpu 1 and 3 */ +#define BBC_QUIESCE_B02 0x04 /* Quiesce BBC segment for cpu 0 and 2 */ +#define BBC_QUIESCE_B13 0x08 /* Quiesce BBC segment for cpu 1 and 3 */ +#define BBC_QUIESCE_FD0 0x10 /* Disable Fatal_Error[0] reporting */ +#define BBC_QUIESCE_FD1 0x20 /* Disable Fatal_Error[1] reporting */ +#define BBC_QUIESCE_FD2 0x40 /* Disable Fatal_Error[2] reporting */ +#define BBC_QUIESCE_FD3 0x80 /* Disable Fatal_Error[3] reporting */ + +/* Watchdog Action register. When the watchdog device timer expires + * a line is enabled to the BBC. The action BBC takes when this line + * is asserted can be controlled by this regiser. + */ +#define BBC_WDACTION_RST 0x01 /* When set, watchdog causes system reset. + * When clear, all cpus receive XIR reset. + */ +#define BBC_WDACTION_RESV 0xfe /* Reserved */ + +/* Soft_POR_GEN register. The POR (Power On Reset) signal may be asserted + * for specific processors or all processors via this register. + */ +#define BBC_SPG_CPU0 0x01 /* Assert POR for processor 0 */ +#define BBC_SPG_CPU1 0x02 /* Assert POR for processor 1 */ +#define BBC_SPG_CPU2 0x04 /* Assert POR for processor 2 */ +#define BBC_SPG_CPU3 0x08 /* Assert POR for processor 3 */ +#define BBC_SPG_CPUALL 0x10 /* Reset all processors and reset + * the entire system. + */ +#define BBC_SPG_RESV 0xe0 /* Reserved */ + +/* Soft_XIR_GEN register. The XIR (eXternally Initiated Reset) signal + * may be asserted to specific processors via this register. + */ +#define BBC_SXG_CPU0 0x01 /* Assert XIR for processor 0 */ +#define BBC_SXG_CPU1 0x02 /* Assert XIR for processor 1 */ +#define BBC_SXG_CPU2 0x04 /* Assert XIR for processor 2 */ +#define BBC_SXG_CPU3 0x08 /* Assert XIR for processor 3 */ +#define BBC_SXG_RESV 0xf0 /* Reserved */ + +/* POR Source register. One may identify the cause of the most recent + * reset by reading this register. + */ +#define BBC_PSRC_SPG0 0x0001 /* CPU 0 reset via BBC_SPG register */ +#define BBC_PSRC_SPG1 0x0002 /* CPU 1 reset via BBC_SPG register */ +#define BBC_PSRC_SPG2 0x0004 /* CPU 2 reset via BBC_SPG register */ +#define BBC_PSRC_SPG3 0x0008 /* CPU 3 reset via BBC_SPG register */ +#define BBC_PSRC_SPGSYS 0x0010 /* System reset via BBC_SPG register */ +#define BBC_PSRC_JTAG 0x0020 /* System reset via JTAG+ */ +#define BBC_PSRC_BUTTON 0x0040 /* System reset via push-button dongle */ +#define BBC_PSRC_PWRUP 0x0080 /* System reset via power-up */ +#define BBC_PSRC_FE0 0x0100 /* CPU 0 reported Fatal_Error */ +#define BBC_PSRC_FE1 0x0200 /* CPU 1 reported Fatal_Error */ +#define BBC_PSRC_FE2 0x0400 /* CPU 2 reported Fatal_Error */ +#define BBC_PSRC_FE3 0x0800 /* CPU 3 reported Fatal_Error */ +#define BBC_PSRC_FE4 0x1000 /* Schizo reported Fatal_Error */ +#define BBC_PSRC_FE5 0x2000 /* Safari device 5 reported Fatal_Error */ +#define BBC_PSRC_FE6 0x4000 /* CPMS reported Fatal_Error */ +#define BBC_PSRC_SYNTH 0x8000 /* System reset when on-board clock synthesizers + * were updated. + */ +#define BBC_PSRC_WDT 0x10000 /* System reset via Super I/O watchdog */ +#define BBC_PSRC_RSC 0x20000 /* System reset via RSC remote monitoring + * device + */ + +/* XIR Source register. The source of an XIR event sent to a processor may + * be determined via this register. + */ +#define BBC_XSRC_SXG0 0x01 /* CPU 0 received XIR via Soft_XIR_GEN reg */ +#define BBC_XSRC_SXG1 0x02 /* CPU 1 received XIR via Soft_XIR_GEN reg */ +#define BBC_XSRC_SXG2 0x04 /* CPU 2 received XIR via Soft_XIR_GEN reg */ +#define BBC_XSRC_SXG3 0x08 /* CPU 3 received XIR via Soft_XIR_GEN reg */ +#define BBC_XSRC_JTAG 0x10 /* All CPUs received XIR via JTAG+ */ +#define BBC_XSRC_W_OR_B 0x20 /* All CPUs received XIR either because: + * a) Super I/O watchdog fired, or + * b) XIR push button was activated + */ +#define BBC_XSRC_RESV 0xc0 /* Reserved */ + +/* Clock Synthesizers Control register. This register provides the big-bang + * programming interface to the two clock synthesizers of the machine. + */ +#define BBC_CSC_SLOAD 0x01 /* Directly connected to S_LOAD pins */ +#define BBC_CSC_SDATA 0x02 /* Directly connected to S_DATA pins */ +#define BBC_CSC_SCLOCK 0x04 /* Directly connected to S_CLOCK pins */ +#define BBC_CSC_RESV 0x78 /* Reserved */ +#define BBC_CSC_RST 0x80 /* Generate system reset when S_LOAD==1 */ + +/* Energy Star Control register. This register is used to generate the + * clock frequency change trigger to the main system devices (Schizo and + * the processors). The transition occurs when bits in this register + * go from 0 to 1, only one bit must be set at once else no action + * occurs. Basically the sequence of events is: + * a) Choose new frequency: full, 1/2 or 1/32 + * b) Program this desired frequency into the cpus and Schizo. + * c) Set the same value in this register. + * d) 16 system clocks later, clear this register. + */ +#define BBC_ES_CTRL_1_1 0x01 /* Full frequency */ +#define BBC_ES_CTRL_1_2 0x02 /* 1/2 frequency */ +#define BBC_ES_CTRL_1_32 0x20 /* 1/32 frequency */ +#define BBC_ES_RESV 0xdc /* Reserved */ + +/* Energy Star Assert Change Time register. This determines the number + * of BBC clock cycles (which is half the system frequency) between + * the detection of FREEZE_ACK being asserted and the assertion of + * the CLK_CHANGE_L[2:0] signals. + */ +#define BBC_ES_ACT_VAL 0xff + +/* Energy Star Assert Bypass Time register. This determines the number + * of BBC clock cycles (which is half the system frequency) between + * the assertion of the CLK_CHANGE_L[2:0] signals and the assertion of + * the ESTAR_PLL_BYPASS signal. + */ +#define BBC_ES_ABT_VAL 0xffff + +/* Energy Star PLL Settle Time register. This determines the number of + * BBC clock cycles (which is half the system frequency) between the + * de-assertion of CLK_CHANGE_L[2:0] and the de-assertion of the FREEZE_L + * signal. + */ +#define BBC_ES_PST_VAL 0xffffffff + +/* Energy Star Frequency Switch Latency register. This is the number of + * BBC clocks between the de-assertion of CLK_CHANGE_L[2:0] and the first + * edge of the Safari clock at the new frequency. + */ +#define BBC_ES_FSL_VAL 0xffffffff + +/* Keyboard Beep control register. This is a simple enabler for the audio + * beep sound. + */ +#define BBC_KBD_BEEP_ENABLE 0x01 /* Enable beep */ +#define BBC_KBD_BEEP_RESV 0xfe /* Reserved */ + +/* Keyboard Beep Counter register. There is a free-running counter inside + * the BBC which runs at half the system clock. The bit set in this register + * determines when the audio sound is generated. So for example if bit + * 10 is set, the audio beep will oscillate at 1/(2**12). The keyboard beep + * generator automatically selects a different bit to use if the system clock + * is changed via Energy Star. + */ +#define BBC_KBD_BCNT_BITS 0x0007fc00 +#define BBC_KBC_BCNT_RESV 0xfff803ff + +#endif /* _SPARC64_BBC_H */ + diff --git a/include/asm-sparc64/dcr.h b/include/asm-sparc64/dcr.h new file mode 100644 index 000000000..0938a1c6e --- /dev/null +++ b/include/asm-sparc64/dcr.h @@ -0,0 +1,13 @@ +/* $Id: dcr.h,v 1.4 2001/03/09 17:56:37 davem Exp $ */ +#ifndef _SPARC64_DCR_H +#define _SPARC64_DCR_H + +/* UltraSparc-III Dispatch Control Register, ASR 0x12 */ +#define DCR_OBS 0x0000000000000fc0 /* Observability Bus Controls */ +#define DCR_BPE 0x0000000000000020 /* Branch Predict Enable */ +#define DCR_RPE 0x0000000000000010 /* Return Address Prediction Enable */ +#define DCR_SI 0x0000000000000008 /* Single Instruction Disable */ +#define DCR_IFPOE 0x0000000000000002 /* IRQ FP Operation Enable */ +#define DCR_MS 0x0000000000000001 /* Multi-Scalar dispatch */ + +#endif /* _SPARC64_DCR_H */ diff --git a/include/asm-sparc64/dcu.h b/include/asm-sparc64/dcu.h new file mode 100644 index 000000000..ecbed2ae5 --- /dev/null +++ b/include/asm-sparc64/dcu.h @@ -0,0 +1,26 @@ +/* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */ +#ifndef _SPARC64_DCU_H +#define _SPARC64_DCU_H + +/* UltraSparc-III Data Cache Unit Control Register */ +#define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/ +#define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */ +#define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */ +#define DCU_RE 0x0000400000000000 /* RAW bypass Enable */ +#define DCU_PE 0x0000200000000000 /* PCache Enable */ +#define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */ +#define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */ +#define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */ +#define DCU_WE 0x0000020000000000 /* WCache enable */ +#define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */ +#define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */ +#define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */ +#define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */ +#define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */ +#define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */ +#define DCU_DM 0x0000000000000008 /* DMMU Enable */ +#define DCU_IM 0x0000000000000004 /* IMMU Enable */ +#define DCU_DC 0x0000000000000002 /* Data Cache Enable */ +#define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */ + +#endif /* _SPARC64_DCU_H */ diff --git a/include/asm-sparc64/ebus.h b/include/asm-sparc64/ebus.h index 7910d03ae..39d3d567a 100644 --- a/include/asm-sparc64/ebus.h +++ b/include/asm-sparc64/ebus.h @@ -1,4 +1,4 @@ -/* $Id: ebus.h,v 1.9 1999/08/30 10:14:37 davem Exp $ +/* $Id: ebus.h,v 1.10 2001/03/14 05:00:55 davem Exp $ * ebus.h: PCI to Ebus pseudo driver software state. * * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) @@ -41,6 +41,7 @@ struct linux_ebus { struct pci_pbm_info *parent; struct pci_dev *self; int index; + int is_rio; int prom_node; char prom_name[64]; struct linux_prom_ebus_ranges ebus_ranges[PROMREG_MAX]; diff --git a/include/asm-sparc64/elf.h b/include/asm-sparc64/elf.h index 7e3adf02f..201470b52 100644 --- a/include/asm-sparc64/elf.h +++ b/include/asm-sparc64/elf.h @@ -1,4 +1,4 @@ -/* $Id: elf.h,v 1.25 2000/07/12 01:27:08 davem Exp $ */ +/* $Id: elf.h,v 1.28 2001/03/24 09:36:02 davem Exp $ */ #ifndef __ASM_SPARC64_ELF_H #define __ASM_SPARC64_ELF_H @@ -56,9 +56,10 @@ typedef struct { instruction set this cpu supports. */ /* On Ultra, we support all of the v8 capabilities. */ -#define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ - HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | \ - HWCAP_SPARC_V9) +#define ELF_HWCAP ((HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ + HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | \ + HWCAP_SPARC_V9) | \ + ((tlb_type == cheetah) ? HWCAP_SPARC_ULTRA3 : 0)) /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in @@ -78,16 +79,16 @@ do { unsigned char flags = current->thread.flags; \ if (flags & SPARC_FLAG_32BIT) { \ pgd_t *pgd0 = ¤t->mm->pgd[0]; \ if (pgd_none (*pgd0)) { \ - pmd_t *page = get_pmd_fast(); \ + pmd_t *page = pmd_alloc_one_fast(NULL, 0); \ if (!page) \ - (void) get_pmd_slow(pgd0, 0); \ - else \ - pgd_set(pgd0, page); \ + page = pmd_alloc_one(NULL, 0); \ + pgd_set(pgd0, page); \ } \ pgd_cache = pgd_val(*pgd0) << 11UL; \ } \ __asm__ __volatile__( \ - "stxa\t%0, [%1] %2" \ + "stxa\t%0, [%1] %2\n\t" \ + "membar #Sync" \ : /* no outputs */ \ : "r" (pgd_cache), \ "r" (TSB_REG), \ diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h index 25cc6dd9f..83d1b7fa0 100644 --- a/include/asm-sparc64/floppy.h +++ b/include/asm-sparc64/floppy.h @@ -1,4 +1,4 @@ -/* $Id: floppy.h,v 1.28 2000/02/18 13:50:54 davem Exp $ +/* $Id: floppy.h,v 1.29 2001/03/24 00:07:23 davem Exp $ * asm-sparc64/floppy.h: Sparc specific parts of the Floppy driver. * * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) @@ -565,6 +565,24 @@ static int sun_pci_fd_test_drive(unsigned long port, int drive) #endif /* CONFIG_PCI */ +#ifdef CONFIG_PCI +static int __init ebus_fdthree_p(struct linux_ebus_device *edev) +{ + if (!strcmp(edev->prom_name, "fdthree")) + return 1; + if (!strcmp(edev->prom_name, "floppy")) { + char compat[16]; + prom_getstring(edev->prom_node, + "compatible", + compat, sizeof(compat)); + compat[15] = '\0'; + if (!strcmp(compat, "fdthree")) + return 1; + } + return 0; +} +#endif + static unsigned long __init sun_floppy_init(void) { char state[128]; @@ -592,7 +610,7 @@ static unsigned long __init sun_floppy_init(void) for_each_ebus(ebus) { for_each_ebusdev(edev, ebus) { - if (!strcmp(edev->prom_name, "fdthree")) + if (ebus_fdthree_p(edev)) goto ebus_done; } } diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h index 4e709ee25..c671d2629 100644 --- a/include/asm-sparc64/iommu.h +++ b/include/asm-sparc64/iommu.h @@ -1,4 +1,4 @@ -/* $Id: iommu.h,v 1.9 1999/09/21 14:39:39 davem Exp $ +/* $Id: iommu.h,v 1.10 2001/03/08 09:55:56 davem Exp $ * iommu.h: Definitions for the sun5 IOMMU. * * Copyright (C) 1996, 1999 David S. Miller (davem@caip.rutgers.edu) @@ -12,7 +12,7 @@ #define IOPTE_STBUF 0x1000000000000000 /* DVMA can use streaming buffer */ #define IOPTE_INTRA 0x0800000000000000 /* SBUS slot-->slot direct transfer */ #define IOPTE_CONTEXT 0x07ff800000000000 /* Context number */ -#define IOPTE_PAGE 0x00007fffffffe000 /* Physical page number (PA[40:13]) */ +#define IOPTE_PAGE 0x00007fffffffe000 /* Physical page number (PA[42:13]) */ #define IOPTE_CACHE 0x0000000000000010 /* Cached (in UPA E-cache) */ #define IOPTE_WRITE 0x0000000000000002 /* Writeable */ diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index c5c3a2fc3..a56a9daa3 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h @@ -1,4 +1,4 @@ -/* $Id: irq.h,v 1.19 2000/06/26 19:40:27 davem Exp $ +/* $Id: irq.h,v 1.20 2001/03/09 01:31:40 davem Exp $ * irq.h: IRQ registers on the 64-bit Sparc. * * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) @@ -77,7 +77,9 @@ extern unsigned char dma_sync_reg_table_entry; /* IMAP/ICLR register defines */ #define IMAP_VALID 0x80000000 /* IRQ Enabled */ -#define IMAP_TID 0x7c000000 /* UPA TargetID */ +#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ +#define IMAP_AID_SAFARI 0x7c000000 /* Safari AgentID */ +#define IMAP_NID_SAFARI 0x03e00000 /* Safari NodeID */ #define IMAP_IGN 0x000007c0 /* IRQ Group Number */ #define IMAP_INO 0x0000003f /* IRQ Number */ #define IMAP_INR 0x000007ff /* Full interrupt number*/ diff --git a/include/asm-sparc64/mc146818rtc.h b/include/asm-sparc64/mc146818rtc.h index 4a9e01b4f..e9c0fcc25 100644 --- a/include/asm-sparc64/mc146818rtc.h +++ b/include/asm-sparc64/mc146818rtc.h @@ -7,8 +7,13 @@ #include <asm/io.h> #ifndef RTC_PORT -#define RTC_PORT(x) (0x70 + (x)) -#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ +#ifdef CONFIG_PCI +extern unsigned long ds1287_regs; +#else +#define ds1287_regs (0UL) +#endif +#define RTC_PORT(x) (ds1287_regs + (x)) +#define RTC_ALWAYS_BCD 0 #endif /* diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h index 6c5e894b8..27609bfbe 100644 --- a/include/asm-sparc64/mmu_context.h +++ b/include/asm-sparc64/mmu_context.h @@ -1,4 +1,4 @@ -/* $Id: mmu_context.h,v 1.45 2000/08/12 13:25:52 davem Exp $ */ +/* $Id: mmu_context.h,v 1.47 2001/03/22 07:26:04 davem Exp $ */ #ifndef __SPARC64_MMU_CONTEXT_H #define __SPARC64_MMU_CONTEXT_H @@ -72,6 +72,7 @@ do { \ "mov %3, %%g4\n\t" \ "mov %0, %%g7\n\t" \ "stxa %1, [%%g4] %2\n\t" \ + "membar #Sync\n\t" \ "wrpr %%g0, 0x096, %%pstate" \ : /* no outputs */ \ : "r" (paddr), "r" (pgd_cache),\ @@ -84,18 +85,9 @@ do { \ "flush %%g6" \ : /* No outputs */ \ : "r" (CTX_HWBITS((__mm)->context)), \ - "r" (0x10), "i" (0x58)) + "r" (0x10), "i" (ASI_DMMU)) -/* Clean out potential stale TLB entries due to previous - * users of this TLB context. We flush TLB contexts - * lazily on sparc64. - */ -#define clean_secondary_context() \ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" \ - "stxa %%g0, [%0] %2\n\t" \ - "flush %%g6" \ - : /* No outputs */ \ - : "r" (0x50), "i" (0x5f), "i" (0x57)) +extern void __flush_tlb_mm(unsigned long, unsigned long); /* Switch the current MM context. */ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk, int cpu) @@ -127,7 +119,7 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str */ if (!ctx_valid || !(mm->cpu_vm_mask & vm_mask)) { mm->cpu_vm_mask |= vm_mask; - clean_secondary_context(); + __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); } } spin_unlock(&mm->page_table_lock); @@ -147,7 +139,7 @@ static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm spin_unlock(&mm->page_table_lock); load_secondary_context(mm); - clean_secondary_context(); + __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); reload_tlbmiss_state(current, mm); } diff --git a/include/asm-sparc64/openprom.h b/include/asm-sparc64/openprom.h index 44210c08e..0a336901d 100644 --- a/include/asm-sparc64/openprom.h +++ b/include/asm-sparc64/openprom.h @@ -1,4 +1,4 @@ -/* $Id: openprom.h,v 1.8 2000/08/12 19:55:25 anton Exp $ */ +/* $Id: openprom.h,v 1.9 2001/03/16 10:22:02 davem Exp $ */ #ifndef __SPARC64_OPENPROM_H #define __SPARC64_OPENPROM_H @@ -204,6 +204,12 @@ struct linux_prom_ranges { unsigned int or_size; }; +struct linux_prom64_ranges { + unsigned long ot_child_base; /* Bus feels this */ + unsigned long ot_parent_base; /* CPU looks from here */ + unsigned long or_size; +}; + /* Ranges and reg properties are a bit different for PCI. */ struct linux_prom_pci_registers { unsigned int phys_hi; diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h index 6840476dd..9a0902325 100644 --- a/include/asm-sparc64/parport.h +++ b/include/asm-sparc64/parport.h @@ -1,4 +1,4 @@ -/* $Id: parport.h,v 1.9 2000/03/16 07:47:27 davem Exp $ +/* $Id: parport.h,v 1.10 2001/03/24 00:18:57 davem Exp $ * parport.h: sparc64 specific parport initialization and dma. * * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) @@ -99,6 +99,25 @@ get_dma_residue(unsigned int dmanr) return res; } +static int ebus_ecpp_p(struct linux_ebus_device *edev) +{ + if (!strcmp(edev->prom_name, "ecpp")) + return 1; + if (!strcmp(edev->prom_name, "parallel")) { + char compat[19]; + prom_getstring(edev->prom_node, + "compatible", + compat, sizeof(compat)); + compat[18] = '\0'; + if (!strcmp(compat, "ecpp")) + return 1; + if (!strcmp(compat, "ns87317-ecpp") && + !strcmp(compat + 13, "ecpp")) + return 1; + } + return 0; +} + static int parport_pc_find_nonpci_ports (int autoirq, int autodma) { struct linux_ebus *ebus; @@ -110,7 +129,7 @@ static int parport_pc_find_nonpci_ports (int autoirq, int autodma) for_each_ebus(ebus) { for_each_ebusdev(edev, ebus) { - if (!strcmp(edev->prom_name, "ecpp")) { + if (ebus_ecpp_p(edev)) { unsigned long base = edev->resource[0].start; unsigned long config = edev->resource[1].start; diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h index 082626725..ed71f2e7d 100644 --- a/include/asm-sparc64/pbm.h +++ b/include/asm-sparc64/pbm.h @@ -1,4 +1,4 @@ -/* $Id: pbm.h,v 1.23 2001/01/11 16:26:45 davem Exp $ +/* $Id: pbm.h,v 1.25 2001/02/28 03:28:55 davem Exp $ * pbm.h: UltraSparc PCI controller software state. * * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com) @@ -144,6 +144,9 @@ struct pci_pbm_info { struct resource io_space; struct resource mem_space; + /* Base of PCI Config space, can be per-PBM or shared. */ + unsigned long config_space; + /* State of 66MHz capabilities on this PBM. */ int is_66mhz_capable; int all_devs_66mhz; @@ -164,11 +167,8 @@ struct pci_controller_info { /* List of all PCI controllers. */ struct pci_controller_info *next; - /* Physical address base of controller registers - * and PCI config space. - */ + /* Physical address base of controller registers. */ unsigned long controller_regs; - unsigned long config_space; /* Opaque 32-bit system bus Port ID. */ u32 portid; @@ -184,7 +184,7 @@ struct pci_controller_info { /* Operations which are controller specific. */ void (*scan_bus)(struct pci_controller_info *); - unsigned int (*irq_build)(struct pci_controller_info *, struct pci_dev *, unsigned int); + unsigned int (*irq_build)(struct pci_pbm_info *, struct pci_dev *, unsigned int); void (*base_address_update)(struct pci_dev *, int); void (*resource_adjust)(struct pci_dev *, struct resource *, struct resource *); diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h index 45e1f1828..a0a93cbfa 100644 --- a/include/asm-sparc64/pgalloc.h +++ b/include/asm-sparc64/pgalloc.h @@ -1,4 +1,4 @@ -/* $Id: pgalloc.h,v 1.14 2000/12/09 04:15:24 anton Exp $ */ +/* $Id: pgalloc.h,v 1.18 2001/03/24 09:36:01 davem Exp $ */ #ifndef _SPARC64_PGALLOC_H #define _SPARC64_PGALLOC_H @@ -22,18 +22,22 @@ #define flush_page_to_ram(page) do { } while (0) /* - * icache doesnt snoop local stores and we don't use block commit stores - * (which invalidate icache lines) during module load, so we need this. + * On spitfire, the icache doesn't snoop local stores and we don't + * use block commit stores (which invalidate icache lines) during + * module load, so we need this. */ extern void flush_icache_range(unsigned long start, unsigned long end); extern void __flush_dcache_page(void *addr, int flush_icache); #define flush_dcache_page(page) \ -do { if ((page)->mapping && !(page)->mapping->i_mmap && !(page)->mapping->i_mmap_shared) \ +do { if ((page)->mapping && \ + !((page)->mapping->i_mmap) && \ + !((page)->mapping->i_mmap_shared)) \ set_bit(PG_dcache_dirty, &(page)->flags); \ else \ __flush_dcache_page((page)->virtual, \ - (page)->mapping != NULL); \ + ((tlb_type == spitfire) && \ + (page)->mapping != NULL)); \ } while(0) extern void __flush_dcache_range(unsigned long start, unsigned long end); @@ -93,14 +97,18 @@ extern void smp_flush_tlb_page(struct mm_struct *mm, unsigned long page); #endif /* ! CONFIG_SMP */ -/* This will change for Cheetah and later chips. */ -#define VPTE_BASE 0xfffffffe00000000 +#define VPTE_BASE_SPITFIRE 0xfffffffe00000000 +#if 1 +#define VPTE_BASE_CHEETAH VPTE_BASE_SPITFIRE +#else +#define VPTE_BASE_CHEETAH 0xffe0000000000000 +#endif extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end) { /* Note the signed type. */ - long s = start, e = end; + long s = start, e = end, vpte_base; if (s > e) /* Nobody should call us with start below VM hole and end above. See if it is really true. */ @@ -110,10 +118,15 @@ extern __inline__ void flush_tlb_pgtables(struct mm_struct *mm, unsigned long st s &= PMD_MASK; e = (e + PMD_SIZE - 1) & PMD_MASK; #endif + vpte_base = (tlb_type == spitfire ? + VPTE_BASE_SPITFIRE : + VPTE_BASE_CHEETAH); flush_tlb_range(mm, - VPTE_BASE + (s >> (PAGE_SHIFT - 3)), - VPTE_BASE + (e >> (PAGE_SHIFT - 3))); + vpte_base + (s >> (PAGE_SHIFT - 3)), + vpte_base + (e >> (PAGE_SHIFT - 3))); } +#undef VPTE_BASE_SPITFIRE +#undef VPTE_BASE_CHEETAH /* Page table allocation/freeing. */ #ifdef CONFIG_SMP @@ -214,9 +227,17 @@ extern __inline__ void free_pgd_slow(pgd_t *pgd) #endif /* CONFIG_SMP */ -extern pmd_t *get_pmd_slow(pgd_t *pgd, unsigned long address_premasked); +#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD) + +extern __inline__ pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) +{ + pmd_t *pmd = (pmd_t *)__get_free_page(GFP_KERNEL); + if (pmd) + memset(pmd, 0, PAGE_SIZE); + return pmd; +} -extern __inline__ pmd_t *get_pmd_fast(void) +extern __inline__ pmd_t *pmd_alloc_one_fast(struct mm_struct *mm, unsigned long address) { unsigned long *ret; int color = 0; @@ -246,11 +267,13 @@ extern __inline__ void free_pmd_slow(pmd_t *pmd) free_page((unsigned long)pmd); } -extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted, - unsigned long color); +#define pmd_populate(MM, PMD, PTE) pmd_set(PMD, PTE) + +extern pte_t *pte_alloc_one(struct mm_struct *mm, unsigned long address); -extern __inline__ pte_t *get_pte_fast(unsigned long color) +extern __inline__ pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long address) { + unsigned long color = (address >> (PAGE_SHIFT + 10)) & 0x1UL; unsigned long *ret; if((ret = (unsigned long *)pte_quicklist[color]) != NULL) { @@ -274,46 +297,11 @@ extern __inline__ void free_pte_slow(pte_t *pte) free_page((unsigned long)pte); } -#define pte_free_kernel(pte) free_pte_fast(pte) #define pte_free(pte) free_pte_fast(pte) -#define pmd_free_kernel(pmd) free_pmd_fast(pmd) #define pmd_free(pmd) free_pmd_fast(pmd) #define pgd_free(pgd) free_pgd_fast(pgd) #define pgd_alloc() get_pgd_fast() -extern inline pte_t * pte_alloc(pmd_t *pmd, unsigned long address) -{ - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - if (pmd_none(*pmd)) { - /* Be careful, address can be just about anything... */ - unsigned long color = (((unsigned long)pmd)>>2UL) & 0x1UL; - pte_t *page = get_pte_fast(color); - - if (!page) - return get_pte_slow(pmd, address, color); - pmd_set(pmd, page); - return page + address; - } - return (pte_t *) pmd_page(*pmd) + address; -} - -extern inline pmd_t * pmd_alloc(pgd_t *pgd, unsigned long address) -{ - address = (address >> PMD_SHIFT) & (REAL_PTRS_PER_PMD - 1); - if (pgd_none(*pgd)) { - pmd_t *page = get_pmd_fast(); - - if (!page) - return get_pmd_slow(pgd, address); - pgd_set(pgd, page); - return page + address; - } - return (pmd_t *) pgd_page(*pgd) + address; -} - -#define pte_alloc_kernel(pmd, addr) pte_alloc(pmd, addr) -#define pmd_alloc_kernel(pgd, addr) pmd_alloc(pgd, addr) - extern int do_check_pgt_cache(int, int); #endif /* _SPARC64_PGALLOC_H */ diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index a01042346..54dc5356e 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h @@ -1,4 +1,4 @@ -/* $Id: pgtable.h,v 1.135 2000/11/08 04:49:24 davem Exp $ +/* $Id: pgtable.h,v 1.138 2001/03/08 09:55:56 davem Exp $ * pgtable.h: SpitFire page table operations. * * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu) @@ -27,6 +27,11 @@ */ #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) +/* XXX All of this needs to be rethought so we can take advantage + * XXX cheetah's full 64-bit virtual address space, ie. no more hole + * XXX in the middle like on spitfire. -DaveM + */ + /* PMD_SHIFT determines the size of the area a second-level page table can map */ #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) #define PMD_SIZE (1UL << PMD_SHIFT) @@ -70,7 +75,7 @@ #endif /* !(__ASSEMBLY__) */ -/* SpitFire TTE bits. */ +/* Spitfire/Cheetah TTE bits. */ #define _PAGE_VALID 0x8000000000000000 /* Valid TTE */ #define _PAGE_R 0x8000000000000000 /* Used to keep ref bit up to date */ #define _PAGE_SZ4MB 0x6000000000000000 /* 4MB Page */ @@ -79,10 +84,10 @@ #define _PAGE_SZ8K 0x0000000000000000 /* 8K Page */ #define _PAGE_NFO 0x1000000000000000 /* No Fault Only */ #define _PAGE_IE 0x0800000000000000 /* Invert Endianness */ -#define _PAGE_SOFT2 0x07FC000000000000 /* Second set of software bits */ -#define _PAGE_DIAG 0x0003FE0000000000 /* Diagnostic TTE bits */ -#define _PAGE_PADDR 0x000001FFFFFFE000 /* Physical Address bits [40:13] */ -#define _PAGE_SOFT 0x0000000000001F80 /* First set of software bits */ +#define _PAGE_SN 0x0000800000000000 /* (Cheetah) Snoop */ +#define _PAGE_PADDR_SF 0x000001FFFFFFE000 /* (Spitfire) Phys Address [40:13] */ +#define _PAGE_PADDR 0x000007FFFFFFE000 /* (Cheetah) Phys Address [42:13] */ +#define _PAGE_SOFT 0x0000000000001F80 /* Software bits */ #define _PAGE_L 0x0000000000000040 /* Locked TTE */ #define _PAGE_CP 0x0000000000000020 /* Cacheable in Physical Cache */ #define _PAGE_CV 0x0000000000000010 /* Cacheable in Virtual Cache */ diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h index 5e9203f13..ea5b27596 100644 --- a/include/asm-sparc64/processor.h +++ b/include/asm-sparc64/processor.h @@ -1,4 +1,4 @@ -/* $Id: processor.h,v 1.68 2000/12/31 10:05:43 davem Exp $ +/* $Id: processor.h,v 1.69 2001/03/08 22:08:51 davem Exp $ * include/asm-sparc64/processor.h * * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) @@ -60,8 +60,7 @@ struct thread_struct { /* D$ line 2, 3, 4 */ struct pt_regs *kregs; unsigned long *utraps; - unsigned char gsr[7]; - unsigned char __pad3; + unsigned long gsr[7]; unsigned long xfsr[7]; struct reg_window reg_window[NSWINS]; @@ -97,8 +96,8 @@ struct thread_struct { 0, 0, 0, 0, \ /* fault_address, fpsaved, __pad2, kregs, */ \ 0, { 0 }, 0, 0, \ -/* utraps, gsr, __pad3, xfsr, */ \ - 0, { 0 }, 0, { 0 }, \ +/* utraps, gsr, xfsr, */ \ + 0, { 0 }, { 0 }, \ /* reg_window */ \ { { { 0, }, { 0, } }, }, \ /* rwbuf_stkptrs */ \ diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h index 3898efdd2..2cd547a6f 100644 --- a/include/asm-sparc64/smp.h +++ b/include/asm-sparc64/smp.h @@ -10,6 +10,7 @@ #include <linux/threads.h> #include <asm/asi.h> #include <asm/starfire.h> +#include <asm/spitfire.h> #ifndef __ASSEMBLY__ /* PROM provided per-processor information we need @@ -60,6 +61,7 @@ extern struct cpuinfo_sparc cpu_data[NR_CPUS]; extern unsigned char boot_cpu_id; extern unsigned long cpu_present_map; +#define cpu_online_map cpu_present_map /* * General functions that each host system must provide. @@ -83,7 +85,13 @@ extern __inline__ int cpu_number_map(int cpu) extern __inline__ int hard_smp_processor_id(void) { - if(this_is_starfire != 0) { + if (tlb_type == cheetah) { + unsigned long safari_config; + __asm__ __volatile__("ldxa [%%g0] %1, %0" + : "=r" (safari_config) + : "i" (ASI_SAFARI_CONFIG)); + return ((safari_config >> 17) & 0x3ff); + } else if (this_is_starfire != 0) { return starfire_hard_smp_processor_id(); } else { unsigned long upaconfig; diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h index f24ff8415..e62c4ab52 100644 --- a/include/asm-sparc64/spitfire.h +++ b/include/asm-sparc64/spitfire.h @@ -1,4 +1,4 @@ -/* $Id: spitfire.h,v 1.10 2000/10/06 13:10:29 anton Exp $ +/* $Id: spitfire.h,v 1.14 2001/03/22 07:26:04 davem Exp $ * spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. * * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) @@ -29,6 +29,23 @@ #ifndef __ASSEMBLY__ +enum ultra_tlb_layout { + spitfire = 0, + cheetah = 1 +}; + +extern enum ultra_tlb_layout tlb_type; + +#define SPARC64_USE_STICK (tlb_type == cheetah) + +#define SPITFIRE_HIGHEST_LOCKED_TLBENT (64 - 1) +#define CHEETAH_HIGHEST_LOCKED_TLBENT (16 - 1) + +#define sparc64_highest_locked_tlbent() \ + (tlb_type == spitfire ? \ + SPITFIRE_HIGHEST_LOCKED_TLBENT : \ + CHEETAH_HIGHEST_LOCKED_TLBENT) + extern __inline__ unsigned long spitfire_get_isfsr(void) { unsigned long ret; @@ -61,13 +78,17 @@ extern __inline__ unsigned long spitfire_get_sfar(void) extern __inline__ void spitfire_put_isfsr(unsigned long sfsr) { - __asm__ __volatile__("stxa %0, [%1] %2" : + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" + : /* no outputs */ : "r" (sfsr), "r" (TLB_SFSR), "i" (ASI_IMMU)); } extern __inline__ void spitfire_put_dsfsr(unsigned long sfsr) { - __asm__ __volatile__("stxa %0, [%1] %2" : + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" + : /* no outputs */ : "r" (sfsr), "r" (TLB_SFSR), "i" (ASI_DMMU)); } @@ -83,11 +104,12 @@ extern __inline__ unsigned long spitfire_get_primary_context(void) extern __inline__ void spitfire_set_primary_context(unsigned long ctx) { - __asm__ __volatile__("stxa %0, [%1] %2" + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" : /* No outputs */ : "r" (ctx & 0x3ff), "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU)); - membar("#Sync"); + __asm__ __volatile__ ("membar #Sync" : : : "memory"); } extern __inline__ unsigned long spitfire_get_secondary_context(void) @@ -102,11 +124,12 @@ extern __inline__ unsigned long spitfire_get_secondary_context(void) extern __inline__ void spitfire_set_secondary_context(unsigned long ctx) { - __asm__ __volatile__("stxa %0, [%1] %2" + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" : /* No outputs */ : "r" (ctx & 0x3ff), "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU)); - membar("#Sync"); + __asm__ __volatile__ ("membar #Sync" : : : "memory"); } /* The data cache is write through, so this just invalidates the @@ -114,10 +137,11 @@ extern __inline__ void spitfire_set_secondary_context(unsigned long ctx) */ extern __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) { - __asm__ __volatile__("stxa %0, [%1] %2" + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" : /* No outputs */ : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG)); - membar("#Sync"); + __asm__ __volatile__ ("membar #Sync" : : : "memory"); } /* The instruction cache lines are flushed with this, but note that @@ -128,7 +152,8 @@ extern __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long */ extern __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) { - __asm__ __volatile__("stxa %0, [%1] %2" + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" : /* No outputs */ : "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); } @@ -140,6 +165,10 @@ extern __inline__ unsigned long spitfire_get_dtlb_data(int entry) __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (data) : "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS)); + + /* Clear TTE diag bits. */ + data &= ~0x0003fe0000000000UL; + return data; } @@ -155,7 +184,8 @@ extern __inline__ unsigned long spitfire_get_dtlb_tag(int entry) extern __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data) { - __asm__ __volatile__("stxa %0, [%1] %2" + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" : /* No outputs */ : "r" (data), "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS)); @@ -168,6 +198,10 @@ extern __inline__ unsigned long spitfire_get_itlb_data(int entry) __asm__ __volatile__("ldxa [%1] %2, %0" : "=r" (data) : "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS)); + + /* Clear TTE diag bits. */ + data &= ~0x0003fe0000000000UL; + return data; } @@ -183,7 +217,8 @@ extern __inline__ unsigned long spitfire_get_itlb_tag(int entry) extern __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) { - __asm__ __volatile__("stxa %0, [%1] %2" + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" : /* No outputs */ : "r" (data), "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS)); @@ -194,42 +229,48 @@ extern __inline__ void spitfire_put_itlb_data(int entry, unsigned long data) /* Context level flushes. */ extern __inline__ void spitfire_flush_dtlb_primary_context(void) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (0x40), "i" (ASI_DMMU_DEMAP)); } extern __inline__ void spitfire_flush_itlb_primary_context(void) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (0x40), "i" (ASI_IMMU_DEMAP)); } extern __inline__ void spitfire_flush_dtlb_secondary_context(void) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (0x50), "i" (ASI_DMMU_DEMAP)); } extern __inline__ void spitfire_flush_itlb_secondary_context(void) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (0x50), "i" (ASI_IMMU_DEMAP)); } extern __inline__ void spitfire_flush_dtlb_nucleus_context(void) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (0x60), "i" (ASI_DMMU_DEMAP)); } extern __inline__ void spitfire_flush_itlb_nucleus_context(void) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (0x60), "i" (ASI_IMMU_DEMAP)); } @@ -237,46 +278,209 @@ extern __inline__ void spitfire_flush_itlb_nucleus_context(void) /* Page level flushes. */ extern __inline__ void spitfire_flush_dtlb_primary_page(unsigned long page) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (page), "i" (ASI_DMMU_DEMAP)); } extern __inline__ void spitfire_flush_itlb_primary_page(unsigned long page) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (page), "i" (ASI_IMMU_DEMAP)); } extern __inline__ void spitfire_flush_dtlb_secondary_page(unsigned long page) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (page | 0x10), "i" (ASI_DMMU_DEMAP)); } extern __inline__ void spitfire_flush_itlb_secondary_page(unsigned long page) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (page | 0x10), "i" (ASI_IMMU_DEMAP)); } extern __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); } extern __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page) { - __asm__ __volatile__("stxa %%g0, [%0] %1" + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" : /* No outputs */ : "r" (page | 0x20), "i" (ASI_IMMU_DEMAP)); } +/* Cheetah has "all non-locked" tlb flushes. */ +extern __inline__ void cheetah_flush_dtlb_all(void) +{ + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" + : /* No outputs */ + : "r" (0x80), "i" (ASI_DMMU_DEMAP)); +} + +extern __inline__ void cheetah_flush_itlb_all(void) +{ + __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" + "membar #Sync" + : /* No outputs */ + : "r" (0x80), "i" (ASI_IMMU_DEMAP)); +} + +/* Cheetah has a 4-tlb layout so direct access is a bit different. + * The first two TLBs are fully assosciative, hold 16 entries, and are + * used only for locked and >8K sized translations. One exists for + * data accesses and one for instruction accesses. + * + * The third TLB is for data accesses to 8K non-locked translations, is + * 2 way assosciative, and holds 512 entries. The fourth TLB is for + * instruction accesses to 8K non-locked translations, is 2 way + * assosciative, and holds 128 entries. + */ +extern __inline__ unsigned long cheetah_get_ldtlb_data(int entry) +{ + unsigned long data; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (data) + : "r" ((0 << 16) | (entry << 3)), + "i" (ASI_DTLB_DATA_ACCESS)); + + return data; +} + +extern __inline__ unsigned long cheetah_get_litlb_data(int entry) +{ + unsigned long data; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (data) + : "r" ((0 << 16) | (entry << 3)), + "i" (ASI_ITLB_DATA_ACCESS)); + + return data; +} + +extern __inline__ unsigned long cheetah_get_ldtlb_tag(int entry) +{ + unsigned long tag; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (tag) + : "r" ((0 << 16) | (entry << 3)), + "i" (ASI_DTLB_TAG_READ)); + + return tag; +} + +extern __inline__ unsigned long cheetah_get_litlb_tag(int entry) +{ + unsigned long tag; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (tag) + : "r" ((0 << 16) | (entry << 3)), + "i" (ASI_ITLB_TAG_READ)); + + return tag; +} + +extern __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data) +{ + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" + : /* No outputs */ + : "r" (data), + "r" ((0 << 16) | (entry << 3)), + "i" (ASI_DTLB_DATA_ACCESS)); +} + +extern __inline__ void cheetah_put_litlb_data(int entry, unsigned long data) +{ + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" + : /* No outputs */ + : "r" (data), + "r" ((0 << 16) | (entry << 3)), + "i" (ASI_ITLB_DATA_ACCESS)); +} + +extern __inline__ unsigned long cheetah_get_dtlb_data(int entry) +{ + unsigned long data; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (data) + : "r" ((2 << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS)); + + return data; +} + +extern __inline__ unsigned long cheetah_get_dtlb_tag(int entry) +{ + unsigned long tag; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (tag) + : "r" ((2 << 16) | (entry << 3)), "i" (ASI_DTLB_TAG_READ)); + return tag; +} + +extern __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data) +{ + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" + : /* No outputs */ + : "r" (data), + "r" ((2 << 16) | (entry << 3)), + "i" (ASI_DTLB_DATA_ACCESS)); +} + +extern __inline__ unsigned long cheetah_get_itlb_data(int entry) +{ + unsigned long data; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (data) + : "r" ((2 << 16) | (entry << 3)), + "i" (ASI_ITLB_DATA_ACCESS)); + + return data; +} + +extern __inline__ unsigned long cheetah_get_itlb_tag(int entry) +{ + unsigned long tag; + + __asm__ __volatile__("ldxa [%1] %2, %0" + : "=r" (tag) + : "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_TAG_READ)); + return tag; +} + +extern __inline__ void cheetah_put_itlb_data(int entry, unsigned long data) +{ + __asm__ __volatile__("stxa %0, [%1] %2\n\t" + "membar #Sync" + : /* No outputs */ + : "r" (data), "r" ((2 << 16) | (entry << 3)), + "i" (ASI_ITLB_DATA_ACCESS)); +} + #endif /* !(__ASSEMBLY__) */ #endif /* !(_SPARC64_SPITFIRE_H) */ diff --git a/include/linux/802_11.h b/include/linux/802_11.h index cff47601a..bd5196c24 100644 --- a/include/linux/802_11.h +++ b/include/linux/802_11.h @@ -188,4 +188,4 @@ struct ieee_802_11_frame_subtype_class { } -#endif
\ No newline at end of file +#endif diff --git a/include/linux/b1lli.h b/include/linux/b1lli.h index 72cae4d27..bfc15aa75 100644 --- a/include/linux/b1lli.h +++ b/include/linux/b1lli.h @@ -1,11 +1,14 @@ /* - * $Id: b1lli.h,v 1.8 1999/07/01 15:26:54 calle Exp $ + * $Id: b1lli.h,v 1.8.8.1 2001/03/15 09:58:30 kai Exp $ * * ISDN lowlevel-module for AVM B1-card. * * Copyright 1996 by Carsten Paeth (calle@calle.in-berlin.de) * * $Log: b1lli.h,v $ + * Revision 1.8.8.1 2001/03/15 09:58:30 kai + * spelling fix + * * Revision 1.8 1999/07/01 15:26:54 calle * complete new version (I love it): * + new hardware independed "capi_driver" interface that will make it easy to: @@ -129,7 +132,7 @@ typedef struct avmb1_extcarddef { #define AVMB1_LOAD_AND_CONFIG 3 /* load image and config to card */ #define AVMB1_ADDCARD_WITH_TYPE 4 /* add a new card, with cardtype */ #define AVMB1_GET_CARDINFO 5 /* get cardtype */ -#define AVMB1_REMOVECARD 6 /* remove a card (usefull for T1) */ +#define AVMB1_REMOVECARD 6 /* remove a card (useful for T1) */ #define AVMB1_REGISTERCARD_IS_OBSOLETE diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 01cd38a83..849e71f0f 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -180,7 +180,7 @@ extern int * max_segments[MAX_BLKDEV]; extern atomic_t queued_sectors; #define MAX_SEGMENTS 128 -#define MAX_SECTORS (MAX_SEGMENTS*8) +#define MAX_SECTORS 255 #define PageAlignSize(size) (((size) + PAGE_SIZE -1) & PAGE_MASK) diff --git a/include/linux/cdrom.h b/include/linux/cdrom.h index 7d59238dd..c18ddfd39 100644 --- a/include/linux/cdrom.h +++ b/include/linux/cdrom.h @@ -524,10 +524,12 @@ struct dvd_layer { __u32 end_sector_l0; }; +#define DVD_LAYERS 4 + struct dvd_physical { __u8 type; __u8 layer_num; - struct dvd_layer layer[4]; + struct dvd_layer layer[DVD_LAYERS]; }; struct dvd_copyright { diff --git a/include/linux/dcache.h b/include/linux/dcache.h index 74f377c06..e32a11742 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -217,7 +217,7 @@ extern void d_move(struct dentry *, struct dentry *); extern struct dentry * d_lookup(struct dentry *, struct qstr *); /* validate "insecure" dentry pointer */ -extern int d_validate(struct dentry *, struct dentry *, unsigned int, unsigned int); +extern int d_validate(struct dentry *, struct dentry *); extern char * __d_path(struct dentry *, struct vfsmount *, struct dentry *, struct vfsmount *, char *, int); diff --git a/include/linux/elf.h b/include/linux/elf.h index 34d8e93ae..b27c2d43c 100644 --- a/include/linux/elf.h +++ b/include/linux/elf.h @@ -299,7 +299,7 @@ typedef struct { #define HWCAP_SPARC_SWAP 4 #define HWCAP_SPARC_MULDIV 8 #define HWCAP_SPARC_V9 16 - +#define HWCAP_SPARC_ULTRA3 32 /* * 68k ELF relocation types diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h index 97c505282..6c72b8d59 100644 --- a/include/linux/etherdevice.h +++ b/include/linux/etherdevice.h @@ -38,13 +38,30 @@ extern int eth_header_cache(struct neighbour *neigh, struct hh_cache *hh); extern int eth_header_parse(struct sk_buff *skb, unsigned char *haddr); -extern struct net_device * init_etherdev(struct net_device *, int); +extern struct net_device *init_etherdev(struct net_device *dev, int sizeof_priv); +extern struct net_device *alloc_etherdev(int sizeof_priv); -static __inline__ void eth_copy_and_sum (struct sk_buff *dest, unsigned char *src, int len, int base) +static inline void eth_copy_and_sum (struct sk_buff *dest, unsigned char *src, int len, int base) { memcpy (dest->data, src, len); } +/** + * is_valid_ether_addr - Determine if the given Ethernet address is valid + * @addr: Pointer to a six-byte array containing the Ethernet address + * + * Check that the Ethernet address (MAC) is not 00:00:00:00:00:00, is not + * a multicast address, and is not FF:FF:FF:FF:FF:FF. + * + * Return true if the address is valid. + */ +static inline int is_valid_ether_addr( u8 *addr ) +{ + const char zaddr[6] = {0,}; + + return !(addr[0]&1) && memcmp( addr, zaddr, 6); +} + #endif #endif /* _LINUX_ETHERDEVICE_H */ diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 384171b3f..c1106729d 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -24,10 +24,22 @@ struct ethtool_cmd { u32 reserved[4]; }; +/* these strings are set to whatever the driver author decides... */ +struct ethtool_drvinfo { + u32 cmd; + char driver[32]; /* driver short name, "tulip", "eepro100" */ + char version[32]; /* driver version string */ + char fw_version[32]; /* firmware version string, if applicable */ + char bus_info[32]; /* Bus info for this interface. For PCI + * devices, use pci_dev->slot_name. */ + char reserved1[32]; + char reserved2[32]; +}; /* CMDs currently supported */ -#define ETHTOOL_GSET 0x00000001 /* Get settings, non-privileged. */ +#define ETHTOOL_GSET 0x00000001 /* Get settings. */ #define ETHTOOL_SSET 0x00000002 /* Set settings, privileged. */ +#define ETHTOOL_GDRVINFO 0x00000003 /* Get driver info. */ /* compatibility with older code */ #define SPARC_ETH_GSET ETHTOOL_GSET diff --git a/include/linux/fcdevice.h b/include/linux/fcdevice.h index c63d03bc1..25687bb17 100644 --- a/include/linux/fcdevice.h +++ b/include/linux/fcdevice.h @@ -33,7 +33,10 @@ extern int fc_header(struct sk_buff *skb, struct net_device *dev, extern int fc_rebuild_header(struct sk_buff *skb); //extern unsigned short fc_type_trans(struct sk_buff *skb, struct net_device *dev); -extern struct net_device * init_fcdev(struct net_device *, int); +extern struct net_device *init_fcdev(struct net_device *dev, int sizeof_priv); +extern struct net_device *alloc_fcdev(int sizeof_priv); +extern int register_fcdev(struct net_device *dev); +extern void unregister_fcdev(struct net_device *dev); #endif diff --git a/include/linux/fddidevice.h b/include/linux/fddidevice.h index 79f92ff17..83815ec9f 100644 --- a/include/linux/fddidevice.h +++ b/include/linux/fddidevice.h @@ -34,7 +34,8 @@ extern int fddi_header(struct sk_buff *skb, extern int fddi_rebuild_header(struct sk_buff *skb); extern unsigned short fddi_type_trans(struct sk_buff *skb, struct net_device *dev); -extern struct net_device * init_fddidev(struct net_device *, int); +extern struct net_device *init_fddidev(struct net_device *dev, int sizeof_priv); +extern struct net_device *alloc_fddidev(int sizeof_priv); #endif #endif /* _LINUX_FDDIDEVICE_H */ diff --git a/include/linux/fs.h b/include/linux/fs.h index a5f4cddaf..41c148392 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -244,7 +244,7 @@ struct buffer_head { struct buffer_head *b_reqnext; /* request queue */ struct buffer_head **b_pprev; /* doubly linked list of hash-queue */ - char * b_data; /* pointer to data block (512 byte) */ + char * b_data; /* pointer to data block */ struct page *b_page; /* the page this bh is mapped to */ void (*b_end_io)(struct buffer_head *bh, int uptodate); /* I/O completion */ void *b_private; /* reserved for b_end_io */ @@ -381,6 +381,7 @@ struct address_space { struct vm_area_struct *i_mmap; /* list of private mappings */ struct vm_area_struct *i_mmap_shared; /* list of shared mappings */ spinlock_t i_shared_lock; /* and spinlock protecting it */ + int gfp_mask; /* how to allocate the pages */ }; struct block_device { @@ -504,6 +505,8 @@ extern spinlock_t files_lock; extern int init_private_file(struct file *, struct dentry *, int); +#define MAX_NON_LFS ((1UL<<31) - 1) + #define FL_POSIX 1 #define FL_FLOCK 2 #define FL_BROKEN 4 /* broken flock() emulation */ @@ -651,6 +654,7 @@ struct super_block { unsigned char s_blocksize_bits; unsigned char s_lock; unsigned char s_dirt; + unsigned long long s_maxbytes; /* Max file size */ struct file_system_type *s_type; struct super_operations *s_op; struct dquot_operations *dq_op; diff --git a/include/linux/fs_struct.h b/include/linux/fs_struct.h index 3d2df3cf4..3d6451977 100644 --- a/include/linux/fs_struct.h +++ b/include/linux/fs_struct.h @@ -13,7 +13,7 @@ struct fs_struct { #define INIT_FS { \ ATOMIC_INIT(1), \ RW_LOCK_UNLOCKED, \ - 0022, \ + 0000, \ NULL, NULL, NULL, NULL, NULL, NULL \ } diff --git a/include/linux/genhd.h b/include/linux/genhd.h index 6cfe0bbb7..eaa63807a 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -223,6 +223,11 @@ struct unixware_disklabel { #endif /* CONFIG_UNIXWARE_DISKLABEL */ +#ifdef CONFIG_MINIX_SUBPARTITION +# define MINIX_PARTITION 0x81 /* Minix Partition ID */ +# define MINIX_NR_SUBPARTITIONS 4 +#endif /* CONFIG_MINIX_SUBPARTITION */ + #ifdef __KERNEL__ extern struct gendisk *gendisk_head; /* linked list of disks */ diff --git a/include/linux/hdlc.h b/include/linux/hdlc.h new file mode 100644 index 000000000..b9cc125a4 --- /dev/null +++ b/include/linux/hdlc.h @@ -0,0 +1,336 @@ +/* + * Generic HDLC support routines for Linux + * + * Copyright (C) 1999, 2000 Krzysztof Halasa <khc@pm.waw.pl> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __HDLC_H +#define __HDLC_H + +/* Ioctls - to be changed */ +#define HDLCGSLOTMAP (0x89F4) /* E1/T1 slot bitmap */ +#define HDLCGCLOCK (0x89F5) /* clock sources */ +#define HDLCGCLOCKRATE (0x89F6) /* clock rate */ +#define HDLCGMODE (0x89F7) /* internal to hdlc.c - protocol used */ +#define HDLCGLINE (0x89F8) /* physical interface */ +#define HDLCSSLOTMAP (0x89F9) +#define HDLCSCLOCK (0x89FA) +#define HDLCSCLOCKRATE (0x89FB) +#define HDLCSMODE (0x89FC) /* internal to hdlc.c - select protocol */ +#define HDLCPVC (0x89FD) /* internal to hdlc.c - create/delete PVC */ +#define HDLCSLINE (0x89FE) +#define HDLCRUN (0x89FF) /* Download firmware and run board */ + +/* Modes */ +#define MODE_NONE 0x00000000 /* Not initialized */ +#define MODE_DCE 0x00000080 /* DCE */ +#define MODE_HDLC 0x00000100 /* Raw HDLC frames */ +#define MODE_CISCO 0x00000200 +#define MODE_PPP 0x00000400 +#define MODE_FR 0x00000800 /* Any LMI */ +#define MODE_FR_ANSI 0x00000801 +#define MODE_FR_CCITT 0x00000802 +#define MODE_X25 0x00001000 +#define MODE_MASK 0x0000FF00 +#define MODE_SOFT 0x80000000 /* Driver modes, using hardware HDLC */ + +/* Lines */ +#define LINE_DEFAULT 0x00000000 +#define LINE_V35 0x00000001 +#define LINE_RS232 0x00000002 +#define LINE_X21 0x00000003 +#define LINE_T1 0x00000004 +#define LINE_E1 0x00000005 +#define LINE_MASK 0x000000FF +#define LINE_LOOPBACK 0x80000000 /* On-card loopback */ + +#define CLOCK_EXT 0 /* External TX and RX clock - DTE */ +#define CLOCK_INT 1 /* Internal TX and RX clock - DCE */ +#define CLOCK_TXINT 2 /* Internal TX and external RX clock */ +#define CLOCK_TXFROMRX 3 /* TX clock derived from external RX clock */ + + +#define HDLC_MAX_MTU 1500 /* Ethernet 1500 bytes */ +#define HDLC_MAX_MRU (HDLC_MAX_MTU + 10) /* max 10 bytes for FR */ + +#ifdef __KERNEL__ + +#include <linux/skbuff.h> +#include <linux/netdevice.h> +#include <net/syncppp.h> + +#define MAXLEN_LMISTAT 20 /* max size of status enquiry frame */ + +#define LINK_STATE_RELIABLE 0x01 +#define LINK_STATE_REQUEST 0x02 /* full stat sent (DCE) / req pending (DTE) */ +#define LINK_STATE_CHANGED 0x04 /* change in PVCs state, send full report */ +#define LINK_STATE_FULLREP_SENT 0x08 /* full report sent */ + +#define PVC_STATE_NEW 0x01 +#define PVC_STATE_ACTIVE 0x02 +#define PVC_STATE_FECN 0x08 /* FECN condition */ +#define PVC_STATE_BECN 0x10 /* BECN condition */ + + +#define FR_UI 0x03 +#define FR_PAD 0x00 + +#define NLPID_IP 0xCC +#define NLPID_IPV6 0x8E +#define NLPID_SNAP 0x80 +#define NLPID_PAD 0x00 +#define NLPID_Q933 0x08 + + +#define LMI_DLCI 0 /* LMI DLCI */ +#define LMI_PROTO 0x08 +#define LMI_CALLREF 0x00 /* Call Reference */ +#define LMI_ANSI_LOCKSHIFT 0x95 /* ANSI lockshift */ +#define LMI_REPTYPE 1 /* report type */ +#define LMI_CCITT_REPTYPE 0x51 +#define LMI_ALIVE 3 /* keep alive */ +#define LMI_CCITT_ALIVE 0x53 +#define LMI_PVCSTAT 7 /* pvc status */ +#define LMI_CCITT_PVCSTAT 0x57 +#define LMI_FULLREP 0 /* full report */ +#define LMI_INTEGRITY 1 /* link integrity report */ +#define LMI_SINGLE 2 /* single pvc report */ +#define LMI_STATUS_ENQUIRY 0x75 +#define LMI_STATUS 0x7D /* reply */ + +#define LMI_REPT_LEN 1 /* report type element length */ +#define LMI_INTEG_LEN 2 /* link integrity element length */ + +#define LMI_LENGTH 13 /* standard LMI frame length */ +#define LMI_ANSI_LENGTH 14 + + + +typedef struct { + unsigned ea1 : 1; + unsigned cr : 1; + unsigned dlcih: 6; + + unsigned ea2 : 1; + unsigned de : 1; + unsigned becn : 1; + unsigned fecn : 1; + unsigned dlcil: 4; +}__attribute__ ((packed)) fr_hdr; + + + +typedef struct { /* Used in Cisco and PPP mode */ + u8 address; + u8 control; + u16 protocol; +}__attribute__ ((packed)) hdlc_header; + + + +typedef struct { + u32 type; /* code */ + u32 par1; + u32 par2; + u16 rel; /* reliability */ + u32 time; +}__attribute__ ((packed)) cisco_packet; +#define CISCO_PACKET_LEN 18 +#define CISCO_BIG_PACKET_LEN 20 + + + +typedef struct pvc_device_struct { + struct net_device netdev; /* PVC net device - must be first */ + struct net_device_stats stats; + struct hdlc_device_struct *master; + struct pvc_device_struct *next; + + u8 state; + u8 newstate; +}pvc_device; + + + +typedef struct { + u32 last_errors; /* last errors bit list */ + int last_poll; /* ! */ + u8 T391; /* ! link integrity verification polling timer */ + u8 T392; /* ! polling verification timer */ + u8 N391; /* full status polling counter */ + u8 N392; /* error threshold */ + u8 N393; /* monitored events count */ + u8 N391cnt; + + u8 state; /* ! */ + u32 txseq; /* ! TX sequence number - Cisco uses 4 bytes */ + u32 rxseq; /* ! RX sequence number */ +}fr_lmi; /* ! means used in Cisco HDLC as well */ + + +typedef struct hdlc_device_struct { + /* to be initialized by hardware driver: */ + struct net_device netdev; /* master net device - must be first */ + struct net_device_stats stats; + + struct ppp_device pppdev; + struct ppp_device *syncppp_ptr; + + /* set_mode may be NULL if HDLC-only board */ + int (*set_mode)(struct hdlc_device_struct *hdlc, int mode); + int (*open)(struct hdlc_device_struct *hdlc); + void (*close)(struct hdlc_device_struct *hdlc); + int (*xmit)(struct hdlc_device_struct *hdlc, struct sk_buff *skb); + int (*ioctl)(struct hdlc_device_struct *hdlc, struct ifreq *ifr, + int cmd); + + /* Only in "hardware" FR modes etc. - may be NULL */ + int (*create_pvc)(pvc_device *pvc); + void (*destroy_pvc)(pvc_device *pvc); + int (*open_pvc)(pvc_device *pvc); + void (*close_pvc)(pvc_device *pvc); + + /* for hdlc.c internal use only */ + pvc_device *first_pvc; + u16 pvc_count; + int mode; + + struct timer_list timer; + fr_lmi lmi; +}hdlc_device; + + +int register_hdlc_device(hdlc_device *hdlc); +void unregister_hdlc_device(hdlc_device *hdlc); +void hdlc_netif_rx(hdlc_device *hdlc, struct sk_buff *skb); + + +extern __inline__ struct net_device* hdlc_to_dev(hdlc_device *hdlc) +{ + return &hdlc->netdev; +} + + +extern __inline__ hdlc_device* dev_to_hdlc(struct net_device *dev) +{ + return (hdlc_device*)dev; +} + + +extern __inline__ struct net_device* pvc_to_dev(pvc_device *pvc) +{ + return &pvc->netdev; +} + + +extern __inline__ pvc_device* dev_to_pvc(struct net_device *dev) +{ + return (pvc_device*)dev; +} + + +extern __inline__ const char *hdlc_to_name(hdlc_device *hdlc) +{ + return hdlc_to_dev(hdlc)->name; +} + + +extern __inline__ const char *pvc_to_name(pvc_device *pvc) +{ + return pvc_to_dev(pvc)->name; +} + + +extern __inline__ u16 status_to_dlci(hdlc_device *hdlc, u8 *status, u8 *state) +{ + *state &= ~(PVC_STATE_ACTIVE | PVC_STATE_NEW); + if (status[2] & 0x08) + *state |= PVC_STATE_NEW; + else if (status[2] & 0x02) + *state |= PVC_STATE_ACTIVE; + + return ((status[0] & 0x3F)<<4) | ((status[1] & 0x78)>>3); +} + + +extern __inline__ void dlci_to_status(hdlc_device *hdlc, u16 dlci, u8 *status, + u8 state) +{ + status[0] = (dlci>>4) & 0x3F; + status[1] = ((dlci<<3) & 0x78) | 0x80; + status[2] = 0x80; + + if (state & PVC_STATE_NEW) + status[2] |= 0x08; + else if (state & PVC_STATE_ACTIVE) + status[2] |= 0x02; +} + + + +extern __inline__ u16 netdev_dlci(struct net_device *dev) +{ + return ntohs(*(u16*)dev->dev_addr); +} + + + +extern __inline__ u16 q922_to_dlci(u8 *hdr) +{ + return ((hdr[0] & 0xFC)<<2) | ((hdr[1] & 0xF0)>>4); +} + + + +extern __inline__ void dlci_to_q922(u8 *hdr, u16 dlci) +{ + hdr[0] = (dlci>>2) & 0xFC; + hdr[1] = ((dlci<<4) & 0xF0) | 0x01; +} + + + +extern __inline__ int mode_is(hdlc_device *hdlc, int mask) +{ + return (hdlc->mode & mask) == mask; +} + + + +extern __inline__ pvc_device* find_pvc(hdlc_device *hdlc, u16 dlci) +{ + pvc_device *pvc=hdlc->first_pvc; + + while (pvc) { + if (netdev_dlci(&pvc->netdev) == dlci) + return pvc; + pvc=pvc->next; + } + + return NULL; +} + + + +extern __inline__ void debug_frame(const struct sk_buff *skb) +{ + int i; + + for (i=0; i<skb->len; i++) { + if (i == 100) { + printk("...\n"); + return; + } + printk(" %02X", skb->data[i]); + } + printk("\n"); +} + + +#endif /* __KERNEL */ +#endif /* __HDLC_H */ diff --git a/include/linux/hippidevice.h b/include/linux/hippidevice.h index 7e57075f8..70524a3a9 100644 --- a/include/linux/hippidevice.h +++ b/include/linux/hippidevice.h @@ -51,7 +51,9 @@ extern int hippi_header_parse(struct sk_buff *skb, unsigned char *haddr); extern void hippi_net_init(void); void hippi_setup(struct net_device *dev); -extern struct net_device *init_hippi_dev(struct net_device *, int); +extern struct net_device *init_hippi_dev(struct net_device *dev, int sizeof_priv); +extern struct net_device *alloc_hippi_dev(int sizeof_priv); +extern int register_hipdev(struct net_device *dev); extern void unregister_hipdev(struct net_device *dev); #endif diff --git a/include/linux/hysdn_if.h b/include/linux/hysdn_if.h index 68cc72078..6c4bb8701 100644 --- a/include/linux/hysdn_if.h +++ b/include/linux/hysdn_if.h @@ -1,4 +1,4 @@ -/* $Id: hysdn_if.h,v 1.1 2000/02/10 19:47:50 werner Exp $ +/* $Id: hysdn_if.h,v 1.1.8.1 2001/03/13 16:17:10 kai Exp $ * Linux driver for HYSDN cards, ioctl definitions shared by hynetmgr and driver. * written by Werner Cornelius (werner@titro.de) for Hypercope GmbH @@ -20,6 +20,9 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * * $Log: hysdn_if.h,v $ + * Revision 1.1.8.1 2001/03/13 16:17:10 kai + * spelling fixes from 2.4.3-pre + * * Revision 1.1 2000/02/10 19:47:50 werner * * Initial release @@ -30,7 +33,7 @@ /****************/ /* error values */ /****************/ -#define ERR_NONE 0 /* no error occured */ +#define ERR_NONE 0 /* no error occurred */ #define ERR_ALREADY_BOOT 1000 /* we are already booting */ #define EPOF_BAD_MAGIC 1001 /* bad magic in POF header */ #define ERR_BOARD_DPRAM 1002 /* board DPRAM failed */ diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 4a9eb86c8..546c573a4 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -454,7 +454,7 @@ union i2c_smbus_data { * corresponding header files. */ /* -> bit-adapter specific ioctls */ -#define I2C_RETRIES 0x0701 /* number times a device adress should */ +#define I2C_RETRIES 0x0701 /* number times a device address should */ /* be polled when not acknowledging */ #define I2C_TIMEOUT 0x0702 /* set timeout - call with int */ @@ -471,7 +471,7 @@ union i2c_smbus_data { #define I2C_FUNCS 0x0705 /* Get the adapter functionality */ #define I2C_RDWR 0x0707 /* Combined R/W transfer (one stop only)*/ #if 0 -#define I2C_ACK_TEST 0x0710 /* See if a slave is at a specific adress */ +#define I2C_ACK_TEST 0x0710 /* See if a slave is at a specific address */ #endif #define I2C_SMBUS 0x0720 /* SMBus-level access */ diff --git a/include/linux/if_arp.h b/include/linux/if_arp.h index a1f424cff..396dbb550 100644 --- a/include/linux/if_arp.h +++ b/include/linux/if_arp.h @@ -50,9 +50,11 @@ #define ARPHRD_X25 271 /* CCITT X.25 */ #define ARPHRD_HWX25 272 /* Boards with X.25 in firmware */ #define ARPHRD_PPP 512 -#define ARPHRD_HDLC 513 /* (Cisco) HDLC */ +#define ARPHRD_CISCO 513 /* Cisco HDLC */ +#define ARPHRD_HDLC ARPHRD_CISCO #define ARPHRD_LAPB 516 /* LAPB */ #define ARPHRD_DDCMP 517 /* Digital's DDCMP protocol */ +#define ARPHRD_RAWHDLC 518 /* Raw HDLC */ #define ARPHRD_TUNNEL 768 /* IPIP tunnel */ #define ARPHRD_TUNNEL6 769 /* IPIP6 tunnel */ diff --git a/include/linux/if_bonding.h b/include/linux/if_bonding.h index d077aeb57..791127363 100644 --- a/include/linux/if_bonding.h +++ b/include/linux/if_bonding.h @@ -9,7 +9,7 @@ * (c) Copyright 1999, Thomas Davis, tadavis@lbl.gov * * This software may be used and distributed according to the terms - * of the GNU Public License, incorporated herein by reference. + * of the GNU General Public License, incorporated herein by reference. * */ diff --git a/include/linux/if_eql.h b/include/linux/if_eql.h index 8cc5867e2..112a3df19 100644 --- a/include/linux/if_eql.h +++ b/include/linux/if_eql.h @@ -6,7 +6,7 @@ * * * This software may be used and distributed according to the terms - * of the GNU Public License, incorporated herein by reference. + * of the GNU General Public License, incorporated herein by reference. * * The author may be reached as simon@ncm.com, or C/O * NCM diff --git a/include/linux/if_frad.h b/include/linux/if_frad.h index 3765c740f..e691fdccc 100644 --- a/include/linux/if_frad.h +++ b/include/linux/if_frad.h @@ -192,9 +192,9 @@ struct frad_local int register_frad(const char *name); int unregister_frad(const char *name); -int (*dlci_ioctl_hook)(unsigned int, void *); +extern int (*dlci_ioctl_hook)(unsigned int, void *); -#endif __KERNEL__ +#endif /* __KERNEL__ */ #endif /* CONFIG_DLCI || CONFIG_DLCI_MODULE */ diff --git a/include/linux/init.h b/include/linux/init.h index 8ffe2aeef..a94d2376c 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -86,7 +86,27 @@ extern struct kernel_param __setup_start, __setup_end; #define __FINIT .previous #define __INITDATA .section ".data.init","aw" +/** + * module_init() - driver initialization entry point + * @x: function to be run at kernel boot time or module insertion + * + * module_init() will add the driver initialization routine in + * the "__initcall.int" code segment if the driver is checked as + * "y" or static, or else it will wrap the driver initialization + * routine with init_module() which is used by insmod and + * modprobe when the driver is used as a module. + */ #define module_init(x) __initcall(x); + +/** + * module_exit() - driver exit entry point + * @x: function to be run when driver is removed + * + * module_exit() will wrap the driver clean-up code + * with cleanup_module() when used with rmmod when + * the driver is a module. If the driver is statically + * compiled into the kernel, module_exit() has no effect. + */ #define module_exit(x) __exitcall(x); #else diff --git a/include/linux/isdn_ppp.h b/include/linux/isdn_ppp.h index 732daa453..2564aa1ff 100644 --- a/include/linux/isdn_ppp.h +++ b/include/linux/isdn_ppp.h @@ -76,7 +76,7 @@ struct isdn_ppp_comp_data { * * We use this same struct for the reset entry of the compressor to commu- * nicate to its caller how to deal with sending of a Reset Ack. In this - * case, expra is not used, but other options still apply (supressing + * case, expra is not used, but other options still apply (suppressing * sending with rsend, appending arbitrary data, etc). */ diff --git a/include/linux/loop.h b/include/linux/loop.h index d276911c0..983cb6a3d 100644 --- a/include/linux/loop.h +++ b/include/linux/loop.h @@ -9,17 +9,23 @@ * Written by Theodore Ts'o, 3/29/93. * * Copyright 1993 by Theodore Ts'o. Redistribution of this file is - * permitted under the GNU Public License. + * permitted under the GNU General Public License. */ #define LO_NAME_SIZE 64 #define LO_KEY_SIZE 32 #ifdef __KERNEL__ - + +/* Possible states of device */ +enum { + Lo_unbound, + Lo_bound, + Lo_rundown, +}; + struct loop_device { int lo_number; - struct dentry *lo_dentry; int lo_refcnt; kdev_t lo_device; int lo_offset; @@ -39,19 +45,38 @@ struct loop_device { struct file * lo_backing_file; void *key_data; char key_reserved[48]; /* for use by the filter modules */ + + int old_gfp_mask; + + spinlock_t lo_lock; + struct buffer_head *lo_bh; + struct buffer_head *lo_bhtail; + int lo_state; + struct semaphore lo_sem; + struct semaphore lo_ctl_mutex; + struct semaphore lo_bh_mutex; + atomic_t lo_pending; }; typedef int (* transfer_proc_t)(struct loop_device *, int cmd, char *raw_buf, char *loop_buf, int size, int real_block); +extern inline int lo_do_transfer(struct loop_device *lo, int cmd, char *rbuf, + char *lbuf, int size, int rblock) +{ + if (!lo->transfer) + return 0; + + return lo->transfer(lo, cmd, rbuf, lbuf, size, rblock); +} #endif /* __KERNEL__ */ /* * Loop flags */ -#define LO_FLAGS_DO_BMAP 0x00000001 -#define LO_FLAGS_READ_ONLY 0x00000002 +#define LO_FLAGS_DO_BMAP 1 +#define LO_FLAGS_READ_ONLY 2 /* * Note that this structure gets the wrong offsets when directly used @@ -102,9 +127,8 @@ struct loop_info { /* Support for loadable transfer modules */ struct loop_func_table { int number; /* filter type */ - int (*transfer)(struct loop_device *lo, int cmd, - char *raw_buf, char *loop_buf, int size, - int real_block); + int (*transfer)(struct loop_device *lo, int cmd, char *raw_buf, + char *loop_buf, int size, int real_block); int (*init)(struct loop_device *, struct loop_info *); /* release is called from loop_unregister_transfer or clr_fd */ int (*release)(struct loop_device *); diff --git a/include/linux/mm.h b/include/linux/mm.h index f6c7cc6e2..86bc813ad 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -395,12 +395,26 @@ extern int remap_page_range(unsigned long from, unsigned long to, unsigned long extern int zeromap_page_range(unsigned long from, unsigned long size, pgprot_t prot); extern void vmtruncate(struct inode * inode, loff_t offset); +extern pmd_t *FASTCALL(__pmd_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address)); +extern pte_t *FASTCALL(pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address)); extern int handle_mm_fault(struct mm_struct *mm,struct vm_area_struct *vma, unsigned long address, int write_access); extern int make_pages_present(unsigned long addr, unsigned long end); extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write); extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char *dst, int len); extern int ptrace_writedata(struct task_struct *tsk, char * src, unsigned long dst, int len); +/* + * On a two-level page table, this ends up being trivial. Thus the + * inlining and the symmetry break with pte_alloc() that does all + * of this out-of-line. + */ +static inline pmd_t *pmd_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address) +{ + if (!pgd_present(*pgd)) + return __pmd_alloc(mm, pgd, address); + return pmd_offset(pgd, address); +} + extern int pgt_cache_water[2]; extern int check_pgt_cache(void); @@ -481,11 +495,6 @@ extern struct page *filemap_nopage(struct vm_area_struct *, unsigned long, int); #define GFP_DMA __GFP_DMA -/* Flag - indicates that the buffer can be taken from high memory which is not - permanently mapped by the kernel */ - -#define GFP_HIGHMEM __GFP_HIGHMEM - /* vma is the first one with address < vma->vm_end, * and even address < vma->vm_start. Have to extend vma. */ static inline int expand_stack(struct vm_area_struct * vma, unsigned long address) @@ -497,11 +506,13 @@ static inline int expand_stack(struct vm_area_struct * vma, unsigned long addres if (vma->vm_end - address > current->rlim[RLIMIT_STACK].rlim_cur || ((vma->vm_mm->total_vm + grow) << PAGE_SHIFT) > current->rlim[RLIMIT_AS].rlim_cur) return -ENOMEM; + spin_lock(&vma->vm_mm->page_table_lock); vma->vm_start = address; vma->vm_pgoff -= grow; vma->vm_mm->total_vm += grow; if (vma->vm_flags & VM_LOCKED) vma->vm_mm->locked_vm += grow; + spin_unlock(&vma->vm_mm->page_table_lock); return 0; } diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index c14decdfc..7e4e9f98e 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -21,6 +21,14 @@ typedef struct free_area_struct { struct pglist_data; +/* + * On machines where it is needed (eg PCs) we divide physical memory + * into multiple physical zones. On a PC we have 3 zones: + * + * ZONE_DMA < 16 MB ISA DMA capable memory + * ZONE_NORMAL 16-896 MB direct mapped by the kernel + * ZONE_HIGHMEM > 896 MB only page cache and user processes + */ typedef struct zone_struct { /* * Commonly accessed fields: @@ -75,6 +83,17 @@ typedef struct zonelist_struct { #define NR_GFPINDEX 0x100 +/* + * The pg_data_t structure is used in machines with CONFIG_DISCONTIGMEM + * (mostly NUMA machines?) to denote a higher-level memory zone than the + * zone_struct denotes. + * + * On NUMA machines, each NUMA node would have a pg_data_t to describe + * it's memory layout. + * + * XXX: we need to move the global memory statistics (active_list, ...) + * into the pg_data_t to properly support NUMA. + */ struct bootmem_data; typedef struct pglist_data { zone_t node_zones[MAX_NR_ZONES]; diff --git a/include/linux/n_r3964.h b/include/linux/n_r3964.h index 419774655..0b015c238 100644 --- a/include/linux/n_r3964.h +++ b/include/linux/n_r3964.h @@ -7,7 +7,7 @@ * http://www.pap-philips.de * ----------------------------------------------------------- * This software may be used and distributed according to the terms of - * the GNU Public License, incorporated herein by reference. + * the GNU General Public License, incorporated herein by reference. * * Author: * L. Haag diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 462091674..011caf23d 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -41,6 +41,9 @@ struct divert_blk; +#define HAVE_ALLOC_NETDEV /* feature macro: alloc_xxxdev + functions are available. */ + #define NET_XMIT_SUCCESS 0 #define NET_XMIT_DROP 1 /* skb dropped */ #define NET_XMIT_CN 2 /* congestion notification */ @@ -630,14 +633,9 @@ extern void fddi_setup(struct net_device *dev); extern void tr_setup(struct net_device *dev); extern void fc_setup(struct net_device *dev); extern void fc_freedev(struct net_device *dev); -extern int ether_config(struct net_device *dev, struct ifmap *map); /* Support for loadable net-drivers */ extern int register_netdev(struct net_device *dev); extern void unregister_netdev(struct net_device *dev); -extern int register_trdev(struct net_device *dev); -extern void unregister_trdev(struct net_device *dev); -extern int register_fcdev(struct net_device *dev); -extern void unregister_fcdev(struct net_device *dev); /* Functions used for multicast support */ extern void dev_mc_upload(struct net_device *dev); extern int dev_mc_delete(struct net_device *dev, void *addr, int alen, int all); diff --git a/include/linux/netfilter_ipv4/ipt_TCPMSS.h b/include/linux/netfilter_ipv4/ipt_TCPMSS.h new file mode 100644 index 000000000..aadb39580 --- /dev/null +++ b/include/linux/netfilter_ipv4/ipt_TCPMSS.h @@ -0,0 +1,10 @@ +#ifndef _IPT_TCPMSS_H +#define _IPT_TCPMSS_H + +struct ipt_tcpmss_info { + u_int16_t mss; +}; + +#define IPT_TCPMSS_CLAMP_PMTU 0xffff + +#endif /*_IPT_TCPMSS_H*/ diff --git a/include/linux/netfilter_ipv4/ipt_tcpmss.h b/include/linux/netfilter_ipv4/ipt_tcpmss.h new file mode 100644 index 000000000..e2b14397f --- /dev/null +++ b/include/linux/netfilter_ipv4/ipt_tcpmss.h @@ -0,0 +1,9 @@ +#ifndef _IPT_TCPMSS_MATCH_H +#define _IPT_TCPMSS_MATCH_H + +struct ipt_tcpmss_match_info { + u_int16_t mss_min, mss_max; + u_int8_t invert; +}; + +#endif /*_IPT_TCPMSS_MATCH_H*/ diff --git a/include/linux/openpic.h b/include/linux/openpic.h deleted file mode 100644 index b4a9ecab1..000000000 --- a/include/linux/openpic.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - * linux/openpic.h -- OpenPIC definitions - * - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is based on the following documentation: - * - * The Open Programmable Interrupt Controller (PIC) - * Register Interface Specification Revision 1.2 - * - * Issue Date: October 1995 - * - * Issued jointly by Advanced Micro Devices and Cyrix Corporation - * - * AMD is a registered trademark of Advanced Micro Devices, Inc. - * Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc. - * All Rights Reserved. - * - * To receive a copy of this documentation, send an email to openpic@amd.com. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#ifndef _LINUX_OPENPIC_H -#define _LINUX_OPENPIC_H - -#if !defined(__powerpc__) && !defined(__i386__) -#error Unsupported OpenPIC platform -#endif - - -#ifdef __KERNEL__ - - /* - * OpenPIC supports up to 2048 interrupt sources and up to 32 processors - */ - -#define OPENPIC_MAX_SOURCES 2048 -#define OPENPIC_MAX_PROCESSORS 32 - -#define OPENPIC_NUM_TIMERS 4 -#define OPENPIC_NUM_IPI 4 -#define OPENPIC_NUM_PRI 16 -#define OPENPIC_NUM_VECTORS 256 - - - /* - * Vector numbers - */ - -#define OPENPIC_VEC_SOURCE 16 /* and up */ -#define OPENPIC_VEC_TIMER 64 /* and up */ -#define OPENPIC_VEC_IPI 72 /* and up */ -#define OPENPIC_VEC_SPURIOUS 127 - - - /* - * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries - */ - -typedef struct _OpenPIC_Reg { - u_int Reg; /* Little endian! */ - char Pad[0xc]; -} OpenPIC_Reg; - - - /* - * Per Processor Registers - */ - -typedef struct _OpenPIC_Processor { - /* - * Private Shadow Registers (for SLiC backwards compatibility) - */ - u_int IPI0_Dispatch_Shadow; /* Write Only */ - char Pad1[0x4]; - u_int IPI0_Vector_Priority_Shadow; /* Read/Write */ - char Pad2[0x34]; - /* - * Interprocessor Interrupt Command Ports - */ - OpenPIC_Reg _IPI_Dispatch[OPENPIC_NUM_IPI]; /* Write Only */ - /* - * Current Task Priority Register - */ - OpenPIC_Reg _Current_Task_Priority; /* Read/Write */ -#ifndef __powerpc__ - /* - * Who Am I Register - */ - OpenPIC_Reg _Who_Am_I; /* Read Only */ -#else - char Pad3[0x10]; -#endif -#ifndef __i386__ - /* - * Interrupt Acknowledge Register - */ - OpenPIC_Reg _Interrupt_Acknowledge; /* Read Only */ -#else - char Pad4[0x10]; -#endif - /* - * End of Interrupt (EOI) Register - */ - OpenPIC_Reg _EOI; /* Read/Write */ - char Pad5[0xf40]; -} OpenPIC_Processor; - - - /* - * Timer Registers - */ - -typedef struct _OpenPIC_Timer { - OpenPIC_Reg _Current_Count; /* Read Only */ - OpenPIC_Reg _Base_Count; /* Read/Write */ - OpenPIC_Reg _Vector_Priority; /* Read/Write */ - OpenPIC_Reg _Destination; /* Read/Write */ -} OpenPIC_Timer; - - - /* - * Global Registers - */ - -typedef struct _OpenPIC_Global { - /* - * Feature Reporting Registers - */ - OpenPIC_Reg _Feature_Reporting0; /* Read Only */ - OpenPIC_Reg _Feature_Reporting1; /* Future Expansion */ - /* - * Global Configuration Registers - */ - OpenPIC_Reg _Global_Configuration0; /* Read/Write */ - OpenPIC_Reg _Global_Configuration1; /* Future Expansion */ - /* - * Vendor Specific Registers - */ - OpenPIC_Reg _Vendor_Specific[4]; - /* - * Vendor Identification Register - */ - OpenPIC_Reg _Vendor_Identification; /* Read Only */ - /* - * Processor Initialization Register - */ - OpenPIC_Reg _Processor_Initialization; /* Read/Write */ - /* - * IPI Vector/Priority Registers - */ - OpenPIC_Reg _IPI_Vector_Priority[OPENPIC_NUM_IPI]; /* Read/Write */ - /* - * Spurious Vector Register - */ - OpenPIC_Reg _Spurious_Vector; /* Read/Write */ - /* - * Global Timer Registers - */ - OpenPIC_Reg _Timer_Frequency; /* Read/Write */ - OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS]; - char Pad1[0xee00]; -} OpenPIC_Global; - - - /* - * Interrupt Source Registers - */ - -typedef struct _OpenPIC_Source { - OpenPIC_Reg _Vector_Priority; /* Read/Write */ - OpenPIC_Reg _Destination; /* Read/Write */ -} OpenPIC_Source; - - - /* - * OpenPIC Register Map - */ - -struct OpenPIC { -#ifndef __powerpc__ - /* - * Per Processor Registers --- Private Access - */ - OpenPIC_Processor Private; -#else - char Pad1[0x1000]; -#endif - /* - * Global Registers - */ - OpenPIC_Global Global; - /* - * Interrupt Source Configuration Registers - */ - OpenPIC_Source Source[OPENPIC_MAX_SOURCES]; - /* - * Per Processor Registers - */ - OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS]; -}; - -extern volatile struct OpenPIC *OpenPIC; -extern u_int OpenPIC_NumInitSenses; -extern u_char *OpenPIC_InitSenses; - - - /* - * Current Task Priority Register - */ - -#define OPENPIC_CURRENT_TASK_PRIORITY_MASK 0x0000000f - - /* - * Who Am I Register - */ - -#define OPENPIC_WHO_AM_I_ID_MASK 0x0000001f - - /* - * Feature Reporting Register 0 - */ - -#define OPENPIC_FEATURE_LAST_SOURCE_MASK 0x07ff0000 -#define OPENPIC_FEATURE_LAST_SOURCE_SHIFT 16 -#define OPENPIC_FEATURE_LAST_PROCESSOR_MASK 0x00001f00 -#define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT 8 -#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff - - /* - * Global Configuration Register 0 - */ - -#define OPENPIC_CONFIG_RESET 0x80000000 -#define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE 0x20000000 -#define OPENPIC_CONFIG_BASE_MASK 0x000fffff - - /* - * Vendor Identification Register - */ - -#define OPENPIC_VENDOR_ID_STEPPING_MASK 0x00ff0000 -#define OPENPIC_VENDOR_ID_STEPPING_SHIFT 16 -#define OPENPIC_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00 -#define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT 8 -#define OPENPIC_VENDOR_ID_VENDOR_ID_MASK 0x000000ff - - /* - * Vector/Priority Registers - */ - -#define OPENPIC_MASK 0x80000000 -#define OPENPIC_ACTIVITY 0x40000000 /* Read Only */ -#define OPENPIC_PRIORITY_MASK 0x000f0000 -#define OPENPIC_PRIORITY_SHIFT 16 -#define OPENPIC_VECTOR_MASK 0x000000ff - - - /* - * Interrupt Source Registers - */ - -#define OPENPIC_POLARITY_POSITIVE 0x00800000 -#define OPENPIC_POLARITY_NEGATIVE 0x00000000 -#define OPENPIC_POLARITY_MASK 0x00800000 -#define OPENPIC_SENSE_LEVEL 0x00400000 -#define OPENPIC_SENSE_EDGE 0x00000000 -#define OPENPIC_SENSE_MASK 0x00400000 - - - /* - * Timer Registers - */ - -#define OPENPIC_COUNT_MASK 0x7fffffff -#define OPENPIC_TIMER_TOGGLE 0x80000000 -#define OPENPIC_TIMER_COUNT_INHIBIT 0x80000000 - - - /* - * Aliases to make life simpler - */ - -/* Per Processor Registers */ -#define IPI_Dispatch(i) _IPI_Dispatch[i].Reg -#define Current_Task_Priority _Current_Task_Priority.Reg -#ifndef __powerpc__ -#define Who_Am_I _Who_Am_I.Reg -#endif -#ifndef __i386__ -#define Interrupt_Acknowledge _Interrupt_Acknowledge.Reg -#endif -#define EOI _EOI.Reg - -/* Global Registers */ -#define Feature_Reporting0 _Feature_Reporting0.Reg -#define Feature_Reporting1 _Feature_Reporting1.Reg -#define Global_Configuration0 _Global_Configuration0.Reg -#define Global_Configuration1 _Global_Configuration1.Reg -#define Vendor_Specific(i) _Vendor_Specific[i].Reg -#define Vendor_Identification _Vendor_Identification.Reg -#define Processor_Initialization _Processor_Initialization.Reg -#define IPI_Vector_Priority(i) _IPI_Vector_Priority[i].Reg -#define Spurious_Vector _Spurious_Vector.Reg -#define Timer_Frequency _Timer_Frequency.Reg - -/* Timer Registers */ -#define Current_Count _Current_Count.Reg -#define Base_Count _Base_Count.Reg -#define Vector_Priority _Vector_Priority.Reg -#define Destination _Destination.Reg - -/* Interrupt Source Registers */ -#define Vector_Priority _Vector_Priority.Reg -#define Destination _Destination.Reg - - /* - * OpenPIC Operations - */ - -/* Global Operations */ -extern void openpic_init(int); -extern void openpic_reset(void); -extern void openpic_enable_8259_pass_through(void); -extern void openpic_disable_8259_pass_through(void); -#ifndef __i386__ -extern u_int openpic_irq(u_int cpu); -#endif -#ifndef __powerpc__ -extern void openpic_eoi(void); -extern u_int openpic_get_priority(void); -extern void openpic_set_priority(u_int pri); -#else -extern void openpic_eoi(u_int cpu); -extern u_int openpic_get_priority(u_int cpu); -extern void openpic_set_priority(u_int cpu, u_int pri); -#endif -extern u_int openpic_get_spurious(void); -extern void openpic_set_spurious(u_int vector); -extern void openpic_init_processor(u_int cpumask); - -/* Interprocessor Interrupts */ -extern void openpic_initipi(u_int ipi, u_int pri, u_int vector); -#ifndef __powerpc__ -extern void openpic_cause_IPI(u_int ipi, u_int cpumask); -#else -extern void openpic_cause_IPI(u_int cpu, u_int ipi, u_int cpumask); -#endif - -/* Timer Interrupts */ -extern void openpic_inittimer(u_int timer, u_int pri, u_int vector); -extern void openpic_maptimer(u_int timer, u_int cpumask); - -/* Interrupt Sources */ -extern void openpic_enable_irq(u_int irq); -extern void openpic_disable_irq(u_int irq); -extern void openpic_initirq(u_int irq, u_int pri, u_int vector, int polarity, - int is_level); -extern void openpic_mapirq(u_int irq, u_int cpumask); -extern void openpic_set_sense(u_int irq, int sense); - -#endif /* __KERNEL__ */ - -#endif /* _LINUX_OPENPIC_H */ diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index cf2ea8584..d780e183d 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -29,10 +29,14 @@ #define PAGE_CACHE_ALIGN(addr) (((addr)+PAGE_CACHE_SIZE-1)&PAGE_CACHE_MASK) #define page_cache_get(x) get_page(x) -#define page_cache_alloc() alloc_pages(GFP_HIGHUSER, 0) #define page_cache_free(x) __free_page(x) #define page_cache_release(x) __free_page(x) +static inline struct page *page_cache_alloc(struct address_space *x) +{ + return alloc_pages(x->gfp_mask, 0); +} + /* * From a kernel address, get the "struct page *" */ diff --git a/include/linux/pci.h b/include/linux/pci.h index 205abe61e..6545dd7fc 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -527,6 +527,7 @@ int pci_write_config_dword(struct pci_dev *dev, int where, u32 val); int pci_enable_device(struct pci_dev *dev); void pci_set_master(struct pci_dev *dev); +int pci_set_dma_mask(struct pci_dev *dev, dma_addr_t mask); int pci_set_power_state(struct pci_dev *dev, int state); int pci_assign_resource(struct pci_dev *dev, int i); @@ -539,6 +540,9 @@ void pdev_sort_resources(struct pci_dev *, struct resource_list *, u32); unsigned long pci_bridge_check_io(struct pci_dev *); void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), int (*)(struct pci_dev *, u8, u8)); +#define HAVE_PCI_REQ_REGIONS +int pci_request_regions(struct pci_dev *, char *); +void pci_release_regions(struct pci_dev *); /* New-style probing supporting hot-pluggable devices */ int pci_register_driver(struct pci_driver *); diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 9bac118e3..80a6092c2 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -510,7 +510,10 @@ #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 #define PCI_DEVICE_ID_APPLE_GC 0x0002 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e -#define PCI_DEVICE_ID_APPLE_UNINORTH 0x0020 +#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 +#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019 +#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 +#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 #define PCI_VENDOR_ID_YAMAHA 0x1073 #define PCI_DEVICE_ID_YAMAHA_724 0x0004 @@ -564,9 +567,16 @@ #define PCI_VENDOR_ID_SUN 0x108e #define PCI_DEVICE_ID_SUN_EBUS 0x1000 #define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001 +#define PCI_DEVICE_ID_SUN_RIO_EBUS 0x1100 +#define PCI_DEVICE_ID_SUN_RIO_GEM 0x1101 +#define PCI_DEVICE_ID_SUN_RIO_1394 0x1102 +#define PCI_DEVICE_ID_SUN_RIO_USB 0x1103 +#define PCI_DEVICE_ID_SUN_GEM 0x2bad #define PCI_DEVICE_ID_SUN_SIMBA 0x5000 #define PCI_DEVICE_ID_SUN_PBM 0x8000 +#define PCI_DEVICE_ID_SUN_SCHIZO 0x8001 #define PCI_DEVICE_ID_SUN_SABRE 0xa000 +#define PCI_DEVICE_ID_SUN_HUMMINGBIRD 0xa001 #define PCI_VENDOR_ID_CMD 0x1095 #define PCI_DEVICE_ID_CMD_640 0x0640 diff --git a/include/linux/pg.h b/include/linux/pg.h index c752a97ca..db994bb0c 100644 --- a/include/linux/pg.h +++ b/include/linux/pg.h @@ -1,5 +1,5 @@ /* pg.h (c) 1998 Grant R. Guenther <grant@torque.net> - Under the terms of the GNU public license + Under the terms of the GNU General Public License pg.h defines the user interface to the generic ATAPI packet diff --git a/include/linux/sched.h b/include/linux/sched.h index 68c48ae0c..d3e038472 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -167,7 +167,7 @@ extern int current_is_keventd(void); */ struct files_struct { atomic_t count; - rwlock_t file_lock; + rwlock_t file_lock; /* Protects all the below members. Nests inside tsk->alloc_lock */ int max_fds; int max_fdset; int next_fd; @@ -208,10 +208,13 @@ struct mm_struct { atomic_t mm_users; /* How many users with user space? */ atomic_t mm_count; /* How many references to "struct mm_struct" (users count as 1) */ int map_count; /* number of VMAs */ - struct semaphore mmap_sem; - spinlock_t page_table_lock; + struct rw_semaphore mmap_sem; + spinlock_t page_table_lock; /* Protects task page tables and mm->rss */ - struct list_head mmlist; /* List of all active mm's */ + struct list_head mmlist; /* List of all active mm's. These are globally strung + * together off init_mm.mmlist, and are protected + * by mmlist_lock + */ unsigned long start_code, end_code, start_data, end_data; unsigned long start_brk, brk, start_stack; @@ -236,7 +239,7 @@ extern int mmlist_nr; mm_users: ATOMIC_INIT(2), \ mm_count: ATOMIC_INIT(1), \ map_count: 1, \ - mmap_sem: __MUTEX_INITIALIZER(name.mmap_sem), \ + mmap_sem: __RWSEM_INITIALIZER(name.mmap_sem, RW_LOCK_BIAS), \ page_table_lock: SPIN_LOCK_UNLOCKED, \ mmlist: LIST_HEAD_INIT(name.mmlist), \ } @@ -859,6 +862,7 @@ static inline void unhash_process(struct task_struct *p) write_unlock_irq(&tasklist_lock); } +/* Protects ->fs, ->files, ->mm, and synchronises with wait4(). Nests inside tasklist_lock */ static inline void task_lock(struct task_struct *p) { spin_lock(&p->alloc_lock); diff --git a/include/linux/serial.h b/include/linux/serial.h index b5ed862a9..d03c78ba4 100644 --- a/include/linux/serial.h +++ b/include/linux/serial.h @@ -139,7 +139,7 @@ struct serial_uart_config { #define ASYNC_CHECK_CD 0x02000000 /* i.e., CLOCAL */ #define ASYNC_SHARE_IRQ 0x01000000 /* for multifunction cards --- no longer used */ -#define ASYNC_NO_FLOW 0x00800000 /* No flow control serial console */ +#define ASYNC_CONS_FLOW 0x00800000 /* flow control for console */ #define ASYNC_INTERNAL_FLAGS 0xFF800000 /* Internal flags */ @@ -180,5 +180,6 @@ extern void unregister_serial(int line); /* Allow complicated architectures to specify rs_table[] at run time */ extern int early_serial_setup(struct serial_struct *req); + #endif /* __KERNEL__ */ #endif /* _LINUX_SERIAL_H */ diff --git a/include/linux/serialP.h b/include/linux/serialP.h index 1545e60e1..0b81eb8f2 100644 --- a/include/linux/serialP.h +++ b/include/linux/serialP.h @@ -52,6 +52,7 @@ struct serial_state { struct termios callout_termios; int io_type; struct async_struct *info; + struct pci_dev *dev; }; struct async_struct { diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index 09feb9501..be42ec4fa 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -156,8 +156,8 @@ * These register definitions are for the 16C950 */ #define UART_ASR 0x01 /* Additional Status Register */ -#define UART_RFL 0x03 /* Transmitter FIFO level */ -#define UART_TFL 0x04 /* Receiver FIFO level */ +#define UART_RFL 0x03 /* Receiver FIFO level */ +#define UART_TFL 0x04 /* Transmitter FIFO level */ #define UART_ICR 0x05 /* Index Control Register */ /* The 16950 ICR registers */ diff --git a/include/linux/synclink.h b/include/linux/synclink.h index a733c79f4..75254a954 100644 --- a/include/linux/synclink.h +++ b/include/linux/synclink.h @@ -6,7 +6,7 @@ * Copyright (C) 1998-2000 by Microgate Corporation * * Redistribution of this file is permitted under - * the terms of the GNU Public License (GPL) + * the terms of the GNU General Public License (GPL) */ #ifndef _SYNCLINK_H_ diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 07f2c83e9..cbfaafbfe 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -378,6 +378,10 @@ enum { }; /* /proc/sys/net/ipx */ +enum { + NET_IPX_PPROP_BROADCASTING=1, + NET_IPX_FORWARDING=2 +}; /* /proc/sys/net/appletalk */ diff --git a/include/linux/tqueue.h b/include/linux/tqueue.h index 65adeb9b7..4a730f0ad 100644 --- a/include/linux/tqueue.h +++ b/include/linux/tqueue.h @@ -42,6 +42,25 @@ struct tq_struct { void *data; /* argument to function */ }; +/* + * Emit code to initialise a tq_struct's routine and data pointers + */ +#define PREPARE_TQUEUE(_tq, _routine, _data) \ + do { \ + (_tq)->routine = _routine; \ + (_tq)->data = _data; \ + } while (0) + +/* + * Emit code to initialise all of a tq_struct + */ +#define INIT_TQUEUE(_tq, _routine, _data) \ + do { \ + INIT_LIST_HEAD(&(_tq)->list); \ + (_tq)->sync = 0; \ + PREPARE_TQUEUE((_tq), (_routine), (_data)); \ + } while (0) + typedef struct list_head task_queue; #define DECLARE_TASK_QUEUE(q) LIST_HEAD(q) diff --git a/include/linux/trdevice.h b/include/linux/trdevice.h index a70f27946..f91119ab0 100644 --- a/include/linux/trdevice.h +++ b/include/linux/trdevice.h @@ -33,7 +33,10 @@ extern int tr_header(struct sk_buff *skb, struct net_device *dev, void *saddr, unsigned len); extern int tr_rebuild_header(struct sk_buff *skb); extern unsigned short tr_type_trans(struct sk_buff *skb, struct net_device *dev); -extern struct net_device * init_trdev(struct net_device *, int); +extern struct net_device *init_trdev(struct net_device *dev, int sizeof_priv); +extern struct net_device *alloc_trdev(int sizeof_priv); +extern int register_trdev(struct net_device *dev); +extern void unregister_trdev(struct net_device *dev); #endif diff --git a/include/linux/tty.h b/include/linux/tty.h index 057cb57a6..b396b93b2 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h @@ -307,6 +307,8 @@ struct tty_struct { struct semaphore atomic_read; struct semaphore atomic_write; spinlock_t read_lock; + /* If the tty has a pending do_SAK, queue it here - akpm */ + struct tq_struct SAK_tq; }; /* tty magic number */ diff --git a/include/linux/usb.h b/include/linux/usb.h index 5ca846eb1..227d6048e 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h @@ -555,12 +555,18 @@ struct usb_operations { int (*unlink_urb) (struct urb* purb); }; +#define DEVNUM_ROUND_ROBIN /***** OPTION *****/ + /* * Allocated per bus we have */ struct usb_bus { int busnum; /* Bus number (in order of reg) */ +#ifdef DEVNUM_ROUND_ROBIN + int devnum_next; /* Next open device number in round-robin allocation */ +#endif /* DEVNUM_ROUND_ROBIN */ + struct usb_devmap devmap; /* Device map */ struct usb_operations *op; /* Operations (specific to the HC) */ struct usb_device *root_hub; /* Root hub */ diff --git a/include/linux/videodev.h b/include/linux/videodev.h index 7a73db598..d10f7a5c0 100644 --- a/include/linux/videodev.h +++ b/include/linux/videodev.h @@ -6,13 +6,12 @@ #ifdef __KERNEL__ -#if LINUX_VERSION_CODE >= 0x020100 #include <linux/poll.h> -#endif #include <linux/devfs_fs_kernel.h> struct video_device { + struct module *owner; char name[32]; int type; int hardware; diff --git a/include/net/ipx.h b/include/net/ipx.h index ba788670f..78c193718 100644 --- a/include/net/ipx.h +++ b/include/net/ipx.h @@ -24,6 +24,8 @@ typedef struct #define ipx_broadcast_node "\377\377\377\377\377\377" #define ipx_this_node "\0\0\0\0\0\0" +#define IPX_MAX_PPROP_HOPS 8 + struct ipxhdr { __u16 ipx_checksum __attribute__ ((packed)); @@ -36,7 +38,7 @@ struct ipxhdr #define IPX_TYPE_SAP 0x04 /* may also be 0 */ #define IPX_TYPE_SPX 0x05 /* SPX protocol */ #define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */ -#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast [Not supported] */ +#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */ ipx_address ipx_dest __attribute__ ((packed)); ipx_address ipx_source __attribute__ ((packed)); }; @@ -71,6 +73,7 @@ typedef struct ipx_route { unsigned char ir_routed; unsigned char ir_router_node[IPX_NODE_LEN]; struct ipx_route *ir_next; + atomic_t refcnt; } ipx_route; #ifdef __KERNEL__ @@ -78,7 +81,10 @@ struct ipx_cb { u8 ipx_tctrl; u32 ipx_dest_net; u32 ipx_source_net; - int last_hop_index; + struct { + u32 netnum; + int index; + } last_hop; }; #endif #define IPX_MIN_EPHEMERAL_SOCKET 0x4000 diff --git a/include/net/syncppp.h b/include/net/syncppp.h new file mode 100644 index 000000000..350597961 --- /dev/null +++ b/include/net/syncppp.h @@ -0,0 +1,98 @@ +/* + * Defines for synchronous PPP/Cisco link level subroutines. + * + * Copyright (C) 1994 Cronyx Ltd. + * Author: Serge Vakulenko, <vak@zebub.msk.su> + * + * This software is distributed with NO WARRANTIES, not even the implied + * warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * Authors grant any other persons or organizations permission to use + * or modify this software as long as this message is kept with the software, + * all derivative works or modified versions. + * + * Version 1.7, Wed Jun 7 22:12:02 MSD 1995 + * + * + * + */ + +#ifndef _SYNCPPP_H_ +#define _SYNCPPP_H_ 1 + +#ifdef __KERNEL__ +struct slcp { + u16 state; /* state machine */ + u32 magic; /* local magic number */ + u_char echoid; /* id of last keepalive echo request */ + u_char confid; /* id of last configuration request */ +}; + +struct sipcp { + u16 state; /* state machine */ + u_char confid; /* id of last configuration request */ +}; + +struct sppp +{ + struct sppp * pp_next; /* next interface in keepalive list */ + u32 pp_flags; /* use Cisco protocol instead of PPP */ + u16 pp_alivecnt; /* keepalive packets counter */ + u16 pp_loopcnt; /* loopback detection counter */ + u32 pp_seq; /* local sequence number */ + u32 pp_rseq; /* remote sequence number */ + struct slcp lcp; /* LCP params */ + struct sipcp ipcp; /* IPCP params */ + u32 ibytes,obytes; /* Bytes in/out */ + u32 ipkts,opkts; /* Packets in/out */ + struct timer_list pp_timer; + struct net_device *pp_if; + char pp_link_state; /* Link status */ +}; + +struct ppp_device +{ + struct net_device *dev; /* Network device pointer */ + struct sppp sppp; /* Synchronous PPP */ +}; + +#define sppp_of(dev) \ + (&((struct ppp_device *)(*(unsigned long *)((dev)->priv)))->sppp) + +#define PP_KEEPALIVE 0x01 /* use keepalive protocol */ +#define PP_CISCO 0x02 /* use Cisco protocol instead of PPP */ +#define PP_TIMO 0x04 /* cp_timeout routine active */ +#define PP_DEBUG 0x08 + +#define PPP_MTU 1500 /* max. transmit unit */ + +#define LCP_STATE_CLOSED 0 /* LCP state: closed (conf-req sent) */ +#define LCP_STATE_ACK_RCVD 1 /* LCP state: conf-ack received */ +#define LCP_STATE_ACK_SENT 2 /* LCP state: conf-ack sent */ +#define LCP_STATE_OPENED 3 /* LCP state: opened */ + +#define IPCP_STATE_CLOSED 0 /* IPCP state: closed (conf-req sent) */ +#define IPCP_STATE_ACK_RCVD 1 /* IPCP state: conf-ack received */ +#define IPCP_STATE_ACK_SENT 2 /* IPCP state: conf-ack sent */ +#define IPCP_STATE_OPENED 3 /* IPCP state: opened */ + +#define SPPP_LINK_DOWN 0 /* link down - no keepalive */ +#define SPPP_LINK_UP 1 /* link is up - keepalive ok */ + +void sppp_attach (struct ppp_device *pd); +void sppp_detach (struct net_device *dev); +void sppp_input (struct net_device *dev, struct sk_buff *m); +int sppp_do_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd); +struct sk_buff *sppp_dequeue (struct net_device *dev); +int sppp_isempty (struct net_device *dev); +void sppp_flush (struct net_device *dev); +int sppp_open (struct net_device *dev); +int sppp_reopen (struct net_device *dev); +int sppp_close (struct net_device *dev); +#endif + +#define SPPPIOCCISCO (SIOCDEVPRIVATE) +#define SPPPIOCPPP (SIOCDEVPRIVATE+1) +#define SPPPIOCDEBUG (SIOCDEVPRIVATE+2) + +#endif /* _SYNCPPP_H_ */ diff --git a/include/pcmcia/ciscode.h b/include/pcmcia/ciscode.h index 7fd7da26d..2e0a838f1 100644 --- a/include/pcmcia/ciscode.h +++ b/include/pcmcia/ciscode.h @@ -112,10 +112,12 @@ #define PRODID_SOCKET_DUAL_RS232 0x0006 #define PRODID_SOCKET_EIO 0x000a #define PRODID_SOCKET_LPE 0x000d +#define PRODID_SOCKET_LPE_CF 0x0075 #define MANFID_SUNDISK 0x0045 #define MANFID_TDK 0x0105 +#define PRODID_TDK_CF010 0x0900 #define MANFID_TOSHIBA 0x0098 |