diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-03-16 12:52:32 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-03-16 12:52:32 +0000 |
| commit | 851076b71233028f17a395f19821abdc46a34715 (patch) | |
| tree | bdb6e4510cef9a33c57749ca174c49e087e99150 /include | |
| parent | dc2e1a589aa53a62f60136a4eb727fa770d2e02e (diff) | |
More loose bits (grrr) ...
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/bootinfo.h | 10 | ||||
| -rw-r--r-- | include/asm-mips/galileo-boards/ev96100.h | 4 | ||||
| -rw-r--r-- | include/asm-mips/galileo-boards/gt96100.h | 2 | ||||
| -rw-r--r-- | include/asm-mips/serial.h | 14 |
4 files changed, 26 insertions, 4 deletions
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index 83e5dc895..23710cbef 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -27,10 +27,11 @@ #define MACH_GROUP_MOMENCO 12 /* Momentum Boards */ #define MACH_GROUP_ITE 13 /* ITE Semi Eval Boards */ #define MACH_GROUP_PHILLIPS 14 +#define MACH_GROUP_GLOBESPAN 15 /* Globespan PVR Referrence Board */ #define GROUP_NAMES { "unknown", "Jazz", "Digital", "ARC", "SNI", "ACN", \ "SGI", "Cobalt", "NEC DDB", "Baget", "Cosine", "Galileo", "Momentum", \ - "ITE", "Phillips" } + "ITE", "Phillips", "Globepspan" } /* * Valid machtype values for group unknown (low order halfword of mips_machtype) @@ -150,6 +151,13 @@ #define MACH_QED_4N_S01B 0 /* ITE8172 based eval board */ #define GROUP_ITE_NAMES { "QED-4N-S01B" } /* the actual board name */ + +/* + * Valid machtype for group Globespan + */ +#define MACH_IVR 0 /* IVR eval board */ + +#define GROUP_GLOBESPAN_NAMES { "IVR" } /* the actual board name */ /* * Valid machtype for group PHILIPS diff --git a/include/asm-mips/galileo-boards/ev96100.h b/include/asm-mips/galileo-boards/ev96100.h index 92a34cf7e..86f39fbdc 100644 --- a/include/asm-mips/galileo-boards/ev96100.h +++ b/include/asm-mips/galileo-boards/ev96100.h @@ -36,8 +36,8 @@ /* * EV96100 UART register base. */ -#define EV96100_UART0_REGS_BASE (KSEG1ADDR(EV96100_COM1_BASE_ADDR)) -#define EV96100_UART1_REGS_BASE (KSEG1ADDR(EV96100_COM2_BASE_ADDR)) +#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR +#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR #define EV96100_BASE_BAUD ( 3686400 / 16 ) diff --git a/include/asm-mips/galileo-boards/gt96100.h b/include/asm-mips/galileo-boards/gt96100.h index 4c48bd96c..5a1d170cd 100644 --- a/include/asm-mips/galileo-boards/gt96100.h +++ b/include/asm-mips/galileo-boards/gt96100.h @@ -1,7 +1,7 @@ /* * Copyright 2000 MontaVista Software Inc. * Author: MontaVista Software, Inc. - * stevel@mvista.com or support@mvista.com + * stevel@mvista.com or source@mvista.com * * ######################################################################## * diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index d2057f158..b5b8c6ff2 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -121,6 +121,19 @@ #define ITE_SERIAL_PORT_DEFNS #endif +#ifdef CONFIG_MIPS_IVR +#include <asm/it8172/it8172.h> +#include <asm/it8172/it8172_int.h> +#define IVR_SERIAL_PORT_DEFNS \ + { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_UART_BASE), \ + irq: IT8172_UART_IRQ, flags: STD_COM_FLAGS, type: 0x3 }, \ + /* Smart Card Reader 1 */ \ + { baud_base: BASE_BAUD, port: (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \ + irq: IT8172_SCR1_IRQ, flags: STD_COM_FLAGS, type: 0x3 }, +#else +#define IVR_SERIAL_PORT_DEFNS +#endif + #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT #define STD_SERIAL_PORT_DEFNS \ /* UART CLK PORT IRQ FLAGS */ \ @@ -219,6 +232,7 @@ #endif #define SERIAL_PORT_DFNS \ + IVR_SERIAL_PORT_DEFNS \ ITE_SERIAL_PORT_DEFNS \ ATLAS_SERIAL_PORT_DEFNS \ EV96100_SERIAL_PORT_DEFNS \ |