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-rw-r--r--Makefile2
-rw-r--r--arch/i386/kernel/bios32.c2
-rw-r--r--arch/mips/Makefile5
-rw-r--r--arch/mips/boot/Makefile1
-rw-r--r--arch/mips/config.in3
-rw-r--r--arch/mips/dec/decstation.S33
-rw-r--r--arch/mips/dec/int-handler.S40
-rw-r--r--arch/mips/defconfig7
-rw-r--r--arch/mips/deskstation/hw-access.c46
-rw-r--r--arch/mips/deskstation/int-handler.S31
-rw-r--r--arch/mips/jazz/hw-access.c28
-rw-r--r--arch/mips/jazz/int-handler.S90
-rw-r--r--arch/mips/jazz/jazzdma.c15
-rw-r--r--arch/mips/jazz/setup.c4
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/branch.c9
-rw-r--r--arch/mips/kernel/entry.S77
-rw-r--r--arch/mips/kernel/fpe.c2
-rw-r--r--arch/mips/kernel/gdb-low.S2
-rw-r--r--arch/mips/kernel/head.S70
-rw-r--r--arch/mips/kernel/irixelf.c9
-rw-r--r--arch/mips/kernel/irixsig.c2
-rw-r--r--arch/mips/kernel/irq.c81
-rw-r--r--arch/mips/kernel/mips_ksyms.c14
-rw-r--r--arch/mips/kernel/pci.c44
-rw-r--r--arch/mips/kernel/proc.c28
-rw-r--r--arch/mips/kernel/process.c4
-rw-r--r--arch/mips/kernel/r2300_fpu.S8
-rw-r--r--arch/mips/kernel/r4k_fpu.S153
-rw-r--r--arch/mips/kernel/r4k_misc.S2
-rw-r--r--arch/mips/kernel/r6000_fpu.S22
-rw-r--r--arch/mips/kernel/setup.c8
-rw-r--r--arch/mips/kernel/signal.c4
-rw-r--r--arch/mips/kernel/syscall.c12
-rw-r--r--arch/mips/kernel/syscalls.h6
-rw-r--r--arch/mips/kernel/sysmips.c2
-rw-r--r--arch/mips/kernel/time.c9
-rw-r--r--arch/mips/kernel/traps.c60
-rw-r--r--arch/mips/kernel/unaligned.c21
-rw-r--r--arch/mips/lib/Makefile4
-rw-r--r--arch/mips/lib/checksum.c4
-rw-r--r--arch/mips/mm/loadmmu.c6
-rw-r--r--arch/mips/mm/r4xx0.c317
-rw-r--r--arch/mips/sgi/kernel/indyIRQ.S12
-rw-r--r--arch/mips/sgi/kernel/indy_int.c77
-rw-r--r--arch/mips/sgi/kernel/indy_timer.c2
-rw-r--r--arch/mips/sgi/kernel/setup.c2
-rw-r--r--arch/mips/sgi/kernel/system.c2
-rw-r--r--arch/mips/sni/hw-access.c46
-rw-r--r--arch/mips/sni/int-handler.S176
-rw-r--r--arch/mips/sni/pci.c21
-rw-r--r--arch/mips/sni/setup.c37
-rw-r--r--arch/mips/tools/Makefile4
-rw-r--r--arch/mips/tools/offset.c6
-rw-r--r--arch/sparc64/boot/piggyback.c2
-rw-r--r--arch/sparc64/kernel/sunos_ioctl32.c2
-rw-r--r--arch/sparc64/kernel/sys_sunos32.c2
-rw-r--r--arch/sparc64/kernel/trampoline.S2
-rw-r--r--arch/sparc64/lib/VIS.h2
-rw-r--r--arch/sparc64/mm/modutil.c2
-rw-r--r--arch/sparc64/mm/ultra.S2
-rw-r--r--drivers/Makefile2
-rw-r--r--drivers/block/floppy.c43
-rw-r--r--drivers/char/apm_bios.c2
-rw-r--r--drivers/char/cyclades.c47
-rw-r--r--drivers/char/ftape/ecc.c10
-rw-r--r--drivers/char/pc_keyb.c36
-rw-r--r--drivers/char/psaux.c12
-rw-r--r--drivers/char/tpqic02.c6
-rw-r--r--drivers/isdn/avmb1/capi.c5
-rw-r--r--drivers/isdn/avmb1/capiutil.c5
-rw-r--r--drivers/isdn/hisax/l3_1tr6.c7
-rw-r--r--drivers/isdn/hisax/l3dss1.c7
-rw-r--r--drivers/isdn/isdn_common.c11
-rw-r--r--drivers/isdn/isdn_ppp.c7
-rw-r--r--drivers/isdn/sc/Makefile2
-rw-r--r--drivers/net/Config.in1
-rw-r--r--drivers/net/pcnet32.c12
-rw-r--r--drivers/net/plip.c2
-rw-r--r--drivers/net/ppp.c2
-rw-r--r--drivers/net/scc.c2
-rw-r--r--drivers/pnp/parport_probe.c2
-rw-r--r--drivers/scsi/FlashPoint.c82
-rw-r--r--drivers/scsi/aic7xxx.c6
-rw-r--r--drivers/scsi/aic7xxx.h4
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx.reg1135
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx.seq1156
-rw-r--r--drivers/scsi/aic7xxx/scsi_message.h41
-rw-r--r--drivers/scsi/aic7xxx/sequencer.h102
-rw-r--r--drivers/scsi/aic7xxx_proc.c2
-rw-r--r--drivers/scsi/eata_dma.c6
-rw-r--r--drivers/scsi/g_NCR5380.c5
-rw-r--r--drivers/scsi/hosts.c2
-rw-r--r--drivers/scsi/scsi.c2
-rw-r--r--drivers/scsi/sgiwd93.c2
-rw-r--r--drivers/scsi/wd33c93.c1
-rw-r--r--drivers/sgi/Makefile2
-rw-r--r--fs/dquot.c2
-rw-r--r--fs/nfs/nfsroot.c4
-rw-r--r--fs/proc/array.c2
-rw-r--r--fs/ufs/ufs_dir.c2
-rw-r--r--fs/ufs/ufs_file.c2
-rw-r--r--fs/ufs/ufs_inode.c2
-rw-r--r--fs/ufs/ufs_namei.c2
-rw-r--r--fs/ufs/ufs_super.c2
-rw-r--r--include/asm-alpha/floppy.h34
-rw-r--r--include/asm-alpha/keyboard.h2
-rw-r--r--include/asm-i386/floppy.h37
-rw-r--r--include/asm-i386/keyboard.h2
-rw-r--r--include/asm-mips/bootinfo.h36
-rw-r--r--include/asm-mips/bugs.h2
-rw-r--r--include/asm-mips/byteorder.h2
-rw-r--r--include/asm-mips/checksum.h9
-rw-r--r--include/asm-mips/fcntl.h2
-rw-r--r--include/asm-mips/floppy.h45
-rw-r--r--include/asm-mips/io.h36
-rw-r--r--include/asm-mips/ioctls.h4
-rw-r--r--include/asm-mips/jazz.h2
-rw-r--r--include/asm-mips/jazzdma.h1
-rw-r--r--include/asm-mips/mipsconfig.h11
-rw-r--r--include/asm-mips/mipsregs.h20
-rw-r--r--include/asm-mips/namei.h3
-rw-r--r--include/asm-mips/pci.h59
-rw-r--r--include/asm-mips/pgtable.h7
-rw-r--r--include/asm-mips/posix_types.h1
-rw-r--r--include/asm-mips/processor.h19
-rw-r--r--include/asm-mips/r4kcache.h47
-rw-r--r--include/asm-mips/sigcontext.h8
-rw-r--r--include/asm-mips/signal.h2
-rw-r--r--include/asm-mips/string.h2
-rw-r--r--include/asm-mips/system.h9
-rw-r--r--include/asm-mips/termbits.h2
-rw-r--r--include/asm-mips/uaccess.h14
-rw-r--r--include/asm-mips/watch.h7
-rw-r--r--include/asm-sparc/floppy.h33
-rw-r--r--include/asm-sparc64/timer.h51
-rw-r--r--include/linux/cyclades.h9
-rw-r--r--include/linux/mm.h8
-rw-r--r--include/linux/nvram.h18
-rw-r--r--include/linux/parport.h2
-rw-r--r--include/linux/pci.h1
-rw-r--r--include/linux/sysrq.h2
-rw-r--r--include/linux/ufs_fs.h2
-rw-r--r--kernel/module.c1
-rw-r--r--mm/vmscan.c2
-rw-r--r--net/ipv4/ip_fragment.c2
-rw-r--r--net/ipv4/syncookies.c2
-rw-r--r--net/ipv4/tcp.c2
-rw-r--r--net/ipv4/tcp_input.c2
-rw-r--r--net/ipv4/tcp_ipv4.c2
-rw-r--r--net/ipv4/tcp_output.c2
-rw-r--r--net/ipv6/addrconf.c2
-rw-r--r--net/ipv6/af_inet6.c2
-rw-r--r--net/ipv6/icmp.c2
-rw-r--r--net/ipv6/ip6_fib.c2
-rw-r--r--net/ipv6/ip6_input.c2
-rw-r--r--net/ipv6/ip6_output.c2
-rw-r--r--net/ipv6/route.c2
-rw-r--r--net/ipv6/tcp_ipv6.c2
159 files changed, 3921 insertions, 1137 deletions
diff --git a/Makefile b/Makefile
index 345703650..2e1b5a555 100644
--- a/Makefile
+++ b/Makefile
@@ -159,7 +159,7 @@ DRIVERS := $(DRIVERS) drivers/pnp/pnp.a
endif
ifdef CONFIG_SGI
-DRIVERS := --start-group $(DRIVERS) drivers/sgi/sgi.a --end-group
+DRIVERS := $(DRIVERS) drivers/sgi/sgi.a
endif
include arch/$(ARCH)/Makefile
diff --git a/arch/i386/kernel/bios32.c b/arch/i386/kernel/bios32.c
index d1d7a85e0..e98819258 100644
--- a/arch/i386/kernel/bios32.c
+++ b/arch/i386/kernel/bios32.c
@@ -1,7 +1,7 @@
/*
* bios32.c - BIOS32, PCI BIOS functions.
*
- * $Id: bios32.c,v 1.2 1997/07/20 14:57:08 ralf Exp $
+ * $Id: bios32.c,v 1.14 1997/08/02 22:20:57 mj Exp $
*
* Sponsored by
* iX Multiuser Multitasking Magazine
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index b1df65c86..2624d2d0c 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -13,7 +13,7 @@
# Copyright (C) 1994, 1995, 1996 by Ralf Baechle
# DECStation modifications by Paul M. Antoine, 1996
#
-# $Id: Makefile,v 1.7 1997/08/30 04:51:27 ralf Exp $
+# $Id: Makefile,v 1.9 1997/09/19 08:34:54 ralf Exp $
#
#
@@ -82,6 +82,9 @@ endif
ifdef CONFIG_CPU_R5000
CFLAGS := $(CFLAGS) -mcpu=r8000 -mips2
endif
+ifdef CONFIG_CPU_NEVADA
+CFLAGS := $(CFLAGS) -mcpu=r8000 -mips2 -mmad
+endif
ifdef CONFIG_CPU_R8000
CFLAGS := $(CFLAGS) -mcpu=r8000 -mips2
endif
diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile
index f632508f0..dd834efd9 100644
--- a/arch/mips/boot/Makefile
+++ b/arch/mips/boot/Makefile
@@ -41,6 +41,7 @@ zdisk: zImage
fi
dep:
+ $(CPP) -M *.[cS] > .depend
clean:
rm -f zImage zImage.tmp mkboot
diff --git a/arch/mips/config.in b/arch/mips/config.in
index 9e820f29e..e942e1ba1 100644
--- a/arch/mips/config.in
+++ b/arch/mips/config.in
@@ -66,6 +66,7 @@ choice 'CPU type' \
R4300 CONFIG_CPU_R4300 \
R4x00 CONFIG_CPU_R4X00 \
R5000 CONFIG_CPU_R5000 \
+ R56x0 CONFIG_CPU_NEVADA \
R8000 CONFIG_CPU_R8000 \
R10000 CONFIG_CPU_R10000" R4x00
endmenu
@@ -97,7 +98,7 @@ bool 'System V IPC' CONFIG_SYSVIPC
bool 'Sysctl support' CONFIG_SYSCTL
if [ "$CONFIG_SGI" != "y" ]; then
- tristate 'Parallel port support' CONFIG_PNP_PARPORT
+ tristate 'Parallel port support' CONFIG_PARPORT
fi
endmenu
diff --git a/arch/mips/dec/decstation.S b/arch/mips/dec/decstation.S
index 612fcea0b..ebc618a4c 100644
--- a/arch/mips/dec/decstation.S
+++ b/arch/mips/dec/decstation.S
@@ -15,7 +15,7 @@
* (Paul, you need to fix this file to comply with NAPS. Won't be
* too hard - Ralf)
*
- * $Id:$
+ * $Id: decstation.S,v 1.3 1997/09/20 19:20:06 root Exp $
*/
#include <asm/asm.h>
#include <asm/mipsconfig.h>
@@ -257,19 +257,16 @@ loc_floppy: PANIC("Unimplemented loc_floppy handler")
/*
* Now call the real handler
*/
-loc_call: la t0,IRQ_vectors # delay slot
-
- /*
+loc_call: /*
* Temporarily disable interrupt source
*/
/* lhu t2,JAZZ_IO_IRQ_ENABLE
*/
- addu t0,t3 # make ptr to IRQ handler
- LOAD_L t0,(t0)
and t2,s1 # delay slot
/* sh t2,JAZZ_IO_IRQ_ENABLE */
- jalr t0 # call IRQ handler
- nor s1,zero,s1 # delay slot
+ nor s1,zero,s1
+ jal do_IRQ # call IRQ handler
+ move a1,sp
/*
* Reenable interrupt
@@ -278,7 +275,7 @@ loc_call: la t0,IRQ_vectors # delay slot
or t2,s1
/* sh t2,JAZZ_IO_IRQ_ENABLE */
- jr v0
+ j ret_from_irq
nop # delay slot
ll_tc3: PANIC("Unimplemented tc3 interrupt handler")
@@ -304,19 +301,15 @@ ll_reset: li a0,0
/*
* Now call the real handler
*/
-call_real: la t0,IRQ_vectors # delay slot
-
- /*
+call_real: /*
* temporarily disable interrupt
*/
mfc0 t2,CP0_STATUS
and t2,s1
-
- addu t0,t3
- LOAD_L t0,(t0)
- mtc0 t2,CP0_STATUS # delay slot
- jalr t0
- nor s1,zero,s1 # delay slot
+ mtc0 t2,CP0_STATUS
+ nor s1,zero,s1
+ jal do_IRQ
+ move a1,sp
/*
* reenable interrupt
@@ -325,8 +318,8 @@ call_real: la t0,IRQ_vectors # delay slot
or t2,s1
mtc0 t2,CP0_STATUS
- jr v0
- nop # delay slot
+ j ret_from_irq
+ nop # delay slot
/*
* Just for debugging... load a0 with address of the point inside the
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 1706dc975..87348b5b1 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -12,7 +12,7 @@
* FIXME: still plenty to do in this file, as much of the code hasn't been
* modified to suit the DECStation's interrupts.
*
- * $Id:$
+ * $Id: int-handler.S,v 1.3 1997/09/20 19:20:07 root Exp $
*/
#include <asm/asm.h>
#include <asm/regdef.h>
@@ -98,7 +98,7 @@ ll_sw0: li s1,~IE_SW0
PRINT("sw0 received...\n")
li t1,1
b call_real
- li t3,PTRSIZE # delay slot, re-map to irq level 1
+ nop
ll_sw1: li s1,~IE_SW1
PANIC("Unimplemented sw1 handler")
@@ -108,14 +108,6 @@ loc_sound: PANIC("Unimplemented loc_sound handler")
loc_video: PANIC("Unimplemented loc_video handler")
loc_scsi: PANIC("Unimplemented loc_scsi handler")
-/*
- * Ethernet interrupt, remapped to level 15
- * NOTE: Due to a bug somewhere in the kernel I was not able
- * to figure out, the PRINT() is necessary. Without this,
- * I get a "gfp called nonatomically from interrupt 00000000".
- * Only god knows why... Tell me if you find the reason!
- * Andy, 6/16/95
- */
loc_ethernet: PANIC("Unimplemented loc_ethernet")
/*
@@ -148,19 +140,15 @@ loc_floppy: PANIC("Unimplemented loc_floppy handler")
/*
* Now call the real handler
*/
-loc_call: la t0,IRQ_vectors # delay slot
-
- /*
+loc_call: /*
* Temporarily disable interrupt source
*/
/* lhu t2,JAZZ_IO_IRQ_ENABLE
*/
- addu t0,t3 # make ptr to IRQ handler
- lw t0,(t0)
- and t2,s1 # delay slot
+ and t2,s1
/* sh t2,JAZZ_IO_IRQ_ENABLE */
- jalr t0 # call IRQ handler
- nor s1,zero,s1 # delay slot
+ jal do_IRQ # call IRQ handler
+ nor s1,zero,s1
/*
* Reenable interrupt
@@ -169,7 +157,7 @@ loc_call: la t0,IRQ_vectors # delay slot
or t2,s1
/* sh t2,JAZZ_IO_IRQ_ENABLE */
- jr v0
+ j ret_from_irq
nop # delay slot
ll_tc3: PANIC("Unimplemented tc3 interrupt handler")
@@ -195,19 +183,15 @@ ll_reset: li a0,0
/*
* Now call the real handler
*/
-call_real: la t0,IRQ_vectors # delay slot
-
- /*
+call_real: /*
* temporarily disable interrupt
*/
mfc0 t2,CP0_STATUS
and t2,s1
- addu t0,t3
- lw t0,(t0)
- mtc0 t2,CP0_STATUS # delay slot
- jalr t0
- nor s1,zero,s1 # delay slot
+ mtc0 t2,CP0_STATUS
+ jal do_IRQ
+ nor s1,zero,s1
/*
* reenable interrupt
@@ -216,7 +200,7 @@ call_real: la t0,IRQ_vectors # delay slot
or t2,s1
mtc0 t2,CP0_STATUS
- jr v0
+ j ret_from_irq
nop # delay slot
/*
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index ae3ba1f9d..5c94da263 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -25,6 +25,7 @@ CONFIG_PCI=y
# CONFIG_CPU_R4300 is not set
CONFIG_CPU_R4X00=y
# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
@@ -39,7 +40,7 @@ CONFIG_BINFMT_ELF=y
CONFIG_NET=y
CONFIG_SYSVIPC=y
CONFIG_SYSCTL=y
-# CONFIG_PNP_PARPORT is not set
+# CONFIG_PARPORT is not set
#
# Loadable module support
@@ -130,6 +131,7 @@ CONFIG_PCNET32=y
# CONFIG_CS89x0 is not set
# CONFIG_DE4X5 is not set
# CONFIG_DEC_ELCP is not set
+# CONFIG_DEC_ELCP is not set
# CONFIG_DGRS is not set
# CONFIG_EEXPRESS_PRO100 is not set
# CONFIG_NET_POCKET is not set
@@ -139,6 +141,7 @@ CONFIG_PCNET32=y
# CONFIG_NET_RADIO is not set
# CONFIG_SLIP is not set
# CONFIG_TR is not set
+# CONFIG_WAN_DRIVERS is not set
# CONFIG_LAPBETHER is not set
# CONFIG_X25_ASY is not set
@@ -205,6 +208,6 @@ CONFIG_SERIAL=y
#
# Kernel hacking
#
-# CONFIG_CROSSCOMPILE is not set
+CONFIG_CROSSCOMPILE=y
# CONFIG_REMOTE_DEBUG is not set
# CONFIG_PROFILE is not set
diff --git a/arch/mips/deskstation/hw-access.c b/arch/mips/deskstation/hw-access.c
index 8b1bd0e3b..64659ba76 100644
--- a/arch/mips/deskstation/hw-access.c
+++ b/arch/mips/deskstation/hw-access.c
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: hw-access.c,v 1.2 1997/07/23 17:40:54 ralf Exp $
+ * $Id: hw-access.c,v 1.3 1997/07/29 17:46:42 ralf Exp $
*/
#include <linux/config.h>
#include <linux/delay.h>
@@ -46,69 +46,69 @@ fd_outb(unsigned char value, unsigned int port)
* How to access the floppy DMA functions.
*/
static void
-fd_enable_dma(void)
+fd_enable_dma(int channel)
{
- enable_dma(FLOPPY_DMA);
+ enable_dma(channel);
}
static void
-fd_disable_dma(void)
+fd_disable_dma(int channel)
{
- disable_dma(FLOPPY_DMA);
+ disable_dma(int channel);
}
static int
-fd_request_dma(void)
+fd_request_dma(int channel)
{
- return request_dma(FLOPPY_DMA, "floppy");
+ return request_dma(channel, "floppy");
}
static void
-fd_free_dma(void)
+fd_free_dma(int channel)
{
- free_dma(FLOPPY_DMA);
+ free_dma(channel);
}
static void
-fd_clear_dma_ff(void)
+fd_clear_dma_ff(int channel)
{
- clear_dma_ff(FLOPPY_DMA);
+ clear_dma_ff(channel);
}
static void
-fd_set_dma_mode(char mode)
+fd_set_dma_mode(int channel, char mode)
{
- set_dma_mode(FLOPPY_DMA, mode);
+ set_dma_mode(channel, mode);
}
static void
-fd_set_dma_addr(unsigned int addr)
+fd_set_dma_addr(int channel, unsigned int addr)
{
- set_dma_addr(FLOPPY_DMA, addr);
+ set_dma_addr(channel, addr);
}
static void
-fd_set_dma_count(unsigned int count)
+fd_set_dma_count(int channel, unsigned int count)
{
- set_dma_count(FLOPPY_DMA, count);
+ set_dma_count(channel, count);
}
static int
-fd_get_dma_residue(void)
+fd_get_dma_residue(int channel)
{
- return get_dma_residue(FLOPPY_DMA);
+ return get_dma_residue(channel);
}
static void
-fd_enable_irq(void)
+fd_enable_irq(int irq)
{
- enable_irq(FLOPPY_IRQ);
+ enable_irq(irq);
}
static void
-fd_disable_irq(void)
+fd_disable_irq(int irq)
{
- disable_irq(FLOPPY_IRQ);
+ disable_irq(irq);
}
void
diff --git a/arch/mips/deskstation/int-handler.S b/arch/mips/deskstation/int-handler.S
index b7fd32d71..508110fef 100644
--- a/arch/mips/deskstation/int-handler.S
+++ b/arch/mips/deskstation/int-handler.S
@@ -1,7 +1,9 @@
/*
* Deskstation rPC44/Tyne specific interrupt handler code
*
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle
+ * Copyright (C) 1994, 1995, 1996, 1997 by Ralf Baechle
+ *
+ * $Id: int-handler.S,v 1.3 1997/09/20 19:20:09 root Exp $
*/
#include <asm/asm.h>
#include <asm/mipsconfig.h>
@@ -9,7 +11,7 @@
#include <asm/regdef.h>
#include <asm/stackframe.h>
-#error "FIXME - PORT_BASE is defined to port_base which breaks this file"
+#error "FIXME - PORT_BASE is defined to mips_io_port_base which breaks this file"
.text
.set noreorder
@@ -43,12 +45,8 @@
/*
* Now call the real handler
*/
- la t3,IRQ_vectors
- sll t2,a0,PTRLOG
- addu t3,t2
- LONG_L t3,(t3)
- jalr t3
- nop # delay slot
+ jal do_IRQ
+ move a1,sp
/*
* Unblock first pic
*/
@@ -57,7 +55,7 @@
nor s1,zero,s1
and t1,s1
sb t1,%lo(cache_21)(s4)
- jr v0
+ j ret_from_irq
sb t1,%lo(PORT_BASE+0x21)(s0) # delay slot
/*
@@ -85,13 +83,8 @@ poll_second: li a0,0x0f
/*
* Now call the real handler
*/
- la t3,IRQ_vectors
- addiu a0,8
- sll t2,a0,PTRLOG
- addu t3,t2
- LONG_L t3,(t3)
- jalr t3
- nop # delay slot
+ jal do_IRQ
+ nop
/*
* Unblock second pic
*/
@@ -100,12 +93,12 @@ poll_second: li a0,0x0f
nor s1,zero,s1
and t1,t1,s1
sb t1,%lo(cache_A1)(s4)
- jr v0
- sb t1,%lo(PORT_BASE+0xa1)(s0) # delay slot
+ j ret_from_irq
+ sb t1,%lo(PORT_BASE+0xa1)(s0)
/*
* "Jump extender" to reach spurious_interrupt
*/
3: j spurious_interrupt
- nop # delay slot
+ nop
END(deskstation_handle_int)
diff --git a/arch/mips/jazz/hw-access.c b/arch/mips/jazz/hw-access.c
index 4cb45ea89..2ed460ee1 100644
--- a/arch/mips/jazz/hw-access.c
+++ b/arch/mips/jazz/hw-access.c
@@ -6,6 +6,8 @@
* for more details.
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
+ *
+ * $Id: hw-access.c,v 1.4 1997/07/29 17:46:45 ralf Exp $
*/
#include <linux/delay.h>
#include <linux/linkage.h>
@@ -40,64 +42,64 @@ fd_outb(unsigned char value, unsigned int port)
* How to access the floppy DMA functions.
*/
static void
-fd_enable_dma(void)
+fd_enable_dma(int channel)
{
vdma_enable(JAZZ_FLOPPY_DMA);
}
static void
-fd_disable_dma(void)
+fd_disable_dma(int channel)
{
vdma_disable(JAZZ_FLOPPY_DMA);
}
static int
-fd_request_dma(void)
+fd_request_dma(int channel)
{
return 0;
}
static void
-fd_free_dma(void)
+fd_free_dma(int channel)
{
}
static void
-fd_clear_dma_ff(void)
+fd_clear_dma_ff(int channel)
{
}
static void
-fd_set_dma_mode(char mode)
+fd_set_dma_mode(int channel, char mode)
{
vdma_set_mode(JAZZ_FLOPPY_DMA, mode);
}
static void
-fd_set_dma_addr(unsigned int a)
+fd_set_dma_addr(int channel, unsigned int a)
{
vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(PHYSADDR(a)));
}
static void
-fd_set_dma_count(unsigned int count)
+fd_set_dma_count(int channel, unsigned int count)
{
vdma_set_count(JAZZ_FLOPPY_DMA, count);
}
static int
-fd_get_dma_residue(void)
+fd_get_dma_residue(int channel)
{
return vdma_get_residue(JAZZ_FLOPPY_DMA);
}
static void
-fd_enable_irq(void)
+fd_enable_irq(int irq)
{
}
static void
-fd_disable_irq(void)
+fd_disable_irq(int irq)
{
}
@@ -148,7 +150,8 @@ struct feature jazz_feature = {
rtc_write_data
};
-static volatile keyboard_hardware *jazz_kh = (keyboard_hardware *)JAZZ_KEYBOARD_ADDRESS;
+static volatile keyboard_hardware *jazz_kh =
+ (keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS;
static unsigned char jazz_read_input(void)
{
@@ -177,5 +180,4 @@ void jazz_keyboard_setup(void)
kbd_write_command = jazz_write_command;
kbd_read_status = jazz_read_status;
request_region(0x60, 16, "keyboard");
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) | JAZZ_IE_KEYBOARD);
}
diff --git a/arch/mips/jazz/int-handler.S b/arch/mips/jazz/int-handler.S
index 7d8fc5659..4c233ef54 100644
--- a/arch/mips/jazz/int-handler.S
+++ b/arch/mips/jazz/int-handler.S
@@ -9,6 +9,8 @@
* interrupts. These interrupts should use their own vectors.
* Squeeze the last cycles out of the handlers. Only a dead
* cycle is a good cycle.
+ *
+ * $Id: int-handler.S,v 1.3 1997/09/20 19:20:11 root Exp $
*/
#include <asm/asm.h>
#include <asm/mipsconfig.h>
@@ -110,12 +112,8 @@ ll_isa_irq: lw a0,JAZZ_EISA_IRQ_ACK
/*
* Now call the real handler
*/
- la t3,IRQ_vectors
- sll t2,a0,PTRLOG
- addu t3,t2
- LONG_L t3,(t3)
- jalr t3
- nop # delay slot
+ jal do_IRQ
+ move a1,sp
/*
* Unblock first pic
*/
@@ -124,8 +122,8 @@ ll_isa_irq: lw a0,JAZZ_EISA_IRQ_ACK
nor s1,zero,s1
and a0,s1
sb a0,%lo(cache_21)(s4)
- jr v0
- sb a0,%lo(JAZZ_PORT_BASE)+0x21(s0) # delay slot
+ j ret_from_irq
+ sb a0,%lo(JAZZ_PORT_BASE)+0x21(s0)
.align 5
ack_second: /*
@@ -144,13 +142,8 @@ ack_second: /*
/*
* Now call the real handler
*/
- la t3,IRQ_vectors
- addiu a0,8
- sll t2,a0,PTRLOG
- addu t3,t2
- LONG_L t3,(t3)
- jalr t3
- nop # delay slot
+ jal do_IRQ
+ move a1,sp
/*
* Unblock second pic
@@ -160,8 +153,8 @@ ack_second: /*
nor s1,zero,s1
and a0,s1
sb a0,%lo(cache_A1)(s4)
- jr v0
- sb a0,%lo(JAZZ_PORT_BASE)+0xa1(s0) # delay slot
+ j ret_from_irq
+ sb a0,%lo(JAZZ_PORT_BASE)+0xa1(s0)
/*
* Hmm... This is not just a plain PC clone so the question is
@@ -187,40 +180,35 @@ ll_timer: lw zero,JAZZ_TIMER_REGISTER # timer irq cleared on read
li a0,0
jal do_IRQ
- move a1,sp # delay slot
+ move a1,sp
mfc0 t0,CP0_STATUS # disable interrupts again
ori t0,1
xori t0,1
mtc0 t0,CP0_STATUS
- j ret_from_sys_call
- nop # delay slot
+ j ret_from_irq
+ nop
/*
* CPU count/compare IRQ (unused)
*/
ll_count: j return
- mtc0 zero,CP0_COMPARE
+ mtc0 zero,CP0_COMPARE
#if 0
/*
* Call the handler for the interrupt
* (Currently unused)
*/
-call_real: la t0,IRQ_vectors
-
- /*
+call_real: /*
* temporarily disable interrupt
*/
mfc0 t2,CP0_STATUS
and t2,s1
-
- addu t0,t3
- lw t0,(t0)
- mtc0 t2,CP0_STATUS # delay slot
- jalr t0
- nor s1,zero,s1 # delay slot
+ mtc0 t2,CP0_STATUS
+ nor s1,zero,s1
+ jal do_IRQ
/*
* reenable interrupt
@@ -228,9 +216,7 @@ call_real: la t0,IRQ_vectors
mfc0 t2,CP0_STATUS
or t2,s1
mtc0 t2,CP0_STATUS
-
- jr v0
- nop # delay slot
+ j ret_from_irq
#endif
.data
@@ -247,14 +233,14 @@ ll_vectors: PTR ll_count # Count/Compare IRQ
* Interrupt handlers for local devices.
*/
.text
+ .set reorder
loc_no_irq: PANIC("Unimplemented loc_no_irq handler")
/*
- * Parallel port IRQ
+ * Parallel port IRQ, remapped to level 5
*/
loc_parallel: li s1,~JAZZ_IE_PARALLEL
li a0,JAZZ_PARALLEL_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_PARALLEL_IRQ # delay slot
/*
* Floppy IRQ, remapped to level 6
@@ -262,7 +248,6 @@ loc_parallel: li s1,~JAZZ_IE_PARALLEL
loc_floppy: li s1,~JAZZ_IE_FLOPPY
li a0,JAZZ_FLOPPY_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_FLOPPY_IRQ # delay slot
/*
* Sound? What sound hardware (whistle) ???
@@ -271,20 +256,15 @@ loc_sound: PANIC("Unimplemented loc_sound handler")
loc_video: PANIC("Unimplemented loc_video handler")
/*
- * Ethernet interrupt handler
+ * Ethernet interrupt handler, remapped to level 13
*/
loc_ethernet: li s1,~JAZZ_IE_ETHERNET
li a0,JAZZ_ETHERNET_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_ETHERNET_IRQ # delay slot
-/*
- * SCSI interrupt handler
- */
loc_scsi: li s1,~JAZZ_IE_SCSI
- li a0,JAZZ_SCSI_IRQ
+ li a0,12 # JAZZ_SCSI_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_SCSI_IRQ # delay slot
/*
* Keyboard interrupt handler
@@ -292,42 +272,36 @@ loc_scsi: li s1,~JAZZ_IE_SCSI
loc_keyboard: li s1,~JAZZ_IE_KEYBOARD
li a0,JAZZ_KEYBOARD_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_KEYBOARD_IRQ # re-map to irq level 1
loc_mouse: PANIC("Unimplemented loc_mouse handler")
/*
- * Serial port 1 IRQ
+ * Serial port 1 IRQ, remapped to level 3
*/
loc_serial1: li s1,~JAZZ_IE_SERIAL1
li a0,JAZZ_SERIAL1_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_SERIAL1_IRQ # delay slot
/*
- * Serial port 2 IRQ
+ * Serial port 2 IRQ, remapped to level 4
*/
loc_serial2: li s1,~JAZZ_IE_SERIAL2
li a0,JAZZ_SERIAL2_IRQ
b loc_call
- li t3,PTRSIZE*JAZZ_SERIAL2_IRQ # delay slot
/*
* Call the interrupt handler for an interrupt generated by a
* local device.
*/
-loc_call: la t0,IRQ_vectors # delay slot
-
- /*
+loc_call: /*
* Temporarily disable interrupt source
*/
lhu t2,JAZZ_IO_IRQ_ENABLE
- addu t0,t3 # make ptr to IRQ handler
- lw t0,(t0)
- and t2,s1 # delay slot
+ and t2,s1
sh t2,JAZZ_IO_IRQ_ENABLE
- jalr t0 # call IRQ handler
- nor s1,zero,s1 # delay slot
+
+ nor s1,zero,s1
+ jal do_IRQ
/*
* Reenable interrupt
@@ -336,14 +310,12 @@ loc_call: la t0,IRQ_vectors # delay slot
or t2,s1
sh t2,JAZZ_IO_IRQ_ENABLE
- jr v0
- nop # delay slot
+ j ret_from_irq
/*
* "Jump extender" to reach spurious_interrupt
*/
3: j spurious_interrupt
- nop # delay slot
/*
* Vectors for interrupts generated by local devices
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
index 988499c79..7d4f3b3e3 100644
--- a/arch/mips/jazz/jazzdma.c
+++ b/arch/mips/jazz/jazzdma.c
@@ -514,18 +514,3 @@ int vdma_get_residue(int channel)
return residual;
}
-
-/*
- * Get DMA channel enable register
- */
-int vdma_get_enable(int channel)
-{
- int enable;
-
- enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
-
- if (vdma_debug)
- printk("vdma_get_enable: channel %d: enable=%d\n",channel,enable);
-
- return enable;
-}
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index 3bbf84947..3bbe3714e 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -6,12 +6,13 @@
* for more details.
*
* Copyright (C) 1996, 1997 by Ralf Baechle
+ *
+ * $Id: setup.c,v 1.4 1997/07/29 17:57:06 ralf Exp $
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
-#include <linux/mm.h>
#include <asm/bootinfo.h>
#include <asm/keyboard.h>
#include <asm/irq.h>
@@ -20,7 +21,6 @@
#include <asm/reboot.h>
#include <asm/vector.h>
#include <asm/io.h>
-#include <asm/pgtable.h>
/*
* Initial irq handlers.
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 69cd54975..2b398d00b 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -16,7 +16,6 @@ O_OBJS := branch.o process.o signal.o entry.o traps.o ptrace.o vm86.o \
ioport.o pci.o reset.o setup.o syscall.o sysmips.o ipc.o \
r4k_switch.o r4k_misc.o r4k_scall.o r4k_fpu.o r2300_switch.o \
r2300_misc.o r2300_scall.o r2300_fpu.o r6000_fpu.o unaligned.o
-
OX_OBJS := mips_ksyms.o
ifdef CONFIG_MIPS_FPE_MODULE
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index b9d138a32..4ca20214d 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -16,8 +16,7 @@
#include <asm/uaccess.h>
/*
- * Compute the return address and do emulate branch and instruction
- * simulation, if required.
+ * Compute the return address and do emulate branch simulation, if required.
*/
int __compute_return_epc(struct pt_regs *regs)
{
@@ -162,14 +161,12 @@ int __compute_return_epc(struct pt_regs *regs)
/*
* And now the FPA/cp1 branch instructions.
- *
- * FIXME: This will silently fail for MIPS IV cop1 branches with
- * the cc field != 0.
*/
case cop1_op:
asm ("cfc1\t%0,$31":"=r" (fcr31));
bit = (insn.i_format.rt >> 2);
- bit += bit ? 24 : 23;
+ bit += (bit != 0);
+ bit += 23;
switch (insn.i_format.rt) {
case 0: /* bc1f */
case 2: /* bc1fl */
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index c955b964e..2e286da80 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -7,7 +7,7 @@
*
* Copyright (C) 1994, 1995 by Ralf Baechle
*
- * $Id: entry.S,v 1.2 1997/08/11 04:21:31 ralf Exp $
+ * $Id: entry.S,v 1.4 1997/09/20 19:20:13 root Exp $
*/
/*
@@ -50,6 +50,7 @@ reschedule: jal schedule
nop
EXPORT(ret_from_sys_call)
+EXPORT(ret_from_irq)
lw t0,bh_mask
lw t1,bh_active # unused delay slot
and t0,t1
@@ -75,64 +76,15 @@ EXPORT(ret_from_sys_call)
jal do_signal
move a1,sp
- .set noat
-EXPORT(return)
+EXPORT(return) .set noat
RESTORE_ALL
eret
.set at
/*
- * Beware: interrupt, fast_interrupt and bad_interrupt have unusual
- * calling conventions to speedup the mess.
- *
- * a0 - interrupt number
- * s2 - destroyed
- * return values:
- * v0 - return routine
+ * Common spurious interrupt handler.
*/
.text
- .set at
- .align 5
-NESTED(interrupt, PT_SIZE, sp)
- move s2,ra
- mfc0 t0,CP0_STATUS # enable IRQs
- ori t0,0x1f
- xori t0,0x1e
- mtc0 t0,CP0_STATUS
-
- jal do_IRQ
- move a1,sp
-
- mfc0 t0,CP0_STATUS # disable IRQs
- ori t0,1
- xori t0,1
- mtc0 t0,CP0_STATUS
- .set reorder
- la v0,ret_from_sys_call
- jr s2
- .set noreorder
- END(interrupt)
-
- .align 5
-NESTED(fast_interrupt, PT_SIZE, sp)
- move s2,ra
- jal do_fast_IRQ
- nop
-
- .set reorder
- la v0,return
- jr s2
- .set noreorder
- END(fast_interrupt)
-
- /*
- * Don't return & unblock the pic
- */
-LEAF(bad_interrupt)
- j return
- END(bad_interrupt)
-
- .text
.align 5
LEAF(spurious_interrupt)
/*
@@ -141,10 +93,8 @@ LEAF(spurious_interrupt)
*/
lui t1,%hi(spurious_count)
lw t0,%lo(spurious_count)(t1)
- la v0,return
addiu t0,1
-
- jr ra
+ j ret_from_irq
sw t0,%lo(spurious_count)(t1)
END(spurious_interrupt)
@@ -164,7 +114,7 @@ LEAF(spurious_interrupt)
REG_S t0,PT_BVADDR(sp);
#define __BUILD_silent(exception)
-#define fmt "Got %s at %016Lx.\n"
+#define fmt "Got %s at %08lx.\n"
#define __BUILD_verbose(exception) \
la a1,8f; \
@@ -215,21 +165,6 @@ EXPORT(exception_count_##exception); \
BUILD_HANDLER(reserved,reserved,none,verbose) /* others */
/*
- * Exception handler table with 32 entries.
- * This might be extended to handle software exceptions
- */
- .bss
- .align PTRLOG
-EXPORT(exception_handlers)
- .fill 32,PTRSIZE,0
-
-/*
- * Interrupt handler table with 32 entries.
- */
-EXPORT(IRQ_vectors)
- .fill 32,PTRSIZE,0
-
-/*
* Table of syscalls
*/
.data
diff --git a/arch/mips/kernel/fpe.c b/arch/mips/kernel/fpe.c
index 46ff43bb4..ee47f016f 100644
--- a/arch/mips/kernel/fpe.c
+++ b/arch/mips/kernel/fpe.c
@@ -6,7 +6,7 @@
*
* Copyright (C) 1997 Ralf Baechle
*
- * $Id:$
+ * $Id: fpe.c,v 1.1 1997/08/11 04:17:18 ralf Exp $
*/
#include <linux/kernel.h>
#include <linux/module.h>
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index bd7ef94fb..a379c5c5b 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -4,6 +4,8 @@
* gdb-low.S contains the low-level trap handler for the GDB stub.
*
* Copyright (C) 1995 Andreas Busse
+ *
+ * $Id:$
*/
#include <linux/sys.h>
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 3251c89d9..d6e82febf 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -7,6 +7,8 @@
* Further modifications by David S. Miller
*
* Head.S contains the MIPS exception handler and startup code.
+ *
+ * $Id: head.S,v 1.10 1997/11/13 12:55:29 ralf Exp $
*/
#include <linux/config.h>
#include <linux/tasks.h>
@@ -27,8 +29,10 @@
/*
* Reserved space for exception handlers.
* Necessary for machines which link their kernels at KSEG0.
+ * FIXME: We could overwrite some of the useless handlers
+ * with those actually being used.
*/
- .fill 512
+ .fill 520
/*
* This is space for the interrupt handlers.
* After trap_init() they are located at virtual address KSEG0.
@@ -93,6 +97,34 @@
eret
END(except_vec0_r4600)
+ /* TLB refill, EXL == 0, R4xx0, non-R4600 version */
+ .set noreorder
+ .set noat
+ LEAF(except_vec0_nevada)
+ .set mips3
+ mfc0 k0, CP0_BADVADDR # Get faulting address
+ _GET_CURRENT(k1) # get current task ptr
+ srl k0, k0, 22 # get pgd only bits
+ lw k1, THREAD_PGDIR(k1) # get task pg_dir
+ sll k0, k0, 2
+ addu k1, k1, k0 # add in pgd offset
+ lw k1, (k1)
+ mfc0 k0, CP0_CONTEXT # get context reg
+ srl k0, k0, 1 # get pte offset
+ and k0, k0, 0xff8
+ addu k1, k1, k0 # add in offset
+ lw k0, 0(k1) # get even pte
+ lw k1, 4(k1) # get odd pte
+ srl k0, k0, 6 # convert to entrylo0
+ mtc0 k0, CP0_ENTRYLO0 # load it
+ srl k1, k1, 6 # convert to entrylo1
+ mtc0 k1, CP0_ENTRYLO1 # load it
+ tlbwr # write random tlb entry
+ nop
+ nop
+ eret # return from trap
+ END(except_vec0_nevada)
+
/* TLB refill, EXL == 0, R4[40]00/R5000 badvaddr hwbug version */
LEAF(except_vec0_r45k_bvahwbug)
.set mips3
@@ -109,6 +141,7 @@
addu k1, k1, k0
lw k0, 0(k1)
lw k1, 4(k1)
+ nop /* XXX */
tlbp
srl k0, k0, 6
mtc0 k0, CP0_ENTRYLO0
@@ -139,6 +172,7 @@
addu k1, k1, k0
lw k0, 0(k1)
lw k1, 4(k1)
+ nop /* XXX */
tlbp
srl k0, k0, 6
mtc0 k0, CP0_ENTRYLO0
@@ -199,6 +233,7 @@
addu k1, k1, k0
lw k0, 0(k1)
lw k1, 4(k1)
+ nop /* XXX */
tlbp
srl k0, k0, 6
mtc0 zero, CP0_ENTRYLO0
@@ -309,6 +344,17 @@
END(except_vec3_generic)
.set at
+ /*
+ * Special interrupt vector for embedded MIPS. This is a
+ * dedicated interrupt vector which reduces interrupt processing
+ * overhead. The jump instruction will be inserted here at
+ * initialization time. This handler may only be 8 bytes in size!
+ */
+ NESTED(except_vec4, 0, sp)
+1: j 1b /* Dummy, will be replaced */
+ nop
+ END(except_vec4)
+
/*
* Kernel entry point
*/
@@ -357,13 +403,10 @@ probe_done:
#ifndef CONFIG_SGI
/* Clear BSS first so that there are no surprises... */
la t0, _edata
- la t1, (_end - 4)
- sw zero, (t0)
-1:
- addiu t0, 4
+ la t1, _end
+1: addiu t0, 1
bne t0, t1, 1b
- sw zero, (t0)
- nop
+ sb zero, -1(t0)
#endif
/*
* Determine the mmu/cache attached to this machine,
@@ -400,8 +443,9 @@ probe_done:
/*
* Stack for kernel and init
*/
-9: la sp, init_task_union+(KERNEL_STACK_SIZE-4*SZREG)
- sw sp, kernelsp
+9: la t0, init_task_union+KERNEL_STACK_SIZE-32
+ sw t0, kernelsp
+ subu sp, t0, 4*SZREG
/* Disable coprocessors */
mfc0 t0, CP0_STATUS
@@ -604,6 +648,14 @@ LEAF(wire_mappings_r3000)
b probe_done
sw t2, (t3)
1:
+ li t2, PRID_IMP_NEVADA
+ bne t1, t2, 1f
+ nop
+
+ li t2, CPU_NEVADA
+ b probe_done
+ sw t2, (t3)
+1:
li t2, CPU_UNKNOWN
sw t2, (t3)
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 26ae60b9e..a7c7bb7df 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -6,7 +6,6 @@
*
* Based upon work which is:
* Copyright 1993, 1994: Eric Youngdale (ericy@cais.com).
- *
*/
#include <linux/module.h>
@@ -228,6 +227,7 @@ unsigned long * create_irix_tables(char * p, int argc, int envc,
return sp;
}
+
/* This is much more generalized than the library routine read function,
* so we keep this separate. Technically the library read function
* is only provided so that we can read a.out libraries that have
@@ -679,7 +679,7 @@ static inline int do_load_irix_binary(struct linux_binprm * bprm,
start_code = 0xffffffff;
end_code = 0;
end_data = 0;
-
+
retval = look_for_irix_interpreter(&elf_interpreter,
&interpreter_dentry,
&interp_elf_ex, elf_phdata, bprm,
@@ -754,7 +754,6 @@ static inline int do_load_irix_binary(struct linux_binprm * bprm,
}
}
-
set_fs(old_fs);
kfree(elf_phdata);
@@ -861,7 +860,7 @@ static inline int do_load_irix_library(int fd)
/* Seek to the beginning of the file. */
if (file->f_op->llseek) {
- if ((error = file->f_op->llseek(inode, file, 0, 0)) != 0)
+ if ((error = file->f_op->llseek(file, 0, 0)) != 0)
return -ENOEXEC;
} else
file->f_pos = 0;
@@ -1028,7 +1027,7 @@ static int dump_write(struct file *file, const void *addr, int nr)
static int dump_seek(struct file *file, off_t off)
{
if (file->f_op->llseek) {
- if (file->f_op->llseek(file->f_dentry->d_inode, file, off, 0) != off)
+ if (file->f_op->llseek(file, off, 0) != off)
return 0;
} else
file->f_pos = off;
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index a40178f36..c84a391a7 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -1,4 +1,4 @@
-/* $Id: irixsig.c,v 1.3 1997/07/29 03:04:27 ralf Exp $
+/* $Id: irixsig.c,v 1.4 1997/08/05 09:43:10 ralf Exp $
* irixsig.c: WHEEE, IRIX signals! YOW, am I compatable or what?!?!
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 81ac4846d..2f29b0ca5 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -4,7 +4,7 @@
* Copyright (C) 1992 Linus Torvalds
* Copyright (C) 1994, 1995, 1996, 1997 Ralf Baechle
*
- * $Id: irq.c,v 1.4 1997/09/12 01:30:22 ralf Exp $
+ * $Id: irq.c,v 1.7 1997/09/26 11:51:33 ralf Exp $
*/
#include <linux/errno.h>
#include <linux/init.h>
@@ -86,8 +86,6 @@ void enable_irq(unsigned int irq_nr)
* fast ones, then the bad ones.
*/
extern void interrupt(void);
-extern void fast_interrupt(void);
-extern void bad_interrupt(void);
static struct irqaction *irq_action[32] = {
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -130,48 +128,45 @@ atomic_t __mips_bh_counter;
*/
asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
{
- struct irqaction * action = *(irq + irq_action);
- int do_random, cpu = smp_processor_id();
+ struct irqaction *action;
+ int do_random, cpu;
+ cpu = smp_processor_id();
irq_enter(cpu, irq);
kstat.interrupts[irq]++;
- /* slow interrupts run with interrupts enabled */
- sti();
- action = *(irq + irq_action);
- do_random = 0;
- while (action) {
- do_random |= action->flags;
- action->handler(irq, action->dev_id, regs);
- action = action->next;
- }
- if (do_random & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- irq_exit(cpu, irq);
-}
+ /*
+ * mask and ack quickly, we don't want the irq controller
+ * thinking we're snobs just because some other CPU has
+ * disabled global interrupts (we have already done the
+ * INT_ACK cycles, it's too late to try to pretend to the
+ * controller that we aren't taking the interrupt).
+ *
+ * Commented out because we've already done this in the
+ * machinespecific part of the handler. It's reasonable to
+ * do this here in a highlevel language though because that way
+ * we could get rid of a good part of duplicated code ...
+ */
+ /* mask_and_ack_irq(irq); */
-/*
- * do_fast_IRQ handles IRQ's that don't need the fancy interrupt return
- * stuff - the handler is also running with interrupts disabled unless
- * it explicitly enables them later.
- */
-asmlinkage void do_fast_IRQ(int irq)
-{
- struct irqaction * action;
- int do_random, cpu = smp_processor_id();
-
- irq_enter(cpu, irq);
- kstat.interrupts[irq]++;
action = *(irq + irq_action);
- do_random = 0;
- while (action) {
- do_random |= action->flags;
- action->handler(irq, action->dev_id, NULL);
- action = action->next;
+ if (action) {
+ if (!(action->flags & SA_INTERRUPT))
+ __sti();
+ action = *(irq + irq_action);
+ do_random = 0;
+ do {
+ do_random |= action->flags;
+ action->handler(irq, action->dev_id, regs);
+ action = action->next;
+ } while (action);
+ if (do_random & SA_SAMPLE_RANDOM)
+ add_interrupt_randomness(irq);
+ __cli();
}
- if (do_random & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
irq_exit(cpu, irq);
+
+ /* unmasking and bottom half handling is done magically for us. */
}
/*
@@ -211,10 +206,6 @@ int setup_x86_irq(int irq, struct irqaction * new)
*p = new;
if (!shared) {
- if (new->flags & SA_INTERRUPT)
- set_int_vector(irq,fast_interrupt);
- else
- set_int_vector(irq,interrupt);
unmask_irq(irq);
}
restore_flags(flags);
@@ -269,10 +260,8 @@ void free_irq(unsigned int irq, void *dev_id)
/* Found it - now free it */
save_and_cli(flags);
*p = action->next;
- if (!irq[irq_action]) {
+ if (!irq[irq_action])
mask_irq(irq);
- set_int_vector(irq, bad_interrupt);
- }
restore_flags(flags);
kfree(action);
return;
@@ -321,9 +310,5 @@ int probe_irq_off (unsigned long irqs)
__initfunc(void init_IRQ(void))
{
- int i;
-
- for (i = 0; i < 32 ; i++)
- set_int_vector(i, bad_interrupt);
irq_setup();
}
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 83712649c..3e8fc275d 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: mips_ksyms.c,v 1.2 1997/07/29 03:58:54 ralf Exp $
+ * $Id: mips_ksyms.c,v 1.4 1997/08/11 04:17:18 ralf Exp $
*/
#include <linux/config.h>
#include <linux/module.h>
@@ -62,11 +62,21 @@ EXPORT_SYMBOL(csum_partial_copy);
*/
EXPORT_SYMBOL(flush_page_to_ram);
EXPORT_SYMBOL(fd_cacheflush);
+EXPORT_SYMBOL(flush_cache_all);
/*
* Base address of ports for Intel style I/O.
*/
-EXPORT_SYMBOL(port_base);
+EXPORT_SYMBOL(mips_io_port_base);
+
+/*
+ * Architecture specific stuff.
+ */
+#ifdef CONFIG_MIPS_JAZZ
+EXPORT_SYMBOL(vdma_alloc);
+EXPORT_SYMBOL(vdma_free);
+EXPORT_SYMBOL(vdma_log2phys);
+#endif
#ifdef CONFIG_SGI
EXPORT_SYMBOL(hpc3c0);
diff --git a/arch/mips/kernel/pci.c b/arch/mips/kernel/pci.c
index 25ea56fdd..6f7374fd2 100644
--- a/arch/mips/kernel/pci.c
+++ b/arch/mips/kernel/pci.c
@@ -13,7 +13,9 @@
#include <linux/types.h>
#include <asm/pci.h>
-#ifndef CONFIG_PCI
+#ifdef CONFIG_PCI
+
+struct pci_ops *pci_ops;
/*
* BIOS32 replacement.
@@ -24,15 +26,13 @@ __initfunc(unsigned long pcibios_init(unsigned long memory_start,
return memory_start;
}
-#else /* defined(CONFIG_PCI) */
-
/*
* Following the generic parts of the MIPS BIOS32 code.
*/
int pcibios_present (void)
{
- return _pcibios_init != NULL;
+ return pci_ops != NULL;
}
/*
@@ -87,68 +87,46 @@ int pcibios_find_class (unsigned int class_code, unsigned short index,
* each PCI chipset configuration. We just run the hook to the machine
* specific implementation.
*/
-unsigned long (*_pcibios_init)(unsigned long memory_start, unsigned long memory_end);
-__initfunc(unsigned long pcibios_init(unsigned long memory_start,
- unsigned long memory_end))
-{
- return _pcibios_init ? _pcibios_init(memory_start, memory_end)
- : memory_start;
-}
-
-unsigned long (*_pcibios_fixup) (unsigned long memory_start,
- unsigned long memory_end);
unsigned long pcibios_fixup (unsigned long memory_start,
unsigned long memory_end)
{
- return _pcibios_fixup(memory_start, memory_end);
+ return pci_ops->pcibios_fixup(memory_start, memory_end);
}
-int (*_pcibios_read_config_byte) (unsigned char bus, unsigned char dev_fn,
- unsigned char where, unsigned char *val);
int pcibios_read_config_byte (unsigned char bus, unsigned char dev_fn,
unsigned char where, unsigned char *val)
{
- return _pcibios_read_config_byte(bus, dev_fn, where, val);
+ return pci_ops->pcibios_read_config_byte(bus, dev_fn, where, val);
}
-int (*_pcibios_read_config_word) (unsigned char bus, unsigned char dev_fn,
- unsigned char where, unsigned short *val);
int pcibios_read_config_word (unsigned char bus, unsigned char dev_fn,
unsigned char where, unsigned short *val)
{
- return _pcibios_read_config_word(bus, dev_fn, where, val);
+ return pci_ops->pcibios_read_config_word(bus, dev_fn, where, val);
}
-int (*_pcibios_read_config_dword) (unsigned char bus, unsigned char dev_fn,
- unsigned char where, unsigned int *val);
int pcibios_read_config_dword (unsigned char bus, unsigned char dev_fn,
unsigned char where, unsigned int *val)
{
- return _pcibios_read_config_dword(bus, dev_fn, where, val);
+ return pci_ops->pcibios_read_config_dword(bus, dev_fn, where, val);
}
-int (*_pcibios_write_config_byte) (unsigned char bus, unsigned char dev_fn,
- unsigned char where, unsigned char val);
int pcibios_write_config_byte (unsigned char bus, unsigned char dev_fn,
unsigned char where, unsigned char val)
{
- return _pcibios_write_config_byte(bus, dev_fn, where, val);
+ return pci_ops->pcibios_write_config_byte(bus, dev_fn, where, val);
}
-int (*_pcibios_write_config_word) (unsigned char bus, unsigned char dev_fn,
- unsigned char where, unsigned short val);
int pcibios_write_config_word (unsigned char bus, unsigned char dev_fn,
unsigned char where, unsigned short val)
{
- return _pcibios_write_config_word(bus, dev_fn, where, val);
+ return pci_ops->pcibios_write_config_word(bus, dev_fn, where, val);
}
-int (*_pcibios_write_config_dword) (unsigned char bus, unsigned char dev_fn,
- unsigned char where, unsigned int val);
int pcibios_write_config_dword (unsigned char bus, unsigned char dev_fn,
unsigned char where, unsigned int val)
{
- return _pcibios_write_config_dword(bus, dev_fn, where, val);
+ return pci_ops->pcibios_write_config_dword(bus, dev_fn, where, val);
}
#endif /* defined(CONFIG_PCI) */
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 0e2803dd3..2c454c019 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -5,11 +5,12 @@
*/
#include <linux/delay.h>
#include <linux/kernel.h>
+#include <linux/sched.h>
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
+#include <asm/processor.h>
+#include <asm/watch.h>
-unsigned long dflushes = 0;
-unsigned long iflushes = 0;
unsigned long unaligned_instructions;
/*
@@ -27,8 +28,15 @@ int get_cpuinfo(char *buffer)
const char *mach_dec_names[] = GROUP_DEC_NAMES;
const char *mach_arc_names[] = GROUP_ARC_NAMES;
const char *mach_sni_rm_names[] = GROUP_SNI_RM_NAMES;
- const char **mach_group_to_name[] = { mach_unknown_names, mach_jazz_names,
- mach_dec_names, mach_arc_names, mach_sni_rm_names};
+ const char *mach_acn_names[] = GROUP_ACN_NAMES;
+ const char *mach_sgi_names[] = GROUP_SGI_NAMES;
+ const char **mach_group_to_name[] = { mach_unknown_names,
+ mach_jazz_names,
+ mach_dec_names,
+ mach_arc_names,
+ mach_sni_rm_names,
+ mach_acn_names,
+ mach_sgi_names };
unsigned int version = read_32bit_cp0_register(CP0_PRID);
int len;
@@ -51,12 +59,16 @@ int get_cpuinfo(char *buffer)
#if defined (__MIPSEL__)
len += sprintf(buffer + len, "byteorder\t\t: little endian\n");
#endif
- len += sprintf(buffer + len, "D-cache flushes\t\t: %lu\n",
- dflushes);
- len += sprintf(buffer + len, "I-cache flushes\t\t: %lu\n",
- iflushes);
len += sprintf(buffer + len, "unaligned accesses\t: %lu\n",
unaligned_instructions);
+ len += sprintf(buffer + len, "wait instruction\t: %s\n",
+ wait_available ? "yes" : "no");
+ len += sprintf(buffer + len, "microsecond timers\t: %s\n",
+ cyclecounter_available ? "yes" : "no");
+ len += sprintf(buffer + len, "extra interrupt vector\t: %s\n",
+ dedicated_iv_available ? "yes" : "no");
+ len += sprintf(buffer + len, "hardware watchpoint\t: %s\n",
+ watch_available ? "yes" : "no");
return len;
}
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 3ffb9b258..6d28d6e98 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -70,10 +70,10 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
struct pt_regs * childregs;
long childksp;
- childksp = (unsigned long)p + KERNEL_STACK_SIZE - 8;
+ childksp = (unsigned long)p + KERNEL_STACK_SIZE - 32;
/* set up new TSS. */
- childregs = ((struct pt_regs *) ((unsigned long)p + KERNEL_STACK_SIZE)) - 1;
+ childregs = (struct pt_regs *) childksp - 1;
*childregs = *regs;
childregs->regs[7] = 0; /* Clear error flag */
if(current->personality == PER_LINUX) {
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S
index fc4e04617..6c699c74d 100644
--- a/arch/mips/kernel/r2300_fpu.S
+++ b/arch/mips/kernel/r2300_fpu.S
@@ -10,7 +10,7 @@
* Multi-arch abstraction and asm macros for easier reading:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r2300_fpu.S,v 1.2 1997/06/25 14:44:51 ralf Exp $
+ * $Id: r2300_fpu.S,v 1.3 1997/12/01 16:54:20 ralf Exp $
*/
#include <asm/asm.h>
#include <asm/fpregdef.h>
@@ -30,7 +30,7 @@
nop
cfc1 t0,fcr31
- /* Store the 16 odd double precision registers */
+ /* Store the 32 single precision registers */
swc1 $f0,(SC_FPREGS+0)(a0)
swc1 $f1,(SC_FPREGS+8)(a0)
swc1 $f2,(SC_FPREGS+16)(a0)
@@ -76,7 +76,8 @@
.set macro
END(r2300_save_fp_context)
-/* Restore fpu state:
+/*
+ * Restore fpu state:
* - fp gp registers
* - cp1 status/control register
*
@@ -91,7 +92,6 @@
bgez t0,1f
nop
- bgez t0,1f
lw t0,SC_FPC_CSR(a0)
/* Restore the 16 odd double precision registers only
* when enabled in the cp0 status register.
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index c5c519f4e..72638d462 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -10,7 +10,7 @@
* Multi-arch abstraction and asm macros for easier reading:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r4k_fpu.S,v 1.2 1997/06/25 14:44:52 ralf Exp $
+ * $Id: r4k_fpu.S,v 1.3 1997/12/01 16:56:06 ralf Exp $
*/
#include <asm/asm.h>
#include <asm/fpregdef.h>
@@ -21,7 +21,7 @@
.set noreorder
.set mips3
/* Save floating point context */
- LEAF(r4k_save_fp_context)
+LEAF(r4k_save_fp_context)
mfc0 t1,CP0_STATUS
sll t2,t1,2
bgez t2,2f
@@ -31,41 +31,41 @@
bgez t2,1f
nop
/* Store the 16 odd double precision registers */
- swc1 $f1,(SC_FPREGS+8)(a0)
- swc1 $f3,(SC_FPREGS+24)(a0)
- swc1 $f5,(SC_FPREGS+40)(a0)
- swc1 $f7,(SC_FPREGS+56)(a0)
- swc1 $f9,(SC_FPREGS+72)(a0)
- swc1 $f11,(SC_FPREGS+88)(a0)
- swc1 $f13,(SC_FPREGS+104)(a0)
- swc1 $f15,(SC_FPREGS+120)(a0)
- swc1 $f17,(SC_FPREGS+136)(a0)
- swc1 $f19,(SC_FPREGS+152)(a0)
- swc1 $f21,(SC_FPREGS+168)(a0)
- swc1 $f23,(SC_FPREGS+184)(a0)
- swc1 $f25,(SC_FPREGS+200)(a0)
- swc1 $f27,(SC_FPREGS+216)(a0)
- swc1 $f29,(SC_FPREGS+232)(a0)
- swc1 $f31,(SC_FPREGS+248)(a0)
+ sdc1 $f1,(SC_FPREGS+8)(a0)
+ sdc1 $f3,(SC_FPREGS+24)(a0)
+ sdc1 $f5,(SC_FPREGS+40)(a0)
+ sdc1 $f7,(SC_FPREGS+56)(a0)
+ sdc1 $f9,(SC_FPREGS+72)(a0)
+ sdc1 $f11,(SC_FPREGS+88)(a0)
+ sdc1 $f13,(SC_FPREGS+104)(a0)
+ sdc1 $f15,(SC_FPREGS+120)(a0)
+ sdc1 $f17,(SC_FPREGS+136)(a0)
+ sdc1 $f19,(SC_FPREGS+152)(a0)
+ sdc1 $f21,(SC_FPREGS+168)(a0)
+ sdc1 $f23,(SC_FPREGS+184)(a0)
+ sdc1 $f25,(SC_FPREGS+200)(a0)
+ sdc1 $f27,(SC_FPREGS+216)(a0)
+ sdc1 $f29,(SC_FPREGS+232)(a0)
+ sdc1 $f31,(SC_FPREGS+248)(a0)
/* Store the 16 even double precision registers */
1:
- swc1 $f0,(SC_FPREGS+0)(a0)
- swc1 $f2,(SC_FPREGS+16)(a0)
- swc1 $f4,(SC_FPREGS+32)(a0)
- swc1 $f6,(SC_FPREGS+48)(a0)
- swc1 $f8,(SC_FPREGS+64)(a0)
- swc1 $f10,(SC_FPREGS+80)(a0)
- swc1 $f12,(SC_FPREGS+96)(a0)
- swc1 $f14,(SC_FPREGS+112)(a0)
- swc1 $f16,(SC_FPREGS+128)(a0)
- swc1 $f18,(SC_FPREGS+144)(a0)
- swc1 $f20,(SC_FPREGS+160)(a0)
- swc1 $f22,(SC_FPREGS+176)(a0)
- swc1 $f24,(SC_FPREGS+192)(a0)
- swc1 $f26,(SC_FPREGS+208)(a0)
- swc1 $f28,(SC_FPREGS+224)(a0)
- swc1 $f30,(SC_FPREGS+240)(a0)
+ sdc1 $f0,(SC_FPREGS+0)(a0)
+ sdc1 $f2,(SC_FPREGS+16)(a0)
+ sdc1 $f4,(SC_FPREGS+32)(a0)
+ sdc1 $f6,(SC_FPREGS+48)(a0)
+ sdc1 $f8,(SC_FPREGS+64)(a0)
+ sdc1 $f10,(SC_FPREGS+80)(a0)
+ sdc1 $f12,(SC_FPREGS+96)(a0)
+ sdc1 $f14,(SC_FPREGS+112)(a0)
+ sdc1 $f16,(SC_FPREGS+128)(a0)
+ sdc1 $f18,(SC_FPREGS+144)(a0)
+ sdc1 $f20,(SC_FPREGS+160)(a0)
+ sdc1 $f22,(SC_FPREGS+176)(a0)
+ sdc1 $f24,(SC_FPREGS+192)(a0)
+ sdc1 $f26,(SC_FPREGS+208)(a0)
+ sdc1 $f28,(SC_FPREGS+224)(a0)
+ sdc1 $f30,(SC_FPREGS+240)(a0)
sw t1,SC_FPC_CSR(a0)
cfc1 t0,$0 # implementation/version
@@ -80,7 +80,8 @@
.set macro
END(r4k_save_fp_context)
-/* Restore fpu state:
+/*
+ * Restore fpu state:
* - fp gp registers
* - cp1 status/control register
*
@@ -88,7 +89,7 @@
* frame on the current content of c0_status, not on the content of the
* stack frame which might have been changed by the user.
*/
- LEAF(r4k_restore_fp_context)
+LEAF(r4k_restore_fp_context)
mfc0 t1,CP0_STATUS
sll t0,t1,2
bgez t0,2f
@@ -99,52 +100,46 @@
/* Restore the 16 odd double precision registers only
* when enabled in the cp0 status register.
*/
- lwc1 $f1,(SC_FPREGS+8)(a0)
- lwc1 $f3,(SC_FPREGS+24)(a0)
- lwc1 $f5,(SC_FPREGS+40)(a0)
- lwc1 $f7,(SC_FPREGS+56)(a0)
- lwc1 $f9,(SC_FPREGS+72)(a0)
- lwc1 $f11,(SC_FPREGS+88)(a0)
- lwc1 $f13,(SC_FPREGS+104)(a0)
- lwc1 $f15,(SC_FPREGS+120)(a0)
- lwc1 $f17,(SC_FPREGS+136)(a0)
- lwc1 $f19,(SC_FPREGS+152)(a0)
- lwc1 $f21,(SC_FPREGS+168)(a0)
- lwc1 $f23,(SC_FPREGS+184)(a0)
- lwc1 $f25,(SC_FPREGS+200)(a0)
- lwc1 $f27,(SC_FPREGS+216)(a0)
- lwc1 $f29,(SC_FPREGS+232)(a0)
- lwc1 $f31,(SC_FPREGS+248)(a0)
+ ldc1 $f1,(SC_FPREGS+8)(a0)
+ ldc1 $f3,(SC_FPREGS+24)(a0)
+ ldc1 $f5,(SC_FPREGS+40)(a0)
+ ldc1 $f7,(SC_FPREGS+56)(a0)
+ ldc1 $f9,(SC_FPREGS+72)(a0)
+ ldc1 $f11,(SC_FPREGS+88)(a0)
+ ldc1 $f13,(SC_FPREGS+104)(a0)
+ ldc1 $f15,(SC_FPREGS+120)(a0)
+ ldc1 $f17,(SC_FPREGS+136)(a0)
+ ldc1 $f19,(SC_FPREGS+152)(a0)
+ ldc1 $f21,(SC_FPREGS+168)(a0)
+ ldc1 $f23,(SC_FPREGS+184)(a0)
+ ldc1 $f25,(SC_FPREGS+200)(a0)
+ ldc1 $f27,(SC_FPREGS+216)(a0)
+ ldc1 $f29,(SC_FPREGS+232)(a0)
+ ldc1 $f31,(SC_FPREGS+248)(a0)
- /* Restore the 16 even double precision registers
+ /*
+ * Restore the 16 even double precision registers
* when cp1 was enabled in the cp0 status register.
*/
-1:
- lwc1 $f0,(SC_FPREGS+0)(a0)
- lwc1 $f2,(SC_FPREGS+16)(a0)
- lwc1 $f4,(SC_FPREGS+32)(a0)
- lwc1 $f6,(SC_FPREGS+48)(a0)
- lwc1 $f8,(SC_FPREGS+64)(a0)
- lwc1 $f10,(SC_FPREGS+80)(a0)
- lwc1 $f12,(SC_FPREGS+96)(a0)
- lwc1 $f14,(SC_FPREGS+112)(a0)
- lwc1 $f16,(SC_FPREGS+128)(a0)
- lwc1 $f18,(SC_FPREGS+144)(a0)
- lwc1 $f20,(SC_FPREGS+160)(a0)
- lwc1 $f22,(SC_FPREGS+176)(a0)
- lwc1 $f24,(SC_FPREGS+192)(a0)
- lwc1 $f26,(SC_FPREGS+208)(a0)
- lwc1 $f28,(SC_FPREGS+224)(a0)
- lwc1 $f30,(SC_FPREGS+240)(a0)
- ctc1 t0,fcr31
-
+1: ldc1 $f0,(SC_FPREGS+0)(a0)
+ ldc1 $f2,(SC_FPREGS+16)(a0)
+ ldc1 $f4,(SC_FPREGS+32)(a0)
+ ldc1 $f6,(SC_FPREGS+48)(a0)
+ ldc1 $f8,(SC_FPREGS+64)(a0)
+ ldc1 $f10,(SC_FPREGS+80)(a0)
+ ldc1 $f12,(SC_FPREGS+96)(a0)
+ ldc1 $f14,(SC_FPREGS+112)(a0)
+ ldc1 $f16,(SC_FPREGS+128)(a0)
+ ldc1 $f18,(SC_FPREGS+144)(a0)
+ ldc1 $f20,(SC_FPREGS+160)(a0)
+ ldc1 $f22,(SC_FPREGS+176)(a0)
+ ldc1 $f24,(SC_FPREGS+192)(a0)
+ ldc1 $f26,(SC_FPREGS+208)(a0)
+ ldc1 $f28,(SC_FPREGS+224)(a0)
+ ldc1 $f30,(SC_FPREGS+240)(a0)
jr ra
- .set nomacro
- nop
- .set macro
-2:
- jr ra
- .set nomacro
+ ctc1 t0,fcr31
+
+2: jr ra
nop
- .set macro
END(r4k_restore_fp_context)
diff --git a/arch/mips/kernel/r4k_misc.S b/arch/mips/kernel/r4k_misc.S
index 090b3109f..2e0223260 100644
--- a/arch/mips/kernel/r4k_misc.S
+++ b/arch/mips/kernel/r4k_misc.S
@@ -6,7 +6,7 @@
* Multi-cpu abstraction and reworking:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r4k_misc.S,v 1.2 1997/06/09 06:20:52 ralf Exp $
+ * $Id: r4k_misc.S,v 1.3 1997/09/07 04:51:07 ralf Exp $
*/
#include <asm/asm.h>
#include <asm/current.h>
diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
index 66d4fa848..db471fa96 100644
--- a/arch/mips/kernel/r6000_fpu.S
+++ b/arch/mips/kernel/r6000_fpu.S
@@ -10,7 +10,7 @@
* Multi-arch abstraction and asm macros for easier reading:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r6000_fpu.S,v 1.2 1997/06/25 14:44:52 ralf Exp $
+ * $Id: r6000_fpu.S,v 1.3 1997/12/01 16:56:56 ralf Exp $
*/
#include <asm/asm.h>
#include <asm/fpregdef.h>
@@ -44,18 +44,10 @@
sdc1 $f26,(SC_FPREGS+208)(a0)
sdc1 $f28,(SC_FPREGS+224)(a0)
sdc1 $f30,(SC_FPREGS+240)(a0)
- sw t0,SC_FPC_CSR(a0)
- cfc1 t0,$0 # implementation/version
-
- jr ra
- .set nomacro
- sw t0,SC_FPC_EIR(a0)
- .set macro
-1:
jr ra
- .set nomacro
+ sw t0,SC_FPC_CSR(a0)
+1: jr ra
nop
- .set macro
END(r6000_save_fp_context)
/* Restore fpu state:
@@ -89,14 +81,8 @@
ldc1 $f26,(SC_FPREGS+208)(a0)
ldc1 $f28,(SC_FPREGS+224)(a0)
ldc1 $f30,(SC_FPREGS+240)(a0)
-
jr ra
- .set nomacro
ctc1 t0,fcr31
- .set macro
-1:
- jr ra
- .set nomacro
+1: jr ra
nop
- .set macro
END(r6000_restore_fp_context)
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 3ebf269f5..a1932d117 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -5,7 +5,7 @@
* Copyright (C) 1995, 1996 Ralf Baechle
* Copyright (C) 1996 Stoned Elipot
*
- * $Id:$
+ * $Id: setup.c,v 1.4 1997/09/07 04:55:42 ralf Exp $
*/
#include <linux/config.h>
#include <linux/errno.h>
@@ -122,6 +122,12 @@ static char command_line[CL_SIZE] = { 0, };
void (*irq_setup)(void);
/*
+ * mips_io_port_base is the begin of the address space to which x86 style
+ * I/O ports are mapped.
+ */
+unsigned long mips_io_port_base;
+
+/*
* isa_slot_offset is the address where E(ISA) busaddress 0 is is mapped
* for the processor.
*/
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 4ff1a98b4..481a34147 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -4,7 +4,7 @@
* Copyright (C) 1991, 1992 Linus Torvalds
* Copyright (C) 1994, 1995, 1996 Ralf Baechle
*
- * $Id: signal.c,v 1.5 1997/09/12 01:30:24 ralf Exp $
+ * $Id: signal.c,v 1.8 1997/12/01 16:26:34 ralf Exp $
*/
#include <linux/config.h>
#include <linux/sched.h>
@@ -174,7 +174,7 @@ static void setup_frame(struct sigaction * sa, struct pt_regs *regs,
* Set up the return code ...
*
* .set noreorder
- * addiu sp,24
+ * addiu sp,0x20
* li v0,__NR_sigreturn
* syscall
* .set reorder
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 0a190e3ab..ffcf176e4 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -10,6 +10,8 @@
* TODO: Implement the compatibility syscalls.
* Don't waste that much memory for empty entries in the syscall
* table.
+ *
+ * $Id: syscall.c,v 1.4 1997/09/18 07:57:30 root Exp $
*/
#undef CONF_PRINT_SYSCALLS
#undef CONF_DEBUG_IRIX
@@ -84,15 +86,17 @@ asmlinkage int sys_idle(void)
current->counter = -100;
for (;;) {
/*
- * R4[236]00 have wait, R4[04]00 don't.
+ * R4[36]00 have wait, R4[04]00 don't.
* FIXME: We should save power by reducing the clock where
- * possible. Should help alot for battery powered
- * R4200/4300i systems.
+ * possible. Thiss will cut down the power consuption
+ * of R4200 systems to about 1/16th of normal, the
+ * same for logic clocked with the processor generated
+ * clocks.
*/
if (wait_available && !need_resched)
__asm__(".set\tmips3\n\t"
"wait\n\t"
- ".set\tmips0\n\t");
+ ".set\tmips0");
run_task_queue(&tq_scheduler);
schedule();
}
diff --git a/arch/mips/kernel/syscalls.h b/arch/mips/kernel/syscalls.h
index 3232af01c..159931b4b 100644
--- a/arch/mips/kernel/syscalls.h
+++ b/arch/mips/kernel/syscalls.h
@@ -5,9 +5,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
+ * Copyright (C) 1995, 1996 by Ralf Baechle
*
- * $Id: syscalls.h,v 1.6 1997/08/06 19:15:08 miguel Exp $
+ * $Id: syscalls.h,v 1.5 1997/09/11 01:57:38 ralf Exp $
*/
/*
@@ -210,5 +210,3 @@ SYS(sys_poll, 3)
SYS(sys_nfsservctl, 3)
SYS(sys_setresgid, 3) /* 4190 */
SYS(sys_getresgid, 3)
-SYS(sys_setresgid, 3) /* 4190 */
-SYS(sys_getresgid, 3)
diff --git a/arch/mips/kernel/sysmips.c b/arch/mips/kernel/sysmips.c
index e73598345..62f8687c0 100644
--- a/arch/mips/kernel/sysmips.c
+++ b/arch/mips/kernel/sysmips.c
@@ -7,7 +7,7 @@
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*
- * $Id: sysmips.c,v 1.2 1997/07/01 08:59:08 ralf Exp $
+ * $Id: sysmips.c,v 1.3 1997/07/18 06:26:02 ralf Exp $
*/
#include <linux/errno.h>
#include <linux/linkage.h>
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 886b9b35e..f2cbabd86 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -6,7 +6,7 @@
* This file contains the time handling details for PC-style clocks as
* found in some MIPS systems.
*
- * $Id: time.c,v 1.2 1997/07/01 08:59:08 ralf Exp $
+ * $Id: time.c,v 1.5 1997/11/12 12:12:12 ralf Exp $
*/
#include <linux/errno.h>
#include <linux/init.h>
@@ -39,7 +39,6 @@ extern volatile unsigned long lost_ticks;
/* Cycle counter value at the previous timer interrupt.. */
static unsigned int timerhi = 0, timerlo = 0;
-static char cyclecounter_available = 1;
/*
* On MIPS only R4000 and better have a cycle counter.
@@ -397,7 +396,7 @@ static inline unsigned long mktime(unsigned int year, unsigned int mon,
)*60 + sec; /* finally seconds */
}
-static char cyclecounter_available;
+char cyclecounter_available;
static inline void init_cycle_counter(void)
{
@@ -437,7 +436,9 @@ static inline void init_cycle_counter(void)
}
}
-static struct irqaction irq0 = { timer_interrupt, 0, 0, "timer", NULL, NULL};
+struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0,
+ "timer", NULL, NULL};
+
void (*board_time_init)(struct irqaction *irq);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 99ebc3aeb..fc0dd091c 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -8,7 +8,7 @@
* Copyright 1994, 1995, 1996, 1997 by Ralf Baechle
* Modified for R3000 by Paul M. Antoine, 1995, 1996
*
- * $Id: traps.c,v 1.3 1997/09/17 07:22:12 ralf Exp $
+ * $Id: traps.c,v 1.7 1997/12/01 16:33:28 ralf Exp $
*/
#include <linux/config.h>
#include <linux/init.h>
@@ -72,7 +72,8 @@ extern asmlinkage void handle_reserved(void);
static char *cpu_names[] = CPU_NAMES;
-unsigned int watch_available = 0;
+char watch_available = 0;
+char dedicated_iv_available = 0;
void (*ibe_board_handler)(struct pt_regs *regs);
void (*dbe_board_handler)(struct pt_regs *regs);
@@ -175,7 +176,7 @@ void die_if_kernel(const char * str, struct pt_regs * regs, long err)
return;
#endif
#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4)
- if (!(regs->cp0_status & 0x18))
+ if (regs->cp0_status & ST0_KSU == KSU_USER)
return;
#endif
console_verbose();
@@ -189,8 +190,6 @@ static void default_be_board_handler(struct pt_regs *regs)
/*
* Assume it would be too dangerous to continue ...
*/
- printk ("BE HANDLER\n");
- show_regs (regs);
force_sig(SIGBUS, current);
}
@@ -427,6 +426,40 @@ static inline void watch_init(unsigned long cputype)
}
}
+/*
+ * Some MIPS CPUs have a dedicated interrupt vector which reduces the
+ * interrupt processing overhead. Use it where available.
+ * FIXME: more CPUs than just the Nevada have this feature.
+ */
+static inline void setup_dedicated_int(void)
+{
+ extern void except_vec4(void);
+ switch(mips_cputype) {
+ case CPU_NEVADA:
+ memcpy((void *)(KSEG0 + 0x200), except_vec4, 8);
+ set_cp0_cause(CAUSEF_IV, CAUSEF_IV);
+ dedicated_iv_available = 1;
+ }
+}
+
+unsigned long exception_handlers[32];
+
+/*
+ * As a side effect of the way this is implemented we're limited
+ * to interrupt handlers in the address range from
+ * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ...
+ */
+void set_except_vector(int n, void *addr)
+{
+ unsigned handler = (unsigned long) addr;
+ exception_handlers[n] = handler;
+ if (n == 0 && dedicated_iv_available) {
+ *(volatile u32 *)(KSEG0+0x200) = 0x08000000 |
+ (0x03ffffff & (handler >> 2));
+ flush_icache_range(KSEG0+0x200, KSEG0 + 0x204);
+ }
+}
+
typedef asmlinkage int (*syscall_t)(void *a0,...);
asmlinkage int (*do_syscalls)(struct pt_regs *regs, syscall_t fun, int narg);
extern asmlinkage int r4k_do_syscalls(struct pt_regs *regs,
@@ -449,7 +482,8 @@ extern asmlinkage void r2300_resume(void *tsk);
__initfunc(void trap_init(void))
{
- extern char except_vec0_r4000, except_vec0_r4600, except_vec0_r2300;
+ extern char except_vec0_nevada, except_vec0_r4000;
+ extern char except_vec0_r4600, except_vec0_r2300;
extern char except_vec1_generic, except_vec2_generic;
extern char except_vec3_generic, except_vec3_r4000;
unsigned long i;
@@ -471,9 +505,11 @@ __initfunc(void trap_init(void))
set_except_vector(i, handle_reserved);
/*
- * Only some CPUs have the watch exception.
+ * Only some CPUs have the watch exceptions or a dedicated
+ * interrupt vector.
*/
watch_init(mips_cputype);
+ setup_dedicated_int();
/*
* Handling the following exceptions depends mostly of the cpu type
@@ -509,10 +545,12 @@ __initfunc(void trap_init(void))
case CPU_R4600:
case CPU_R5000:
case CPU_NEVADA:
- if(mips_cputype != CPU_R4600)
- memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
- else
+ if(mips_cputype == CPU_NEVADA) {
+ memcpy((void *)KSEG0, &except_vec0_nevada, 0x80);
+ } else if (mips_cputype == CPU_R4600)
memcpy((void *)KSEG0, &except_vec0_r4600, 0x80);
+ else
+ memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
/*
* The idea is that this special r4000 general exception
@@ -611,5 +649,5 @@ __initfunc(void trap_init(void))
default:
panic("Unknown CPU type");
}
- flush_cache_all();
+ flush_icache_range(KSEG0, KSEG0 + 0x200);
}
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 696244b6c..ea81ba7db 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -407,11 +407,11 @@ do_ade(struct pt_regs *regs)
{
register_t pc = regs->cp0_epc;
register_t badvaddr __attribute__ ((unused)) = regs->cp0_badvaddr;
- char *adels;
+ char adels;
lock_kernel();
adels = (((regs->cp0_cause & CAUSEF_EXCCODE) >>
- CAUSEB_EXCCODE) == 4) ? "adel" : "ades";
+ CAUSEB_EXCCODE) == 4) ? 'l' : 's';
#ifdef CONF_NO_UNALIGNED_KERNEL_ACCESS
/*
@@ -420,13 +420,8 @@ do_ade(struct pt_regs *regs)
*/
if (kernel_address(badvaddr) && !user_mode(regs)) {
show_regs(regs);
-#ifdef __mips64
- panic("Caught %s exception in kernel mode accessing %016Lx.",
- adels, badvaddr);
-#else
- panic("Caught %s exception in kernel mode accessing %08lx.",
- adels, badvaddr);
-#endif
+ panic("Caught adel%c exception in kernel mode accessing %08lx.",
+ adels, badvaddr);
}
#endif /* CONF_NO_UNALIGNED_KERNEL_ACCESS */
@@ -435,15 +430,9 @@ do_ade(struct pt_regs *regs)
register_t logpc = pc;
if (regs->cp0_cause & CAUSEF_BD)
logpc += 4;
-#ifdef __mips64
- printk(KERN_DEBUG
- "Caught %s in '%s' at 0x%016Lx accessing 0x%016Lx.\n",
- adels, current->comm, logpc, regs->cp0_badvaddr);
-#else
printk(KERN_DEBUG
- "Caught %s in '%s' at 0x%08lx accessing 0x%08lx.\n",
+ "Caught adel%c in '%s' at 0x%08lx accessing 0x%08lx.\n",
adels, current->comm, logpc, regs->cp0_badvaddr);
-#endif
}
#endif /* CONF_LOG_UNALIGNED_ACCESSES */
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 32afe92dd..fd706165c 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -14,8 +14,8 @@
$(CC) $(CFLAGS) -c $< -o $*.o
L_TARGET = lib.a
-L_OBJS = beep.o checksum.o copy_user.o csum.o dump_tlb.o io.o memset.o \
- memcpy.o strlen_user.o strncpy_user.o tags.o watch.o
+L_OBJS = beep.o checksum.o copy_user.o csum.o dump_tlb.o memset.o memcpy.o \
+ strlen_user.o strncpy_user.o tags.o watch.o
ifdef CONFIG_DECSTATION
L_OBJS += pmaxcon.o pmaxio.o
diff --git a/arch/mips/lib/checksum.c b/arch/mips/lib/checksum.c
index d48dbb245..f3ef6295c 100644
--- a/arch/mips/lib/checksum.c
+++ b/arch/mips/lib/checksum.c
@@ -5,7 +5,7 @@
*
* MIPS specific IP/TCP/UDP checksumming routines
*
- * Authors: Ralf Baechle, <ralf@gnu.ai.mit.edu>
+ * Authors: Ralf Baechle, <ralf@waldorf-gmbh.de>
* Lots of code moved from tcp.c and ip.c; see those files
* for more names.
*
@@ -14,7 +14,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
- * $Id:$
+ * $Id: checksum.c,v 1.2 1997/07/29 18:37:35 ralf Exp $
*/
#include <net/checksum.h>
#include <linux/types.h>
diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c
index c4b4258b7..1c166b661 100644
--- a/arch/mips/mm/loadmmu.c
+++ b/arch/mips/mm/loadmmu.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: loadmmu.c,v 1.1.1.1 1997/06/01 03:16:38 ralf Exp $
+ * $Id: loadmmu.c,v 1.3 1997/09/19 08:44:20 ralf Exp $
*/
#include <linux/kernel.h>
@@ -29,6 +29,10 @@ void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
void (*flush_cache_sigtramp)(unsigned long addr);
void (*flush_page_to_ram)(unsigned long page);
+/* DMA cache operations. */
+void (*flush_cache_pre_dma_out)(unsigned long start, unsigned long size);
+void (*flush_cache_post_dma_in)(unsigned long start, unsigned long size);
+
/* TLB operations. */
void (*flush_tlb_all)(void);
void (*flush_tlb_mm)(struct mm_struct *mm);
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index 7ac80eb46..9444207a4 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -3,7 +3,13 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r4xx0.c,v 1.7 1997/09/12 01:30:27 ralf Exp $
+ * $Id: r4xx0.c,v 1.9 1997/12/01 16:17:58 ralf Exp $
+ *
+ * To do:
+ *
+ * - this code is a overbloated pig
+ * - many of the bug workarounds are not efficient at all, but at
+ * least they are functional ...
*/
#include <linux/config.h>
@@ -118,7 +124,7 @@ static void r4k_clear_page_d32(unsigned long page)
* IDT R4600 V1.7 errata:
*
* 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
- * Hit_Invalidate_D and Create_Dirty_Exclusive_D should only be
+ * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
* executed if there is no other dcache activity. If the dcache is
* accessed for another instruction immeidately preceding when these
* cache instructions are executing, it is possible that the dcache
@@ -177,6 +183,44 @@ static void r4k_clear_page_r4600_v1(unsigned long page)
}
/*
+ * And this one is for the R4600 V2.0
+ */
+static void r4k_clear_page_r4600_v2(unsigned long page)
+{
+ unsigned int flags;
+
+ save_and_cli(flags);
+ *(volatile unsigned int *)KSEG1;
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ ".set\tmips3\n\t"
+ "daddiu\t$1,%0,%2\n"
+ "1:\tcache\t%3,(%0)\n\t"
+ "sd\t$0,(%0)\n\t"
+ "sd\t$0,8(%0)\n\t"
+ "sd\t$0,16(%0)\n\t"
+ "sd\t$0,24(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "cache\t%3,-32(%0)\n\t"
+ "sd\t$0,-32(%0)\n\t"
+ "sd\t$0,-24(%0)\n\t"
+ "sd\t$0,-16(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sd\t$0,-8(%0)\n\t"
+ ".set\tmips0\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (page)
+ :"0" (page),
+ "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_D)
+ :"$1","memory");
+ restore_flags(flags);
+}
+
+
+/*
* This is still inefficient. We only can do better if we know the
* virtual address where the copy will be accessed.
*/
@@ -365,6 +409,74 @@ static void r4k_copy_page_r4600_v1(unsigned long to, unsigned long from)
"i" (Create_Dirty_Excl_D));
}
+static void r4k_copy_page_r4600_v2(unsigned long to, unsigned long from)
+{
+ unsigned long dummy1, dummy2;
+ unsigned long reg1, reg2, reg3, reg4;
+ unsigned int flags;
+
+ __save_and_cli(flags);
+ __asm__ __volatile__(
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ ".set\tmips3\n\t"
+ "daddiu\t$1,%0,%8\n"
+ "1:\tnop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "\tcache\t%9,(%0)\n\t"
+ "lw\t%2,(%1)\n\t"
+ "lw\t%3,4(%1)\n\t"
+ "lw\t%4,8(%1)\n\t"
+ "lw\t%5,12(%1)\n\t"
+ "sw\t%2,(%0)\n\t"
+ "sw\t%3,4(%0)\n\t"
+ "sw\t%4,8(%0)\n\t"
+ "sw\t%5,12(%0)\n\t"
+ "lw\t%2,16(%1)\n\t"
+ "lw\t%3,20(%1)\n\t"
+ "lw\t%4,24(%1)\n\t"
+ "lw\t%5,28(%1)\n\t"
+ "sw\t%2,16(%0)\n\t"
+ "sw\t%3,20(%0)\n\t"
+ "sw\t%4,24(%0)\n\t"
+ "sw\t%5,28(%0)\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "cache\t%9,32(%0)\n\t"
+ "daddiu\t%0,64\n\t"
+ "daddiu\t%1,64\n\t"
+ "lw\t%2,-32(%1)\n\t"
+ "lw\t%3,-28(%1)\n\t"
+ "lw\t%4,-24(%1)\n\t"
+ "lw\t%5,-20(%1)\n\t"
+ "sw\t%2,-32(%0)\n\t"
+ "sw\t%3,-28(%0)\n\t"
+ "sw\t%4,-24(%0)\n\t"
+ "sw\t%5,-20(%0)\n\t"
+ "lw\t%2,-16(%1)\n\t"
+ "lw\t%3,-12(%1)\n\t"
+ "lw\t%4,-8(%1)\n\t"
+ "lw\t%5,-4(%1)\n\t"
+ "sw\t%2,-16(%0)\n\t"
+ "sw\t%3,-12(%0)\n\t"
+ "sw\t%4,-8(%0)\n\t"
+ "bne\t$1,%0,1b\n\t"
+ "sw\t%5,-4(%0)\n\t"
+ ".set\tmips0\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ :"=r" (dummy1), "=r" (dummy2),
+ "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
+ :"0" (to), "1" (from),
+ "I" (PAGE_SIZE),
+ "i" (Create_Dirty_Excl_D));
+ restore_flags(flags);
+}
+
/*
* If you think for one second that this stuff coming up is a lot
* of bulky code eating too many kernel cache lines. Think _again_.
@@ -1437,7 +1549,8 @@ static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
pte_t *ptep;
int text;
- /* If ownes no valid ASID yet, cannot possibly have gotten
+ /*
+ * If ownes no valid ASID yet, cannot possibly have gotten
* this page into the cache.
*/
if(mm->context == 0)
@@ -1768,7 +1881,9 @@ static void r4k_flush_page_to_ram_d32i32(unsigned long page)
}
/*
- * R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Invalidate_D,
+ * Writeback and invalidate the primary cache dcache before DMA.
+ *
+ * R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
* Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
* operate correctly if the internal data cache refill buffer is empty. These
* CACHE instructions should be separated from any potential data cache miss
@@ -1776,6 +1891,104 @@ static void r4k_flush_page_to_ram_d32i32(unsigned long page)
* (Revision 2.0 device errata from IDT available on http://www.idt.com/
* in .pdf format.)
*/
+static void
+r4k_flush_cache_pre_dma_out_pc(unsigned long addr, unsigned long size)
+{
+ unsigned long end, a;
+ unsigned int cmode, flags;
+
+ cmode = read_32bit_cp0_register(CP0_CONFIG) & CONFIG_CM_CMASK;
+ if (cmode == CONFIG_CM_CACHABLE_WA ||
+ cmode == CONFIG_CM_CACHABLE_NO_WA) {
+ /* primary dcache is writethrough, therefore memory
+ is already consistent with the caches. */
+ return;
+ }
+
+ if (size >= dcache_size) {
+ flush_cache_all();
+ return;
+ }
+
+ /* Workaround for R4600 bug. See comment above. */
+ save_and_cli(flags);
+ *(volatile unsigned long *)KSEG1;
+
+ a = addr & ~(dc_lsize - 1);
+ end = (addr + size) & ~(dc_lsize - 1);
+ while (1) {
+ flush_dcache_line(a); /* Hit_Writeback_Inv_D */
+ if (a == end) break;
+ a += dc_lsize;
+ }
+ restore_flags(flags);
+}
+
+static void
+r4k_flush_cache_pre_dma_out_sc(unsigned long addr, unsigned long size)
+{
+ unsigned long end;
+ unsigned long a;
+
+ if (size >= scache_size) {
+ flush_cache_all();
+ return;
+ }
+
+ a = addr & ~(sc_lsize - 1);
+ end = (addr + size) & ~(sc_lsize - 1);
+ while (1) {
+ flush_scache_line(addr); /* Hit_Writeback_Inv_SD */
+ if (addr == end) break;
+ addr += sc_lsize;
+ }
+ r4k_flush_cache_pre_dma_out_pc(addr, size);
+}
+
+static void
+r4k_flush_cache_post_dma_in_pc(unsigned long addr, unsigned long size)
+{
+ unsigned long end;
+ unsigned long a;
+
+ if (size >= dcache_size) {
+ flush_cache_all();
+ return;
+ }
+
+ /* Workaround for R4600 bug. See comment above. */
+ *(volatile unsigned long *)KSEG1;
+
+ a = addr & ~(dc_lsize - 1);
+ end = (addr + size) & ~(dc_lsize - 1);
+ while (1) {
+ invalidate_dcache_line(a); /* Hit_Invalidate_D */
+ if (a == end) break;
+ a += dc_lsize;
+ }
+}
+
+static void
+r4k_flush_cache_post_dma_in_sc(unsigned long addr, unsigned long size)
+{
+ unsigned long end;
+ unsigned long a;
+
+ if (size >= scache_size) {
+ flush_cache_all();
+ return;
+ }
+
+ a = addr & ~(sc_lsize - 1);
+ end = (addr + size) & ~(sc_lsize - 1);
+ while (1) {
+ invalidate_scache_line(addr); /* Hit_Invalidate_SD */
+ if (addr == end) break;
+ addr += sc_lsize;
+ }
+ r4k_flush_cache_pre_dma_out_pc(addr, size);
+}
+
static void r4k_flush_page_to_ram_d32i32_r4600(unsigned long page)
{
page &= PAGE_MASK;
@@ -1785,19 +1998,12 @@ static void r4k_flush_page_to_ram_d32i32_r4600(unsigned long page)
#ifdef DEBUG_CACHE
printk("r4600_cram[%08lx]", page);
#endif
- /*
- * Workaround for R4600 bug. Explanation see above.
- */
- *(volatile unsigned long *)KSEG1;
-
save_and_cli(flags);
blast_dcache32_page(page);
#ifdef CONFIG_SGI
{
unsigned long tmp1, tmp2;
- /*
- * SGI goo. Have to check this closer ...
- */
+
__asm__ __volatile__("
.set noreorder
.set mips3
@@ -1834,18 +2040,41 @@ static void r4k_flush_page_to_ram_d32i32_r4600(unsigned long page)
*/
static void r4k_flush_cache_sigtramp(unsigned long addr)
{
- addr &= ~(dc_lsize - 1);
- __asm__ __volatile__("nop;nop;nop;nop");
- protected_writeback_dcache_line(addr);
- protected_writeback_dcache_line(addr + dc_lsize);
- protected_flush_icache_line(addr);
- protected_flush_icache_line(addr + dc_lsize);
+ unsigned long daddr, iaddr;
+
+ daddr = addr & ~(dc_lsize - 1);
+ __asm__ __volatile__("nop;nop;nop;nop"); /* R4600 V1.7 */
+ protected_writeback_dcache_line(daddr);
+ protected_writeback_dcache_line(daddr + dc_lsize);
+ iaddr = addr & ~(ic_lsize - 1);
+ protected_flush_icache_line(iaddr);
+ protected_flush_icache_line(iaddr + ic_lsize);
+}
+
+static void r4600v20k_flush_cache_sigtramp(unsigned long addr)
+{
+ unsigned long daddr, iaddr;
+ unsigned int flags;
+
+ daddr = addr & ~(dc_lsize - 1);
+ save_and_cli(flags);
+
+ /* Clear internal cache refill buffer */
+ *(volatile unsigned int *)KSEG1;
+
+ protected_writeback_dcache_line(daddr);
+ protected_writeback_dcache_line(daddr + dc_lsize);
+ iaddr = addr & ~(ic_lsize - 1);
+ protected_flush_icache_line(iaddr);
+ protected_flush_icache_line(iaddr + ic_lsize);
+ restore_flags(flags);
}
#undef DEBUG_TLB
#undef DEBUG_TLBUPDATE
#define NTLB_ENTRIES 48 /* Fixed on all R4XX0 variants... */
+
#define NTLB_ENTRIES_HALF 24 /* Fixed on all R4XX0 variants... */
static inline void r4k_flush_tlb_all(void)
@@ -1866,7 +2095,7 @@ static inline void r4k_flush_tlb_all(void)
set_entrylo1(0);
BARRIER;
- entry = get_wired();
+ entry = 0;
/* Blast 'em all away. */
while(entry < NTLB_ENTRIES) {
@@ -1953,7 +2182,7 @@ static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
int oldpid, newpid, idx;
#ifdef DEBUG_TLB
- printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
+ printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
#endif
newpid = (vma->vm_mm->context & 0xff);
page &= (PAGE_MASK << 1);
@@ -2132,37 +2361,6 @@ static void r4k_show_regs(struct pt_regs * regs)
printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\n",
regs->cp0_epc, regs->cp0_status, regs->cp0_cause);
}
-
-static void r4k_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
- unsigned long entryhi, unsigned long pagemask)
-{
- unsigned long flags;
- unsigned long wired;
- unsigned long old_pagemask;
- unsigned long old_ctx;
-
- save_and_cli(flags);
- /* Save old context and create impossible VPN2 value */
- old_ctx = (get_entryhi() & 0xff);
- old_pagemask = get_pagemask();
- wired = get_wired();
- set_wired (wired + 1);
- set_index (wired);
- BARRIER;
- set_pagemask (pagemask);
- set_entryhi(entryhi);
- set_entrylo0(entrylo0);
- set_entrylo1(entrylo1);
- BARRIER;
- tlb_write_indexed();
- BARRIER;
-
- set_entryhi(old_ctx);
- BARRIER;
- set_pagemask (old_pagemask);
- flush_tlb_all();
- restore_flags(flags);
-}
/* Detect and size the various r4k caches. */
static void probe_icache(unsigned long config)
@@ -2417,6 +2615,8 @@ static int probe_scache(unsigned long config)
static void setup_noscache_funcs(void)
{
+ unsigned int prid;
+
switch(dc_lsize) {
case 16:
clear_page = r4k_clear_page_d16;
@@ -2428,9 +2628,13 @@ static void setup_noscache_funcs(void)
flush_page_to_ram = r4k_flush_page_to_ram_d16i16;
break;
case 32:
- if ((read_32bit_cp0_register(CP0_PRID) & 0xfff0) == 0x2010) {
+ prid = read_32bit_cp0_register(CP0_PRID) & 0xfff0;
+ if (prid == 0x2010) { /* R4600 V1.7 */
clear_page = r4k_clear_page_r4600_v1;
copy_page = r4k_copy_page_r4600_v1;
+ } else if (prid == 0x2020) { /* R4600 V2.0 */
+ clear_page = r4k_clear_page_r4600_v2;
+ copy_page = r4k_copy_page_r4600_v2;
} else {
clear_page = r4k_clear_page_d32;
copy_page = r4k_copy_page_d32;
@@ -2442,6 +2646,8 @@ static void setup_noscache_funcs(void)
flush_page_to_ram = r4k_flush_page_to_ram_d32i32;
break;
}
+ flush_cache_pre_dma_out = r4k_flush_cache_pre_dma_out_pc;
+ flush_cache_post_dma_in = r4k_flush_cache_post_dma_in_pc;
}
static void setup_scache_funcs(void)
@@ -2534,6 +2740,10 @@ static void setup_scache_funcs(void)
};
break;
}
+
+ /* XXX Do these for Indy style caches also. No need for now ... */
+ flush_cache_pre_dma_out = r4k_flush_cache_pre_dma_out_sc;
+ flush_cache_post_dma_in = r4k_flush_cache_post_dma_in_sc;
}
typedef int (*probe_func_t)(unsigned long);
@@ -2600,6 +2810,9 @@ void ld_mmu_r4xx0(void)
/* XXX Handle true second level cache w/ split I/D */
flush_cache_sigtramp = r4k_flush_cache_sigtramp;
+ if ((read_32bit_cp0_register(CP0_PRID) & 0xfff0) == 0x2020) {
+ flush_cache_sigtramp = r4600v20k_flush_cache_sigtramp;
+ }
flush_tlb_all = r4k_flush_tlb_all;
flush_tlb_mm = r4k_flush_tlb_mm;
diff --git a/arch/mips/sgi/kernel/indyIRQ.S b/arch/mips/sgi/kernel/indyIRQ.S
index a8a4c764a..3820a172d 100644
--- a/arch/mips/sgi/kernel/indyIRQ.S
+++ b/arch/mips/sgi/kernel/indyIRQ.S
@@ -1,4 +1,4 @@
-/* $Id: indyIRQ.S,v 1.5 1996/06/29 12:41:12 dm Exp $
+/* $Id: indyIRQ.S,v 1.2 1997/09/20 19:20:14 root Exp $
* indyIRQ.S: Interrupt exception dispatch code for FullHouse and
* Guiness.
*
@@ -72,7 +72,7 @@
jal indy_timer_interrupt
nop # delay slot
- j ret_from_sys_call
+ j ret_from_irq
nop # delay slot
1:
@@ -83,7 +83,7 @@
jal indy_local0_irqdispatch
move a0, sp # delay slot
- j ret_from_sys_call
+ j ret_from_irq
nop # delay slot
1:
@@ -95,7 +95,7 @@
jal indy_local1_irqdispatch
nop
- j ret_from_sys_call
+ j ret_from_irq
nop
1:
@@ -107,7 +107,7 @@
jal indy_buserror_irq
nop
- j ret_from_sys_call
+ j ret_from_irq
nop
1:
@@ -124,6 +124,6 @@
jal indy_8254timer_irq
nop
1:
- j ret_from_sys_call
+ j ret_from_irq
nop
END(indyIRQ)
diff --git a/arch/mips/sgi/kernel/indy_int.c b/arch/mips/sgi/kernel/indy_int.c
index 343a71f9e..01b065359 100644
--- a/arch/mips/sgi/kernel/indy_int.c
+++ b/arch/mips/sgi/kernel/indy_int.c
@@ -4,7 +4,7 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: indy_int.c,v 1.3 1997/08/26 04:34:55 miguel Exp $
+ * $Id: indy_int.c,v 1.4 1997/09/20 19:20:15 root Exp $
*/
#include <linux/config.h>
@@ -269,46 +269,49 @@ atomic_t __mips_bh_counter;
*/
asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
{
- struct irqaction * action = *(irq + irq_action);
- int cpu = smp_processor_id ();
-
- lock_kernel();
- irq_enter (cpu, irq);
- kstat.interrupts[irq]++;
- printk("Got irq %d, press a key.", irq);
- prom_getchar();
- romvec->imode();
- while (action) {
- if (action->flags & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- action->handler(irq, action->dev_id, regs);
- action = action->next;
- }
- irq_exit (cpu, irq);
- unlock_kernel();
-}
+ struct irqaction *action;
+ int do_random, cpu;
-/*
- * do_fast_IRQ handles IRQ's that don't need the fancy interrupt return
- * stuff - the handler is also running with interrupts disabled unless
- * it explicitly enables them later.
- */
-asmlinkage void do_fast_IRQ(int irq)
-{
- struct irqaction * action = *(irq + irq_action);
+ cpu = smp_processor_id();
+ irq_enter(cpu, irq);
+ kstat.interrupts[irq]++;
- lock_kernel();
printk("Got irq %d, press a key.", irq);
prom_getchar();
romvec->imode();
- kstat.interrupts[irq]++;
- while (action) {
- if (action->flags & SA_SAMPLE_RANDOM)
+
+ /*
+ * mask and ack quickly, we don't want the irq controller
+ * thinking we're snobs just because some other CPU has
+ * disabled global interrupts (we have already done the
+ * INT_ACK cycles, it's too late to try to pretend to the
+ * controller that we aren't taking the interrupt).
+ *
+ * Commented out because we've already done this in the
+ * machinespecific part of the handler. It's reasonable to
+ * do this here in a highlevel language though because that way
+ * we could get rid of a good part of duplicated code ...
+ */
+ /* mask_and_ack_irq(irq); */
+
+ action = *(irq + irq_action);
+ if (action) {
+ if (!(action->flags & SA_INTERRUPT))
+ __sti();
+ action = *(irq + irq_action);
+ do_random = 0;
+ do {
+ do_random |= action->flags;
+ action->handler(irq, action->dev_id, regs);
+ action = action->next;
+ } while (action);
+ if (do_random & SA_SAMPLE_RANDOM)
add_interrupt_randomness(irq);
- action->handler(irq, action->dev_id, NULL);
- action = action->next;
- }
- unlock_kernel();
+ __cli();
+ }
+ irq_exit(cpu, irq);
+
+ /* unmasking and bottom half handling is done magically for us. */
}
int request_local_irq(unsigned int lirq, void (*func)(int, void *, struct pt_regs *),
@@ -415,10 +418,6 @@ void free_irq(unsigned int irq, void *dev_id)
void init_IRQ(void)
{
- int i;
-
- for (i = 0; i < 16 ; i++)
- set_int_vector(i, 0);
irq_setup();
}
diff --git a/arch/mips/sgi/kernel/indy_timer.c b/arch/mips/sgi/kernel/indy_timer.c
index d0ba84929..4b7bfd941 100644
--- a/arch/mips/sgi/kernel/indy_timer.c
+++ b/arch/mips/sgi/kernel/indy_timer.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: indy_timer.c,v 1.2 1997/07/01 09:00:59 ralf Exp $
+ * $Id: indy_timer.c,v 1.3 1997/08/11 04:37:09 ralf Exp $
*/
#include <linux/errno.h>
diff --git a/arch/mips/sgi/kernel/setup.c b/arch/mips/sgi/kernel/setup.c
index c84a28aaa..982319bc2 100644
--- a/arch/mips/sgi/kernel/setup.c
+++ b/arch/mips/sgi/kernel/setup.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: setup.c,v 1.4 1997/09/11 08:13:11 shaver Exp $
+ * $Id: setup.c,v 1.5 1997/09/13 02:19:18 ralf Exp $
*/
#include <linux/kernel.h>
#include <linux/sched.h>
diff --git a/arch/mips/sgi/kernel/system.c b/arch/mips/sgi/kernel/system.c
index 769eb733d..affb009f2 100644
--- a/arch/mips/sgi/kernel/system.c
+++ b/arch/mips/sgi/kernel/system.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: system.c,v 1.2 1997/07/01 08:51:04 ralf Exp $
+ * $Id: system.c,v 1.3 1997/09/13 02:19:18 ralf Exp $
*/
#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/arch/mips/sni/hw-access.c b/arch/mips/sni/hw-access.c
index 5ffa6fdd9..5bc31e103 100644
--- a/arch/mips/sni/hw-access.c
+++ b/arch/mips/sni/hw-access.c
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: hw-access.c,v 1.2 1997/07/23 17:41:07 ralf Exp $
+ * $Id: hw-access.c,v 1.3 1997/07/29 17:46:46 ralf Exp $
*/
#include <linux/delay.h>
#include <linux/kbdcntrlr.h>
@@ -47,69 +47,69 @@ fd_outb(unsigned char value, unsigned int port)
* How to access the floppy DMA functions.
*/
static void
-fd_enable_dma(void)
+fd_enable_dma(int channel)
{
- enable_dma(FLOPPY_DMA);
+ enable_dma(channel);
}
static void
-fd_disable_dma(void)
+fd_disable_dma(int channel)
{
- disable_dma(FLOPPY_DMA);
+ disable_dma(channel);
}
static int
-fd_request_dma(void)
+fd_request_dma(int channel)
{
- return request_dma(FLOPPY_DMA, "floppy");
+ return request_dma(channel, "floppy");
}
static void
-fd_free_dma(void)
+fd_free_dma(int channel)
{
- free_dma(FLOPPY_DMA);
+ free_dma(channel);
}
static void
-fd_clear_dma_ff(void)
+fd_clear_dma_ff(int channel)
{
- clear_dma_ff(FLOPPY_DMA);
+ clear_dma_ff(channel);
}
static void
-fd_set_dma_mode(char mode)
+fd_set_dma_mode(int channel, char mode)
{
- set_dma_mode(FLOPPY_DMA, mode);
+ set_dma_mode(channel, mode);
}
static void
-fd_set_dma_addr(unsigned int addr)
+fd_set_dma_addr(int channel, unsigned int addr)
{
- set_dma_addr(FLOPPY_DMA, addr);
+ set_dma_addr(channel, addr);
}
static void
-fd_set_dma_count(unsigned int count)
+fd_set_dma_count(int channel, unsigned int count)
{
- set_dma_count(FLOPPY_DMA, count);
+ set_dma_count(channel, count);
}
static int
-fd_get_dma_residue(void)
+fd_get_dma_residue(int channel)
{
- return get_dma_residue(FLOPPY_DMA);
+ return get_dma_residue(channel);
}
static void
-fd_enable_irq(void)
+fd_enable_irq(int irq)
{
- enable_irq(FLOPPY_IRQ);
+ enable_irq(irq);
}
static void
-fd_disable_irq(void)
+fd_disable_irq(int irq)
{
- disable_irq(FLOPPY_IRQ);
+ disable_irq(irq);
}
void
diff --git a/arch/mips/sni/int-handler.S b/arch/mips/sni/int-handler.S
index d051c8b13..b69c44bf8 100644
--- a/arch/mips/sni/int-handler.S
+++ b/arch/mips/sni/int-handler.S
@@ -2,6 +2,8 @@
* SNI RM200 PCI specific interrupt handler code.
*
* Copyright (C) 1994 - 1997 by Ralf Baechle
+ *
+ * $Id: int-handler.S,v 1.3 1997/12/01 16:39:24 ralf Exp $
*/
#include <asm/asm.h>
#include <linux/config.h>
@@ -18,18 +20,77 @@
SAVE_ALL
REG_S sp,PT_OR2(sp)
CLI
- /*
- * Asume we received an interrupt from the PCI ASIC.
- */
.set at
- lui s0,%hi(SNI_PORT_BASE)
+
+ lb t0,led_cache
+ addiu t0,1
+ sb t0,led_cache
+ sb t0,PCIMT_CSLED
+ .data
+led_cache: .byte 0
+ .text
+
+ mfc0 t0,CP0_STATUS
+ mfc0 t1,CP0_CAUSE
+ and t0,t1
+
+ andi t1,t0,0x0800 # hardware interrupt 1
+ bnez t1,hwint1
+ andi t1,t0,0x4000 # hardware interrupt 4
+ bnez t1,eth_int
+
+ andi t1,t0,0x1000 # hardware interrupt 2
+ bnez t1,hwint2
+ andi t1,t0,0x2000 # hardware interrupt 3
+ bnez t1,hwint3
+ andi t1,t0,0x8000 # hardware interrupt 5
+ bnez t1,hwint5
+ andi t1,t0,0x0400 # hardware interrupt 0
+ bnez t1,hwint0
+ nop
+
+ j spurious_interrupt # Nothing up ...
+ nop
+
+ ##############################################################################
+
+swint0: PANIC("swint0")
+swint1: PANIC("swint1")
+
+ /* ------------------------------------------------------------------------ */
+
+hwint1: lbu t0,PCIMT_CSITPEND
+
+ andi t1,t0,0x20
+ bnez t1,eisa_int
+
+#ifdef CONFIG_SCSI_NCR53C8XX
+ andi t1,t0,0x40
+ beqz t1,scsi_int
+#endif
+ nop
+
+ j spurious_interrupt
+ nop
+
+ /* ------------------------------------------------------------------------ */
+
+hwint0: lbu t0,PCIMT_CSITPEND
+
+ andi t1,t0,0x01
+ beqz t1,int2
+
+go_spurious: j spurious_interrupt # we got fooled
+ nop
+
+eisa_int: lui s0,%hi(SNI_PORT_BASE)
li a0,0x0f
sb a0,%lo(SNI_PORT_BASE+0x20)(s0) # poll command
lb a0,%lo(SNI_PORT_BASE+0x20)(s0) # read result
bgtz a0,poll_second
- andi a0,7
+ andi a0,7
beq a0,2,poll_second # cascade?
- li s1,1 # delay slot
+ li s1,1
/*
* Acknowledge first pic
*/
@@ -45,12 +106,8 @@
/*
* Now call the real handler
*/
- la t3,IRQ_vectors
- sll t2,a0,PTRLOG
- addu t3,t2
- LONG_L t3,(t3)
- jalr t3
- nop # delay slot
+ jal do_IRQ
+ move a1,sp
/*
* Unblock first pic
*/
@@ -59,8 +116,8 @@
nor s1,zero,s1
and t1,s1
sb t1,%lo(cache_21)(s4)
- jr v0
- sb t1,%lo(SNI_PORT_BASE+0x21)(s0) # delay slot
+ j ret_from_irq
+ sb t1,%lo(SNI_PORT_BASE+0x21)(s0)
/*
* Cascade interrupt from second PIC
@@ -69,8 +126,8 @@
poll_second: li a0,0x0f
sb a0,%lo(SNI_PORT_BASE+0xa0)(s0) # poll command
lb a0,%lo(SNI_PORT_BASE+0xa0)(s0) # read result
- bgtz a0,3f
- andi a0,7
+ bgtz a0,go_spurious
+ andi a0,7
/*
* Acknowledge second pic
*/
@@ -87,13 +144,9 @@ poll_second: li a0,0x0f
/*
* Now call the real handler
*/
- la t3,IRQ_vectors
addiu a0,8
- sll t2,a0,PTRLOG
- addu t3,t2
- LONG_L t3,(t3)
- jalr t3
- nop # delay slot
+ jal do_IRQ
+ move a1,sp
/*
* Unblock second pic
*/
@@ -103,72 +156,49 @@ poll_second: li a0,0x0f
nor s1,zero,s1
and t1,t1,s1
sb t1,%lo(cache_A1)(s4)
- jr v0
- sb t1,%lo(SNI_PORT_BASE+0xa1)(s0) # delay slot
-
-/*
- * FIXME: This is definatly wrong but I'll have to do it this way
- * 'till I get more hardware info.
- * XXX: Apparently the Lance is attached to interrupt #5.
- */
-#ifdef CONFIG_PCNET32
-
-/*
- * FIXME: detect this address
- */
-#define LANCE_BASE 0xbb000100
-
-/* Offsets from base I/O address. */
-#define LANCE_DATA 0x10
-#define LANCE_ADDR 0x12
-#define LANCE_RESET 0x14
-#define LANCE_BUS_IF 0x16
-#define LANCE_TOTAL_SIZE 0x18
+ j ret_from_irq
+ sb t1,%lo(SNI_PORT_BASE+0xa1)(s0)
/*
* ... check if we were interrupted by the Lance ...
*/
-3: lh s0,LANCE_BASE+LANCE_ADDR
- sh zero,LANCE_BASE+LANCE_ADDR
- lh t1,LANCE_BASE+LANCE_DATA
- andi t2,t1,0x80
- beqz t1,3f # no Lance interrupt?
- mfc0 t0,CP0_STATUS # delay slot
- ori t0,0x041f
- xori t0,0x041e
+eth_int: mfc0 s0,CP0_STATUS
+ ori t0,s0,0x4000
+ xori t0,0x4000
mtc0 t0,CP0_STATUS
+
li a0,PCIMT_IRQ_ETHERNET
jal do_IRQ
- move a1,sp # delay slot
- sh s0,LANCE_BASE+LANCE_ADDR
- mfc0 t0,CP0_STATUS
- ori t0,0x0401
- xori t0,0x0001
- mtc0 t0,CP0_STATUS
- j ret_from_sys_call
- nop # delay slot
+ move a1,sp
-#endif /* CONFIG_PCNET32 */
+ mtc0 s0,CP0_STATUS
+
+ j ret_from_irq
+ nop
#ifdef CONFIG_SCSI_NCR53C8XX
/*
* ... check if we were interrupted by the NCR ...
*/
-3: lb t0,PCIMT_CSITPEND
- andi t0,0x40
- bnez t0,3f # bit 6 == 0 -> SCSI IRQ
- nop # delay slot
- jal do_fast_IRQ
- li a0,PCIMT_IRQ_SCSI # delay slot
- j return
- nop # delay slot
+scsi_int: li a0,PCIMT_IRQ_SCSI
+ jal do_IRQ
+ move a1,sp
+ j ret_from_irq
+ nop
#endif /* CONFIG_SCSI_NCR53C8XX */
-/*
- * "Jump extender" to reach spurious_interrupt
- */
-3: j spurious_interrupt
- nop # delay slot
+pci_int: PANIC("Received PCI interrupt but no handler yet ...\n")
+1: j 1b
+ nop
+
+int2: PANIC("Received int2 but no handler yet ...\n")
+1: j 1b
+ nop
+
+hwint2: PANIC("hwint2 and no handler yet")
+hwint3: PANIC("hwint3 and no handler yet")
+hwint5: PANIC("hwint5 and no handler yet")
+
END(sni_rm200_pci_handle_int)
diff --git a/arch/mips/sni/pci.c b/arch/mips/sni/pci.c
index 917d07a81..8a8016e70 100644
--- a/arch/mips/sni/pci.c
+++ b/arch/mips/sni/pci.c
@@ -119,17 +119,14 @@ static int sni_rm200_pcibios_write_config_dword (unsigned char bus,
return PCIBIOS_SUCCESSFUL;
}
-__initfunc(unsigned long sni_rm200_pcibios_init(unsigned long memory_start, unsigned long memory_end))
-{
- _pcibios_fixup = sni_rm200_pcibios_fixup;
- _pcibios_read_config_byte = sni_rm200_pcibios_read_config_byte;
- _pcibios_read_config_word = sni_rm200_pcibios_read_config_word;
- _pcibios_read_config_dword = sni_rm200_pcibios_read_config_dword;
- _pcibios_write_config_byte = sni_rm200_pcibios_write_config_byte;
- _pcibios_write_config_word = sni_rm200_pcibios_write_config_word;
- _pcibios_write_config_dword = sni_rm200_pcibios_write_config_dword;
-
- return memory_start;
-}
+struct pci_ops sni_pci_ops = {
+ sni_rm200_pcibios_fixup,
+ sni_rm200_pcibios_read_config_byte,
+ sni_rm200_pcibios_read_config_word,
+ sni_rm200_pcibios_read_config_dword,
+ sni_rm200_pcibios_write_config_byte,
+ sni_rm200_pcibios_write_config_word,
+ sni_rm200_pcibios_write_config_dword
+};
#endif /* CONFIG_PCI */
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index b73c857b4..41f64b618 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -6,6 +6,8 @@
* for more details.
*
* Copyright (C) 1996, 1997 by Ralf Baechle
+ *
+ * $Id: setup.c,v 1.5 1997/12/01 16:19:12 ralf Exp $
*/
#include <asm/ptrace.h>
#include <linux/ioport.h>
@@ -54,7 +56,7 @@ __initfunc(static void sni_irq_setup(void))
* I don't know how to handle the debug button interrupt, so
* don't use this button yet or bad things happen ...
*/
- set_cp0_status(ST0_IM, IE_IRQ0);
+ set_cp0_status(ST0_IM, IE_IRQ1 | IE_IRQ4);
}
void (*board_time_init)(struct irqaction *irq);
@@ -69,8 +71,7 @@ __initfunc(static void sni_rm200_pci_time_init(struct irqaction *irq))
}
unsigned char aux_device_present;
-extern unsigned long sni_rm200_pcibios_init (unsigned long memory_start,
- unsigned long memory_end);
+extern struct pci_ops sni_pci_ops;
extern unsigned char sni_map_isa_cache;
/*
@@ -81,7 +82,7 @@ static inline void sni_pcimt_detect(void)
char boardtype[80];
unsigned char csmsr;
char *p = boardtype;
- int asic;
+ unsigned int asic, cacheconf;
csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
@@ -93,6 +94,30 @@ static inline void sni_pcimt_detect(void)
asic = (csmsr & 0x08) ? asic : !asic;
p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
printk("%s.\n", boardtype);
+
+ cacheconf = *(volatile unsigned int *)PCIMT_CACHECONF;
+ switch(cacheconf & 7) {
+ case 0:
+ printk("Secondary cache disabled\n");
+ break;
+ case 1:
+ printk("256kb secondary cache\n");
+ break;
+ case 2:
+ printk("512kb secondary cache\n");
+ break;
+ case 3:
+ printk("1mb secondary cache\n");
+ break;
+ case 4:
+ printk("2mb secondary cache\n");
+ break;
+ case 5:
+ printk("4mb secondary cache\n");
+ break;
+ default:
+ panic("invalid secondary cache size\n");
+ }
}
__initfunc(void sni_rm200_pci_setup(void))
@@ -128,7 +153,7 @@ __initfunc(void sni_rm200_pci_setup(void))
irq_setup = sni_irq_setup;
fd_cacheflush = sni_fd_cacheflush; // Will go away
feature = &sni_rm200_pci_feature;
- port_base = SNI_PORT_BASE;
+ mips_io_port_base = SNI_PORT_BASE;
keyboard_setup = sni_rm200_keyboard_setup;
/*
@@ -157,5 +182,5 @@ __initfunc(void sni_rm200_pci_setup(void))
* the I/O port space ...
*/
request_region(0xcfc,0x04,"PCI config data");
- _pcibios_init = sni_rm200_pcibios_init;
+ pci_ops = &sni_pci_ops;
}
diff --git a/arch/mips/tools/Makefile b/arch/mips/tools/Makefile
index 7216277b3..94cfc08a0 100644
--- a/arch/mips/tools/Makefile
+++ b/arch/mips/tools/Makefile
@@ -3,6 +3,8 @@
# Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
# Copyright (C) 1997 Ralf Baechle (ralf@gnu.ai.mit.edu)
#
+# $Id: Makefile,v 1.2 1997/09/23 06:23:49 ralf Exp $
+#
TARGET := $(TOPDIR)/include/asm-$(ARCH)/offset.h
.S.s:
@@ -21,6 +23,6 @@ offset.h: offset.s
offset.s: offset.c
clean:
- rm -f offset.s $(TARGET).new
+ rm -f offset.[hs] $(TARGET).new
include $(TOPDIR)/Rules.make
diff --git a/arch/mips/tools/offset.c b/arch/mips/tools/offset.c
index 3ea39e133..cc6b7b7d3 100644
--- a/arch/mips/tools/offset.c
+++ b/arch/mips/tools/offset.c
@@ -3,6 +3,8 @@
*
* Copyright (C) 1996 David S. Miller
* Made portable by Ralf Baechle
+ *
+ * $Id: offset.c,v 1.3 1997/07/29 18:57:11 ralf Exp $
*/
#include <linux/types.h>
@@ -21,10 +23,10 @@
#define linefeed text("")
text("/* DO NOT TOUCH, AUTOGENERATED BY OFFSET.C */");
-text("");
+linefeed;
text("#ifndef _MIPS_OFFSET_H");
text("#define _MIPS_OFFSET_H");
-text("");
+linefeed;
void output_ptreg_defines(void)
{
diff --git a/arch/sparc64/boot/piggyback.c b/arch/sparc64/boot/piggyback.c
index 869b3492c..503b366db 100644
--- a/arch/sparc64/boot/piggyback.c
+++ b/arch/sparc64/boot/piggyback.c
@@ -1,4 +1,4 @@
-/* $Id: piggyback.c,v 1.1 1997/07/18 06:26:30 ralf Exp $
+/* $Id: piggyback.c,v 1.1 1997/07/11 11:05:26 jj Exp $
Simple utility to make a single-image install kernel with initial ramdisk
for Sparc64 tftpbooting without need to set up nfs.
diff --git a/arch/sparc64/kernel/sunos_ioctl32.c b/arch/sparc64/kernel/sunos_ioctl32.c
index 311110d3c..bb991dee6 100644
--- a/arch/sparc64/kernel/sunos_ioctl32.c
+++ b/arch/sparc64/kernel/sunos_ioctl32.c
@@ -1,4 +1,4 @@
-/* $Id: sunos_ioctl32.c,v 1.1 1997/07/18 06:26:42 ralf Exp $
+/* $Id: sunos_ioctl32.c,v 1.4 1997/07/17 02:20:43 davem Exp $
* sunos_ioctl32.c: SunOS ioctl compatability on sparc64.
*
* Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
diff --git a/arch/sparc64/kernel/sys_sunos32.c b/arch/sparc64/kernel/sys_sunos32.c
index 3dfdad5a7..dc87c3095 100644
--- a/arch/sparc64/kernel/sys_sunos32.c
+++ b/arch/sparc64/kernel/sys_sunos32.c
@@ -1,4 +1,4 @@
-/* $Id: sys_sunos32.c,v 1.1 1997/07/18 06:26:43 ralf Exp $
+/* $Id: sys_sunos32.c,v 1.3 1997/07/17 02:20:48 davem Exp $
* sys_sunos32.c: SunOS binary compatability layer on sparc64.
*
* Copyright (C) 1995, 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S
index cefcb6ba3..b5ca851ac 100644
--- a/arch/sparc64/kernel/trampoline.S
+++ b/arch/sparc64/kernel/trampoline.S
@@ -1,4 +1,4 @@
-/* $Id: trampoline.S,v 1.2 1997/08/30 04:53:05 ralf Exp $
+/* $Id: trampoline.S,v 1.2 1997/07/28 02:57:32 davem Exp $
* trampoline.S: Jump start slave processors on sparc64.
*
* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
diff --git a/arch/sparc64/lib/VIS.h b/arch/sparc64/lib/VIS.h
index 45bc870a4..01232a82b 100644
--- a/arch/sparc64/lib/VIS.h
+++ b/arch/sparc64/lib/VIS.h
@@ -1,4 +1,4 @@
-/* $Id: VIS.h,v 1.1 1997/07/18 06:26:48 ralf Exp $
+/* $Id: VIS.h,v 1.3 1997/06/27 14:53:18 jj Exp $
* VIS.h: High speed copy/clear operations utilizing the UltraSparc
* Visual Instruction Set.
*
diff --git a/arch/sparc64/mm/modutil.c b/arch/sparc64/mm/modutil.c
index a0eba8019..e6b4b2223 100644
--- a/arch/sparc64/mm/modutil.c
+++ b/arch/sparc64/mm/modutil.c
@@ -1,4 +1,4 @@
-/* $Id: modutil.c,v 1.1 1997/07/18 06:26:54 ralf Exp $
+/* $Id: modutil.c,v 1.1 1997/06/27 14:53:35 jj Exp $
* arch/sparc64/mm/modutil.c
*
* Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc64/mm/ultra.S
index ec96e8871..8a745bf0a 100644
--- a/arch/sparc64/mm/ultra.S
+++ b/arch/sparc64/mm/ultra.S
@@ -1,4 +1,4 @@
-/* $Id: ultra.S,v 1.3 1997/08/30 04:53:20 ralf Exp $
+/* $Id: ultra.S,v 1.18 1997/08/08 08:34:23 jj Exp $
* ultra.S: Don't expand these all over the place...
*
* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
diff --git a/drivers/Makefile b/drivers/Makefile
index f95448f18..69a78f46e 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -9,7 +9,7 @@
SUB_DIRS := block char net misc #streams
MOD_SUB_DIRS := $(SUB_DIRS) sbus
-ALL_SUB_DIRS := $(SUB_DIRS) pci sgi scsi sound cdrom isdn pnp macintosh
+ALL_SUB_DIRS := $(SUB_DIRS) pci sgi scsi sound cdrom isdn misc pnp macintosh
ifdef CONFIG_PCI
SUB_DIRS += pci
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index 7af5aeee1..7a4d082f0 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -114,8 +114,8 @@ static int print_unex=1;
* motor of these drives causes system hangs on some PCI computers. drive
* 0 is the low bit (0x1), and drive 7 is the high bit (0x80). Bits are on if
* a drive is allowed. */
-int FLOPPY_IRQ=6;
-int FLOPPY_DMA=2;
+static int FLOPPY_IRQ=6;
+static int FLOPPY_DMA=2;
static int allowed_drive_mask = 0x33;
@@ -1025,15 +1025,16 @@ static void setup_DMA(void)
}
#endif
INT_OFF;
- fd_disable_dma();
- fd_clear_dma_ff();
+ fd_disable_dma(FLOPPY_DMA);
+ fd_clear_dma_ff(FLOPPY_DMA);
fd_cacheflush(raw_cmd->kernel_data, raw_cmd->length);
- fd_set_dma_mode((raw_cmd->flags & FD_RAW_READ)?
- DMA_MODE_READ : DMA_MODE_WRITE);
- fd_set_dma_addr(raw_cmd->kernel_data);
- fd_set_dma_count(raw_cmd->length);
+ fd_set_dma_mode(FLOPPY_DMA, (raw_cmd->flags & FD_RAW_READ)
+ ? DMA_MODE_READ
+ : DMA_MODE_WRITE);
+ fd_set_dma_addr(FLOPPY_DMA, raw_cmd->kernel_data);
+ fd_set_dma_count(FLOPPY_DMA, raw_cmd->length);
virtual_dma_port = FDCS->address;
- fd_enable_dma();
+ fd_enable_dma(FLOPPY_DMA);
INT_ON;
floppy_disable_hlt();
}
@@ -1636,7 +1637,7 @@ void floppy_interrupt(int irq, void *dev_id, struct pt_regs * regs)
lasthandler = handler;
interruptjiffies = jiffies;
- fd_disable_dma();
+ fd_disable_dma(FLOPPY_DMA);
floppy_enable_hlt();
CLEAR_INTR;
if (fdc >= N_FDC || FDCS->address == -1){
@@ -1722,7 +1723,7 @@ static void reset_fdc(void)
/* Pseudo-DMA may intercept 'reset finished' interrupt. */
/* Irrelevant for systems with true DMA (i386). */
- fd_disable_dma();
+ fd_disable_dma(FLOPPY_DMA);
if (FDCS->version >= FDC_82072A)
fd_outb(0x80 | (FDCS->dtr &3), FD_STATUS);
@@ -1787,7 +1788,7 @@ static void floppy_shutdown(void)
sti();
floppy_enable_hlt();
- fd_disable_dma();
+ fd_disable_dma(FLOPPY_DMA);
/* avoid dma going to a random drive after shutdown */
if (!initialising)
@@ -2896,7 +2897,7 @@ static void raw_cmd_done(int flag)
raw_cmd->reply[i] = reply_buffer[i];
if (raw_cmd->flags & (FD_RAW_READ | FD_RAW_WRITE))
- raw_cmd->length = fd_get_dma_residue();
+ raw_cmd->length = fd_get_dma_residue(FLOPPY_DMA);
if ((raw_cmd->flags & FD_RAW_SOFTFAILURE) &&
(!raw_cmd->reply_count || (raw_cmd->reply[0] & 0xc0)))
@@ -4055,17 +4056,17 @@ static int floppy_grab_irq_and_dma(void)
fdc = 0;
set_dor(0, ~0, 8); /* avoid immediate interrupt */
- if (fd_request_irq()) {
+ if (fd_request_irq(FLOPPY_IRQ)) {
DPRINT("Unable to grab IRQ%d for the floppy driver\n",
FLOPPY_IRQ);
MOD_DEC_USE_COUNT;
usage_count--;
return -1;
}
- if (fd_request_dma()) {
+ if (fd_request_dma(FLOPPY_DMA)) {
DPRINT("Unable to grab DMA%d for the floppy driver\n",
FLOPPY_DMA);
- fd_free_irq();
+ fd_free_irq(FLOPPY_IRQ);
MOD_DEC_USE_COUNT;
usage_count--;
return -1;
@@ -4074,7 +4075,7 @@ static int floppy_grab_irq_and_dma(void)
if (FDCS->address != -1)
fd_outb(FDCS->dor, FD_DOR);
fdc = 0;
- fd_enable_irq();
+ fd_enable_irq(FLOPPY_IRQ);
return 0;
}
@@ -4095,10 +4096,10 @@ static void floppy_release_irq_and_dma(void)
return;
}
INT_ON;
- fd_disable_dma();
- fd_free_dma();
- fd_disable_irq();
- fd_free_irq();
+ fd_disable_dma(FLOPPY_DMA);
+ fd_free_dma(FLOPPY_DMA);
+ fd_disable_irq(FLOPPY_IRQ);
+ fd_free_irq(FLOPPY_IRQ);
set_dor(0, ~0, 8);
#if N_FDC > 1
diff --git a/drivers/char/apm_bios.c b/drivers/char/apm_bios.c
index 565600738..0a722b5e6 100644
--- a/drivers/char/apm_bios.c
+++ b/drivers/char/apm_bios.c
@@ -13,7 +13,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
- * $Id: apm_bios.c,v 1.2 1997/09/12 01:31:41 ralf Exp $
+ * $Id: apm_bios.c,v 0.22 1995/03/09 14:12:02 sfr Exp $
*
* October 1995, Rik Faith (faith@cs.unc.edu):
* Minor enhancements and updates (to the patch set) for 1.3.x
diff --git a/drivers/char/cyclades.c b/drivers/char/cyclades.c
index 94969bf28..fa4134dda 100644
--- a/drivers/char/cyclades.c
+++ b/drivers/char/cyclades.c
@@ -1,6 +1,6 @@
#define BLOCKMOVE
static char rcsid[] =
-"$Revision: 1.1.1.1 $$Date: 1997/06/01 03:17:29 $";
+"$Revision: 1.36.4.33 $$Date: 1997/06/27 19:00:00 $";
/*
* linux/drivers/char/cyclades.c
@@ -29,8 +29,49 @@ static char rcsid[] =
* void cleanup_module(void);
*
* $Log: cyclades.c,v $
- * Revision 1.1.1.1 1997/06/01 03:17:29 ralf
- * Initial import of Linux/MIPS pre-2.1.40.
+ * Revision 1.36.4.33 1997/06/27 19:00:00 ivan
+ * Fixes related to kernel version conditional
+ * compilation.
+ *
+ * Revision 1.36.4.32 1997/06/14 19:30:00 ivan
+ * Compatibility issues between kernels 2.0.x and
+ * 2.1.x (mainly related to clear_bit function).
+ *
+ * Revision 1.36.4.31 1997/06/03 15:30:00 ivan
+ * Changes to define the memory window according to the
+ * board type.
+ *
+ * Revision 1.36.4.30 1997/05/16 15:30:00 daniel
+ * Changes to suport new cycladesZ boards.
+ *
+ * Revision 1.36.4.29 1997/05/12 11:30:00 daniel
+ * Merge of Bentson's and Daniel's version 1.36.4.28.
+ * Corrects bug in cy_detect_pci: check if there are more
+ * ports than the number of static structs allocated.
+ * Warning message during initialization if this driver is
+ * used with the new generation of cycladesZ boards. Those
+ * will be supported only in next release of the driver.
+ * Corrects bug in cy_detect_pci and cy_detect_isa that
+ * returned wrong number of VALID boards, when a cyclomY
+ * was found with no serial modules connected.
+ * Changes to use current (2.1.x) kernel subroutine names
+ * and created macros for compilation with 2.0.x kernel,
+ * instead of the other way around.
+ *
+ * Revision 1.36.4.28 1997/05/?? ??:00:00 bentson
+ * Change queue_task_irq_off to queue_task_irq.
+ * The inline function queue_task_irq_off (tqueue.h)
+ * was removed from latest releases of 2.1.x kernel.
+ * Use of macro __initfunc to mark the initialization
+ * routines, so memory can be reused.
+ * Also incorporate implementation of critical region
+ * in function cleanup_module() created by anonymous
+ * linuxer.
+ *
+ * Revision 1.36.4.28 1997/04/25 16:00:00 daniel
+ * Change to support new firmware that solves DCD problem:
+ * application could fail to receive SIGHUP signal when DCD
+ * varying too fast.
*
* Revision 1.36.4.27 1997/03/26 10:30:00 daniel
* Changed for suport linux versions 2.1.X.
diff --git a/drivers/char/ftape/ecc.c b/drivers/char/ftape/ecc.c
index 040ea0c85..19708ee68 100644
--- a/drivers/char/ftape/ecc.c
+++ b/drivers/char/ftape/ecc.c
@@ -21,12 +21,12 @@
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139,
* USA.
*
- * $Source: /src/cvs/linux/drivers/char/ftape/ecc.c,v $
- * $Author: ralf $
+ * $Source: /home/bas/distr/ftape-2.03b/RCS/ecc.c,v $
+ * $Author: bas $
*
- * $Revision: 1.1.1.1 $
- * $Date: 1997/06/01 03:17:30 $
- * $State: Exp $
+ * $Revision: 1.32 $
+ * $Date: 1995/04/22 07:30:15 $
+ * $State: Beta $
*
* This file contains the Reed-Solomon error correction code
* for the QIC-40/80 floppy-tape driver for Linux.
diff --git a/drivers/char/pc_keyb.c b/drivers/char/pc_keyb.c
index 866a4170f..849487b19 100644
--- a/drivers/char/pc_keyb.c
+++ b/drivers/char/pc_keyb.c
@@ -27,6 +27,18 @@
#include "pc_keyb.h"
+/*
+ * In case we run on a non-x86 hardware we need to initialize both the keyboard
+ * controller and the keyboard. On a x86, the BIOS will already have initialized
+ * them.
+ */
+
+#ifndef __i386__
+#define INIT_KBD
+#endif
+
+#ifdef INIT_KBD
+
/* Simple translation table for the SysRq keys */
#ifdef CONFIG_MAGIC_SYSRQ
@@ -40,25 +52,13 @@ unsigned char pckbd_sysrq_xlate[128] =
"\r\000/"; /* 0x60 - 0x6f */
#endif
-/*
- * In case we run on a non-x86 hardware we need to initialize both the keyboard
- * controller and the keyboard. On a x86, the BIOS will already have initialized
- * them.
- */
-
-#ifndef __i386__
-#define INIT_KBD
-#endif
-
-#ifdef INIT_KBD
-
__initfunc(static int kbd_wait_for_input(void))
{
- int n;
- int status, data;
+ int n;
+ int status, data;
unsigned long start = jiffies;
- do {
+ do {
status = kbd_read_status();
/*
* Wait for input data to become available. This bit will
@@ -526,10 +526,8 @@ static void keyboard_interrupt(int irq, void *dev_id, struct pt_regs *regs)
unsigned char scancode;
/* mouse data? */
- if (status & kbd_read_mask & KBD_STAT_MOUSE_OBF){
- printk ("MOUSE!\n");
+ if (status & kbd_read_mask & KBD_STAT_MOUSE_OBF)
break;
- }
scancode = kbd_read_input();
if ((status & KBD_STAT_OBF) && do_acknowledge(scancode))
@@ -585,7 +583,7 @@ void pckbd_leds(unsigned char leds)
__initfunc(void pckbd_init_hw(void))
{
- request_irq(KEYBOARD_IRQ, keyboard_interrupt, 0, "keyboard-aaa", NULL);
+ request_irq(KEYBOARD_IRQ, keyboard_interrupt, 0, "keyboard", NULL);
keyboard_setup();
#ifdef INIT_KBD
initialize_kbd();
diff --git a/drivers/char/psaux.c b/drivers/char/psaux.c
index 972f38ad3..d297670a8 100644
--- a/drivers/char/psaux.c
+++ b/drivers/char/psaux.c
@@ -306,8 +306,6 @@ static int open_aux(struct inode * inode, struct file * file)
return -EBUSY;
}
MOD_INC_USE_COUNT;
-
-
poll_aux_status();
kbd_write_command(KBD_CCMD_MOUSE_ENABLE); /* Enable Aux */
aux_write_dev(AUX_ENABLE_DEV); /* Enable aux device */
@@ -627,7 +625,11 @@ __initfunc(int psaux_init(void))
psaux_fops.release = release_qp;
} else
#endif
+#if defined(CONFIG_SGI) && defined(CONFIG_PSMOUSE)
+ if (1) {
+#else
if (aux_device_present == 0xaa) {
+#endif
printk(KERN_INFO "PS/2 auxiliary pointing device detected -- driver installed.\n");
aux_present = 1;
#ifdef CONFIG_VT
@@ -654,10 +656,10 @@ __initfunc(int psaux_init(void))
#endif /* INITIALIZE_DEVICE */
kbd_write_command(KBD_CCMD_MOUSE_DISABLE); /* Disable Aux device */
poll_aux_status();
- kbd_write_command(KBD_CCMD_WRITE_MODE); /* Disable controller interrupts */
+ kbd_write_command(KBD_CCMD_WRITE_MODE); /* Disable controller interrupts */
poll_aux_status();
- kbd_write_output (AUX_INTS_OFF);
- kbd_pause ();
+ kbd_write_output(AUX_INTS_OFF);
+ kbd_pause();
poll_aux_status();
aux_end_atomic();
}
diff --git a/drivers/char/tpqic02.c b/drivers/char/tpqic02.c
index 3a8d02b22..e3032bb85 100644
--- a/drivers/char/tpqic02.c
+++ b/drivers/char/tpqic02.c
@@ -1,4 +1,4 @@
-/* $Id: tpqic02.c,v 1.1.1.1 1997/06/01 03:17:28 ralf Exp $
+/* $Id: tpqic02.c,v 1.10 1997/01/26 07:13:20 davem Exp $
*
* Driver for tape drive support for Linux-i386
*
@@ -134,8 +134,8 @@ static volatile struct mtget ioctl_status; /* current generic status */
static volatile struct tpstatus tperror; /* last drive status */
-static char rcs_revision[] = "$Revision: 1.1.1.1 $";
-static char rcs_date[] = "$Date: 1997/06/01 03:17:28 $";
+static char rcs_revision[] = "$Revision: 1.10 $";
+static char rcs_date[] = "$Date: 1997/01/26 07:13:20 $";
/* Flag bits for status and outstanding requests.
* (Could all be put in one bit-field-struct.)
diff --git a/drivers/isdn/avmb1/capi.c b/drivers/isdn/avmb1/capi.c
index 19202f515..b21a9f868 100644
--- a/drivers/isdn/avmb1/capi.c
+++ b/drivers/isdn/avmb1/capi.c
@@ -1,14 +1,11 @@
/*
- * $Id: capi.c,v 1.1 1997/06/08 14:58:39 ralf Exp $
+ * $Id: capi.c,v 1.4 1997/05/27 15:17:50 fritz Exp $
*
* CAPI 2.0 Interface for Linux
*
* Copyright 1996 by Carsten Paeth (calle@calle.in-berlin.de)
*
* $Log: capi.c,v $
- * Revision 1.1 1997/06/08 14:58:39 ralf
- * These files were missing in the 2.1.42 merge.
- *
* Revision 1.4 1997/05/27 15:17:50 fritz
* Added changes for recent 2.1.x kernels:
* changed return type of isdn_close
diff --git a/drivers/isdn/avmb1/capiutil.c b/drivers/isdn/avmb1/capiutil.c
index 51d57fe9c..9eb60afed 100644
--- a/drivers/isdn/avmb1/capiutil.c
+++ b/drivers/isdn/avmb1/capiutil.c
@@ -1,5 +1,5 @@
/*
- * $Id: capiutil.c,v 1.1 1997/06/08 14:58:41 ralf Exp $
+ * $Id: capiutil.c,v 1.3 1997/05/18 09:24:18 calle Exp $
*
* CAPI 2.0 convert capi message to capi message struct
*
@@ -7,9 +7,6 @@
* Rewritten for Linux 1996 by Carsten Paeth (calle@calle.in-berlin.de)
*
* $Log: capiutil.c,v $
- * Revision 1.1 1997/06/08 14:58:41 ralf
- * These files were missing in the 2.1.42 merge.
- *
* Revision 1.3 1997/05/18 09:24:18 calle
* added verbose disconnect reason reporting to avmb1.
* some fixes in capi20 interface.
diff --git a/drivers/isdn/hisax/l3_1tr6.c b/drivers/isdn/hisax/l3_1tr6.c
index b3479fbd2..0af1b4534 100644
--- a/drivers/isdn/hisax/l3_1tr6.c
+++ b/drivers/isdn/hisax/l3_1tr6.c
@@ -1,4 +1,4 @@
-/* $Id: l3_1tr6.c,v 1.2 1997/06/03 09:24:33 ralf Exp $
+/* $Id: l3_1tr6.c,v 1.11 1997/04/06 22:54:18 keil Exp $
* German 1TR6 D-channel protocol
*
@@ -6,9 +6,6 @@
*
*
* $Log: l3_1tr6.c,v $
- * Revision 1.2 1997/06/03 09:24:33 ralf
- * Sync with Linux 2.1.42.
- *
* Revision 1.11 1997/04/06 22:54:18 keil
* Using SKB's
*
@@ -52,7 +49,7 @@
#include <linux/ctype.h>
extern char *HiSax_getrev(const char *revision);
-const char *l3_1tr6_revision = "$Revision: 1.2 $";
+const char *l3_1tr6_revision = "$Revision: 1.11 $";
#define MsgHead(ptr, cref, mty, dis) \
*ptr++ = dis; \
diff --git a/drivers/isdn/hisax/l3dss1.c b/drivers/isdn/hisax/l3dss1.c
index ea1f7490e..d79bd468e 100644
--- a/drivers/isdn/hisax/l3dss1.c
+++ b/drivers/isdn/hisax/l3dss1.c
@@ -1,4 +1,4 @@
-/* $Id: l3dss1.c,v 1.2 1997/06/03 09:24:34 ralf Exp $
+/* $Id: l3dss1.c,v 1.15 1997/04/17 11:50:48 keil Exp $
* EURO/DSS1 D-channel protocol
*
@@ -9,9 +9,6 @@
* Fritz Elfert
*
* $Log: l3dss1.c,v $
- * Revision 1.2 1997/06/03 09:24:34 ralf
- * Sync with Linux 2.1.42.
- *
* Revision 1.15 1997/04/17 11:50:48 keil
* pa->loc was undefined, if it was not send by the exchange
*
@@ -67,7 +64,7 @@
#include <linux/ctype.h>
extern char *HiSax_getrev(const char *revision);
-const char *dss1_revision = "$Revision: 1.2 $";
+const char *dss1_revision = "$Revision: 1.15 $";
#define MsgHead(ptr, cref, mty) \
*ptr++ = 0x8; \
diff --git a/drivers/isdn/isdn_common.c b/drivers/isdn/isdn_common.c
index f096101d5..89271da9c 100644
--- a/drivers/isdn/isdn_common.c
+++ b/drivers/isdn/isdn_common.c
@@ -1,4 +1,4 @@
-/* $Id: isdn_common.c,v 1.3 1997/09/12 01:31:49 ralf Exp $
+/* $Id: isdn_common.c,v 1.44 1997/05/27 15:17:23 fritz Exp $
* Linux ISDN subsystem, common used functions (linklevel).
*
@@ -21,13 +21,6 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* $Log: isdn_common.c,v $
- * Revision 1.3 1997/09/12 01:31:49 ralf
- * Merge with Linux 2.1.55. More bugfixes and goodies from my private
- * CVS archive.
- *
- * Revision 1.2 1997/06/03 09:24:18 ralf
- * Sync with Linux 2.1.42.
- *
* Revision 1.44 1997/05/27 15:17:23 fritz
* Added changes for recent 2.1.x kernels:
* changed return type of isdn_close
@@ -225,7 +218,7 @@
isdn_dev *dev = (isdn_dev *) 0;
-static char *isdn_revision = "$Revision: 1.3 $";
+static char *isdn_revision = "$Revision: 1.44 $";
extern char *isdn_net_revision;
extern char *isdn_tty_revision;
diff --git a/drivers/isdn/isdn_ppp.c b/drivers/isdn/isdn_ppp.c
index f527a8e8e..f9eadc034 100644
--- a/drivers/isdn/isdn_ppp.c
+++ b/drivers/isdn/isdn_ppp.c
@@ -1,4 +1,4 @@
-/* $Id: isdn_ppp.c,v 1.2 1997/06/03 09:24:20 ralf Exp $
+/* $Id: isdn_ppp.c,v 1.27 1997/03/30 16:51:17 calle Exp $
*
* Linux ISDN subsystem, functions for synchronous PPP (linklevel).
*
@@ -19,9 +19,6 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* $Log: isdn_ppp.c,v $
- * Revision 1.2 1997/06/03 09:24:20 ralf
- * Sync with Linux 2.1.42.
- *
* Revision 1.27 1997/03/30 16:51:17 calle
* changed calls to copy_from_user/copy_to_user and removed verify_area
* were possible.
@@ -163,7 +160,7 @@ static int isdn_ppp_fill_mpqueue(isdn_net_dev *, struct sk_buff **skb,
static void isdn_ppp_free_mpqueue(isdn_net_dev *);
#endif
-char *isdn_ppp_revision = "$Revision: 1.2 $";
+char *isdn_ppp_revision = "$Revision: 1.27 $";
static struct ippp_struct *ippp_table[ISDN_MAX_CHANNELS];
static struct isdn_ppp_compressor *ipc_head = NULL;
diff --git a/drivers/isdn/sc/Makefile b/drivers/isdn/sc/Makefile
index 5af3d2e6c..ff87210b8 100644
--- a/drivers/isdn/sc/Makefile
+++ b/drivers/isdn/sc/Makefile
@@ -1,5 +1,5 @@
#
-# $Id: Makefile,v 1.3 1997/05/27 23:25:01 fritz Exp $
+# $Id: Makefile,v 1.1 1997/03/22 02:01:22 fritz Exp $
# Copyright (C) 1996 SpellCaster Telecommunications Inc.
#
# This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/Config.in b/drivers/net/Config.in
index b90affadc..f0e760d5a 100644
--- a/drivers/net/Config.in
+++ b/drivers/net/Config.in
@@ -97,6 +97,7 @@ if [ "$CONFIG_NET_ETHERNET" = "y" ]; then
tristate 'CS89x0 support' CONFIG_CS89x0
tristate 'Generic DECchip & DIGITAL EtherWORKS PCI/EISA' CONFIG_DE4X5
tristate 'DECchip Tulip (dc21x4x) PCI support' CONFIG_DEC_ELCP
+ tristate 'DECchip Tulip (dc21x4x) PCI support' CONFIG_DEC_ELCP
tristate 'Digi Intl. RightSwitch SE-X support' CONFIG_DGRS
tristate 'EtherExpressPro/100 support' CONFIG_EEXPRESS_PRO100
if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index d10663ff5..b4c973e5f 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -321,13 +321,14 @@ __initfunc(static int pcnet32_probe1(struct device *dev, unsigned int ioaddr, un
/* Make certain the data structures used by the PCnet32 are 16byte aligned and DMAble. */
lp = (struct pcnet32_private *) (((unsigned long)kmalloc(sizeof(*lp)+15, GFP_DMA | GFP_KERNEL)+15) & ~15);
+ flush_cache_post_dma_in(lp, sizeof(*lp)+15);
#ifdef __mips__
/* XXX Maybe modify kmalloc() to return KSEG1 memory? This would
* make lots of modifications to drivers unnecessary but possibly
* have negative impact on the performance due to drivers not being
- * aware of the CPU performance impact of GFP_DMA memory ...
+ * aware of the CPU performance impact of GFP_DMA memory. It also
+ * adds a bit of extra overhead to kmalloc().
*/
- flush_cache_range(current->mm, lp, sizeof(*lp)+15);
lp = KSEG1ADDR(lp);
#endif
@@ -641,10 +642,8 @@ pcnet32_start_xmit(struct sk_buff *skb, struct device *dev)
lp->tx_ring[entry].base = (u32)le32_to_cpu(virt_to_bus(skb->data));
lp->tx_ring[entry].status = le16_to_cpu(0x8300);
-#ifdef __mips__
- flush_cache_range(current->mm, (void *)skb->data,
- (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len);
-#endif
+ flush_cache_pre_dma_out((void *)skb->data,
+ (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len);
lp->cur_tx++;
@@ -856,6 +855,7 @@ pcnet32_rx(struct device *dev)
pkt_len,0);
skb->protocol=eth_type_trans(skb,dev);
netif_rx(skb);
+ flush_cache_post_dma_in(bus_to_virt(le32_to_cpu(lp->rx_ring[entry].base)), pkt_len);
lp->stats.rx_packets++;
}
}
diff --git a/drivers/net/plip.c b/drivers/net/plip.c
index 72b8a3314..223210e91 100644
--- a/drivers/net/plip.c
+++ b/drivers/net/plip.c
@@ -1,4 +1,4 @@
-/* $Id: plip.c,v 1.2 1997/08/06 19:15:51 miguel Exp $ */
+/* $Id: plip.c,v 1.3.6.2 1997/04/16 15:07:56 phil Exp $ */
/* PLIP: A parallel port "network" driver for Linux. */
/* This driver is for parallel port with 5-bit cable (LapLink (R) cable). */
/*
diff --git a/drivers/net/ppp.c b/drivers/net/ppp.c
index 4d2cb31f1..740bfc1ff 100644
--- a/drivers/net/ppp.c
+++ b/drivers/net/ppp.c
@@ -51,7 +51,7 @@
#define PPP_MAX_DEV 256
#endif
-/* $Id: ppp.c,v 1.1.1.1 1997/06/01 03:17:18 ralf Exp $
+/* $Id: ppp.c,v 1.27 1997/01/26 07:13:29 davem Exp $
* Added dynamic allocation of channels to eliminate
* compiled-in limits on the number of channels.
*
diff --git a/drivers/net/scc.c b/drivers/net/scc.c
index 7f1b70b90..3c5e81848 100644
--- a/drivers/net/scc.c
+++ b/drivers/net/scc.c
@@ -1,4 +1,4 @@
-#define RCS_ID "$Id: scc.c,v 1.1.1.1 1997/06/01 03:17:20 ralf Exp $"
+#define RCS_ID "$Id: scc.c,v 1.69 1997/04/06 19:22:45 jreuter Exp jreuter $"
#define VERSION "3.0"
#define BANNER "Z8530 SCC driver version "VERSION".dl1bke (experimental) by DL1BKE\n"
diff --git a/drivers/pnp/parport_probe.c b/drivers/pnp/parport_probe.c
index fc2f82702..70aebe874 100644
--- a/drivers/pnp/parport_probe.c
+++ b/drivers/pnp/parport_probe.c
@@ -1,4 +1,4 @@
-/* $Id: parport_probe.c,v 1.4 1997/09/12 01:32:20 ralf Exp $
+/* $Id: parport_probe.c,v 1.1.2.9 1997/03/29 21:08:16 phil Exp $
* Parallel port device probing code
*
* Authors: Carsten Gross, carsten@sol.wohnheim.uni-ulm.de
diff --git a/drivers/scsi/FlashPoint.c b/drivers/scsi/FlashPoint.c
index 3b9696920..c4655ec25 100644
--- a/drivers/scsi/FlashPoint.c
+++ b/drivers/scsi/FlashPoint.c
@@ -187,9 +187,9 @@
*
* Description: Common shared global defines.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1996/09/04 01:26:13 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.11 $
*
*----------------------------------------------------------------------*/
#ifndef __GLOBALS_H__
@@ -426,9 +426,9 @@ extern void OS_OutPortLong(unsigned long ioport, unsigned long val);
* Description: Common shared SCCB Interface defines and SCCB
* Manager specifics defines.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1996/10/24 23:09:33 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.14 $
*
*----------------------------------------------------------------------*/
@@ -744,9 +744,9 @@ typedef struct _SCCB {
* Description: This module contains SCCB/UCB Manager implementation
* specific stuff.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1996/11/13 18:34:22 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.10 $
*
*----------------------------------------------------------------------*/
@@ -901,9 +901,9 @@ typedef struct _SCCB {
*
* Description: Definitions for Target related structures
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1996/12/11 22:06:20 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.9 $
*
*----------------------------------------------------------------------*/
@@ -1100,9 +1100,9 @@ typedef struct SCCBscam_info {
*
* Description: Register definitions for HARPOON ASIC.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1996/11/13 18:32:57 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.4 $
*
*----------------------------------------------------------------------*/
@@ -1232,9 +1232,9 @@ typedef struct SCCBscam_info {
*
* Description: Definitions for EEPROM related structures
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1996/11/13 18:28:39 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.4 $
*
*----------------------------------------------------------------------*/
@@ -1317,9 +1317,9 @@ typedef struct SCCBscam_info {
*
* Description: Register definitions for HARPOON ASIC.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:14:28 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.6 $
*
*----------------------------------------------------------------------*/
@@ -2339,7 +2339,7 @@ void Debug_Load(UCHAR p_card, UCHAR p_bug_data);
extern unsigned int SccbGlobalFlags;
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: sccb.c 1.17 1997/02/11 21:06:41 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -2353,9 +2353,9 @@ extern unsigned int SccbGlobalFlags;
* Description: Functions relating to handling of the SCCB interface
* between the device driver and the HARPOON.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/02/11 21:06:41 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.17 $
*
*----------------------------------------------------------------------*/
@@ -5347,7 +5347,7 @@ void Debug_Load(UCHAR p_card, UCHAR p_bug_data)
}
#endif
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: sccb_dat.c 1.9 1997/01/31 02:12:58 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -5361,9 +5361,9 @@ void Debug_Load(UCHAR p_card, UCHAR p_bug_data)
* Description: Functions relating to handling of the SCCB interface
* between the device driver and the HARPOON.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:12:58 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.9 $
*
*----------------------------------------------------------------------*/
@@ -5418,7 +5418,7 @@ UCHAR debug_int[MAX_CARDS][debug_size];
UCHAR debug_index[MAX_CARDS];
UCHAR reserved_1[3];
#endif
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: scsi.c 1.19 1997/01/31 02:08:14 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -5433,9 +5433,9 @@ UCHAR reserved_1[3];
* selection/reselection, sync negotiation, message-in
* decoding.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:08:14 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.19 $
*
*----------------------------------------------------------------------*/
@@ -7389,7 +7389,7 @@ void sinits(PSCCB p_sccb, UCHAR p_card)
}
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: phase.c 1.11 1997/01/31 02:08:49 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -7404,9 +7404,9 @@ void sinits(PSCCB p_sccb, UCHAR p_card)
* the target asserts request (and the automation is not
* enabled to handle the situation).
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:08:49 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.11 $
*
*----------------------------------------------------------------------*/
@@ -8138,7 +8138,7 @@ void phaseBusFree(ULONG port, UCHAR p_card)
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: automate.c 1.14 1997/01/31 02:11:46 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -8152,9 +8152,9 @@ void phaseBusFree(ULONG port, UCHAR p_card)
* Description: Functions relating to programming the automation of
* the HARPOON.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:11:46 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.14 $
*
*----------------------------------------------------------------------*/
@@ -8530,7 +8530,7 @@ void autoCmdCmplt(ULONG p_port, UCHAR p_card)
queueCmdComplete(&BL_Card[p_card], currSCCB, p_card);
}
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: busmstr.c 1.8 1997/01/31 02:10:27 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -8543,9 +8543,9 @@ void autoCmdCmplt(ULONG p_port, UCHAR p_card)
*
* Description: Functions to start, stop, and abort BusMaster operations.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:10:27 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.8 $
*
*----------------------------------------------------------------------*/
@@ -9222,7 +9222,7 @@ void hostDataXferRestart(PSCCB currSCCB)
currSCCB->Sccb_XferCnt = currSCCB->DataLength - currSCCB->Sccb_ATC;
}
}
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: scam.c 1.16 1997/01/31 02:11:12 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -9237,9 +9237,9 @@ void hostDataXferRestart(PSCCB currSCCB)
* and the determination of the SCSI IDs to be assigned
* to all perspective SCSI targets.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:11:12 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.16 $
*
*----------------------------------------------------------------------*/
@@ -10362,7 +10362,7 @@ void scsavdi(UCHAR p_card, ULONG p_port)
utilEEWrite(p_port, sum_data, EEPROM_CHECK_SUM/2);
utilEEWriteOnOff(p_port,0); /* Turn off write access */
}
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: diagnose.c 1.9 1997/01/31 02:09:48 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -10376,9 +10376,9 @@ void scsavdi(UCHAR p_card, ULONG p_port)
* Description: Diagnostic funtions for testing the integrity of
* the HARPOON.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:09:48 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.9 $
*
*----------------------------------------------------------------------*/
@@ -10807,7 +10807,7 @@ void DiagEEPROM(ULONG p_port)
}
-#ident "$Id: FlashPoint.c,v 1.1.1.1 1997/06/01 03:17:39 ralf Exp $"
+#ident "$Id: utility.c 1.22 1997/01/31 02:12:23 mohan Exp $"
/*----------------------------------------------------------------------
*
*
@@ -10821,9 +10821,9 @@ void DiagEEPROM(ULONG p_port)
* Description: Utility functions relating to queueing and EEPROM
* manipulation and any other garbage functions.
*
- * $Date: 1997/06/01 03:17:39 $
+ * $Date: 1997/01/31 02:12:23 $
*
- * $Revision: 1.1.1.1 $
+ * $Revision: 1.22 $
*
*----------------------------------------------------------------------*/
/*#include <globals.h>*/
diff --git a/drivers/scsi/aic7xxx.c b/drivers/scsi/aic7xxx.c
index 612af9baa..5551cbad8 100644
--- a/drivers/scsi/aic7xxx.c
+++ b/drivers/scsi/aic7xxx.c
@@ -73,7 +73,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: aic7xxx.c,v 1.2 1997/08/06 19:16:00 miguel Exp $
+ * $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $
*---------------------------------------------------------------------------
*
* Thanks also go to (in alphabetical order) the following:
@@ -93,7 +93,7 @@
*
* Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97
*
- * $Id: aic7xxx.c,v 1.2 1997/08/06 19:16:00 miguel Exp $
+ * $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $
*-M*************************************************************************/
#ifdef MODULE
@@ -139,7 +139,7 @@ struct proc_dir_entry proc_scsi_aic7xxx = {
0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL
};
-#define AIC7XXX_C_VERSION "$Revision: 1.2 $"
+#define AIC7XXX_C_VERSION "$Revision: 4.1 $"
#define NUMBER(arr) (sizeof(arr) / sizeof(arr[0]))
#define MIN(a,b) (((a) < (b)) ? (a) : (b))
diff --git a/drivers/scsi/aic7xxx.h b/drivers/scsi/aic7xxx.h
index 11836c405..5ba54acfa 100644
--- a/drivers/scsi/aic7xxx.h
+++ b/drivers/scsi/aic7xxx.h
@@ -18,12 +18,12 @@
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
*
- * $Id: aic7xxx.h,v 1.1.1.1 1997/06/01 03:17:41 ralf Exp $
+ * $Id: aic7xxx.h,v 3.2 1996/07/23 03:37:26 deang Exp $
*-M*************************************************************************/
#ifndef _aic7xxx_h
#define _aic7xxx_h
-#define AIC7XXX_H_VERSION "$Revision: 1.1.1.1 $"
+#define AIC7XXX_H_VERSION "$Revision: 3.2 $"
/*
* Scsi_Host_Template (see hosts.h) for AIC-7xxx - some fields
diff --git a/drivers/scsi/aic7xxx/aic7xxx.reg b/drivers/scsi/aic7xxx/aic7xxx.reg
new file mode 100644
index 000000000..d3486e078
--- /dev/null
+++ b/drivers/scsi/aic7xxx/aic7xxx.reg
@@ -0,0 +1,1135 @@
+/*
+ * Aic7xxx register and scratch ram definitions.
+ *
+ * Copyright (c) 1994-1997 Justin Gibbs.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * Where this Software is combined with software released under the terms of
+ * the GNU Public License ("GPL") and the terms of the GPL would require the
+ * combined work to also be released under the terms of the GPL, the terms
+ * and conditions of this License will apply in addition to those of the
+ * GPL with the exception of any terms or conditions of this License that
+ * conflict with, or are expressly prohibited by, the GPL.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: aic7xxx.reg,v 1.2 1997/08/30 02:17:28 ralf Exp $
+ */
+
+/*
+ * This file is processed by the aic7xxx_asm utility for use in assembling
+ * firmware for the aic7xxx family of SCSI host adapters as well as to generate
+ * a C header file for use in the kernel portion of the Aic7xxx driver.
+ *
+ * All page numbers refer to the Adaptec AIC-7770 Data Book available from
+ * Adaptec's Technical Documents Department 1-800-934-2766
+ */
+
+/*
+ * SCSI Sequence Control (p. 3-11).
+ * Each bit, when set starts a specific SCSI sequence on the bus
+ */
+register SCSISEQ {
+ address 0x000
+ access_mode RW
+ bit TEMODE 0x80
+ bit ENSELO 0x40
+ bit ENSELI 0x20
+ bit ENRSELI 0x10
+ bit ENAUTOATNO 0x08
+ bit ENAUTOATNI 0x04
+ bit ENAUTOATNP 0x02
+ bit SCSIRSTO 0x01
+}
+
+/*
+ * SCSI Transfer Control 0 Register (pp. 3-13).
+ * Controls the SCSI module data path.
+ */
+register SXFRCTL0 {
+ address 0x001
+ access_mode RW
+ bit DFON 0x80
+ bit DFPEXP 0x40
+ bit FAST20 0x20
+ bit CLRSTCNT 0x10
+ bit SPIOEN 0x08
+ bit SCAMEN 0x04
+ bit CLRCHN 0x02
+}
+
+/*
+ * SCSI Transfer Control 1 Register (pp. 3-14,15).
+ * Controls the SCSI module data path.
+ */
+register SXFRCTL1 {
+ address 0x002
+ access_mode RW
+ bit BITBUCKET 0x80
+ bit SWRAPEN 0x40
+ bit ENSPCHK 0x20
+ mask STIMESEL 0x18
+ bit ENSTIMER 0x04
+ bit ACTNEGEN 0x02
+ bit STPWEN 0x01 /* Powered Termination */
+}
+
+/*
+ * SCSI Control Signal Read Register (p. 3-15).
+ * Reads the actual state of the SCSI bus pins
+ */
+register SCSISIGI {
+ address 0x003
+ access_mode RO
+ bit CDI 0x80
+ bit IOI 0x40
+ bit MSGI 0x20
+ bit ATNI 0x10
+ bit SELI 0x08
+ bit BSYI 0x04
+ bit REQI 0x02
+ bit ACKI 0x01
+/*
+ * Possible phases in SCSISIGI
+ */
+ mask PHASE_MASK CDI|IOI|MSGI
+ mask P_DATAOUT 0x00
+ mask P_DATAIN IOI
+ mask P_COMMAND CDI
+ mask P_MESGOUT CDI|MSGI
+ mask P_STATUS CDI|IOI
+ mask P_MESGIN CDI|IOI|MSGI
+}
+
+/*
+ * SCSI Control Signal Write Register (p. 3-16).
+ * Writing to this register modifies the control signals on the bus. Only
+ * those signals that are allowed in the current mode (Initiator/Target) are
+ * asserted.
+ */
+register SCSISIGO {
+ address 0x003
+ access_mode WO
+ bit CDO 0x80
+ bit IOO 0x40
+ bit MSGO 0x20
+ bit ATNO 0x10
+ bit SELO 0x08
+ bit BSYO 0x04
+ bit REQO 0x02
+ bit ACKO 0x01
+/*
+ * Possible phases to write into SCSISIG0
+ */
+ mask PHASE_MASK CDI|IOI|MSGI
+ mask P_DATAOUT 0x00
+ mask P_DATAIN IOI
+ mask P_COMMAND CDI
+ mask P_MESGOUT CDI|MSGI
+ mask P_STATUS CDI|IOI
+ mask P_MESGIN CDI|IOI|MSGI
+}
+
+/*
+ * SCSI Rate Control (p. 3-17).
+ * Contents of this register determine the Synchronous SCSI data transfer
+ * rate and the maximum synchronous Req/Ack offset. An offset of 0 in the
+ * SOFS (3:0) bits disables synchronous data transfers. Any offset value
+ * greater than 0 enables synchronous transfers.
+ */
+register SCSIRATE {
+ address 0x004
+ access_mode RW
+ bit WIDEXFER 0x80 /* Wide transfer control */
+ mask SXFR 0x70 /* Sync transfer rate */
+ mask SOFS 0x0f /* Sync offset */
+}
+
+/*
+ * SCSI ID (p. 3-18).
+ * Contains the ID of the board and the current target on the
+ * selected channel.
+ */
+register SCSIID {
+ address 0x005
+ access_mode RW
+ mask TID 0xf0 /* Target ID mask */
+ mask OID 0x0f /* Our ID mask */
+}
+
+/*
+ * SCSI Latched Data (p. 3-19).
+ * Read/Write latches used to transfer data on the SCSI bus during
+ * Automatic or Manual PIO mode. SCSIDATH can be used for the
+ * upper byte of a 16bit wide asynchronouse data phase transfer.
+ */
+register SCSIDATL {
+ address 0x006
+ access_mode RW
+}
+
+register SCSIDATH {
+ address 0x007
+ access_mode RW
+}
+
+/*
+ * SCSI Transfer Count (pp. 3-19,20)
+ * These registers count down the number of bytes transferred
+ * across the SCSI bus. The counter is decremented only once
+ * the data has been safely transferred. SDONE in SSTAT0 is
+ * set when STCNT goes to 0
+ */
+register STCNT {
+ address 0x008
+ size 3
+ access_mode RW
+}
+
+/*
+ * Clear SCSI Interrupt 0 (p. 3-20)
+ * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0.
+ */
+register CLRSINT0 {
+ address 0x00b
+ access_mode WO
+ bit CLRSELDO 0x40
+ bit CLRSELDI 0x20
+ bit CLRSELINGO 0x10
+ bit CLRSWRAP 0x08
+ bit CLRSPIORDY 0x02
+}
+
+/*
+ * SCSI Status 0 (p. 3-21)
+ * Contains one set of SCSI Interrupt codes
+ * These are most likely of interest to the sequencer
+ */
+register SSTAT0 {
+ address 0x00b
+ access_mode RO
+ bit TARGET 0x80 /* Board acting as target */
+ bit SELDO 0x40 /* Selection Done */
+ bit SELDI 0x20 /* Board has been selected */
+ bit SELINGO 0x10 /* Selection In Progress */
+ bit SWRAP 0x08 /* 24bit counter wrap */
+ bit SDONE 0x04 /* STCNT = 0x000000 */
+ bit SPIORDY 0x02 /* SCSI PIO Ready */
+ bit DMADONE 0x01 /* DMA transfer completed */
+}
+
+/*
+ * Clear SCSI Interrupt 1 (p. 3-23)
+ * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
+ */
+register CLRSINT1 {
+ address 0x00c
+ access_mode WO
+ bit CLRSELTIMEO 0x80
+ bit CLRATNO 0x40
+ bit CLRSCSIRSTI 0x20
+ bit CLRBUSFREE 0x08
+ bit CLRSCSIPERR 0x04
+ bit CLRPHASECHG 0x02
+ bit CLRREQINIT 0x01
+}
+
+/*
+ * SCSI Status 1 (p. 3-24)
+ */
+register SSTAT1 {
+ address 0x00c
+ access_mode RO
+ bit SELTO 0x80
+ bit ATNTARG 0x40
+ bit SCSIRSTI 0x20
+ bit PHASEMIS 0x10
+ bit BUSFREE 0x08
+ bit SCSIPERR 0x04
+ bit PHASECHG 0x02
+ bit REQINIT 0x01
+}
+
+/*
+ * SCSI Status 2 (pp. 3-25,26)
+ */
+register SSTAT2 {
+ address 0x00d
+ access_mode RO
+ bit OVERRUN 0x80
+ mask SFCNT 0x1f
+}
+
+/*
+ * SCSI Status 3 (p. 3-26)
+ */
+register SSTAT3 {
+ address 0x00e
+ access_mode RO
+ mask SCSICNT 0xf0
+ mask OFFCNT 0x0f
+}
+
+/*
+ * SCSI Test Control (p. 3-27)
+ */
+register SCSITEST {
+ address 0x00f
+ access_mode RW
+ bit RQAKCNT 0x04
+ bit CNTRTEST 0x02
+ bit CMODE 0x01
+}
+
+/*
+ * SCSI Interrupt Mode 1 (p. 3-28)
+ * Setting any bit will enable the corresponding function
+ * in SIMODE0 to interrupt via the IRQ pin.
+ */
+register SIMODE0 {
+ address 0x010
+ access_mode RW
+ bit ENSELDO 0x40
+ bit ENSELDI 0x20
+ bit ENSELINGO 0x10
+ bit ENSWRAP 0x08
+ bit ENSDONE 0x04
+ bit ENSPIORDY 0x02
+ bit ENDMADONE 0x01
+}
+
+/*
+ * SCSI Interrupt Mode 1 (pp. 3-28,29)
+ * Setting any bit will enable the corresponding function
+ * in SIMODE1 to interrupt via the IRQ pin.
+ */
+register SIMODE1 {
+ address 0x011
+ access_mode RW
+ bit ENSELTIMO 0x80
+ bit ENATNTARG 0x40
+ bit ENSCSIRST 0x20
+ bit ENPHASEMIS 0x10
+ bit ENBUSFREE 0x08
+ bit ENSCSIPERR 0x04
+ bit ENPHASECHG 0x02
+ bit ENREQINIT 0x01
+}
+
+/*
+ * SCSI Data Bus (High) (p. 3-29)
+ * This register reads data on the SCSI Data bus directly.
+ */
+register SCSIBUSL {
+ address 0x012
+ access_mode RO
+}
+
+register SCSIBUSH {
+ address 0x013
+ access_mode RO
+}
+
+/*
+ * SCSI/Host Address (p. 3-30)
+ * These registers hold the host address for the byte about to be
+ * transferred on the SCSI bus. They are counted up in the same
+ * manner as STCNT is counted down. SHADDR should always be used
+ * to determine the address of the last byte transferred since HADDR
+ * can be skewed by write ahead.
+ */
+register SHADDR {
+ address 0x014
+ size 4
+ access_mode RO
+}
+
+/*
+ * Selection Timeout Timer (p. 3-30)
+ */
+register SELTIMER {
+ address 0x018
+ access_mode RW
+ bit STAGE6 0x20
+ bit STAGE5 0x10
+ bit STAGE4 0x08
+ bit STAGE3 0x04
+ bit STAGE2 0x02
+ bit STAGE1 0x01
+}
+
+/*
+ * Selection/Reselection ID (p. 3-31)
+ * Upper four bits are the device id. The ONEBIT is set when the re/selecting
+ * device did not set its own ID.
+ */
+register SELID {
+ address 0x019
+ access_mode RW
+ mask SELID_MASK 0xf0
+ bit ONEBIT 0x08
+}
+
+/*
+ * SCSI Block Control (p. 3-32)
+ * Controls Bus type and channel selection. In a twin channel configuration
+ * addresses 0x00-0x1e are gated to the appropriate channel based on this
+ * register. SELWIDE allows for the coexistence of 8bit and 16bit devices
+ * on a wide bus.
+ */
+register SBLKCTL {
+ address 0x01f
+ access_mode RW
+ bit DIAGLEDEN 0x80 /* Aic78X0 only */
+ bit DIAGLEDON 0x40 /* Aic78X0 only */
+ bit AUTOFLUSHDIS 0x20
+ bit SELBUSB 0x08
+ bit SELWIDE 0x02
+}
+
+/*
+ * Sequencer Control (p. 3-33)
+ * Error detection mode and speed configuration
+ */
+register SEQCTL {
+ address 0x060
+ access_mode RW
+ bit PERRORDIS 0x80
+ bit PAUSEDIS 0x40
+ bit FAILDIS 0x20
+ bit FASTMODE 0x10
+ bit BRKADRINTEN 0x08
+ bit STEP 0x04
+ bit SEQRESET 0x02
+ bit LOADRAM 0x01
+}
+
+/*
+ * Sequencer RAM Data (p. 3-34)
+ * Single byte window into the Scratch Ram area starting at the address
+ * specified by SEQADDR0 and SEQADDR1. To write a full word, simply write
+ * four bytes in sucessesion. The SEQADDRs will increment after the most
+ * significant byte is written
+ */
+register SEQRAM {
+ address 0x061
+ access_mode RW
+}
+
+/*
+ * Sequencer Address Registers (p. 3-35)
+ * Only the first bit of SEQADDR1 holds addressing information
+ */
+register SEQADDR0 {
+ address 0x062
+ access_mode RW
+}
+
+register SEQADDR1 {
+ address 0x063
+ access_mode RW
+ mask SEQADDR1_MASK 0x01
+}
+
+/*
+ * Accumulator
+ * We cheat by passing arguments in the Accumulator up to the kernel driver
+ */
+register ACCUM {
+ address 0x064
+ access_mode RW
+ accumulator
+}
+
+register SINDEX {
+ address 0x065
+ access_mode RW
+ sindex
+}
+
+register DINDEX {
+ address 0x066
+ access_mode RW
+}
+
+register ALLONES {
+ address 0x069
+ access_mode RO
+ allones
+}
+
+register ALLZEROS {
+ address 0x06a
+ access_mode RO
+ allzeros
+}
+
+register NONE {
+ address 0x06a
+ access_mode WO
+ none
+}
+
+register FLAGS {
+ address 0x06b
+ access_mode RO
+ bit ZERO 0x02
+ bit CARRY 0x01
+}
+
+register SINDIR {
+ address 0x06c
+ access_mode RO
+}
+
+register DINDIR {
+ address 0x06d
+ access_mode WO
+}
+
+register FUNCTION1 {
+ address 0x06e
+ access_mode RW
+}
+
+register STACK {
+ address 0x06f
+ access_mode RO
+}
+
+/*
+ * Board Control (p. 3-43)
+ */
+register BCTL {
+ address 0x084
+ access_mode RW
+ bit ACE 0x08
+ bit ENABLE 0x01
+}
+
+/*
+ * On the aic78X0 chips, Board Control is replaced by the DSCommand
+ * register (p. 4-64)
+ */
+register DSCOMMAND {
+ address 0x084
+ access_mode RW
+ bit CACHETHEN 0x80 /* Cache Threshold enable */
+ bit DPARCKEN 0x40 /* Data Parity Check Enable */
+ bit MPARCKEN 0x20 /* Memory Parity Check Enable */
+ bit EXTREQLCK 0x10 /* External Request Lock */
+}
+
+/*
+ * Bus On/Off Time (p. 3-44)
+ */
+register BUSTIME {
+ address 0x085
+ access_mode RW
+ mask BOFF 0xf0
+ mask BON 0x0f
+}
+
+/*
+ * Bus Speed (p. 3-45)
+ */
+register BUSSPD {
+ address 0x086
+ access_mode RW
+ mask DFTHRSH 0xc0
+ mask STBOFF 0x38
+ mask STBON 0x07
+ mask DFTHRSH_100 0xc0
+}
+
+/*
+ * Host Control (p. 3-47) R/W
+ * Overall host control of the device.
+ */
+register HCNTRL {
+ address 0x087
+ access_mode RW
+ bit POWRDN 0x40
+ bit SWINT 0x10
+ bit IRQMS 0x08
+ bit PAUSE 0x04
+ bit INTEN 0x02
+ bit CHIPRST 0x01
+ bit CHIPRSTACK 0x01
+}
+
+/*
+ * Host Address (p. 3-48)
+ * This register contains the address of the byte about
+ * to be transferred across the host bus.
+ */
+register HADDR {
+ address 0x088
+ size 4
+ access_mode RW
+}
+
+register HCNT {
+ address 0x08c
+ size 3
+ access_mode RW
+}
+
+/*
+ * SCB Pointer (p. 3-49)
+ * Gate one of the four SCBs into the SCBARRAY window.
+ */
+register SCBPTR {
+ address 0x090
+ access_mode RW
+}
+
+/*
+ * Interrupt Status (p. 3-50)
+ * Status for system interrupts
+ */
+register INTSTAT {
+ address 0x091
+ access_mode RW
+ bit BRKADRINT 0x08
+ bit SCSIINT 0x04
+ bit CMDCMPLT 0x02
+ bit SEQINT 0x01
+ mask BAD_PHASE SEQINT /* unknown scsi bus phase */
+ mask SEND_REJECT 0x10|SEQINT /* sending a message reject */
+ mask NO_IDENT 0x20|SEQINT /* no IDENTIFY after reconnect*/
+ mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */
+ mask EXTENDED_MSG 0x40|SEQINT /* Extended message received */
+ mask NO_MATCH_BUSY 0x50|SEQINT /* Couldn't find BUSY SCB */
+ mask REJECT_MSG 0x60|SEQINT /* Reject message received */
+ mask BAD_STATUS 0x70|SEQINT /* Bad status from target */
+ mask RESIDUAL 0x80|SEQINT /* Residual byte count != 0 */
+ mask ABORT_CMDCMPLT 0x91 /*
+ * Command tagged for abort
+ * completed successfully.
+ */
+ mask AWAITING_MSG 0xa0|SEQINT /*
+ * Kernel requested to specify
+ * a message to this target
+ * (command was null), so tell
+ * it that it can fill the
+ * message buffer.
+ */
+ mask MSG_BUFFER_BUSY 0xc0|SEQINT /*
+ * Sequencer wants to use the
+ * message buffer, but it
+ * already contains a message
+ */
+ mask MSGIN_PHASEMIS 0xd0|SEQINT /*
+ * Target changed phase on us
+ * when we were expecting
+ * another msgin byte.
+ */
+ mask DATA_OVERRUN 0xe0|SEQINT /*
+ * Target attempted to write
+ * beyond the bounds of its
+ * command.
+ */
+
+ mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */
+ mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT)
+}
+
+/*
+ * Hard Error (p. 3-53)
+ * Reporting of catastrophic errors. You usually cannot recover from
+ * these without a full board reset.
+ */
+register ERROR {
+ address 0x092
+ access_mode RO
+ bit PARERR 0x08
+ bit ILLOPCODE 0x04
+ bit ILLSADDR 0x02
+ bit ILLHADDR 0x01
+}
+
+/*
+ * Clear Interrupt Status (p. 3-52)
+ */
+register CLRINT {
+ address 0x092
+ access_mode WO
+ bit CLRBRKADRINT 0x08
+ bit CLRSCSIINT 0x04
+ bit CLRCMDINT 0x02
+ bit CLRSEQINT 0x01
+}
+
+register DFCNTRL {
+ address 0x093
+ access_mode RW
+ bit WIDEODD 0x40
+ bit SCSIEN 0x20
+ bit SDMAEN 0x10
+ bit SDMAENACK 0x10
+ bit HDMAEN 0x08
+ bit HDMAENACK 0x08
+ bit DIRECTION 0x04
+ bit FIFOFLUSH 0x02
+ bit FIFORESET 0x01
+}
+
+register DFSTATUS {
+ address 0x094
+ access_mode RO
+ bit DWORDEMP 0x20
+ bit MREQPEND 0x10
+ bit HDONE 0x08
+ bit DFTHRESH 0x04
+ bit FIFOFULL 0x02
+ bit FIFOEMP 0x01
+}
+
+register DFDAT {
+ address 0x099
+ access_mode RW
+}
+
+/*
+ * SCB Auto Increment (p. 3-59)
+ * Byte offset into the SCB Array and an optional bit to allow auto
+ * incrementing of the address during download and upload operations
+ */
+register SCBCNT {
+ address 0x09a
+ access_mode RW
+ bit SCBAUTO 0x80
+ mask SCBCNT_MASK 0x1f
+}
+
+/*
+ * Queue In FIFO (p. 3-60)
+ * Input queue for queued SCBs (commands that the seqencer has yet to start)
+ */
+register QINFIFO {
+ address 0x09b
+ access_mode RW
+}
+
+/*
+ * Queue In Count (p. 3-60)
+ * Number of queued SCBs
+ */
+register QINCNT {
+ address 0x09c
+ access_mode RO
+}
+
+/*
+ * Queue Out FIFO (p. 3-61)
+ * Queue of SCBs that have completed and await the host
+ */
+register QOUTFIFO {
+ address 0x09d
+ access_mode WO
+}
+
+/*
+ * Queue Out Count (p. 3-61)
+ * Number of queued SCBs in the Out FIFO
+ */
+register QOUTCNT {
+ address 0x09e
+ access_mode RO
+}
+
+/*
+ * SCB Definition (p. 5-4)
+ */
+scb {
+ address 0x0a0
+ SCB_CONTROL {
+ size 1
+ bit MK_MESSAGE 0x80
+ bit DISCENB 0x40
+ bit TAG_ENB 0x20
+ bit MUST_DMAUP_SCB 0x10
+ bit ABORT_SCB 0x08
+ bit DISCONNECTED 0x04
+ mask SCB_TAG_TYPE 0x03
+ }
+ SCB_TCL {
+ size 1
+ bit SELBUSB 0x08
+ mask TID 0xf0
+ mask LID 0x07
+ }
+ SCB_TARGET_STATUS {
+ size 1
+ }
+ SCB_SGCOUNT {
+ size 1
+ }
+ SCB_SGPTR {
+ size 4
+ }
+ SCB_RESID_SGCNT {
+ size 1
+ }
+ SCB_RESID_DCNT {
+ size 3
+ }
+ SCB_DATAPTR {
+ size 4
+ }
+ SCB_DATACNT {
+ size 3
+ }
+ SCB_LINKED_NEXT {
+ size 1
+ }
+ SCB_CMDPTR {
+ size 4
+ }
+ SCB_CMDLEN {
+ size 1
+ }
+ SCB_TAG {
+ size 1
+ }
+ SCB_NEXT {
+ size 1
+ }
+ SCB_PREV {
+ size 1
+ }
+ SCB_BUSYTARGETS {
+ size 4
+ }
+}
+
+const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
+
+/* --------------------- AHA-2840-only definitions -------------------- */
+
+register SEECTL_2840 {
+ address 0x0c0
+ access_mode RW
+ bit CS_2840 0x04
+ bit CK_2840 0x02
+ bit DO_2840 0x01
+}
+
+register STATUS_2840 {
+ address 0x0c1
+ access_mode RW
+ bit EEPROM_TF 0x80
+ mask BIOS_SEL 0x60
+ mask ADSEL 0x1e
+ bit DI_2840 0x01
+}
+
+/* --------------------- AIC-7870-only definitions -------------------- */
+
+register DSPCISTATUS {
+ address 0x086
+}
+
+register BRDCTL {
+ address 0x01d
+ bit BRDDAT7 0x80
+ bit BRDDAT6 0x40
+ bit BRDDAT5 0x20
+ bit BRDSTB 0x10
+ bit BRDCS 0x08
+ bit BRDRW 0x04
+ bit BRDCTL1 0x02
+ bit BRDCTL0 0x01
+}
+
+/*
+ * Serial EEPROM Control (p. 4-92 in 7870 Databook)
+ * Controls the reading and writing of an external serial 1-bit
+ * EEPROM Device. In order to access the serial EEPROM, you must
+ * first set the SEEMS bit that generates a request to the memory
+ * port for access to the serial EEPROM device. When the memory
+ * port is not busy servicing another request, it reconfigures
+ * to allow access to the serial EEPROM. When this happens, SEERDY
+ * gets set high to verify that the memory port access has been
+ * granted.
+ *
+ * After successful arbitration for the memory port, the SEECS bit of
+ * the SEECTL register is connected to the chip select. The SEECK,
+ * SEEDO, and SEEDI are connected to the clock, data out, and data in
+ * lines respectively. The SEERDY bit of SEECTL is useful in that it
+ * gives us an 800 nsec timer. After a write to the SEECTL register,
+ * the SEERDY goes high 800 nsec later. The one exception to this is
+ * when we first request access to the memory port. The SEERDY goes
+ * high to signify that access has been granted and, for this case, has
+ * no implied timing.
+ *
+ * See 93cx6.c for detailed information on the protocol necessary to
+ * read the serial EEPROM.
+ */
+register SEECTL {
+ address 0x01e
+ bit EXTARBACK 0x80
+ bit EXTARBREQ 0x40
+ bit SEEMS 0x20
+ bit SEERDY 0x10
+ bit SEECS 0x08
+ bit SEECK 0x04
+ bit SEEDO 0x02
+ bit SEEDI 0x01
+}
+/* ---------------------- Scratch RAM Offsets ------------------------- */
+/* These offsets are either to values that are initialized by the board's
+ * BIOS or are specified by the sequencer code.
+ *
+ * The host adapter card (at least the BIOS) uses 20-2f for SCSI
+ * device information, 32-33 and 5a-5f as well. As it turns out, the
+ * BIOS trashes 20-2f, writing the synchronous negotiation results
+ * on top of the BIOS values, so we re-use those for our per-target
+ * scratchspace (actually a value that can be copied directly into
+ * SCSIRATE). The kernel driver will enable synchronous negotiation
+ * for all targets that have a value other than 0 in the lower four
+ * bits of the target scratch space. This should work regardless of
+ * whether the bios has been installed.
+ */
+
+scratch_ram {
+ address 0x020
+
+ /*
+ * 1 byte per target starting at this address for configuration values
+ */
+ TARG_SCRATCH {
+ size 16
+ }
+ ULTRA_ENB {
+ size 2
+ }
+ /*
+ * Bit vector of targets that have disconnection disabled.
+ */
+ DISC_DSB {
+ size 2
+ }
+ /*
+ * Length of pending message
+ */
+ MSG_LEN {
+ size 1
+ }
+ /* We reserve 8bytes to store outgoing messages */
+ MSG_OUT {
+ size 8
+ }
+ /* Parameters for DMA Logic */
+ DMAPARAMS {
+ size 1
+ bit WIDEODD 0x40
+ bit SCSIEN 0x20
+ bit SDMAEN 0x10
+ bit SDMAENACK 0x10
+ bit HDMAEN 0x08
+ bit HDMAENACK 0x08
+ bit DIRECTION 0x04
+ bit FIFOFLUSH 0x02
+ bit FIFORESET 0x01
+ }
+ /*
+ * Number of SCBs supported by
+ * this card.
+ */
+ SCBCOUNT {
+ size 1
+ }
+ /*
+ * Two's complement of SCBCOUNT
+ */
+ COMP_SCBCOUNT {
+ size 1
+ }
+ /*
+ * Mask of bits to test against
+ * when looking at the Queue Count
+ * registers. Works around a bug
+ * on aic7850 chips.
+ */
+ QCNTMASK {
+ size 1
+ }
+ SEQ_FLAGS {
+ size 1
+ bit RESELECTED 0x80
+ bit IDENTIFY_SEEN 0x40
+ bit TAGGED_SCB 0x20
+ bit DPHASE 0x10
+ bit PAGESCBS 0x04
+ bit WIDE_BUS 0x02
+ bit TWIN_BUS 0x01
+ }
+ /*
+ * Temporary storage for the
+ * target/channel/lun of a
+ * reconnecting target
+ */
+ SAVED_TCL {
+ size 1
+ }
+ SG_COUNT {
+ size 1
+ }
+ /* working value of SG pointer */
+ SG_NEXT {
+ size 4
+ }
+ /*
+ * head of list of SCBs awaiting
+ * selection
+ */
+ WAITING_SCBH {
+ size 1
+ }
+ SAVED_LINKPTR {
+ size 1
+ }
+ SAVED_SCBPTR {
+ size 1
+ }
+ /*
+ * The sequencer will stick the frist byte of any rejected message here
+ * so we can see what is getting thrown away.
+ */
+ REJBYTE {
+ size 1
+ }
+ /*
+ * The last bus phase as seen by the sequencer.
+ */
+ LASTPHASE {
+ size 1
+ bit CDI 0x80
+ bit IOI 0x40
+ bit MSGI 0x20
+ mask PHASE_MASK CDI|IOI|MSGI
+ mask P_DATAOUT 0x00
+ mask P_DATAIN IOI
+ mask P_COMMAND CDI
+ mask P_MESGOUT CDI|MSGI
+ mask P_STATUS CDI|IOI
+ mask P_MESGIN CDI|IOI|MSGI
+ mask P_BUSFREE 0x01
+ }
+ MSGIN_EXT_LEN {
+ size 1
+ }
+ MSGIN_EXT_OPCODE {
+ size 1
+ }
+ /*
+ * location 3, stores the last
+ * byte of an extended message if
+ * it passes the two bytes of space
+ * we allow now. This byte isn't
+ * used for anything, it just makes
+ * the code shorter for tossing
+ * extra bytes.
+ */
+ MSGIN_EXT_BYTES {
+ size 3
+ }
+ /*
+ * head of list of SCBs that are
+ * disconnected. Used for SCB
+ * paging.
+ */
+ DISCONNECTED_SCBH {
+ size 1
+ }
+ /*
+ * head of list of SCBs that are
+ * not in use. Used for SCB paging.
+ */
+ FREE_SCBH {
+ size 1
+ }
+ HSCB_ADDR {
+ size 4
+ }
+ CUR_SCBID {
+ size 1
+ }
+ /*
+ * Running count of commands placed in
+ * the QOUTFIFO. This is cleared by the
+ * kernel driver every FIFODEPTH commands.
+ */
+ CMDOUTCNT {
+ size 1
+ }
+ /*
+ * Maximum number of entries allowed in
+ * the QOUT/INFIFO.
+ */
+ FIFODEPTH {
+ size 1
+ }
+ ARG_1 {
+ size 1
+ mask SEND_MSG 0x80
+ mask SEND_SENSE 0x40
+ mask SEND_REJ 0x20
+ alias RETURN_1
+ }
+ /*
+ * These are reserved registers in the card's scratch ram. Some of
+ * the values are specified in the AHA2742 technical reference manual
+ * and are initialized by the BIOS at boot time.
+ */
+ SCSICONF {
+ address 0x05a
+ size 1
+ bit RESET_SCSI 0x40
+ }
+ HOSTCONF {
+ address 0x05d
+ size 1
+ }
+ HA_274_BIOSCTRL {
+ address 0x05f
+ size 1
+ mask BIOSMODE 0x30
+ mask BIOSDISABLED 0x30
+ bit CHANNEL_B_PRIMARY 0x08
+ }
+}
+
+const SCB_LIST_NULL 0xff
+
+
+/* WDTR Message values */
+const BUS_8_BIT 0x00
+const BUS_16_BIT 0x01
+const BUS_32_BIT 0x02
+const MAX_OFFSET_8BIT 0x0f
+const MAX_OFFSET_16BIT 0x08
diff --git a/drivers/scsi/aic7xxx/aic7xxx.seq b/drivers/scsi/aic7xxx/aic7xxx.seq
new file mode 100644
index 000000000..d08fd7aaf
--- /dev/null
+++ b/drivers/scsi/aic7xxx/aic7xxx.seq
@@ -0,0 +1,1156 @@
+/*
+ * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
+ *
+ * Copyright (c) 1994-1997 Justin Gibbs.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * Where this Software is combined with software released under the terms of
+ * the GNU Public License ("GPL") and the terms of the GPL would require the
+ * combined work to also be released under the terms of the GPL, the terms
+ * and conditions of this License will apply in addition to those of the
+ * GPL with the exception of any terms or conditions of this License that
+ * conflict with, or are expressly prohibited by, the GPL.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: aic7xxx.seq,v 1.2 1997/08/30 02:17:29 ralf Exp $
+ */
+
+#include <aic7xxx.reg>
+#include <scsi_message.h>
+
+/*
+ * A few words on the waiting SCB list:
+ * After starting the selection hardware, we check for reconnecting targets
+ * as well as for our selection to complete just in case the reselection wins
+ * bus arbitration. The problem with this is that we must keep track of the
+ * SCB that we've already pulled from the QINFIFO and started the selection
+ * on just in case the reselection wins so that we can retry the selection at
+ * a later time. This problem cannot be resolved by holding a single entry
+ * in scratch ram since a reconnecting target can request sense and this will
+ * create yet another SCB waiting for selection. The solution used here is to
+ * use byte 27 of the SCB as a psuedo-next pointer and to thread a list
+ * of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes,
+ * SCB_LIST_NULL is 0xff which is out of range. An entry is also added to
+ * this list everytime a request sense occurs or after completing a non-tagged
+ * command for which a second SCB has been queued. The sequencer will
+ * automatically consume the entries.
+ */
+
+/*
+ * We assume that the kernel driver may reset us at any time, even in the
+ * middle of a DMA, so clear DFCNTRL too.
+ */
+reset:
+ clr SCSISIGO; /* De-assert BSY */
+ /* Always allow reselection */
+ mvi SCSISEQ, ENRSELI|ENAUTOATNP;
+ call clear_target_state;
+poll_for_work:
+ test SSTAT0,SELDO jnz select;
+ test SSTAT0,SELDI jnz reselect;
+ test SCSISEQ, ENSELO jnz poll_for_work;
+.if ( TWIN_CHANNEL )
+ /*
+ * Twin channel devices cannot handle things like SELTO
+ * interrupts on the "background" channel. So, if we
+ * are selecting, keep polling the current channel util
+ * either a selection or reselection occurs.
+ */
+ xor SBLKCTL,SELBUSB; /* Toggle to the other bus */
+ test SSTAT0,SELDO jnz select;
+ test SSTAT0,SELDI jnz reselect;
+ test SCSISEQ, ENSELO jnz poll_for_work;
+ xor SBLKCTL,SELBUSB; /* Toggle back */
+.endif
+ cmp WAITING_SCBH,SCB_LIST_NULL jne start_waiting;
+test_queue:
+ /* Has the driver posted any work for us? */
+ mov A, QCNTMASK;
+ test QINCNT,A jz poll_for_work;
+
+/*
+ * We have at least one queued SCB now and we don't have any
+ * SCBs in the list of SCBs awaiting selection. If we have
+ * any SCBs available for use, pull the tag from the QINFIFO
+ * and get to work on it.
+ */
+.if ( SCB_PAGING )
+ mov ALLZEROS call get_free_or_disc_scb;
+ cmp SINDEX, SCB_LIST_NULL je poll_for_work;
+.endif
+dequeue_scb:
+ mov CUR_SCBID,QINFIFO;
+.if !( SCB_PAGING )
+ /* In the non-paging case, the SCBID == hardware SCB index */
+ mov SCBPTR, CUR_SCBID;
+.endif
+dma_queued_scb:
+/*
+ * DMA the SCB from host ram into the current SCB location.
+ */
+ mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
+ mov CUR_SCBID call dma_scb;
+
+/*
+ * See if there is not already an active SCB for this target. This code
+ * locks out on a per target basis instead of target/lun. Although this
+ * is not ideal for devices that have multiple luns active at the same
+ * time, it is faster than looping through all SCB's looking for active
+ * commands. We also don't have enough spare SCB space for us to store the
+ * SCBID of the currently busy transaction for each target/lun making it
+ * impossible to link up the SCBs.
+ */
+test_busy:
+ test SCB_CONTROL, TAG_ENB|ABORT_SCB jnz start_scb;
+ mvi SEQCTL, PAUSEDIS|FASTMODE;
+ mov SAVED_SCBPTR, SCBPTR;
+ mov SCB_TCL call index_untagged_scb;
+ mov ARG_1, SINDIR; /*
+ * ARG_1 should
+ * now have the SCB ID of
+ * any active, non-tagged,
+ * command for this target.
+ */
+ cmp ARG_1, SCB_LIST_NULL je make_busy;
+.if ( SCB_PAGING )
+ /*
+ * Put this SCB back onto the free list. It
+ * may be necessary to satisfy the search for
+ * the active SCB.
+ */
+ mov SCBPTR, SAVED_SCBPTR;
+ call add_scb_to_free_list;
+ /* Find the active SCB */
+ mov ALLZEROS call findSCB;
+ /*
+ * If we couldn't find it, tell the kernel. This should
+ * never happen.
+ */
+ cmp SINDEX, SCB_LIST_NULL jne paged_busy_link;
+ mvi INTSTAT, NO_MATCH_BUSY;
+paged_busy_link:
+ /* Link us in */
+ mov SCB_LINKED_NEXT, CUR_SCBID;
+ /* Put it back on the disconnected list */
+ call add_scb_to_disc_list;
+ mvi SEQCTL, FASTMODE;
+ jmp poll_for_work;
+.else
+simple_busy_link:
+ mov SCBPTR, ARG_1;
+ mov SCB_LINKED_NEXT, CUR_SCBID;
+ mvi SEQCTL, FASTMODE;
+ jmp poll_for_work;
+.endif
+make_busy:
+ mov DINDIR, CUR_SCBID;
+ mov SCBPTR, SAVED_SCBPTR;
+ mvi SEQCTL, FASTMODE;
+
+start_scb:
+ /*
+ * Place us on the waiting list in case our selection
+ * doesn't win during bus arbitration.
+ */
+ mov SCB_NEXT,WAITING_SCBH;
+ mov WAITING_SCBH, SCBPTR;
+start_waiting:
+ /*
+ * Pull the first entry off of the waiting SCB list
+ * We don't have to "test_busy" because only transactions that
+ * have passed that test can be in the WAITING_SCB list.
+ */
+ mov SCBPTR, WAITING_SCBH;
+ call start_selection;
+ jmp poll_for_work;
+
+start_selection:
+.if ( TWIN_CHANNEL )
+ and SINDEX,~SELBUSB,SBLKCTL;/* Clear the channel select bit */
+ and A,SELBUSB,SCB_TCL; /* Get new channel bit */
+ or SINDEX,A;
+ mov SBLKCTL,SINDEX; /* select channel */
+.endif
+initialize_scsiid:
+ and A, TID, SCB_TCL; /* Get target ID */
+ and SCSIID, OID; /* Clear old target */
+ or SCSIID, A;
+ mvi SCSISEQ, ENSELO|ENAUTOATNO|ENRSELI|ENAUTOATNP ret;
+/*
+ * Reselection has been initiated by a target. Make a note that we've been
+ * reselected, but haven't seen an IDENTIFY message from the target yet.
+ */
+reselect:
+ clr MSG_LEN; /* Don't have anything in the mesg buffer */
+ mvi CLRSINT0, CLRSELDI;
+ /* XXX test for and handle ONE BIT condition */
+ and SAVED_TCL, SELID_MASK, SELID;
+ or SEQ_FLAGS,RESELECTED;
+ jmp select2;
+
+/*
+ * After the selection, remove this SCB from the "waiting SCB"
+ * list. This is achieved by simply moving our "next" pointer into
+ * WAITING_SCBH. Our next pointer will be set to null the next time this
+ * SCB is used, so don't bother with it now.
+ */
+select:
+ /* Turn off the selection hardware */
+ mvi SCSISEQ, ENRSELI|ENAUTOATNP; /*
+ * ATN on parity errors
+ * for "in" phases
+ */
+ mvi CLRSINT0, CLRSELDO;
+ mov SCBPTR, WAITING_SCBH;
+ mov WAITING_SCBH,SCB_NEXT;
+ mov SAVED_TCL, SCB_TCL;
+/*
+ * As soon as we get a successful selection, the target should go
+ * into the message out phase since we have ATN asserted. Prepare
+ * the message to send.
+ *
+ * Messages are stored in scratch RAM starting with a length byte
+ * followed by the message itself.
+ */
+
+mk_identify:
+ and MSG_OUT,0x7,SCB_TCL; /* lun */
+ and A,DISCENB,SCB_CONTROL; /* mask off disconnect privledge */
+ or MSG_OUT,A; /* or in disconnect privledge */
+ or MSG_OUT,MSG_IDENTIFYFLAG;
+ mvi MSG_LEN, 1;
+
+/*
+ * Send a tag message if TAG_ENB is set in the SCB control block.
+ * Use SCB_TAG (the position in the kernel's SCB array) as the tag value.
+ */
+mk_tag:
+ test SCB_CONTROL,TAG_ENB jz mk_message;
+ and MSG_OUT[1],TAG_ENB|SCB_TAG_TYPE,SCB_CONTROL;
+ mov MSG_OUT[2],SCB_TAG;
+ add MSG_LEN,2; /* update message length */
+
+/*
+ * Interrupt the driver, and allow it to tweak the message buffer
+ * if it asks.
+ */
+mk_message:
+ test SCB_CONTROL,MK_MESSAGE jz select2;
+ mvi INTSTAT,AWAITING_MSG;
+
+select2:
+ mvi CLRSINT1,CLRBUSFREE;
+ or SIMODE1, ENBUSFREE; /*
+ * We aren't expecting a
+ * bus free, so interrupt
+ * the kernel driver if it
+ * happens.
+ */
+/*
+ * Initialize Ultra mode setting and clear the SCSI channel.
+ */
+ or SXFRCTL0, CLRSTCNT|SPIOEN|CLRCHN;
+.if ( ULTRA )
+ultra:
+ mvi SINDEX, ULTRA_ENB+1;
+ test SAVED_TCL, 0x80 jnz ultra_2; /* Target ID > 7 */
+ dec SINDEX;
+ultra_2:
+ mov FUNCTION1,SAVED_TCL;
+ mov A,FUNCTION1;
+ test SINDIR, A jz ndx_dtr;
+ or SXFRCTL0, FAST20;
+.endif
+
+/*
+ * Initialize SCSIRATE with the appropriate value for this target.
+ * The SCSIRATE settings for each target are stored in an array
+ * based at TARG_SCRATCH.
+ */
+ndx_dtr:
+ shr A,4,SAVED_TCL;
+ test SBLKCTL,SELBUSB jz ndx_dtr_2;
+ or SAVED_TCL, SELBUSB; /* Add the channel bit while we're here */
+ or A,0x08; /* Channel B entries add 8 */
+ndx_dtr_2:
+ add SINDEX,TARG_SCRATCH,A;
+ mov SCSIRATE,SINDIR;
+
+
+/*
+ * Main loop for information transfer phases. If BSY is false, then
+ * we have a bus free condition, expected or not. Otherwise, wait
+ * for the target to assert REQ before checking MSG, C/D and I/O
+ * for the bus phase.
+ *
+ */
+ITloop:
+ test SSTAT1,REQINIT jz ITloop;
+ test SSTAT1, SCSIPERR jnz ITloop;
+
+ and A,PHASE_MASK,SCSISIGI;
+ mov LASTPHASE,A;
+ mov SCSISIGO,A;
+
+ cmp ALLZEROS,A je p_dataout;
+ cmp A,P_DATAIN je p_datain;
+ cmp A,P_COMMAND je p_command;
+ cmp A,P_MESGOUT je p_mesgout;
+ cmp A,P_STATUS je p_status;
+ cmp A,P_MESGIN je p_mesgin;
+
+ mvi INTSTAT,BAD_PHASE; /* unknown phase - signal driver */
+ jmp ITloop; /* Try reading the bus again. */
+
+await_busfree:
+ and SIMODE1, ~ENBUSFREE;
+ call clear_target_state;
+ mov NONE, SCSIDATL; /* Ack the last byte */
+ test SSTAT1,REQINIT|BUSFREE jz .;
+ test SSTAT1, BUSFREE jnz poll_for_work;
+ mvi INTSTAT, BAD_PHASE;
+
+clear_target_state:
+ clr DFCNTRL;
+ clr SCSIRATE; /*
+ * We don't know the target we will
+ * connect to, so default to narrow
+ * transfers to avoid parity problems.
+ */
+ and SXFRCTL0, ~FAST20;
+ mvi LASTPHASE, P_BUSFREE;
+ /* clear target specific flags */
+ and SEQ_FLAGS,~(RESELECTED|IDENTIFY_SEEN|TAGGED_SCB|DPHASE) ret;
+
+p_dataout:
+ mvi DMAPARAMS, WIDEODD|SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET;
+ jmp data_phase_init;
+
+/*
+ * If we re-enter the data phase after going through another phase, the
+ * STCNT may have been cleared, so restore it from the residual field.
+ */
+data_phase_reinit:
+ mvi DINDEX, STCNT;
+ mvi SCB_RESID_DCNT call bcopy_3;
+ jmp data_phase_loop;
+
+p_datain:
+ mvi DMAPARAMS, WIDEODD|SCSIEN|SDMAEN|HDMAEN|FIFORESET;
+data_phase_init:
+ call assert; /*
+ * Ensure entering a data
+ * phase is okay - seen identify, etc.
+ */
+
+ test SEQ_FLAGS, DPHASE jnz data_phase_reinit;
+
+ /*
+ * Initialize the DMA address and counter from the SCB.
+ * Also set SG_COUNT and SG_NEXT in memory since we cannot
+ * modify the values in the SCB itself until we see a
+ * save data pointers message.
+ */
+ mvi DINDEX, HADDR;
+ mvi SCB_DATAPTR call bcopy_7;
+
+ call set_stcnt_from_hcnt;
+
+ mov SG_COUNT,SCB_SGCOUNT;
+
+ mvi DINDEX, SG_NEXT;
+ mvi SCB_SGPTR call bcopy_4;
+
+data_phase_loop:
+/* Guard against overruns */
+ test SG_COUNT, 0xff jnz data_phase_inbounds;
+/*
+ * Turn on 'Bit Bucket' mode, set the transfer count to
+ * 16meg and let the target run until it changes phase.
+ * When the transfer completes, notify the host that we
+ * had an overrun.
+ */
+ or SXFRCTL1,BITBUCKET;
+ mvi HCNT[0], 0xff;
+ mvi HCNT[1], 0xff;
+ mvi HCNT[2], 0xff;
+ call set_stcnt_from_hcnt;
+
+data_phase_inbounds:
+/* If we are the last SG block, ensure wideodd is off. */
+ cmp SG_COUNT,0x01 jne data_phase_wideodd;
+ and DMAPARAMS, ~WIDEODD;
+data_phase_wideodd:
+ mov DMAPARAMS call dma;
+
+/* Go tell the host about any overruns */
+ test SXFRCTL1,BITBUCKET jnz data_phase_overrun;
+
+/* Exit if we had an underrun. dma clears SINDEX in this case. */
+ test SINDEX,0xff jz data_phase_finish;
+
+/*
+ * Advance the scatter-gather pointers if needed
+ */
+sg_advance:
+ dec SG_COUNT; /* one less segment to go */
+
+ test SG_COUNT, 0xff jz data_phase_finish; /* Are we done? */
+
+ clr A; /* add sizeof(struct scatter) */
+ add SG_NEXT[0],SG_SIZEOF;
+ adc SG_NEXT[1],A;
+
+/*
+ * Load a struct scatter and set up the data address and length.
+ * If the working value of the SG count is nonzero, then
+ * we need to load a new set of values.
+ *
+ * This, like all DMA's, assumes little-endian host data storage.
+ */
+sg_load:
+ mvi DINDEX, HADDR;
+ mvi SG_NEXT call bcopy_4;
+
+ mvi HCNT[0],SG_SIZEOF;
+ clr HCNT[1];
+ clr HCNT[2];
+
+ or DFCNTRL, HDMAEN|DIRECTION|FIFORESET;
+
+ call dma_finish;
+
+/*
+ * Copy data from FIFO into SCB data pointer and data count. This assumes
+ * that the SG segments are of the form:
+ *
+ * struct ahc_dma_seg {
+ * u_int32_t addr; four bytes, little-endian order
+ * u_int32_t len; four bytes, little endian order
+ * };
+ */
+ mvi HADDR call dfdat_in_7;
+
+/* Load STCNT as well. It is a mirror of HCNT */
+ call set_stcnt_from_hcnt;
+ test SSTAT1,PHASEMIS jz data_phase_loop;
+
+data_phase_finish:
+/*
+ * After a DMA finishes, save the SG and STCNT residuals back into the SCB
+ * We use STCNT instead of HCNT, since it's a reflection of how many bytes
+ * were transferred on the SCSI (as opposed to the host) bus.
+ */
+ mov SCB_RESID_DCNT[0],STCNT[0];
+ mov SCB_RESID_DCNT[1],STCNT[1];
+ mov SCB_RESID_DCNT[2],STCNT[2];
+ mov SCB_RESID_SGCNT, SG_COUNT;
+
+ /* We have seen a data phase */
+ or SEQ_FLAGS, DPHASE;
+
+ jmp ITloop;
+
+data_phase_overrun:
+/*
+ * Turn off BITBUCKET mode and notify the host
+ */
+ and SXFRCTL1, ~BITBUCKET;
+ mvi INTSTAT,DATA_OVERRUN;
+ jmp ITloop;
+
+/*
+ * Command phase. Set up the DMA registers and let 'er rip.
+ */
+p_command:
+ call assert;
+
+/*
+ * Load HADDR and HCNT.
+ */
+ mvi DINDEX, HADDR;
+ mvi SCB_CMDPTR call bcopy_5;
+ clr HCNT[1];
+ clr HCNT[2];
+
+ call set_stcnt_from_hcnt;
+
+ mvi (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET) call dma;
+ jmp ITloop;
+
+/*
+ * Status phase. Wait for the data byte to appear, then read it
+ * and store it into the SCB.
+ */
+p_status:
+ call assert;
+
+ mov SCB_TARGET_STATUS, SCSIDATL;
+ jmp ITloop;
+
+/*
+ * Message out phase. If there is not an active message, but the target
+ * took us into this phase anyway, build a no-op message and send it.
+ */
+p_mesgout:
+ test MSG_LEN, 0xff jnz p_mesgout_start;
+ mvi MSG_NOOP call mk_mesg; /* build NOP message */
+p_mesgout_start:
+/*
+ * Set up automatic PIO transfer from MSG_OUT. Bit 3 in
+ * SXFRCTL0 (SPIOEN) is already on.
+ */
+ mvi SINDEX,MSG_OUT;
+ mov DINDEX,MSG_LEN;
+
+/*
+ * When target asks for a byte, drop ATN if it's the last one in
+ * the message. Otherwise, keep going until the message is exhausted.
+ * ATN must be dropped *at least* 90ns before we ack the last byte, so
+ * the code is aranged to execute two instructions before the byte is
+ * transferred to give a good margin of safety
+ *
+ * Keep an eye out for a phase change, in case the target issues
+ * a MESSAGE REJECT.
+ */
+p_mesgout_loop:
+ test SSTAT1, REQINIT jz p_mesgout_loop;
+ test SSTAT1, SCSIPERR jnz p_mesgout_loop;
+ and LASTPHASE, PHASE_MASK, SCSISIGI;
+ cmp LASTPHASE, P_MESGOUT jne p_mesgout_done;
+p_mesgout_testretry:
+ test DINDEX,0xff jnz p_mesgout_dropatn;
+ or SCSISIGO,ATNO,LASTPHASE;/* turn on ATN for the retry */
+ jmp p_mesgout_start;
+/*
+ * If the next bus phase after ATN drops is a message out, it means
+ * that the target is requesting that the last message(s) be resent.
+ */
+p_mesgout_dropatn:
+ cmp DINDEX,1 jne p_mesgout_outb; /* last byte? */
+ mvi CLRSINT1,CLRATNO; /* drop ATN */
+p_mesgout_outb:
+ dec DINDEX;
+ mov SCSIDATL,SINDIR;
+ jmp p_mesgout_loop;
+
+p_mesgout_done:
+ mvi CLRSINT1,CLRATNO; /* Be sure to turn ATNO off */
+ clr MSG_LEN; /* no active msg */
+ jmp ITloop;
+
+/*
+ * Message in phase. Bytes are read using Automatic PIO mode.
+ */
+p_mesgin:
+ mvi ACCUM call inb_first; /* read the 1st message byte */
+ mov REJBYTE,A; /* save it for the driver */
+
+ test A,MSG_IDENTIFYFLAG jnz mesgin_identify;
+ cmp A,MSG_DISCONNECT je mesgin_disconnect;
+ cmp A,MSG_SAVEDATAPOINTER je mesgin_sdptrs;
+ cmp ALLZEROS,A je mesgin_complete;
+ cmp A,MSG_RESTOREPOINTERS je mesgin_rdptrs;
+ cmp A,MSG_EXTENDED je mesgin_extended;
+ cmp A,MSG_MESSAGE_REJECT je mesgin_reject;
+ cmp A,MSG_NOOP je mesgin_done;
+
+rej_mesgin:
+/*
+ * We have no idea what this message in is, so we issue a message reject
+ * and hope for the best. In any case, rejection should be a rare
+ * occurrence - signal the driver when it happens.
+ */
+ mvi INTSTAT,SEND_REJECT; /* let driver know */
+
+ mvi MSG_MESSAGE_REJECT call mk_mesg;
+
+mesgin_done:
+ mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
+ jmp ITloop;
+
+
+mesgin_complete:
+/*
+ * We got a "command complete" message, so put the SCB_TAG into the QOUTFIFO,
+ * and trigger a completion interrupt. Before doing so, check to see if there
+ * is a residual or the status byte is something other than NO_ERROR (0). In
+ * either of these conditions, we upload the SCB back to the host so it can
+ * process this information. In the case of a non zero status byte, we
+ * additionally interrupt the kernel driver synchronously, allowing it to
+ * decide if sense should be retrieved. If the kernel driver wishes to request
+ * sense, it will fill the kernel SCB with a request sense command and set
+ * RETURN_1 to SEND_SENSE. If RETURN_1 is set to SEND_SENSE we redownload
+ * the SCB, and process it as the next command by adding it to the waiting list.
+ * If the kernel driver does not wish to request sense, it need only clear
+ * RETURN_1, and the command is allowed to complete normally. We don't bother
+ * to post to the QOUTFIFO in the error cases since it would require extra
+ * work in the kernel driver to ensure that the entry was removed before the
+ * command complete code tried processing it.
+ */
+
+/*
+ * First check for residuals
+ */
+ test SCB_RESID_SGCNT,0xff jnz upload_scb;
+ test SCB_TARGET_STATUS,0xff jz status_ok; /* Good Status? */
+upload_scb:
+ mvi DMAPARAMS, FIFORESET;
+ mov SCB_TAG call dma_scb;
+check_status:
+ test SCB_TARGET_STATUS,0xff jz status_ok; /* Just a residual? */
+ mvi INTSTAT,BAD_STATUS; /* let driver know */
+ cmp RETURN_1, SEND_SENSE jne status_ok;
+ /* This SCB becomes the next to execute as it will retrieve sense */
+ mov SCB_LINKED_NEXT, SCB_TAG;
+ jmp dma_next_scb;
+
+status_ok:
+/* First, mark this target as free. */
+ test SCB_CONTROL,TAG_ENB jnz complete; /*
+ * Tagged commands
+ * don't busy the
+ * target.
+ */
+ mov SAVED_SCBPTR, SCBPTR;
+ mov SAVED_LINKPTR, SCB_LINKED_NEXT;
+ mov SCB_TCL call index_untagged_scb;
+ mov DINDIR, SAVED_LINKPTR;
+ mov SCBPTR, SAVED_SCBPTR;
+
+complete:
+ /* Post the SCB and issue an interrupt */
+.if ( SCB_PAGING )
+ /*
+ * Spin loop until there is space
+ * in the QOUTFIFO.
+ */
+ mov A, FIFODEPTH;
+ cmp CMDOUTCNT, A je .;
+ inc CMDOUTCNT;
+.endif
+ mov QOUTFIFO,SCB_TAG;
+ mvi INTSTAT,CMDCMPLT;
+ test SCB_CONTROL, ABORT_SCB jz dma_next_scb;
+ mvi INTSTAT, ABORT_CMDCMPLT;
+
+dma_next_scb:
+ cmp SCB_LINKED_NEXT, SCB_LIST_NULL je add_to_free_list;
+.if !( SCB_PAGING )
+ /* Only DMA on top of ourselves if we are the SCB to download */
+ mov A, SCB_LINKED_NEXT;
+ cmp SCB_TAG, A je dma_next_scb2;
+ call add_scb_to_free_list;
+ mov SCBPTR, A;
+ jmp add_to_waiting_list;
+.endif
+dma_next_scb2:
+ mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
+ mov SCB_LINKED_NEXT call dma_scb;
+add_to_waiting_list:
+ mov SCB_NEXT,WAITING_SCBH;
+ mov WAITING_SCBH, SCBPTR;
+ /*
+ * Prepare our selection hardware before the busfree so we have a
+ * high probability of winning arbitration.
+ */
+ call start_selection;
+ jmp await_busfree;
+add_to_free_list:
+ call add_scb_to_free_list;
+ jmp await_busfree;
+
+/*
+ * Is it an extended message? Copy the message to our message buffer and
+ * notify the host. The host will tell us whether to reject this message,
+ * respond to it with the message that the host placed in our message buffer,
+ * or simply to do nothing.
+ */
+mesgin_extended:
+ mvi MSGIN_EXT_LEN call inb_next;
+ mov A, MSGIN_EXT_LEN;
+mesgin_extended_loop:
+ mov DINDEX call inb_next;
+ dec A;
+ cmp DINDEX, MSGIN_EXT_BYTES+3 jne mesgin_extended_loop_test;
+ dec DINDEX; /* dump by repeatedly filling the last byte */
+mesgin_extended_loop_test:
+ test A, 0xFF jnz mesgin_extended_loop;
+mesgin_extended_intr:
+ mvi INTSTAT,EXTENDED_MSG; /* let driver know */
+ cmp RETURN_1,SEND_REJ je rej_mesgin;
+ cmp RETURN_1,SEND_MSG jne mesgin_done;
+/* The kernel has setup a message to be sent */
+ or SCSISIGO,ATNO,LASTPHASE; /* turn on ATNO */
+ jmp mesgin_done;
+
+/*
+ * Is it a disconnect message? Set a flag in the SCB to remind us
+ * and await the bus going free.
+ */
+mesgin_disconnect:
+ or SCB_CONTROL,DISCONNECTED;
+.if ( SCB_PAGING )
+ call add_scb_to_disc_list;
+.endif
+ jmp await_busfree;
+
+/*
+ * Save data pointers message:
+ * Copying RAM values back to SCB, for Save Data Pointers message, but
+ * only if we've actually been into a data phase to change them. This
+ * protects against bogus data in scratch ram and the residual counts
+ * since they are only initialized when we go into data_in or data_out.
+ */
+mesgin_sdptrs:
+ test SEQ_FLAGS, DPHASE jz mesgin_done;
+ mov SCB_SGCOUNT,SG_COUNT;
+
+ /* The SCB SGPTR becomes the next one we'll download */
+ mvi DINDEX, SCB_SGPTR;
+ mvi SG_NEXT call bcopy_4;
+
+ /* The SCB DATAPTR0 becomes the current SHADDR */
+ mvi DINDEX, SCB_DATAPTR;
+ mvi SHADDR call bcopy_4;
+
+/*
+ * Use the residual number since STCNT is corrupted by any message transfer.
+ */
+ mvi SCB_RESID_DCNT call bcopy_3;
+
+ jmp mesgin_done;
+
+/*
+ * Restore pointers message? Data pointers are recopied from the
+ * SCB anytime we enter a data phase for the first time, so all
+ * we need to do is clear the DPHASE flag and let the data phase
+ * code do the rest.
+ */
+mesgin_rdptrs:
+ and SEQ_FLAGS, ~DPHASE; /*
+ * We'll reload them
+ * the next time through
+ * the dataphase.
+ */
+ jmp mesgin_done;
+
+/*
+ * Identify message? For a reconnecting target, this tells us the lun
+ * that the reconnection is for - find the correct SCB and switch to it,
+ * clearing the "disconnected" bit so we don't "find" it by accident later.
+ */
+mesgin_identify:
+ test A,0x78 jnz rej_mesgin; /*!DiscPriv|!LUNTAR|!Reserved*/
+ and A,0x07; /* lun in lower three bits */
+ or SAVED_TCL,A; /* SAVED_TCL should be complete now */
+ mov SAVED_TCL call index_untagged_scb;
+ mov ARG_1, SINDIR;
+.if ( SCB_PAGING )
+ cmp ARG_1,SCB_LIST_NULL jne use_findSCB;
+.else
+ cmp ARG_1,SCB_LIST_NULL je snoop_tag;
+ /* Directly index the SCB */
+ mov SCBPTR,ARG_1;
+ test SCB_CONTROL,DISCONNECTED jz not_found;
+ jmp setup_SCB;
+.endif
+/*
+ * Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message.
+ * If we get one, we use the tag returned to find the proper
+ * SCB. With SCB paging, this requires using findSCB for both tagged
+ * and non-tagged transactions since the SCB may exist in any slot.
+ * If we're not using SCB paging, we can use the tag as the direct
+ * index to the SCB.
+ */
+snoop_tag:
+ mov NONE,SCSIDATL; /* ACK Identify MSG */
+snoop_tag_loop:
+ test SSTAT1,REQINIT jz snoop_tag_loop;
+ test SSTAT1, SCSIPERR jnz snoop_tag_loop;
+ and LASTPHASE, PHASE_MASK, SCSISIGI;
+ cmp LASTPHASE, P_MESGIN jne not_found;
+ cmp SCSIBUSL,MSG_SIMPLE_Q_TAG jne not_found;
+get_tag:
+ or SEQ_FLAGS, TAGGED_SCB;
+ mvi ARG_1 call inb_next; /* tag value */
+/*
+ * See if the tag is in range. The tag is < SCBCOUNT if we add
+ * the complement of SCBCOUNT to the incomming tag and there is
+ * no carry.
+ */
+ mov A,COMP_SCBCOUNT;
+ add SINDEX,A,ARG_1;
+ jc not_found;
+
+.if ! ( SCB_PAGING )
+index_by_tag:
+ mov SCBPTR,ARG_1;
+ mov A, SAVED_TCL;
+ cmp SCB_TCL,A jne not_found;
+ test SCB_CONTROL,TAG_ENB jz not_found;
+ test SCB_CONTROL,DISCONNECTED jz not_found;
+.else
+/*
+ * Ensure that the SCB the tag points to is for an SCB transaction
+ * to the reconnecting target.
+ */
+use_findSCB:
+ mov ALLZEROS call findSCB; /* Have to search */
+ cmp SINDEX, SCB_LIST_NULL je not_found;
+.endif
+setup_SCB:
+ and SCB_CONTROL,~DISCONNECTED;
+ or SEQ_FLAGS,IDENTIFY_SEEN; /* make note of IDENTIFY */
+ jmp mesgin_done;
+
+not_found:
+ mvi INTSTAT, NO_MATCH;
+ mvi MSG_BUS_DEV_RESET call mk_mesg;
+ jmp mesgin_done;
+
+/*
+ * Message reject? Let the kernel driver handle this. If we have an
+ * outstanding WDTR or SDTR negotiation, assume that it's a response from
+ * the target selecting 8bit or asynchronous transfer, otherwise just ignore
+ * it since we have no clue what it pertains to.
+ */
+mesgin_reject:
+ mvi INTSTAT, REJECT_MSG;
+ jmp mesgin_done;
+
+/*
+ * [ ADD MORE MESSAGE HANDLING HERE ]
+ */
+
+/*
+ * Locking the driver out, build a one-byte message passed in SINDEX
+ * if there is no active message already. SINDEX is returned intact.
+ */
+mk_mesg:
+ mvi SEQCTL, PAUSEDIS|FASTMODE;
+ test MSG_LEN,0xff jz mk_mesg1; /* Should always succeed */
+
+ /*
+ * Hmmm. For some reason the mesg buffer is in use.
+ * Tell the driver. It should look at SINDEX to find
+ * out what we wanted to use the buffer for and resolve
+ * the conflict.
+ */
+ mvi SEQCTL,FASTMODE;
+ mvi INTSTAT,MSG_BUFFER_BUSY;
+
+mk_mesg1:
+ or SCSISIGO,ATNO,LASTPHASE;/* turn on ATNO */
+ mvi MSG_LEN,1; /* length = 1 */
+ mov MSG_OUT,SINDEX; /* 1-byte message */
+ mvi SEQCTL,FASTMODE ret;
+
+/*
+ * Functions to read data in Automatic PIO mode.
+ *
+ * According to Adaptec's documentation, an ACK is not sent on input from
+ * the target until SCSIDATL is read from. So we wait until SCSIDATL is
+ * latched (the usual way), then read the data byte directly off the bus
+ * using SCSIBUSL. When we have pulled the ATN line, or we just want to
+ * acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI
+ * spec guarantees that the target will hold the data byte on the bus until
+ * we send our ACK.
+ *
+ * The assumption here is that these are called in a particular sequence,
+ * and that REQ is already set when inb_first is called. inb_{first,next}
+ * use the same calling convention as inb.
+ */
+
+inb_next:
+ mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
+inb_next_wait:
+ /*
+ * If there is a parity error, wait for the kernel to
+ * see the interrupt and prepare our message response
+ * before continuing.
+ */
+ test SSTAT1, REQINIT jz inb_next_wait;
+ test SSTAT1, SCSIPERR jnz inb_next_wait;
+ and LASTPHASE, PHASE_MASK, SCSISIGI;
+ cmp LASTPHASE, P_MESGIN jne mesgin_phasemis;
+inb_first:
+ mov DINDEX,SINDEX;
+ mov DINDIR,SCSIBUSL ret; /*read byte directly from bus*/
+inb_last:
+ mov NONE,SCSIDATL ret; /*dummy read from latch to ACK*/
+
+mesgin_phasemis:
+/*
+ * We expected to receive another byte, but the target changed phase
+ */
+ mvi INTSTAT, MSGIN_PHASEMIS;
+ jmp ITloop;
+
+/*
+ * DMA data transfer. HADDR and HCNT must be loaded first, and
+ * SINDEX should contain the value to load DFCNTRL with - 0x3d for
+ * host->scsi, or 0x39 for scsi->host. The SCSI channel is cleared
+ * during initialization.
+ */
+dma:
+ mov DFCNTRL,SINDEX;
+dma_loop:
+ test SSTAT0,DMADONE jnz dma_dmadone;
+ test SSTAT1,PHASEMIS jz dma_loop; /* ie. underrun */
+dma_phasemis:
+ test SSTAT0,SDONE jnz dma_checkfifo;
+ mov SINDEX,ALLZEROS; /* Notify caller of phasemiss */
+
+/*
+ * We will be "done" DMAing when the transfer count goes to zero, or
+ * the target changes the phase (in light of this, it makes sense that
+ * the DMA circuitry doesn't ACK when PHASEMIS is active). If we are
+ * doing a SCSI->Host transfer, the data FIFO should be flushed auto-
+ * magically on STCNT=0 or a phase change, so just wait for FIFO empty
+ * status.
+ */
+dma_checkfifo:
+ test DFCNTRL,DIRECTION jnz dma_fifoempty;
+dma_fifoflush:
+ test DFSTATUS,FIFOEMP jz dma_fifoflush;
+
+dma_fifoempty:
+ /* Don't clobber an inprogress host data transfer */
+ test DFSTATUS, MREQPEND jnz dma_fifoempty;
+/*
+ * Now shut the DMA enables off and make sure that the DMA enables are
+ * actually off first lest we get an ILLSADDR.
+ */
+dma_dmadone:
+ and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
+dma_halt:
+ test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz dma_halt;
+return:
+ ret;
+
+/*
+ * Assert that if we've been reselected, then we've seen an IDENTIFY
+ * message.
+ */
+assert:
+ test SEQ_FLAGS,RESELECTED jz return; /* reselected? */
+ test SEQ_FLAGS,IDENTIFY_SEEN jnz return; /* seen IDENTIFY? */
+
+ mvi INTSTAT,NO_IDENT ret; /* no - tell the kernel */
+
+.if ( SCB_PAGING )
+/*
+ * Locate a disconnected SCB either by SAVED_TCL (ARG_1 is SCB_LIST_NULL)
+ * or by the SCBIDn ARG_1. The search begins at the SCB index passed in
+ * via SINDEX. If the SCB cannot be found, SINDEX will be SCB_LIST_NULL,
+ * otherwise, SCBPTR is set to the proper SCB.
+ */
+findSCB:
+ mov SCBPTR,SINDEX; /* switch to next SCB */
+ mov A, ARG_1; /* Tag passed in ARG_1 */
+ cmp SCB_TAG,A jne findSCB_loop;
+ test SCB_CONTROL,DISCONNECTED jnz foundSCB;/*should be disconnected*/
+findSCB_loop:
+ inc SINDEX;
+ mov A,SCBCOUNT;
+ cmp SINDEX,A jne findSCB;
+/*
+ * We didn't find it. If we're paging, pull an SCB and DMA down the
+ * one we want. If we aren't paging or the SCB we dma down has the
+ * abort flag set, return not found.
+ */
+ mov ALLZEROS call get_free_or_disc_scb;
+ mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
+ mov ARG_1 call dma_scb;
+ test SCB_RESID_SGCNT, 0xff jz . + 2;
+ or SCB_CONTROL, MUST_DMAUP_SCB;
+ test SCB_CONTROL, ABORT_SCB jz return;
+find_error:
+ mvi SINDEX, SCB_LIST_NULL ret;
+foundSCB:
+ test SCB_CONTROL, ABORT_SCB jnz find_error;
+rem_scb_from_disc_list:
+/* Remove this SCB from the disconnection list */
+ cmp SCB_NEXT,SCB_LIST_NULL je unlink_prev;
+ mov SAVED_LINKPTR, SCB_PREV;
+ mov SCBPTR, SCB_NEXT;
+ mov SCB_PREV, SAVED_LINKPTR;
+ mov SCBPTR, SINDEX;
+unlink_prev:
+ cmp SCB_PREV,SCB_LIST_NULL je rHead;/* At the head of the list */
+ mov SAVED_LINKPTR, SCB_NEXT;
+ mov SCBPTR, SCB_PREV;
+ mov SCB_NEXT, SAVED_LINKPTR;
+ mov SCBPTR, SINDEX ret;
+rHead:
+ mov DISCONNECTED_SCBH,SCB_NEXT ret;
+.else
+ ret;
+.endif
+
+set_stcnt_from_hcnt:
+ mov STCNT[0], HCNT[0];
+ mov STCNT[1], HCNT[1];
+ mov STCNT[2], HCNT[2] ret;
+
+bcopy_7:
+ mov DINDIR, SINDIR;
+ mov DINDIR, SINDIR;
+bcopy_5:
+ mov DINDIR, SINDIR;
+bcopy_4:
+ mov DINDIR, SINDIR;
+bcopy_3:
+ mov DINDIR, SINDIR;
+ mov DINDIR, SINDIR;
+ mov DINDIR, SINDIR ret;
+
+dma_scb:
+ /*
+ * SCB index is in SINDEX. Determine the physical address in
+ * the host where this SCB is located and load HADDR with it.
+ */
+ shr DINDEX, 3, SINDEX;
+ shl A, 5, SINDEX;
+ add HADDR[0], A, HSCB_ADDR[0];
+ mov A, DINDEX;
+ adc HADDR[1], A, HSCB_ADDR[1];
+ clr A;
+ adc HADDR[2], A, HSCB_ADDR[2];
+ adc HADDR[3], A, HSCB_ADDR[3];
+ /* Setup Count */
+ mvi HCNT[0], 28;
+ clr HCNT[1];
+ clr HCNT[2];
+ mov DFCNTRL, DMAPARAMS;
+ test DMAPARAMS, DIRECTION jnz dma_scb_fromhost;
+ /* Fill it with the SCB data */
+copy_scb_tofifo:
+ mvi SINDEX, SCB_CONTROL;
+ add A, 28, SINDEX;
+copy_scb_tofifo_loop:
+ mov DFDAT,SINDIR;
+ mov DFDAT,SINDIR;
+ mov DFDAT,SINDIR;
+ mov DFDAT,SINDIR;
+ mov DFDAT,SINDIR;
+ mov DFDAT,SINDIR;
+ mov DFDAT,SINDIR;
+ cmp SINDEX, A jne copy_scb_tofifo_loop;
+ or DFCNTRL, HDMAEN|FIFOFLUSH;
+dma_scb_fromhost:
+ call dma_finish;
+ /* If we were putting the SCB, we are done */
+ test DMAPARAMS, DIRECTION jz return;
+ mvi SCB_CONTROL call dfdat_in_7;
+ call dfdat_in_7_continued;
+ call dfdat_in_7_continued;
+ jmp dfdat_in_7_continued;
+dfdat_in_7:
+ mov DINDEX,SINDEX;
+dfdat_in_7_continued:
+ mov DINDIR,DFDAT;
+ mov DINDIR,DFDAT;
+ mov DINDIR,DFDAT;
+ mov DINDIR,DFDAT;
+ mov DINDIR,DFDAT;
+ mov DINDIR,DFDAT;
+ mov DINDIR,DFDAT ret;
+
+/*
+ * Wait for DMA from host memory to data FIFO to complete, then disable
+ * DMA and wait for it to acknowledge that it's off.
+ */
+dma_finish:
+ test DFSTATUS,HDONE jz dma_finish;
+ /* Turn off DMA */
+ and DFCNTRL, ~HDMAEN;
+ test DFCNTRL, HDMAEN jnz .;
+ ret;
+
+index_untagged_scb:
+ mov DINDEX, SINDEX;
+ shr DINDEX, 4;
+ and DINDEX, 0x03; /* Bottom two bits of tid */
+ add DINDEX, SCB_BUSYTARGETS;
+ shr A, 6, SINDEX; /* Target ID divided by 4 */
+ test SINDEX, SELBUSB jz index_untagged_scb2;
+ add A, 2; /* Add 2 positions */
+index_untagged_scb2:
+ mov SCBPTR, A; /*
+ * Select the SCB with this
+ * target's information.
+ */
+ mov SINDEX, DINDEX ret;
+
+add_scb_to_free_list:
+ mov SCB_NEXT, FREE_SCBH;
+ mvi SCB_TAG, SCB_LIST_NULL;
+ mov FREE_SCBH, SCBPTR ret;
+
+.if ( SCB_PAGING )
+get_free_or_disc_scb:
+ cmp FREE_SCBH, SCB_LIST_NULL jne dequeue_free_scb;
+ cmp DISCONNECTED_SCBH, SCB_LIST_NULL jne dequeue_disc_scb;
+return_error:
+ mvi SINDEX, SCB_LIST_NULL ret;
+dequeue_disc_scb:
+ mov SCBPTR, DISCONNECTED_SCBH;
+/*
+ * If we have a residual, then we are in the middle of some I/O
+ * and we have to send this SCB back up to the kernel so that the
+ * saved data pointers and residual information isn't lost.
+ */
+ test SCB_CONTROL, MUST_DMAUP_SCB jz . + 3;
+ and SCB_CONTROL, ~MUST_DMAUP_SCB;
+ jmp dma_up_scb;
+ test SCB_RESID_SGCNT,0xff jnz dma_up_scb;
+ cmp SCB_LINKED_NEXT, SCB_LIST_NULL je unlink_disc_scb;
+dma_up_scb:
+ mvi DMAPARAMS, FIFORESET;
+ mov SCB_TAG call dma_scb;
+unlink_disc_scb:
+ /* jmp instead of call since we want to return anyway */
+ mov SCBPTR jmp rem_scb_from_disc_list;
+dequeue_free_scb:
+ mov SCBPTR, FREE_SCBH;
+ mov FREE_SCBH, SCB_NEXT ret;
+
+add_scb_to_disc_list:
+/*
+ * Link this SCB into the DISCONNECTED list. This list holds the
+ * candidates for paging out an SCB if one is needed for a new command.
+ * Modifying the disconnected list is a critical(pause dissabled) section.
+ */
+ mvi SCB_PREV, SCB_LIST_NULL;
+ mov SCB_NEXT, DISCONNECTED_SCBH;
+ mov DISCONNECTED_SCBH, SCBPTR;
+ cmp SCB_NEXT,SCB_LIST_NULL je return;
+ mov SCBPTR,SCB_NEXT;
+ mov SCB_PREV,DISCONNECTED_SCBH;
+ mov SCBPTR,DISCONNECTED_SCBH ret;
+.endif
diff --git a/drivers/scsi/aic7xxx/scsi_message.h b/drivers/scsi/aic7xxx/scsi_message.h
new file mode 100644
index 000000000..267a01591
--- /dev/null
+++ b/drivers/scsi/aic7xxx/scsi_message.h
@@ -0,0 +1,41 @@
+/*
+ * SCSI messages definitions.
+ */
+
+/* Messages (1 byte) */ /* I/T (M)andatory or (O)ptional */
+#define MSG_CMDCOMPLETE 0x00 /* M/M */
+#define MSG_EXTENDED 0x01 /* O/O */
+#define MSG_SAVEDATAPOINTER 0x02 /* O/O */
+#define MSG_RESTOREPOINTERS 0x03 /* O/O */
+#define MSG_DISCONNECT 0x04 /* O/O */
+#define MSG_INITIATOR_DET_ERR 0x05 /* M/M */
+#define MSG_ABORT 0x06 /* O/M */
+#define MSG_MESSAGE_REJECT 0x07 /* M/M */
+#define MSG_NOOP 0x08 /* M/M */
+#define MSG_PARITY_ERROR 0x09 /* M/M */
+#define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */
+#define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */
+#define MSG_BUS_DEV_RESET 0x0c /* O/M */
+#define MSG_ABORT_TAG 0x0d /* O/O */
+#define MSG_CLEAR_QUEUE 0x0e /* O/O */
+#define MSG_INIT_RECOVERY 0x0f /* O/O */
+#define MSG_REL_RECOVERY 0x10 /* O/O */
+#define MSG_TERM_IO_PROC 0x11 /* O/O */
+
+/* Messages (2 byte) */
+#define MSG_SIMPLE_Q_TAG 0x20 /* O/O */
+#define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */
+#define MSG_ORDERED_Q_TAG 0x22 /* O/O */
+#define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */
+
+/* Identify message */ /* M/M */
+#define MSG_IDENTIFYFLAG 0x80
+#define MSG_IDENTIFY(lun, disc) (((disc) ? 0xc0 : MSG_IDENTIFYFLAG) | (lun))
+#define MSG_ISIDENTIFY(m) ((m) & MSG_IDENTIFYFLAG)
+
+/* Extended messages (opcode and length) */
+#define MSG_EXT_SDTR 0x01
+#define MSG_EXT_SDTR_LEN 0x03
+
+#define MSG_EXT_WDTR 0x03
+#define MSG_EXT_WDTR_LEN 0x02
diff --git a/drivers/scsi/aic7xxx/sequencer.h b/drivers/scsi/aic7xxx/sequencer.h
new file mode 100644
index 000000000..dea901fe8
--- /dev/null
+++ b/drivers/scsi/aic7xxx/sequencer.h
@@ -0,0 +1,102 @@
+/*
+ * Instruction formats for the sequencer program downloaded to
+ * Aic7xxx SCSI host adapters
+ *
+ * Copyright (c) 1997 Justin T. Gibbs.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * Where this Software is combined with software released under the terms of
+ * the GNU Public License ("GPL") and the terms of the GPL would require the
+ * combined work to also be released under the terms of the GPL, the terms
+ * and conditions of this License will apply in addition to those of the
+ * GPL with the exception of any terms or conditions of this License that
+ * conflict with, or are expressly prohibited by, the GPL.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: sequencer.h,v 1.1 1997/08/05 09:44:13 ralf Exp $
+ */
+
+#if defined(__KERNEL__)
+typedef unsigned char u_int8_t;
+#endif
+
+struct ins_format1 {
+ u_int8_t immediate;
+ u_int8_t source;
+ u_int8_t destination;
+ u_int8_t opcode_ret;
+};
+
+struct ins_format2 {
+ u_int8_t shift_control;
+ u_int8_t source;
+ u_int8_t destination;
+ u_int8_t opcode_ret;
+#define RETURN_BIT 0x01
+};
+
+struct ins_format3 {
+ u_int8_t immediate;
+ u_int8_t source;
+ u_int8_t address;
+ u_int8_t opcode_addr;
+#define ADDR_HIGH_BIT 0x01
+};
+
+struct instruction {
+ union {
+ struct ins_format1 format1;
+ struct ins_format2 format2;
+ struct ins_format3 format3;
+ u_int8_t bytes[4];
+ } format;
+ u_int srcline;
+ struct symbol *patch_label;
+ struct {
+ struct instruction *stqe_next; /* next element */
+ } links;
+};
+
+#define AIC_OP_OR 0x0
+#define AIC_OP_AND 0x1
+#define AIC_OP_XOR 0x2
+#define AIC_OP_ADD 0x3
+#define AIC_OP_ADC 0x4
+#define AIC_OP_ROL 0x5
+
+#define AIC_OP_JMP 0x8
+#define AIC_OP_JC 0x9
+#define AIC_OP_JNC 0xa
+#define AIC_OP_CALL 0xb
+#define AIC_OP_JNE 0xc
+#define AIC_OP_JNZ 0xd
+#define AIC_OP_JE 0xe
+#define AIC_OP_JZ 0xf
+
+/* Pseudo Ops */
+#define AIC_OP_SHL 0x10
+#define AIC_OP_SHR 0x20
+#define AIC_OP_ROR 0x30
diff --git a/drivers/scsi/aic7xxx_proc.c b/drivers/scsi/aic7xxx_proc.c
index 5c766c039..dee247534 100644
--- a/drivers/scsi/aic7xxx_proc.c
+++ b/drivers/scsi/aic7xxx_proc.c
@@ -24,7 +24,7 @@
*
* Dean W. Gehnert, deang@teleport.com, 05/01/96
*
- * $Id: aic7xxx_proc.c,v 1.2 1997/08/06 19:16:03 miguel Exp $
+ * $Id: aic7xxx_proc.c,v 4.1 1997/06/97 08:23:42 deang Exp $
*-M*************************************************************************/
#define BLS buffer + len + size
diff --git a/drivers/scsi/eata_dma.c b/drivers/scsi/eata_dma.c
index 11ff51b1a..104664463 100644
--- a/drivers/scsi/eata_dma.c
+++ b/drivers/scsi/eata_dma.c
@@ -259,7 +259,11 @@ void eata_int_handler(int irq, void *dev_id, struct pt_regs * regs)
sp = &SD(sh)->sp;
#ifdef __mips__
- cacheflush((unsigned long)sp, sizeof(struct eata_sp), CF_DCACHE|CF_ALL);
+ /*
+ * We flush too much, this should be something like:
+ * cacheflush_before_dma((unsigned long)sp, sizeof(struct eata_sp));
+ */
+ flush_cache_all();
#endif
ccb = sp->ccb;
diff --git a/drivers/scsi/g_NCR5380.c b/drivers/scsi/g_NCR5380.c
index aee77ba5c..0d65f36a9 100644
--- a/drivers/scsi/g_NCR5380.c
+++ b/drivers/scsi/g_NCR5380.c
@@ -70,10 +70,7 @@
*/
/*
- * $Log: g_NCR5380.c,v $
- * Revision 1.3 1997/06/17 13:25:29 ralf
- * Merge with 2.1.43.
- *
+ * $Log: generic_NCR5380.c,v $
*/
#define AUTOPROBE_IRQ
diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c
index 513ebf8ad..e67ec54b5 100644
--- a/drivers/scsi/hosts.c
+++ b/drivers/scsi/hosts.c
@@ -204,7 +204,7 @@
/*
-static const char RCSid[] = "$Header: /src/cvs/linux/drivers/scsi/hosts.c,v 1.1.1.1 1997/06/01 03:17:37 ralf Exp $";
+static const char RCSid[] = "$Header: /vger/u4/cvs/linux/drivers/scsi/hosts.c,v 1.20 1996/12/12 19:18:32 davem Exp $";
*/
/*
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 1f0080bd9..a81df6241 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -66,7 +66,7 @@
#undef USE_STATIC_SCSI_MEMORY
/*
-static const char RCSid[] = "$Header: /src/cvs/linux/drivers/scsi/scsi.c,v 1.1.1.1 1997/06/01 03:17:37 ralf Exp $";
+static const char RCSid[] = "$Header: /vger/u4/cvs/linux/drivers/scsi/scsi.c,v 1.38 1997/01/19 23:07:18 davem Exp $";
*/
diff --git a/drivers/scsi/sgiwd93.c b/drivers/scsi/sgiwd93.c
index ed5b1ec97..ed95b9165 100644
--- a/drivers/scsi/sgiwd93.c
+++ b/drivers/scsi/sgiwd93.c
@@ -1,4 +1,4 @@
-/* $Id: sgiwd93.c,v 1.1.1.1 1997/06/01 03:17:36 ralf Exp $
+/* $Id: sgiwd93.c,v 1.7 1996/07/23 09:00:16 dm Exp $
* sgiwd93.c: SGI WD93 scsi driver.
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
diff --git a/drivers/scsi/wd33c93.c b/drivers/scsi/wd33c93.c
index 733a9e186..6d60d12ae 100644
--- a/drivers/scsi/wd33c93.c
+++ b/drivers/scsi/wd33c93.c
@@ -292,6 +292,7 @@ int wd33c93_queuecommand (Scsi_Cmnd *cmd, void (*done)(Scsi_Cmnd *))
Scsi_Cmnd *tmp;
unsigned long flags;
+ disable_irq(cmd->host->irq);
DB(DB_QCMD,printk("Q-%d-%02x-%ld( ",cmd->target,cmd->cmnd[0],cmd->pid));
/* Set up a few fields in the Scsi_Cmnd structure for our own use:
diff --git a/drivers/sgi/Makefile b/drivers/sgi/Makefile
index 466e477ca..40cb89eaa 100644
--- a/drivers/sgi/Makefile
+++ b/drivers/sgi/Makefile
@@ -17,6 +17,6 @@ L_TARGET := sgi.a
# Character devices for SGI machines.
#
SUB_DIRS += char
-L_OBJS += char/sgichar.o
+L_OBJS += char/sgichar.o
include $(TOPDIR)/Rules.make
diff --git a/fs/dquot.c b/fs/dquot.c
index 731f2df7b..3b59ef828 100644
--- a/fs/dquot.c
+++ b/fs/dquot.c
@@ -13,7 +13,7 @@
* diskquota system. This implementation is not based on any BSD
* kernel sourcecode.
*
- * Version: $Id: dquot.c,v 1.4 1997/08/06 19:16:09 miguel Exp $
+ * Version: $Id: dquot.c,v 1.11 1997/01/06 06:53:02 davem Exp $
*
* Author: Marco van Wieringen <mvw@mcs.ow.nl> <mvw@tnix.net>
*
diff --git a/fs/nfs/nfsroot.c b/fs/nfs/nfsroot.c
index df045e1c4..3b06d4c36 100644
--- a/fs/nfs/nfsroot.c
+++ b/fs/nfs/nfsroot.c
@@ -1,5 +1,5 @@
/*
- * $Id: nfsroot.c,v 1.5 1997/08/06 19:16:18 miguel Exp $
+ * $Id: nfsroot.c,v 1.38 1997/07/17 03:21:06 davem Exp $
*
* Copyright (C) 1995, 1996 Gero Kuhlmann <gero@gkminix.han.de>
*
@@ -1254,7 +1254,7 @@ __initfunc(static void root_nfs_addrs(char *addrs))
system_utsname.domainname[0] = '\0';
user_dev_name[0] = '\0';
bootp_flag = rarp_flag = 1;
-
+
/* The following is just a shortcut for automatic IP configuration */
if (!strcmp(addrs, "bootp")) {
rarp_flag = 0;
diff --git a/fs/proc/array.c b/fs/proc/array.c
index eac2db247..4415a7c54 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -472,7 +472,7 @@ static unsigned long get_wchan(struct task_struct *p)
pc = thread_saved_pc(&p->tss);
if (pc >= (unsigned long) interruptible_sleep_on && pc < (unsigned long) add_timer) {
- schedule_frame = ((unsigned long *)(long)p->tss.reg30)[15];
+ schedule_frame = ((unsigned long *)(long)p->tss.reg30)[16];
return (unsigned long)((unsigned long *)schedule_frame)[11];
}
return pc;
diff --git a/fs/ufs/ufs_dir.c b/fs/ufs/ufs_dir.c
index 7806c7d45..e91847df3 100644
--- a/fs/ufs/ufs_dir.c
+++ b/fs/ufs/ufs_dir.c
@@ -6,7 +6,7 @@
* Laboratory for Computer Science Research Computing Facility
* Rutgers, The State University of New Jersey
*
- * $Id: ufs_dir.c,v 1.2 1997/06/17 13:27:28 ralf Exp $
+ * $Id: ufs_dir.c,v 1.10 1997/06/05 01:29:06 davem Exp $
*
*/
diff --git a/fs/ufs/ufs_file.c b/fs/ufs/ufs_file.c
index ef7858c8f..72161d2bd 100644
--- a/fs/ufs/ufs_file.c
+++ b/fs/ufs/ufs_file.c
@@ -6,7 +6,7 @@
* Laboratory for Computer Science Research Computing Facility
* Rutgers, The State University of New Jersey
*
- * $Id: ufs_file.c,v 1.2 1997/06/17 13:27:28 ralf Exp $
+ * $Id: ufs_file.c,v 1.9 1997/07/17 02:24:13 davem Exp $
*
*/
diff --git a/fs/ufs/ufs_inode.c b/fs/ufs/ufs_inode.c
index d8c8c6896..c55092d54 100644
--- a/fs/ufs/ufs_inode.c
+++ b/fs/ufs/ufs_inode.c
@@ -6,7 +6,7 @@
* Laboratory for Computer Science Research Computing Facility
* Rutgers, The State University of New Jersey
*
- * $Id: ufs_inode.c,v 1.2 1997/06/17 13:27:29 ralf Exp $
+ * $Id: ufs_inode.c,v 1.9 1997/07/17 02:24:14 davem Exp $
*
*/
diff --git a/fs/ufs/ufs_namei.c b/fs/ufs/ufs_namei.c
index 4ae258738..ec9ec3119 100644
--- a/fs/ufs/ufs_namei.c
+++ b/fs/ufs/ufs_namei.c
@@ -6,7 +6,7 @@
* Laboratory for Computer Science Research Computing Facility
* Rutgers, The State University of New Jersey
*
- * $Id: ufs_namei.c,v 1.2 1997/07/20 15:00:17 ralf Exp $
+ * $Id: ufs_namei.c,v 1.9 1997/07/22 06:40:12 davem Exp $
*
*/
diff --git a/fs/ufs/ufs_super.c b/fs/ufs/ufs_super.c
index f08292a23..c2ee0ded7 100644
--- a/fs/ufs/ufs_super.c
+++ b/fs/ufs/ufs_super.c
@@ -8,7 +8,7 @@
*
* Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
*
- * $Id: ufs_super.c,v 1.2 1997/06/17 13:27:29 ralf Exp $
+ * $Id: ufs_super.c,v 1.25 1997/07/17 02:24:15 davem Exp $
*
*/
diff --git a/include/asm-alpha/floppy.h b/include/asm-alpha/floppy.h
index 9be100c4f..7337896fa 100644
--- a/include/asm-alpha/floppy.h
+++ b/include/asm-alpha/floppy.h
@@ -15,21 +15,25 @@
#define fd_inb(port) inb_p(port)
#define fd_outb(port,value) outb_p(port,value)
-#define fd_enable_dma() enable_dma(FLOPPY_DMA)
-#define fd_disable_dma() disable_dma(FLOPPY_DMA)
-#define fd_request_dma() request_dma(FLOPPY_DMA,"floppy")
-#define fd_free_dma() free_dma(FLOPPY_DMA)
-#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA)
-#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA,mode)
-#define fd_set_dma_addr(addr) set_dma_addr(FLOPPY_DMA,virt_to_bus(addr))
-#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA,count)
-#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
-#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
-#define fd_cacheflush(addr,size) /* nothing */
-#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT|SA_SAMPLE_RANDOM, \
- "floppy", NULL)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
+#define fd_enable_dma(channel) enable_dma(channel)
+#define fd_disable_dma(channel) disable_dma(channel)
+#define fd_request_dma(channel) request_dma(channel, "floppy")
+#define fd_free_dma(channel) free_dma(channel)
+#define fd_clear_dma_ff(channel) clear_dma_ff(channel)
+#define fd_set_dma_mode(channel, mode) set_dma_mode(channel, mode)
+#define fd_set_dma_addr(channel, addr) set_dma_addr(channel,virt_to_bus(addr))
+#define fd_set_dma_count(channel, count) set_dma_count(channel,count)
+
+#define fd_enable_irq(irq) enable_irq(irq)
+#define fd_disable_irq(irq) disable_irq(irq)
+#define fd_request_irq(irq) request_irq(irq, \
+ floppy_interrupt, \
+ SA_INTERRUPT \
+ | SA_SAMPLE_RANDOM, \
+ "floppy", NULL)
+#define fd_free_irq(irq) free_irq(irq, NULL);
+
+#define fd_cacheflush(addr,size) /* nothing */
__inline__ void virtual_dma_init(void)
{
diff --git a/include/asm-alpha/keyboard.h b/include/asm-alpha/keyboard.h
index 951cb5077..d4db034b8 100644
--- a/include/asm-alpha/keyboard.h
+++ b/include/asm-alpha/keyboard.h
@@ -3,7 +3,7 @@
*
* Created 3 Nov 1996 by Geert Uytterhoeven
*
- * $Id: keyboard.h,v 1.3 1997/07/24 01:55:54 ralf Exp $
+ * $Id: keyboard.h,v 1.4 1997/08/05 09:44:28 ralf Exp $
*/
/*
diff --git a/include/asm-i386/floppy.h b/include/asm-i386/floppy.h
index 0a7cf8563..eb7272ef6 100644
--- a/include/asm-i386/floppy.h
+++ b/include/asm-i386/floppy.h
@@ -9,23 +9,26 @@
#define fd_inb(port) inb_p(port)
#define fd_outb(port,value) outb_p(port,value)
-#define fd_enable_dma() SW._enable_dma(FLOPPY_DMA)
-#define fd_disable_dma() SW._disable_dma(FLOPPY_DMA)
-#define fd_request_dma() SW._request_dma(FLOPPY_DMA,"floppy")
-#define fd_free_dma() SW._free_dma(FLOPPY_DMA)
-#define fd_clear_dma_ff() SW._clear_dma_ff(FLOPPY_DMA)
-#define fd_set_dma_mode(mode) SW._set_dma_mode(FLOPPY_DMA,mode)
-#define fd_set_dma_addr(addr) SW._set_dma_addr(FLOPPY_DMA,addr)
-#define fd_set_dma_count(count) SW._set_dma_count(FLOPPY_DMA,count)
-#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
-#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
-#define fd_cacheflush(addr,size) /* nothing */
-#define fd_request_irq() SW._request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT|SA_SAMPLE_RANDOM, \
- "floppy", NULL)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
-#define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
-#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
+#define fd_enable_dma(channel) SW._enable_dma(channel)
+#define fd_disable_dma(channel) SW._disable_dma(channel)
+#define fd_request_dma(channel) SW._request_dma(channel, "floppy")
+#define fd_free_dma(channel) SW._free_dma(channel)
+#define fd_clear_dma_ff(channel) SW._clear_dma_ff(channel)
+#define fd_set_dma_mode(channel,mode) SW._set_dma_mode(channel, mode)
+#define fd_set_dma_addr(channel,addr) SW._set_dma_addr(channel, addr)
+#define fd_set_dma_count(channel,count) SW._set_dma_count(channel ,count)
+#define fd_enable_irq(irq) enable_irq(irq)
+#define fd_disable_irq(irq) disable_irq(irq)
+#define fd_cacheflush(addr,size) /* nothing */
+#define fd_request_irq(irq) SW._request_irq(irq, \
+ floppy_interrupt, \
+ SA_INTERRUPT \
+ | SA_SAMPLE_RANDOM, \
+ "floppy", NULL)
+#define fd_free_irq(irq) free_irq(irq, NULL)
+#define fd_get_dma_residue(channel) SW._get_dma_residue(channel)
+
+#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
#define fd_dma_mem_free(addr,size) SW._dma_mem_free(addr,size)
static int virtual_dma_count=0;
diff --git a/include/asm-i386/keyboard.h b/include/asm-i386/keyboard.h
index ab936e6bc..462095732 100644
--- a/include/asm-i386/keyboard.h
+++ b/include/asm-i386/keyboard.h
@@ -3,7 +3,7 @@
*
* Created 3 Nov 1996 by Geert Uytterhoeven
*
- * $Id: keyboard.h,v 1.3 1997/07/24 01:55:55 ralf Exp $
+ * $Id: keyboard.h,v 1.5 1997/08/05 09:44:29 ralf Exp $
*/
/*
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index 4d8c0e171..d20831322 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -8,7 +8,7 @@
* License. See the file COPYING in the main directory of this archive
* for more details.
*
- * $Id:$
+ * $Id: bootinfo.h,v 1.3 1997/09/19 08:37:44 ralf Exp $
*/
#ifndef __ASM_MIPS_BOOTINFO_H
#define __ASM_MIPS_BOOTINFO_H
@@ -16,29 +16,6 @@
/* XXX */
#include <linux/config.h>
-#if 0
-/*
- * Valid machtype values
- * FIXME: note that we really need a hierarchy for this stuff, as there are
- * several models of DECStation (for example). PMA
- */
-#define MACH_UNKNOWN 0 /* whatever... */
-#define MACH_DESKSTATION_RPC44 1 /* Deskstation rPC44 */
-#define MACH_DESKSTATION_TYNE 2 /* Deskstation Tyne */
-#define MACH_ACER_PICA_61 3 /* Acer PICA-61 (PICA1) */
-#define MACH_MIPS_MAGNUM_4000 4 /* Mips Magnum 4000 "RC4030" */
-#define MACH_OLIVETTI_M700 4 /* almost a clone ... */
-#define MACH_DECSTATION 5 /* DECStation 5000/2x for now */
-#define MACH_SNI_RM200_PCI 6 /* RM200/RM300/RM400 PCI series */
-#define MACH_SGI_INDY 7 /* R4?K and R5K Indy workstaions */
-#define MACH_RESERVED 8 /* Erlkoenig ... */
-#define MACH_LAST 8
-
-#define MACH_NAMES {"unknown", "Deskstation rPC44", "Deskstation Tyne", \
- "Acer PICA 61", "Mips Magnum 4000", "DECStation", "RM200 PCI", \
- "SGI INDY" }
-#endif
-
/*
* Values for machgroup
*/
@@ -49,10 +26,10 @@
#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */
#define MACH_GROUP_ACN 5
#define MACH_GROUP_SGI 6 /* Silicon Graphics workstations and servers */
-#define MACH_GROUP_RESERVED 7 /* Erlkoenig ... */
+#define MACH_GROUP_RESERVED 7 /* No Such Architecture */
#define GROUP_NAMES { "unknown", "Jazz", "Digital", "ARC", \
- "SNI", "ACN", "You'd like to know" }
+ "SNI", "ACN", "SGI", "NSA" }
/*
* Valid machtype values for group unknown (low order halfword of mips_machtype)
@@ -106,12 +83,7 @@
*/
#define MACH_SGI_INDY 0 /* R4?K and R5K Indy workstaions */
-/*
- * Valid machtype for group RESERVED
- */
-#define MACH_RESERVED 0 /* Proto "27" hardware */
-
-#define GROUP_RESERVED { "You'd like to know" }
+#define GROUP_SGI_NAMES { "Indy" }
/*
* Valid cputype values
diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
index 15fe291f4..5c04e9bf0 100644
--- a/include/asm-mips/bugs.h
+++ b/include/asm-mips/bugs.h
@@ -4,7 +4,7 @@
* Copyright (C) 1995 Waldorf Electronics
* Copyright (C) 1997 Ralf Baechle
*
- * $Id:$
+ * $Id: bugs.h,v 1.2 1997/09/07 04:13:53 ralf Exp $
*/
#include <asm/bootinfo.h>
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index 00e85aedf..9cec1a26a 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -7,7 +7,7 @@
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*
- * $Id: byteorder.h,v 1.3 1997/06/25 20:51:39 ralf Exp $
+ * $Id: byteorder.h,v 1.4 1997/07/15 01:56:32 ralf Exp $
*/
#ifndef __ASM_MIPS_BYTEORDER_H
#define __ASM_MIPS_BYTEORDER_H
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index 01dbbb986..b3bfcae7c 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -5,9 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
- *
- * $Id:$
+ * Copyright (C) 1995 by Ralf Baechle
*/
#ifndef __ASM_MIPS_CHECKSUM_H
#define __ASM_MIPS_CHECKSUM_H
@@ -167,10 +165,7 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr,
*/
static inline unsigned short ip_compute_csum(unsigned char * buff, int len)
{
- unsigned int sum;
-
- sum = csum_partial(buff, len, 0);
- return csum_fold(sum);
+ return csum_fold(csum_partial(buff, len, 0));
}
#define _HAVE_ARCH_IPV6_CSUM
diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h
index 2a41473ba..3606b252a 100644
--- a/include/asm-mips/fcntl.h
+++ b/include/asm-mips/fcntl.h
@@ -23,9 +23,9 @@
#define F_SETFD 2 /* set f_flags */
#define F_GETFL 3 /* more flags (cloexec) */
#define F_SETFL 4
+#define F_GETLK 14
#define F_SETLK 6
#define F_SETLKW 7
-#define F_GETLK 14
#define F_SETOWN 24 /* for sockets. */
#define F_GETOWN 23 /* for sockets. */
diff --git a/include/asm-mips/floppy.h b/include/asm-mips/floppy.h
index 412057a0b..d047a68dd 100644
--- a/include/asm-mips/floppy.h
+++ b/include/asm-mips/floppy.h
@@ -5,9 +5,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995
+ * Copyright (C) 1995, 1996, 1997 Ralf Baechle
*
- * $Id:$
+ * $Id: floppy.h,v 1.3 1997/09/07 03:59:02 ralf Exp $
*/
#ifndef __ASM_MIPS_FLOPPY_H
#define __ASM_MIPS_FLOPPY_H
@@ -22,26 +22,29 @@
#define fd_inb(port) feature->fd_inb(port)
#define fd_outb(value,port) feature->fd_outb(value,port)
-#define fd_enable_dma() feature->fd_enable_dma()
-#define fd_disable_dma() feature->fd_disable_dma()
-#define fd_request_dma() feature->fd_request_dma()
-#define fd_free_dma() feature->fd_free_dma()
-#define fd_clear_dma_ff() feature->fd_clear_dma_ff()
-#define fd_set_dma_mode(mode) feature->fd_set_dma_mode(mode)
-#define fd_set_dma_addr(addr) feature->fd_set_dma_addr(virt_to_bus(addr))
-#define fd_set_dma_count(count) feature->fd_set_dma_count(count)
-#define fd_get_dma_residue() feature->fd_get_dma_residue()
-#define fd_enable_irq() feature->fd_enable_irq()
-#define fd_disable_irq() feature->fd_disable_irq()
-#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT|SA_SAMPLE_RANDOM, \
- "floppy", NULL)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
+#define fd_enable_dma(channel) feature->fd_enable_dma(channel)
+#define fd_disable_dma(channel) feature->fd_disable_dma(channel)
+#define fd_request_dma(channel) feature->fd_request_dma(channel)
+#define fd_free_dma(channel) feature->fd_free_dma(channel)
+#define fd_clear_dma_ff(channel) feature->fd_clear_dma_ff(channel)
+#define fd_set_dma_mode(channel, mode) feature->fd_set_dma_mode(channel, mode)
+#define fd_set_dma_addr(channel, addr) feature->fd_set_dma_addr(channel, \
+ virt_to_bus(addr))
+#define fd_set_dma_count(channel,count) feature->fd_set_dma_count(channel,count)
+#define fd_get_dma_residue(channel) feature->fd_get_dma_residue(channel)
+
+#define fd_enable_irq(irq) feature->fd_enable_irq(irq)
+#define fd_disable_irq(irq) feature->fd_disable_irq(irq)
+#define fd_request_irq(irq) request_irq(irq, floppy_interrupt, \
+ SA_INTERRUPT \
+ | SA_SAMPLE_RANDOM, \
+ "floppy", NULL)
+#define fd_free_irq(irq) free_irq(irq, NULL);
#define MAX_BUFFER_SECTORS 24
/* Pure 2^n version of get_order */
-extern __inline__ int __get_order(unsigned long size)
+extern inline int __get_order(unsigned long size)
{
int order;
@@ -54,7 +57,7 @@ extern __inline__ int __get_order(unsigned long size)
return order;
}
-extern __inline__ unsigned long mips_dma_mem_alloc(unsigned long size)
+extern inline unsigned long mips_dma_mem_alloc(unsigned long size)
{
int order = __get_order(size);
unsigned long mem;
@@ -69,11 +72,11 @@ extern __inline__ unsigned long mips_dma_mem_alloc(unsigned long size)
return mem;
}
-extern __inline__ void mips_dma_mem_free(unsigned long addr, unsigned long size)
+extern inline void mips_dma_mem_free(unsigned long addr, unsigned long size)
{
#ifdef CONFIG_MIPS_JAZZ
if (mips_machgroup == MACH_GROUP_JAZZ)
- vdma_free(vdma_phys2log(PHYSADDR(addr)));
+ vdma_free(PHYSADDR(addr));
#endif
free_pages(addr, __get_order(size));
}
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index be0d068a4..09e3dad1e 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -32,6 +32,16 @@
*/
/*
+ * On MIPS I/O ports are memory mapped, so we access them using normal
+ * load/store instructions. mips_io_port_base is the virtual address to
+ * which all ports are being mapped. For sake of efficiency some code
+ * assumes that this is an address that can be loaded with a single lui
+ * instruction, so the lower 16 bits must be zero. Should be true on
+ * on any sane architecture; generic code does not use this assumption.
+ */
+extern unsigned long mips_io_port_base;
+
+/*
* Thanks to James van Artsdalen for a better timing-fix than
* the two short jumps: using outb's to a nonexistent port seems
* to guarantee better timings even on fast machines.
@@ -46,7 +56,7 @@
#define __SLOW_DOWN_IO \
__asm__ __volatile__( \
"sb\t$0,0x80(%0)" \
- : : "r" (PORT_BASE));
+ : : "r" (mips_io_port_base));
#ifdef CONF_SLOWDOWN_IO
#ifdef REALLY_SLOW_IO
@@ -176,11 +186,11 @@ extern inline void __out##s(unsigned int value, unsigned int port) {
__asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
#define __OUT(m,s) \
-__OUT1(s) __OUT2(m) : : "r" (value), "i" (0), "r" (PORT_BASE+port)); } \
-__OUT1(s##c) __OUT2(m) : : "r" (value), "ir" (port), "r" (PORT_BASE)); } \
-__OUT1(s##_p) __OUT2(m) : : "r" (value), "i" (0), "r" (PORT_BASE+port)); \
+__OUT1(s) __OUT2(m) : : "r" (value), "i" (0), "r" (mips_io_port_base+port)); } \
+__OUT1(s##c) __OUT2(m) : : "r" (value), "ir" (port), "r" (mips_io_port_base)); } \
+__OUT1(s##_p) __OUT2(m) : : "r" (value), "i" (0), "r" (mips_io_port_base+port)); \
SLOW_DOWN_IO; } \
-__OUT1(s##c_p) __OUT2(m) : : "r" (value), "ir" (port), "r" (PORT_BASE)); \
+__OUT1(s##c_p) __OUT2(m) : : "r" (value), "ir" (port), "r" (mips_io_port_base)); \
SLOW_DOWN_IO; }
#define __IN1(t,s) \
@@ -193,10 +203,10 @@ extern __inline__ t __in##s(unsigned int port) { t _v;
__asm__ __volatile__ ("l" #m "\t%0,%1(%2)"
#define __IN(t,m,s) \
-__IN1(t,s) __IN2(m) : "=r" (_v) : "i" (0), "r" (PORT_BASE+port)); return _v; } \
-__IN1(t,s##c) __IN2(m) : "=r" (_v) : "ir" (port), "r" (PORT_BASE)); return _v; } \
-__IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i" (0), "r" (PORT_BASE+port)); SLOW_DOWN_IO; return _v; } \
-__IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (PORT_BASE)); SLOW_DOWN_IO; return _v; }
+__IN1(t,s) __IN2(m) : "=r" (_v) : "i" (0), "r" (mips_io_port_base+port)); return _v; } \
+__IN1(t,s##c) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); return _v; } \
+__IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i" (0), "r" (mips_io_port_base+port)); SLOW_DOWN_IO; return _v; } \
+__IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return _v; }
#define __INS1(s) \
extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
@@ -217,11 +227,11 @@ __asm__ __volatile__ ( \
#define __INS(m,s,i) \
__INS1(s) __INS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "i" (0), "r" (PORT_BASE+port), "I" (i) \
+ : "0" (addr), "1" (count), "i" (0), "r" (mips_io_port_base+port), "I" (i) \
: "$1");} \
__INS1(s##c) __INS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "ir" (port), "r" (PORT_BASE), "I" (i) \
+ : "0" (addr), "1" (count), "ir" (port), "r" (mips_io_port_base), "I" (i) \
: "$1");}
#define __OUTS1(s) \
@@ -243,11 +253,11 @@ __asm__ __volatile__ ( \
#define __OUTS(m,s,i) \
__OUTS1(s) __OUTS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "i" (0), "r" (PORT_BASE+port), "I" (i) \
+ : "0" (addr), "1" (count), "i" (0), "r" (mips_io_port_base+port), "I" (i) \
: "$1");} \
__OUTS1(s##c) __OUTS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "ir" (port), "r" (PORT_BASE), "I" (i) \
+ : "0" (addr), "1" (count), "ir" (port), "r" (mips_io_port_base), "I" (i) \
: "$1");}
__IN(unsigned char,b,b)
diff --git a/include/asm-mips/ioctls.h b/include/asm-mips/ioctls.h
index d2813722f..5648eae7f 100644
--- a/include/asm-mips/ioctls.h
+++ b/include/asm-mips/ioctls.h
@@ -110,9 +110,5 @@
#define TIOCSERSETMULTI 0x5490 /* Set multiport config */
#define TIOCMIWAIT 0x5491 /* wait for a change on serial input line(s) */
#define TIOCGICOUNT 0x5492 /* read serial port inline interrupt counts */
-#if 0
-#define TIOCSBRK 0x5491 /* BSD compatibility */
-#define TIOCCBRK 0x5492 /* BSD compatibility */
-#endif
#endif /* __ASM_MIPS_IOCTLS_H */
diff --git a/include/asm-mips/jazz.h b/include/asm-mips/jazz.h
index 14384ba65..c05a5f23d 100644
--- a/include/asm-mips/jazz.h
+++ b/include/asm-mips/jazz.h
@@ -8,6 +8,8 @@
* Copyright (C) 1995 by Andreas Busse and Ralf Baechle
*
* This file is a mess. It really needs some reorganisation!
+ *
+ * $Id:$
*/
#ifndef __ASM_MIPS_JAZZ_H
#define __ASM_MIPS_JAZZ_H
diff --git a/include/asm-mips/jazzdma.h b/include/asm-mips/jazzdma.h
index a8e6f11d5..6519a1cef 100644
--- a/include/asm-mips/jazzdma.h
+++ b/include/asm-mips/jazzdma.h
@@ -21,7 +21,6 @@ void vdma_set_mode(int channel, int mode);
void vdma_set_addr(int channel, long addr);
void vdma_set_count(int channel, int count);
int vdma_get_residue(int channel);
-int vdma_get_enable(int channel);
/*
* some definitions used by the driver functions
diff --git a/include/asm-mips/mipsconfig.h b/include/asm-mips/mipsconfig.h
index bb9907bc1..28d608c07 100644
--- a/include/asm-mips/mipsconfig.h
+++ b/include/asm-mips/mipsconfig.h
@@ -10,17 +10,6 @@
#ifndef __ASM_MIPS_MIPSCONFIG_H
#define __ASM_MIPS_MIPSCONFIG_H
-/*
- * This is the virtual address to which all ports are being mapped.
- * Must be a value that can be load with a lui instruction.
- */
-#ifndef PORT_BASE
-#if !defined (__LANGUAGE_ASSEMBLY__)
-extern unsigned long port_base;
-#endif
-#define PORT_BASE port_base
-#endif
-
/* Pgdir is 1 page mapped at 0xff800000. */
#define TLBMAP 0xff800000
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 0dcd71a44..2a563efb9 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -8,7 +8,7 @@
* Copyright (C) 1994, 1995, 1996, 1997 by Ralf Baechle
* Modified for further R[236]000 support by Paul M. Antoine, 1996.
*
- * $Id: mipsregs.h,v 1.2 1997/09/12 22:25:34 ralf Exp $
+ * $Id: mipsregs.h,v 1.4 1997/09/20 19:02:46 root Exp $
*/
#ifndef __ASM_MIPS_MIPSREGS_H
#define __ASM_MIPS_MIPSREGS_H
@@ -254,6 +254,22 @@ __BUILD_SET_CP0(config,CP0_CONFIG)
* Status register bits available in all MIPS CPUs.
*/
#define ST0_IM 0x0000ff00
+#define STATUSB_IP0 8
+#define STATUSF_IP0 (1 << 8)
+#define STATUSB_IP1 9
+#define STATUSF_IP1 (1 << 9)
+#define STATUSB_IP2 10
+#define STATUSF_IP2 (1 << 10)
+#define STATUSB_IP3 11
+#define STATUSF_IP3 (1 << 11)
+#define STATUSB_IP4 12
+#define STATUSF_IP4 (1 << 12)
+#define STATUSB_IP5 13
+#define STATUSF_IP5 (1 << 13)
+#define STATUSB_IP6 14
+#define STATUSF_IP6 (1 << 14)
+#define STATUSB_IP7 15
+#define STATUSF_IP7 (1 << 15)
#define ST0_DE 0x00010000
#define ST0_CE 0x00020000
#define ST0_CH 0x00040000
@@ -293,6 +309,8 @@ __BUILD_SET_CP0(config,CP0_CONFIG)
#define CAUSEF_IP6 (1 << 14)
#define CAUSEB_IP7 15
#define CAUSEF_IP7 (1 << 15)
+#define CAUSEB_IV 23
+#define CAUSEF_IV (1 << 23)
#define CAUSEB_CE 28
#define CAUSEF_CE (3 << 28)
#define CAUSEB_BD 31
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index 56dd5c690..eb895b003 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -2,6 +2,8 @@
* linux/include/asm-mips/namei.h
*
* Included from linux/fs/namei.c
+ *
+ * $Id: namei.h,v 1.6 1997/09/18 07:59:31 root Exp $
*/
#ifndef __ASM_MIPS_NAMEI_H
#define __ASM_MIPS_NAMEI_H
@@ -14,7 +16,6 @@
static inline struct dentry *
__mips_lookup_dentry(const char *name, int follow_link)
{
- int error;
struct dentry *base;
if (current->personality != PER_IRIX32)
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index a506e4bb2..3d48c2ca3 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -4,36 +4,41 @@
* for more details.
*
* Declarations for the MIPS specific implementation of the PCI BIOS32 services.
+ *
+ * $Id: pci.h,v 1.2 1997/09/20 21:16:37 ralf Exp $
*/
#ifndef __ASM_MIPS_PCI_H
#define __ASM_MIPS_PCI_H
-extern unsigned long (*_pcibios_init)(unsigned long memory_start, unsigned long memory_end);
-extern unsigned long (*_pcibios_fixup) (unsigned long memory_start,
- unsigned long memory_end);
-extern int (*_pcibios_read_config_byte) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned char *val);
-extern int (*_pcibios_read_config_word) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned short *val);
-extern int (*_pcibios_read_config_dword) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned int *val);
-extern int (*_pcibios_write_config_byte) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned char val);
-extern int (*_pcibios_write_config_word) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned short val);
-extern int (*_pcibios_write_config_dword) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned int val);
+struct pci_ops {
+ unsigned long (*pcibios_fixup) (unsigned long memory_start,
+ unsigned long memory_end);
+ int (*pcibios_read_config_byte) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned char *val);
+ int (*pcibios_read_config_word) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned short *val);
+ int (*pcibios_read_config_dword) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned int *val);
+ int (*pcibios_write_config_byte) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned char val);
+ int (*pcibios_write_config_word) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned short val);
+ int (*pcibios_write_config_dword) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned int val);
+};
+
+extern struct pci_ops *pci_ops;
#endif /* __ASM_MIPS_PCI_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index c0b3a4d86..99f95a346 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -16,7 +16,6 @@
* - flush_cache_page(mm, vmaddr) flushes a single page
* - flush_cache_range(mm, start, end) flushes a range of pages
* - flush_page_to_ram(page) write back kernel page to ram
- *
*/
extern void (*flush_cache_all)(void);
extern void (*flush_cache_mm)(struct mm_struct *mm);
@@ -27,6 +26,12 @@ extern void (*flush_cache_sigtramp)(unsigned long addr);
extern void (*flush_page_to_ram)(unsigned long page);
#define flush_icache_range(start, end) flush_cache_all()
+/*
+ * Prototype of the DMA related cacheflushing stuff.
+ */
+extern void (*flush_cache_pre_dma_out)(unsigned long start, unsigned long size);
+extern void (*flush_cache_post_dma_in)(unsigned long start, unsigned long size);
+
/* TLB flushing:
*
* - flush_tlb_all() flushes all processes TLB entries
diff --git a/include/asm-mips/posix_types.h b/include/asm-mips/posix_types.h
index 21217ebae..ae9e5d14c 100644
--- a/include/asm-mips/posix_types.h
+++ b/include/asm-mips/posix_types.h
@@ -36,7 +36,6 @@ typedef long __kernel_time_t;
typedef long __kernel_clock_t;
typedef long __kernel_daddr_t;
typedef char * __kernel_caddr_t;
-typedef unsigned long __kernel_sigset_t;
#ifdef __GNUC__
typedef long long __kernel_loff_t;
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index c4c0e849b..e0d9ad387 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -4,6 +4,8 @@
* Copyright (C) 1994 Waldorf Electronics
* written by Ralf Baechle
* Modified further for R[236]000 compatibility by Paul M. Antoine
+ *
+ * $Id: processor.h,v 1.5 1997/12/01 16:48:39 ralf Exp $
*/
#ifndef __ASM_MIPS_PROCESSOR_H
#define __ASM_MIPS_PROCESSOR_H
@@ -15,9 +17,11 @@
#include <asm/system.h>
/*
- * System setup and hardware bug flags..
+ * System setup and hardware flags..
*/
extern char wait_available; /* only available on R4[26]00 */
+extern char cyclecounter_available; /* only available from R4000 upwards. */
+extern char dedicated_iv_available; /* some embedded MIPS like Nevada */
/*
* Bus types (default is ISA, but people can check others with these..)
@@ -128,7 +132,7 @@ struct thread_struct {
/* \
* Other stuff associated with the process \
*/ \
- 0, 0, 0, (unsigned long)&init_task_union + KERNEL_STACK_SIZE - 8, \
+ 0, 0, 0, (unsigned long)&init_task_union + KERNEL_STACK_SIZE - 32, \
(unsigned long) swapper_pg_dir, \
/* \
* For now the default is to fix address errors \
@@ -150,7 +154,13 @@ extern void release_thread(struct task_struct *);
*/
extern inline unsigned long thread_saved_pc(struct thread_struct *t)
{
- return ((struct pt_regs *)(long)t->reg29)->cp0_epc;
+ extern void ret_from_sys_call(void);
+
+ /* New born processes are a special case */
+ if (t->reg31 == (unsigned long) ret_from_sys_call)
+ return t->reg31;
+
+ return ((unsigned long*)t->reg29)[17];
}
/*
@@ -161,7 +171,8 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long
/*
* Does the process account for user or for system time?
*/
-#define USES_USER_TIME(regs) (!((regs)->cp0_status & 0x18))
+extern int (*running_in_user_mode)(void);
+#define USES_USER_TIME(regs) running_in_user_mode()
/* Allocation and freeing of basic task resources. */
/*
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 8813b7570..e31e29a6a 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -3,7 +3,9 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r4kcache.h,v 1.3 1997/09/12 22:25:35 ralf Exp $
+ * $Id: r4kcache.h,v 1.5 1997/12/01 16:47:05 ralf Exp $
+ *
+ * FIXME: Handle split L2 caches.
*/
#ifndef _MIPS_R4KCACHE_H
#define _MIPS_R4KCACHE_H
@@ -76,6 +78,32 @@ extern inline void flush_dcache_line(unsigned long addr)
"i" (Hit_Writeback_Inv_D));
}
+extern inline void invalidate_dcache_line(unsigned long addr)
+{
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".set mips3\n\t"
+ "cache %1, (%0)\n\t"
+ ".set mips0\n\t"
+ ".set reorder"
+ :
+ : "r" (addr),
+ "i" (Hit_Invalidate_D));
+}
+
+extern inline void invalidate_scache_line(unsigned long addr)
+{
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".set mips3\n\t"
+ "cache %1, (%0)\n\t"
+ ".set mips0\n\t"
+ ".set reorder"
+ :
+ : "r" (addr),
+ "i" (Hit_Invalidate_SD));
+}
+
extern inline void flush_scache_line(unsigned long addr)
{
__asm__ __volatile__(
@@ -372,11 +400,28 @@ extern inline void blast_dcache32(void)
}
}
+/*
+ * Call this function only with interrupts disabled or R4600 V2.0 may blow
+ * you up.
+ *
+ * R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
+ * Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Excl_D will only
+ * operate correctly if the internal data cache refill buffer is empty. These
+ * CACHE instructions should be separated from any potential data cache miss
+ * by a load instruction to an uncached address to empty the response buffer."
+ * (Revision 2.0 device errata from IDT available on http://www.idt.com/
+ * in .pdf format.)
+ */
extern inline void blast_dcache32_page(unsigned long page)
{
unsigned long start = page;
unsigned long end = (start + PAGE_SIZE);
+ /*
+ * Sigh ... workaround for R4600 v1.7 bug. Explanation see above.
+ */
+ *(volatile unsigned long *)KSEG1;
+
__asm__ __volatile__("nop;nop;nop;nop");
while(start < end) {
__asm__ __volatile__("
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index bdd80fd01..97dafc9ca 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -1,5 +1,5 @@
/*
- * include/asm-mips/uaccess.h
+ * include/asm-mips/sigcontext.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -7,13 +7,11 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: sigcontext.h,v 1.2 1997/06/25 20:49:07 ralf Exp $
+ * $Id: sigcontext.h,v 1.4 1997/12/01 16:46:19 ralf Exp $
*/
#ifndef __ASM_MIPS_SIGCONTEXT_H
#define __ASM_MIPS_SIGCONTEXT_H
-#include <linux/posix_types.h>
-
/*
* Keep this struct definition in sync with the sigcontext fragment
* in arch/mips/tools/offset.c
@@ -34,7 +32,7 @@ struct sigcontext {
unsigned int sc_cause; /* Unused */
unsigned int sc_badvaddr; /* Unused */
- __kernel_sigset_t sc_sigset; /* DANGER: kernel vs. libc sigset_t ... */
+ unsigned long sc_sigset; /* kernel's sigset_t */
unsigned long __pad0[3]; /* pad for constant size */
};
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index d7fe49864..7bdf024e5 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -7,7 +7,7 @@
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*
- * $Id:$
+ * $Id: signal.h,v 1.2 1997/09/07 05:27:50 ralf Exp $
*/
#ifndef __ASM_MIPS_SIGNAL_H
#define __ASM_MIPS_SIGNAL_H
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index bc9007010..dc0ebed3f 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -7,7 +7,7 @@
*
* Copyright (c) 1994, 1995, 1996, 1997 by Ralf Baechle
*
- * $Id: string.h,v 1.2 1997/07/24 01:49:29 ralf Exp $
+ * $Id: string.h,v 1.3 1997/08/11 04:11:53 ralf Exp $
*/
#ifndef __ASM_MIPS_STRING_H
#define __ASM_MIPS_STRING_H
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 117d6c062..abeaa3343 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -252,13 +252,6 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int
return x;
}
-extern unsigned long IRQ_vectors[32];
-extern unsigned long exception_handlers[32];
-
-#define set_int_vector(n,addr) \
- IRQ_vectors[n] = (unsigned long) (addr)
-
-#define set_except_vector(n,addr) \
- exception_handlers[n] = (unsigned long) (addr)
+extern void set_except_vector(int n, void *addr);
#endif /* __ASM_MIPS_SYSTEM_H */
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index 5e4604089..fbce44aee 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -158,7 +158,7 @@ struct termios {
#define B230400 0010003
#define B460800 0010004
#define CIBAUD 002003600000 /* input baud rate (not used) */
-#define CISPAR 010000000000 /* mark or space (stick) parity */
+#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
#endif
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 608d86834..97181113a 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: uaccess.h,v 1.2 1997/06/25 20:18:19 ralf Exp $
+ * $Id: uaccess.h,v 1.5 1997/12/01 16:44:08 ralf Exp $
*/
#ifndef __ASM_MIPS_UACCESS_H
#define __ASM_MIPS_UACCESS_H
@@ -321,23 +321,23 @@ if (copy_from_user(to,from,n)) \
void *__cu_end; \
__asm__ __volatile__( \
".set\tnoreorder\n\t" \
- "1:\tsb\t$0,(%0)\n\t" \
+ "1:\taddiu\t%0,1\n" \
"bne\t%0,%1,1b\n\t" \
- "addiu\t%0,1\n" \
+ "sb\t$0,-1(%0)\n\t" \
"2:\t.set\treorder\n\t" \
".section\t.fixup,\"ax\"\n" \
"3:\t.set\tnoat\n\t" \
- "la\t$1,2b\n\t" \
- "jr\t$1\n\t" \
+ "subu\t%0,1\n\t" \
+ "j\t2b\n\t" \
".set\tat\n\t" \
".previous\n\t" \
".section\t__ex_table,\"a\"\n\t" \
STR(PTR)"\t1b,3b\n\t" \
".previous" \
:"=r" (addr), "=r" (__cu_end) \
- :"0" (addr), "1" (addr + size - 1), "i" (-EFAULT) \
+ :"0" (addr), "1" (addr + size), "i" (-EFAULT) \
:"$1","memory"); \
- size = __cu_end - (addr) - 1; \
+ size = __cu_end - (addr); \
})
#define clear_user(addr,n) ({ \
diff --git a/include/asm-mips/watch.h b/include/asm-mips/watch.h
index 9c44856ef..6fcde8428 100644
--- a/include/asm-mips/watch.h
+++ b/include/asm-mips/watch.h
@@ -5,7 +5,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996 by Ralf Baechle
+ * Copyright (C) 1996, 1997 by Ralf Baechle
+ *
+ * $Id: watch.h,v 1.2 1997/09/19 08:37:44 ralf Exp $
*/
#ifndef __ASM_WATCH_H
#define __ASM_WATCH_H
@@ -20,7 +22,8 @@ enum wref_type {
wr_load = 2
};
-extern asmlinkage unsigned int watch_available;
+extern char watch_available;
+
extern asmlinkage __watch_set(unsigned long addr, enum wref_type ref);
extern asmlinkage __watch_clear(void);
extern asmlinkage __watch_reenable(void);
diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h
index 3ccc79766..e4001b10b 100644
--- a/include/asm-sparc/floppy.h
+++ b/include/asm-sparc/floppy.h
@@ -51,21 +51,24 @@ struct sun_floppy_ops {
static struct sun_floppy_ops sun_fdops;
-#define fd_inb(port) sun_fdops.fd_inb(port)
-#define fd_outb(value,port) sun_fdops.fd_outb(value,port)
-#define fd_enable_dma() sun_fd_enable_dma()
-#define fd_disable_dma() sun_fd_disable_dma()
-#define fd_request_dma() (0) /* nothing... */
-#define fd_free_dma() /* nothing... */
-#define fd_clear_dma_ff() /* nothing... */
-#define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode)
-#define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr)
-#define fd_set_dma_count(count) sun_fd_set_dma_count(count)
-#define fd_enable_irq() /* nothing... */
-#define fd_disable_irq() /* nothing... */
-#define fd_cacheflush(addr, size) /* nothing... */
-#define fd_request_irq() sun_fd_request_irq()
-#define fd_free_irq() /* nothing... */
+#define fd_inb(port) sun_fdops.fd_inb(port)
+#define fd_outb(value,port) sun_fdops.fd_outb(value,port)
+
+#define fd_enable_dma(channel) sun_fd_enable_dma()
+#define fd_disable_dma(channel) sun_fd_disable_dma()
+#define fd_request_dma(channel) (0) /* nothing... */
+#define fd_free_dma(channel) /* nothing... */
+#define fd_clear_dma_ff(channel) /* nothing... */
+#define fd_set_dma_mode(channel,mode) sun_fd_set_dma_mode(mode)
+#define fd_set_dma_addr(channel,addr) sun_fd_set_dma_addr(addr)
+#define fd_set_dma_count(channel,count) sun_fd_set_dma_count(count)
+
+#define fd_enable_irq(irq) /* nothing... */
+#define fd_disable_irq(irq) /* nothing... */
+#define fd_request_irq(irq) sun_fd_request_irq()
+#define fd_free_irq(irq) /* nothing... */
+
+#define fd_cacheflush(addr, size) /* nothing... */
#if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */
#define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size))
#define fd_dma_mem_free(addr,size) (vfree((void *)(addr)))
diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h
new file mode 100644
index 000000000..f630762f4
--- /dev/null
+++ b/include/asm-sparc64/timer.h
@@ -0,0 +1,51 @@
+/* $Id: timer.h,v 1.1 1997/08/05 09:44:55 ralf Exp $
+ * timer.h: System timer definitions for sun5.
+ *
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC64_TIMER_H
+#define _SPARC64_TIMER_H
+
+/* How timers work:
+ *
+ * On uniprocessors we just use counter zero for the system wide
+ * ticker, this performs thread scheduling, clock book keeping,
+ * and runs timer based events. Previously we used the Ultra
+ * %tick interrupt for this purpose.
+ *
+ * On multiprocessors we pick one cpu as the master level 10 tick
+ * processor. Here this counter zero tick handles clock book
+ * keeping and timer events only. Each Ultra has it's level
+ * 14 %tick interrupt set to fire off as well, even the master
+ * tick cpu runs this locally. This ticker performs thread
+ * scheduling, system/user tick counting for the current thread,
+ * and also profiling if enabled.
+ */
+
+/* Two timers, traditionally steered to PIL's 10 and 14 respectively.
+ * But since INO packets are used on sun5, we could use any PIL level
+ * we like, however for now we use the normal ones.
+ *
+ * The 'reg' and 'interrupts' properties for these live in nodes named
+ * 'counter-timer'. The first of three 'reg' properties describe where
+ * the sun5_timer registers are. The other two I have no idea. (XXX)
+ */
+struct sun5_timer {
+ u64 count0;
+ u64 limit0;
+ u64 count1;
+ u64 limit1;
+};
+
+#define SUN5_LIMIT_ENABLE 0x80000000
+#define SUN5_LIMIT_TOZERO 0x40000000
+#define SUN5_LIMIT_ZRESTART 0x20000000
+#define SUN5_LIMIT_CMASK 0x1fffffff
+
+/* Given a HZ value, set the limit register to so that the timer IRQ
+ * gets delivered that often.
+ */
+#define SUN5_HZ_TO_LIMIT(__hz) (1000000/(__hz))
+
+#endif /* _SPARC64_TIMER_H */
diff --git a/include/linux/cyclades.h b/include/linux/cyclades.h
index 0b22c2e30..ef9db064f 100644
--- a/include/linux/cyclades.h
+++ b/include/linux/cyclades.h
@@ -6,8 +6,13 @@
*
* This file contains the general definitions for the cyclades.c driver
*$Log: cyclades.h,v $
- *Revision 1.1.1.1 1997/06/01 03:17:04 ralf
- *Initial import of Linux/MIPS pre-2.1.40.
+ *Revision 2.0 1997/06/30 10:30:00 ivan
+ *added some new doorbell command constants related to IOCTLW and
+ *UART error signaling
+ *
+ *Revision 1.8 1997/06/03 15:30:00 ivan
+ *added constant ZFIRM_HLT
+ *added constant CyPCI_Ze_win ( = 2 * Cy_PCI_Zwin)
*
*Revision 1.7 1997/03/26 10:30:00 daniel
*new entries at the end of cyclades_port struct to reallocate
diff --git a/include/linux/mm.h b/include/linux/mm.h
index cab25f117..483596c29 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -304,9 +304,15 @@ extern void truncate_inode_pages(struct inode *, unsigned long);
#define GFP_NOBUFFER 0x04
#define GFP_NFS 0x05
+/* Flag - indicates that the buffer should be allocated uncached as for an
+ architecture where the caches don't snoop DMA access. This is a even
+ stricter requirement than GFP_DMA as GFP_DMA allocated buffers might be
+ writeback cacheable and not be suitable for use with devices like
+ networks cards which manipulate objects smaller than a cacheline. */
+#define GFP_UNCACHED 0x40
+
/* Flag - indicates that the buffer will be suitable for DMA. Ignored on some
platforms, used as appropriate on others */
-
#define GFP_DMA 0x80
#define GFP_LEVEL_MASK 0xf
diff --git a/include/linux/nvram.h b/include/linux/nvram.h
new file mode 100644
index 000000000..9e05db191
--- /dev/null
+++ b/include/linux/nvram.h
@@ -0,0 +1,18 @@
+#ifndef _LINUX_NVRAM_H
+#define _LINUX_NVRAM_H
+
+#include <linux/ioctl.h>
+
+/* /dev/nvram ioctls */
+#define NVRAM_INIT _IO('p', 0x40) /* initialize NVRAM and set checksum */
+#define NVRAM_SETCKS _IO('p', 0x41) /* recalculate checksum */
+
+#ifdef __KERNEL__
+extern unsigned char nvram_read_byte( int i );
+extern void nvram_write_byte( unsigned char c, int i );
+extern int nvram_check_checksum( void );
+extern void nvram_set_checksum( void );
+extern int nvram_init( void );
+#endif
+
+#endif /* _LINUX_NVRAM_H */
diff --git a/include/linux/parport.h b/include/linux/parport.h
index c3106ffdf..dc88589ae 100644
--- a/include/linux/parport.h
+++ b/include/linux/parport.h
@@ -1,4 +1,4 @@
-/* $Id: parport.h,v 1.3 1997/08/06 19:16:45 miguel Exp $ */
+/* $Id: parport.h,v 1.2.6.3.2.2 1997/04/18 15:03:53 phil Exp $ */
#ifndef _PARPORT_H_
#define _PARPORT_H_
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 94c321bdf..b370041ba 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -279,7 +279,6 @@
#define PCI_DEVICE_ID_DEC_FDDI 0x000F
#define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014
#define PCI_DEVICE_ID_DEC_21142 0x0019
-#define PCI_DEVICE_ID_DEC_21143 0x0019
#define PCI_DEVICE_ID_DEC_21052 0x0021
#define PCI_DEVICE_ID_DEC_21152 0x0024
diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h
index c65304671..e630aba70 100644
--- a/include/linux/sysrq.h
+++ b/include/linux/sysrq.h
@@ -1,6 +1,6 @@
/* -*- linux-c -*-
*
- * $Id: sysrq.h,v 1.1 1997/06/17 13:30:39 ralf Exp $
+ * $Id: sysrq.h,v 1.3 1997/07/17 11:54:33 mj Exp $
*
* Linux Magic System Request Key Hacks
*
diff --git a/include/linux/ufs_fs.h b/include/linux/ufs_fs.h
index 3afea01ad..eb2f6ec0d 100644
--- a/include/linux/ufs_fs.h
+++ b/include/linux/ufs_fs.h
@@ -6,7 +6,7 @@
* Laboratory for Computer Science Research Computing Facility
* Rutgers, The State University of New Jersey
*
- * $Id: ufs_fs.h,v 1.1.1.1 1997/06/01 03:17:06 ralf Exp $
+ * $Id: ufs_fs.h,v 1.8 1997/07/17 02:17:54 davem Exp $
*
*/
diff --git a/kernel/module.c b/kernel/module.c
index 0c66461d4..41ffd5734 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -298,7 +298,6 @@ sys_init_module(const char *name_user, struct module *mod_user)
error = -EFAULT;
goto err3;
}
- flush_cache_all(); /* XXX */
/* Update module references. */
mod->next = mod_tmp.next;
diff --git a/mm/vmscan.c b/mm/vmscan.c
index dba73f4ed..8f1ab1fae 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -7,7 +7,7 @@
* kswapd added: 7.1.96 sct
* Removed kswapd_ctl limits, and swap out as many pages as needed
* to bring the system back to free_pages_high: 2.4.97, Rik van Riel.
- * Version: $Id: vmscan.c,v 1.4 1997/07/20 15:01:39 ralf Exp $
+ * Version: $Id: vmscan.c,v 1.23 1997/04/12 04:31:05 davem Exp $
*/
#include <linux/mm.h>
diff --git a/net/ipv4/ip_fragment.c b/net/ipv4/ip_fragment.c
index 1431bae19..71bdea02e 100644
--- a/net/ipv4/ip_fragment.c
+++ b/net/ipv4/ip_fragment.c
@@ -5,7 +5,7 @@
*
* The IP fragmentation functionality.
*
- * Version: $Id: ip_fragment.c,v 1.3 1997/08/06 19:16:54 miguel Exp $
+ * Version: $Id: ip_fragment.c,v 1.26 1997/09/04 22:35:00 davem Exp $
*
* Authors: Fred N. van Kempen <waltje@uWalt.NL.Mugnet.ORG>
* Alan Cox <Alan.Cox@linux.org>
diff --git a/net/ipv4/syncookies.c b/net/ipv4/syncookies.c
index a795a8295..c175f30f3 100644
--- a/net/ipv4/syncookies.c
+++ b/net/ipv4/syncookies.c
@@ -9,7 +9,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
- * $Id: syncookies.c,v 1.1 1997/07/20 15:01:55 ralf Exp $
+ * $Id: syncookies.c,v 1.2 1997/08/22 19:15:08 freitag Exp $
*
* Missing: IPv6 support.
* Some counter so that the Administrator can see when the machine
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 8faa568ca..2c28ab611 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -5,7 +5,7 @@
*
* Implementation of the Transmission Control Protocol(TCP).
*
- * Version: $Id: tcp.c,v 1.3 1997/08/06 19:16:56 miguel Exp $
+ * Version: $Id: tcp.c,v 1.71 1997/09/06 05:11:45 davem Exp $
*
* Authors: Ross Biro, <bir7@leland.Stanford.Edu>
* Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index b60eed6f4..7c6fbec56 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -5,7 +5,7 @@
*
* Implementation of the Transmission Control Protocol(TCP).
*
- * Version: $Id: tcp_input.c,v 1.3 1997/07/20 15:01:55 ralf Exp $
+ * Version: $Id: tcp_input.c,v 1.56 1997/08/31 08:24:54 freitag Exp $
*
* Authors: Ross Biro, <bir7@leland.Stanford.Edu>
* Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c
index 7db33df60..f8cb36894 100644
--- a/net/ipv4/tcp_ipv4.c
+++ b/net/ipv4/tcp_ipv4.c
@@ -5,7 +5,7 @@
*
* Implementation of the Transmission Control Protocol(TCP).
*
- * Version: $Id: tcp_ipv4.c,v 1.3 1997/08/06 19:16:56 miguel Exp $
+ * Version: $Id: tcp_ipv4.c,v 1.62 1997/09/04 22:34:59 davem Exp $
*
* IPv4 specific functions
*
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c
index 74dbd2266..8e60f1a50 100644
--- a/net/ipv4/tcp_output.c
+++ b/net/ipv4/tcp_output.c
@@ -5,7 +5,7 @@
*
* Implementation of the Transmission Control Protocol(TCP).
*
- * Version: $Id: tcp_output.c,v 1.2 1997/09/12 01:34:42 ralf Exp $
+ * Version: $Id: tcp_output.c,v 1.46 1997/08/24 16:22:28 freitag Exp $
*
* Authors: Ross Biro, <bir7@leland.Stanford.Edu>
* Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index c4464d5da..359de74f0 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -5,7 +5,7 @@
* Authors:
* Pedro Roque <roque@di.fc.ul.pt>
*
- * $Id: addrconf.c,v 1.1.1.1 1997/06/01 03:16:27 ralf Exp $
+ * $Id: addrconf.c,v 1.21 1997/08/09 03:44:24 davem Exp $
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
diff --git a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c
index bca128579..8d2755b09 100644
--- a/net/ipv6/af_inet6.c
+++ b/net/ipv6/af_inet6.c
@@ -7,7 +7,7 @@
*
* Adapted from linux/net/ipv4/af_inet.c
*
- * $Id: af_inet6.c,v 1.2 1997/06/17 13:31:32 ralf Exp $
+ * $Id: af_inet6.c,v 1.21 1997/08/20 11:25:00 alan Exp $
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
diff --git a/net/ipv6/icmp.c b/net/ipv6/icmp.c
index 57b528c0d..36eb01ddc 100644
--- a/net/ipv6/icmp.c
+++ b/net/ipv6/icmp.c
@@ -5,7 +5,7 @@
* Authors:
* Pedro Roque <roque@di.fc.ul.pt>
*
- * $Id: icmp.c,v 1.2 1997/07/20 15:01:57 ralf Exp $
+ * $Id: icmp.c,v 1.10 1997/06/05 11:07:20 schenk Exp $
*
* Based on net/ipv4/icmp.c
*
diff --git a/net/ipv6/ip6_fib.c b/net/ipv6/ip6_fib.c
index a54582816..0ad79f211 100644
--- a/net/ipv6/ip6_fib.c
+++ b/net/ipv6/ip6_fib.c
@@ -5,7 +5,7 @@
* Authors:
* Pedro Roque <roque@di.fc.ul.pt>
*
- * $Id: ip6_fib.c,v 1.1.1.1 1997/06/01 03:16:27 ralf Exp $
+ * $Id: ip6_fib.c,v 1.7 1997/04/12 04:32:46 davem Exp $
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
diff --git a/net/ipv6/ip6_input.c b/net/ipv6/ip6_input.c
index ad33e86a2..534ebc66a 100644
--- a/net/ipv6/ip6_input.c
+++ b/net/ipv6/ip6_input.c
@@ -6,7 +6,7 @@
* Pedro Roque <roque@di.fc.ul.pt>
* Ian P. Morris <I.P.Morris@soton.ac.uk>
*
- * $Id: ip6_input.c,v 1.1.1.1 1997/06/01 03:16:27 ralf Exp $
+ * $Id: ip6_input.c,v 1.6 1997/05/11 16:06:52 davem Exp $
*
* Based in linux/net/ipv4/ip_input.c
*
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index cafa5eafb..7a865296f 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -5,7 +5,7 @@
* Authors:
* Pedro Roque <roque@di.fc.ul.pt>
*
- * $Id: ip6_output.c,v 1.1.1.1 1997/06/01 03:16:27 ralf Exp $
+ * $Id: ip6_output.c,v 1.3 1997/03/18 18:24:37 davem Exp $
*
* Based on linux/net/ipv4/ip_output.c
*
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 612534930..90a8caf09 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -5,7 +5,7 @@
* Authors:
* Pedro Roque <roque@di.fc.ul.pt>
*
- * $Id: route.c,v 1.2 1997/08/06 19:16:57 miguel Exp $
+ * $Id: route.c,v 1.13 1997/07/19 11:11:35 davem Exp $
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
index f13c2e9a7..7fba7c526 100644
--- a/net/ipv6/tcp_ipv6.c
+++ b/net/ipv6/tcp_ipv6.c
@@ -5,7 +5,7 @@
* Authors:
* Pedro Roque <roque@di.fc.ul.pt>
*
- * $Id: tcp_ipv6.c,v 1.4 1997/08/06 19:16:58 miguel Exp $
+ * $Id: tcp_ipv6.c,v 1.37 1997/08/22 19:15:40 freitag Exp $
*
* Based on:
* linux/net/ipv4/tcp.c