diff options
-rw-r--r-- | arch/mips64/kernel/smp.c | 5 | ||||
-rw-r--r-- | arch/mips64/mm/andes.c | 30 | ||||
-rw-r--r-- | arch/mips64/mm/fault.c | 2 | ||||
-rw-r--r-- | arch/mips64/mm/r4xx0.c | 121 | ||||
-rw-r--r-- | arch/mips64/sgi-ip27/ip27-init.c | 2 | ||||
-rw-r--r-- | include/asm-mips64/mmu_context.h | 56 | ||||
-rw-r--r-- | include/asm-mips64/processor.h | 1 |
7 files changed, 137 insertions, 80 deletions
diff --git a/arch/mips64/kernel/smp.c b/arch/mips64/kernel/smp.c index 963d57379..9507f2342 100644 --- a/arch/mips64/kernel/smp.c +++ b/arch/mips64/kernel/smp.c @@ -11,6 +11,7 @@ #include <asm/system.h> #include <asm/hardirq.h> #include <asm/softirq.h> +#include <asm/mmu_context.h> #ifdef CONFIG_SGI_IP27 @@ -68,12 +69,14 @@ static void smp_tune_scheduling (void) void __init smp_boot_cpus(void) { extern void allowboot(void); + extern int maxcpus; + init_new_context(current, &init_mm); global_irq_holder = 0; current->processor = 0; init_idle(); smp_tune_scheduling(); - smp_num_cpus = 1; /* for now */ + smp_num_cpus = 1; /* maxcpus; */ allowboot(); } diff --git a/arch/mips64/mm/andes.c b/arch/mips64/mm/andes.c index 071c4611e..a4877a8c7 100644 --- a/arch/mips64/mm/andes.c +++ b/arch/mips64/mm/andes.c @@ -91,7 +91,7 @@ andes_flush_cache_all(void) static void andes_flush_cache_mm(struct mm_struct *mm) { - if (mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -103,7 +103,7 @@ static void andes_flush_cache_range(struct mm_struct *mm, unsigned long start, unsigned long end) { - if (mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; #ifdef DEBUG_CACHE @@ -129,7 +129,7 @@ andes_flush_cache_page(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if (mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -244,7 +244,7 @@ andes_flush_tlb_all(void) static void andes_flush_tlb_mm(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; #ifdef DEBUG_TLB @@ -253,7 +253,7 @@ static void andes_flush_tlb_mm(struct mm_struct *mm) save_and_cli(flags); get_new_mmu_context(mm); if(mm == current->mm) - set_entryhi(mm->context & 0xff); + set_entryhi(CPU_CONTEXT(smp_processor_id(), mm) & 0xff); restore_flags(flags); } } @@ -262,7 +262,7 @@ static void andes_flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; int size; @@ -275,7 +275,7 @@ andes_flush_tlb_range(struct mm_struct *mm, unsigned long start, size = (size + 1) >> 1; if(size <= NTLB_ENTRIES_HALF) { int oldpid = (get_entryhi() & 0xff); - int newpid = (mm->context & 0xff); + int newpid = (CPU_CONTEXT(smp_processor_id(), mm) & 0xff); start &= (PAGE_MASK << 1); end += ((PAGE_SIZE << 1) - 1); @@ -302,7 +302,8 @@ andes_flush_tlb_range(struct mm_struct *mm, unsigned long start, } else { get_new_mmu_context(mm); if(mm == current->mm) - set_entryhi(mm->context & 0xff); + set_entryhi(CPU_CONTEXT(smp_processor_id(), mm) & + 0xff); } restore_flags(flags); } @@ -311,14 +312,14 @@ andes_flush_tlb_range(struct mm_struct *mm, unsigned long start, static void andes_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { - if(vma->vm_mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) != 0) { unsigned long flags; int oldpid, newpid, idx; #ifdef DEBUG_TLB printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page); #endif - newpid = (vma->vm_mm->context & 0xff); + newpid = (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff); page &= (PAGE_MASK << 1); save_and_cli(flags); oldpid = (get_entryhi() & 0xff); @@ -356,10 +357,11 @@ static void andes_update_mmu_cache(struct vm_area_struct * vma, pid = get_entryhi() & 0xff; - if((pid != (vma->vm_mm->context & 0xff)) || - (vma->vm_mm->context == 0)) { - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d tlbpid=%d\n", - (int) (vma->vm_mm->context & 0xff), pid); + if((pid != (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff)) || + (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) == 0)) { + printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d + tlbpid=%d\n", (int) (CPU_CONTEXT(smp_processor_id(), + vma->vm_mm) & 0xff), pid); } __save_and_cli(flags); diff --git a/arch/mips64/mm/fault.c b/arch/mips64/mm/fault.c index 57c667258..4feab6a9d 100644 --- a/arch/mips64/mm/fault.c +++ b/arch/mips64/mm/fault.c @@ -32,8 +32,6 @@ extern void die(char *, struct pt_regs *, unsigned long write); -unsigned long asid_cache = ASID_FIRST_VERSION; - /* * Macro for exception fixup code to access integer registers. */ diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c index 8ddcc9126..aac70e9c6 100644 --- a/arch/mips64/mm/r4xx0.c +++ b/arch/mips64/mm/r4xx0.c @@ -784,7 +784,7 @@ r4k_flush_cache_range_s16d16i16(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; start &= PAGE_MASK; @@ -793,7 +793,8 @@ r4k_flush_cache_range_s16d16i16(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s16d16i16(); } else { pgd_t *pgd; @@ -822,7 +823,7 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; start &= PAGE_MASK; @@ -831,7 +832,8 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s32d16i16(); } else { pgd_t *pgd; @@ -860,7 +862,7 @@ r4k_flush_cache_range_s64d16i16(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; start &= PAGE_MASK; @@ -869,7 +871,8 @@ r4k_flush_cache_range_s64d16i16(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s64d16i16(); } else { pgd_t *pgd; @@ -898,7 +901,7 @@ r4k_flush_cache_range_s128d16i16(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; start &= PAGE_MASK; @@ -907,7 +910,8 @@ r4k_flush_cache_range_s128d16i16(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s128d16i16(); } else { pgd_t *pgd; @@ -936,7 +940,7 @@ r4k_flush_cache_range_s32d32i32(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; start &= PAGE_MASK; @@ -945,7 +949,8 @@ r4k_flush_cache_range_s32d32i32(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s32d32i32(); } else { pgd_t *pgd; @@ -974,7 +979,7 @@ r4k_flush_cache_range_s64d32i32(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; start &= PAGE_MASK; @@ -983,7 +988,8 @@ r4k_flush_cache_range_s64d32i32(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s64d32i32(); } else { pgd_t *pgd; @@ -1012,7 +1018,7 @@ r4k_flush_cache_range_s128d32i32(struct mm_struct *mm, unsigned long start, struct vm_area_struct *vma; unsigned long flags; - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { return; start &= PAGE_MASK; @@ -1021,7 +1027,8 @@ r4k_flush_cache_range_s128d32i32(struct mm_struct *mm, unsigned long start, #endif vma = find_vma(mm, start); if(vma) { - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { r4k_flush_cache_all_s128d32i32(); } else { pgd_t *pgd; @@ -1047,7 +1054,7 @@ static void r4k_flush_cache_range_d16i16(struct mm_struct *mm, unsigned long start, unsigned long end) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; #ifdef DEBUG_CACHE @@ -1063,7 +1070,7 @@ static void r4k_flush_cache_range_d32i32(struct mm_struct *mm, unsigned long start, unsigned long end) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; #ifdef DEBUG_CACHE @@ -1082,7 +1089,7 @@ r4k_flush_cache_range_d32i32(struct mm_struct *mm, unsigned long start, */ static void r4k_flush_cache_mm_s16d16i16(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1092,7 +1099,7 @@ static void r4k_flush_cache_mm_s16d16i16(struct mm_struct *mm) static void r4k_flush_cache_mm_s32d16i16(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1102,7 +1109,7 @@ static void r4k_flush_cache_mm_s32d16i16(struct mm_struct *mm) static void r4k_flush_cache_mm_s64d16i16(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1112,7 +1119,7 @@ static void r4k_flush_cache_mm_s64d16i16(struct mm_struct *mm) static void r4k_flush_cache_mm_s128d16i16(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1122,7 +1129,7 @@ static void r4k_flush_cache_mm_s128d16i16(struct mm_struct *mm) static void r4k_flush_cache_mm_s32d32i32(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1132,7 +1139,7 @@ static void r4k_flush_cache_mm_s32d32i32(struct mm_struct *mm) static void r4k_flush_cache_mm_s64d32i32(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1142,7 +1149,7 @@ static void r4k_flush_cache_mm_s64d32i32(struct mm_struct *mm) static void r4k_flush_cache_mm_s128d32i32(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1152,7 +1159,7 @@ static void r4k_flush_cache_mm_s128d32i32(struct mm_struct *mm) static void r4k_flush_cache_mm_d16i16(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1162,7 +1169,7 @@ static void r4k_flush_cache_mm_d16i16(struct mm_struct *mm) static void r4k_flush_cache_mm_d32i32(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { #ifdef DEBUG_CACHE printk("cmm[%d]", (int)mm->context); #endif @@ -1184,7 +1191,7 @@ r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1209,7 +1216,8 @@ r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. */ @@ -1238,7 +1246,7 @@ r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1262,7 +1270,8 @@ r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. */ @@ -1291,7 +1300,7 @@ r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1316,7 +1325,8 @@ r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. */ @@ -1345,7 +1355,7 @@ r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1370,7 +1380,8 @@ r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* * Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. @@ -1400,7 +1411,7 @@ r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1426,7 +1437,8 @@ r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* * Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. @@ -1456,7 +1468,7 @@ r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1482,7 +1494,8 @@ r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* * Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. @@ -1512,7 +1525,7 @@ r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1537,7 +1550,8 @@ r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page) * for every cache flush operation. So we do indexed flushes * in that case, which doesn't overly flush the cache too much. */ - if(mm->context != current->mm->context) { + if (CPU_CONTEXT(smp_processor_id(), mm) != + CPU_CONTEXT(smp_processor_id(), current->mm)) { /* Do indexed flush, too much work to get the (possible) * tlb refills to work correctly. */ @@ -1566,7 +1580,7 @@ r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1622,7 +1636,7 @@ r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page) * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -1681,7 +1695,7 @@ r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma, * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ - if(mm->context == 0) + if (CPU_CONTEXT(smp_processor_id(), mm) == 0) return; #ifdef DEBUG_CACHE @@ -2035,7 +2049,7 @@ static inline void r4k_flush_tlb_all(void) static void r4k_flush_tlb_mm(struct mm_struct *mm) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; #ifdef DEBUG_TLB @@ -2044,7 +2058,7 @@ static void r4k_flush_tlb_mm(struct mm_struct *mm) save_and_cli(flags); get_new_mmu_context(mm); if(mm == current->mm) - set_entryhi(mm->context & 0xff); + set_entryhi(CPU_CONTEXT(smp_processor_id(), mm) & 0xff); restore_flags(flags); } } @@ -2052,7 +2066,7 @@ static void r4k_flush_tlb_mm(struct mm_struct *mm) static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { - if(mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), mm) != 0) { unsigned long flags; int size; @@ -2065,7 +2079,7 @@ static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start, size = (size + 1) >> 1; if(size <= NTLB_ENTRIES_HALF) { int oldpid = (get_entryhi() & 0xff); - int newpid = (mm->context & 0xff); + int newpid = (CPU_CONTEXT(smp_processor_id(), mm) & 0xff); start &= (PAGE_MASK << 1); end += ((PAGE_SIZE << 1) - 1); @@ -2092,7 +2106,8 @@ static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start, } else { get_new_mmu_context(mm); if(mm == current->mm) - set_entryhi(mm->context & 0xff); + set_entryhi(CPU_CONTEXT(smp_processor_id(), + mm) & 0xff); } __restore_flags(flags); } @@ -2100,14 +2115,14 @@ static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start, static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { - if(vma->vm_mm->context != 0) { + if (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) != 0) { unsigned long flags; int oldpid, newpid, idx; #ifdef DEBUG_TLB printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page); #endif - newpid = (vma->vm_mm->context & 0xff); + newpid = (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff); page &= (PAGE_MASK << 1); save_and_cli(flags); oldpid = (get_entryhi() & 0xff); @@ -2153,9 +2168,11 @@ static void r4k_update_mmu_cache(struct vm_area_struct * vma, pid = (get_entryhi() & 0xff); #ifdef DEBUG_TLB - if((pid != (vma->vm_mm->context & 0xff)) || (vma->vm_mm->context == 0)) { - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d tlbpid=%d\n", - (int) (vma->vm_mm->context & 0xff), pid); + if((pid != (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff)) || + (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) == 0)) { + printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d + tlbpid=%d\n", (int) (CPU_CONTEXT(smp_processor_id(), + vma->vm_mm) & 0xff), pid); } #endif diff --git a/arch/mips64/sgi-ip27/ip27-init.c b/arch/mips64/sgi-ip27/ip27-init.c index d08bbc9fe..1accb246a 100644 --- a/arch/mips64/sgi-ip27/ip27-init.c +++ b/arch/mips64/sgi-ip27/ip27-init.c @@ -17,6 +17,7 @@ #include <asm/current.h> #include <asm/smp.h> #include <asm/processor.h> +#include <asm/mmu_context.h> #include <asm/sn/launch.h> #include <asm/sn/sn_private.h> #include <asm/sn/sn0/ip27.h> @@ -317,6 +318,7 @@ void per_cpu_init(void) cpuid_t cpu = getcpuid(); cnodeid_t cnode = get_compact_nodeid(); + current_cpu_data.asid_cache = ASID_FIRST_VERSION; #if 0 intr_init(); #endif diff --git a/include/asm-mips64/mmu_context.h b/include/asm-mips64/mmu_context.h index 4592f685f..30ee6a9d4 100644 --- a/include/asm-mips64/mmu_context.h +++ b/include/asm-mips64/mmu_context.h @@ -12,10 +12,17 @@ #ifndef _ASM_MMU_CONTEXT_H #define _ASM_MMU_CONTEXT_H +#include <linux/config.h> +#include <linux/slab.h> #include <asm/pgalloc.h> +#include <asm/processor.h> -/* Fuck. The f-word is here so you can grep for it :-) */ -extern unsigned long asid_cache; +#ifndef CONFIG_SMP +#define CPU_CONTEXT(cpu, mm) (mm)->context +#else +#define CPU_CONTEXT(cpu, mm) (*((unsigned long *)((mm)->context) + cpu)) +#endif +#define ASID_CACHE(cpu) cpu_data[cpu].asid_cache #define ASID_INC 0x1 #define ASID_MASK 0xff @@ -32,16 +39,25 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, #define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1) extern inline void -get_new_mmu_context(struct mm_struct *mm) +get_new_cpu_mmu_context(struct mm_struct *mm, unsigned long cpu) { - unsigned long asid = asid_cache; + unsigned long asid = ASID_CACHE(cpu); if (! ((asid += ASID_INC) & ASID_MASK) ) { flush_tlb_all(); /* start new asid cycle */ if (!asid) /* fix version if needed */ asid = ASID_FIRST_VERSION; } - mm->context = asid_cache = asid; + CPU_CONTEXT(cpu, mm) = ASID_CACHE(cpu) = asid; +} + +extern inline void +get_new_mmu_context(struct mm_struct *mm) +{ +#ifdef CONFIG_SMP + memset((void *)mm->context, 0, smp_num_cpus * sizeof(unsigned long)); +#endif + get_new_cpu_mmu_context(mm, smp_processor_id()); } /* @@ -51,17 +67,32 @@ get_new_mmu_context(struct mm_struct *mm) extern inline void init_new_context(struct task_struct *tsk, struct mm_struct *mm) { +#ifndef CONFIG_SMP mm->context = 0; +#else + /* this allocation can be moved to copy_thread */ + mm->context = (unsigned long)kmalloc(smp_num_cpus * + sizeof(unsigned long), GFP_KERNEL); + /* + * Init the "context" values so that a tlbpid allocation + * happens on the first switch. + */ + if (mm->context) + memset((void *)mm->context, 0, smp_num_cpus * + sizeof(unsigned long)); + else + printk("Warning: init_new_context failed\n"); +#endif } extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk, unsigned cpu) { /* Check if our ASID is of an older version and thus invalid */ - if ((next->context ^ asid_cache) & ASID_VERSION_MASK) - get_new_mmu_context(next); + if ((CPU_CONTEXT(cpu, next) ^ ASID_CACHE(cpu)) & ASID_VERSION_MASK) + get_new_cpu_mmu_context(next, cpu); - set_entryhi(next->context); + set_entryhi(CPU_CONTEXT(cpu, next)); } /* @@ -70,7 +101,10 @@ extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, */ extern inline void destroy_context(struct mm_struct *mm) { - /* Nothing to do. */ +#ifdef CONFIG_SMP + if (mm->context) + kfree((void *)mm->context); +#endif } /* @@ -81,9 +115,9 @@ extern inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) { /* Unconditionally get a new ASID. */ - get_new_mmu_context(next); + get_new_cpu_mmu_context(next, smp_processor_id()); - set_entryhi(next->context); + set_entryhi(CPU_CONTEXT(smp_processor_id(), next)); } #endif /* _ASM_MMU_CONTEXT_H */ diff --git a/include/asm-mips64/processor.h b/include/asm-mips64/processor.h index 1148a35ab..76611f07d 100644 --- a/include/asm-mips64/processor.h +++ b/include/asm-mips64/processor.h @@ -38,6 +38,7 @@ struct cpuinfo_mips { unsigned long pgtable_cache_sz; unsigned long last_asn; unsigned int irq_count, bh_count; + unsigned long asid_cache; #if defined(CONFIG_SGI_IP27) cnodeid_t p_nodeid; /* my node ID in compact-id-space */ nasid_t p_nasid; /* my node ID in numa-as-id-space */ |