diff options
| -rw-r--r-- | arch/mips64/sgi-ip22/ip22-setup.c | 2 | ||||
| -rw-r--r-- | arch/mips64/sgi-ip27/ip27-init.c | 1 | ||||
| -rw-r--r-- | include/asm-mips64/mmu_context.h | 19 |
3 files changed, 18 insertions, 4 deletions
diff --git a/arch/mips64/sgi-ip22/ip22-setup.c b/arch/mips64/sgi-ip22/ip22-setup.c index 7505e0c03..82aa098c5 100644 --- a/arch/mips64/sgi-ip22/ip22-setup.c +++ b/arch/mips64/sgi-ip22/ip22-setup.c @@ -23,6 +23,7 @@ #include <linux/tty.h> #include <asm/addrspace.h> +#include <asm/mmu_context.h> #include <asm/bcache.h> #include <asm/keyboard.h> #include <asm/irq.h> @@ -125,6 +126,7 @@ void __init ip22_setup(void) #ifdef CONFIG_SERIAL_CONSOLE char *ctype; #endif + TLBMISS_HANDLER_SETUP(); /* Init the INDY HPC I/O controller. Need to call this before * fucking with the memory controller because it needs to know the diff --git a/arch/mips64/sgi-ip27/ip27-init.c b/arch/mips64/sgi-ip27/ip27-init.c index 42f51d241..dbb3e8cb5 100644 --- a/arch/mips64/sgi-ip27/ip27-init.c +++ b/arch/mips64/sgi-ip27/ip27-init.c @@ -346,6 +346,7 @@ void per_cpu_init(void) cnodeid_t cnode = get_compact_nodeid(); current_cpu_data.asid_cache = ASID_FIRST_VERSION; + TLBMISS_HANDLER_SETUP(); #if 0 intr_init(); #endif diff --git a/include/asm-mips64/mmu_context.h b/include/asm-mips64/mmu_context.h index 7f70157c4..0a31078da 100644 --- a/include/asm-mips64/mmu_context.h +++ b/include/asm-mips64/mmu_context.h @@ -17,6 +17,19 @@ #include <asm/pgalloc.h> #include <asm/processor.h> +/* + * For the fast tlb miss handlers, we currently keep a per cpu array + * of pointers to the current pgd for each processor. Also, the proc. + * id is stuffed into the context register. This should be changed to + * use the processor id via current->processor, where current is stored + * in watchhi/lo. The context register should be used to contiguously + * map the page tables. + */ +#define TLBMISS_HANDLER_SETUP_PGD(pgd) \ + pgd_current[smp_processor_id()] = (unsigned long)(pgd) +#define TLBMISS_HANDLER_SETUP() \ + set_context((unsigned long) smp_processor_id() << (23 + 3)); \ + TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) extern unsigned long pgd_current[]; #ifndef CONFIG_SMP @@ -88,8 +101,7 @@ extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, get_new_cpu_mmu_context(next, cpu); set_entryhi(CPU_CONTEXT(cpu, next) & 0xff); - set_context((unsigned long) smp_processor_id() << (23 + 3)); - pgd_current[smp_processor_id()] = next->pgd; + TLBMISS_HANDLER_SETUP_PGD(next->pgd); } /* @@ -115,8 +127,7 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next) get_new_cpu_mmu_context(next, smp_processor_id()); set_entryhi(CPU_CONTEXT(smp_processor_id(), next) & 0xff); - set_context((unsigned long) smp_processor_id() << (23 + 3)); - pgd_current[smp_processor_id()] = next->pgd; + TLBMISS_HANDLER_SETUP_PGD(next->pgd); } #endif /* _ASM_MMU_CONTEXT_H */ |