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-rw-r--r--arch/mips/kernel/irq.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 4e3ba5ad9..239576e4e 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -1,4 +1,4 @@
-/* $Id: irq.c,v 1.19 2000/02/04 07:40:23 ralf Exp $
+/* $Id: irq.c,v 1.20 2000/02/23 00:41:00 ralf Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -32,6 +32,24 @@
#include <asm/nile4.h>
/*
+ * Linux has a controller-independent x86 interrupt architecture.
+ * every controller has a 'controller-template', that is used
+ * by the main code to do the right thing. Each driver-visible
+ * interrupt source is transparently wired to the apropriate
+ * controller. Thus drivers need not be aware of the
+ * interrupt-controller.
+ *
+ * Various interrupt controllers we handle: 8259 PIC, SMP IO-APIC,
+ * PIIX4's internal 8259 PIC and SGI's Visual Workstation Cobalt (IO-)APIC.
+ * (IO-APICs assumed to be messaging to Pentium local-APICs)
+ *
+ * the code is designed to be easily extended with new/different
+ * interrupt controllers, without having to do assembly magic.
+ */
+
+irq_cpustat_t irq_stat [NR_CPUS];
+
+/*
* This contains the irq mask for both 8259A irq controllers, it's an
* int so we can deal with the third PIC in some systems like the RM300.
* (XXX This is broken for big endian.)