diff options
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/entry.S | 3 | ||||
-rw-r--r-- | arch/mips/kernel/gdb-low.S | 3 | ||||
-rw-r--r-- | arch/mips/kernel/head.S | 3 | ||||
-rw-r--r-- | arch/mips/kernel/ptrace.c | 34 | ||||
-rw-r--r-- | arch/mips/kernel/r2300_misc.S | 3 | ||||
-rw-r--r-- | arch/mips/kernel/r2300_switch.S | 9 | ||||
-rw-r--r-- | arch/mips/kernel/r4k_fpu.S | 50 | ||||
-rw-r--r-- | arch/mips/kernel/r4k_misc.S | 3 | ||||
-rw-r--r-- | arch/mips/kernel/r4k_switch.S | 57 |
9 files changed, 43 insertions, 122 deletions
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index a740bac27..1f6533ead 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -7,7 +7,7 @@ * * Copyright (C) 1994, 1995 by Ralf Baechle * - * $Id: entry.S,v 1.14 1999/04/12 19:13:21 harald Exp $ + * $Id: entry.S,v 1.15 1999/07/26 19:42:40 harald Exp $ */ /* @@ -23,7 +23,6 @@ #include <asm/current.h> #include <asm/errno.h> #include <asm/mipsregs.h> -#include <asm/mipsconfig.h> #include <asm/page.h> #include <asm/pgtable.h> #include <asm/stackframe.h> diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index a379c5c5b..dff18ca12 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S @@ -5,14 +5,13 @@ * * Copyright (C) 1995 Andreas Busse * - * $Id:$ + * $Id: gdb-low.S,v 1.4 1997/12/01 17:57:26 ralf Exp $ */ #include <linux/sys.h> #include <asm/asm.h> #include <asm/mipsregs.h> -#include <asm/mipsconfig.h> #include <asm/regdef.h> #include <asm/stackframe.h> #include <asm/gdb-stub.h> diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index 72d42a2da..acc666083 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -1,4 +1,4 @@ -/* $Id: head.S,v 1.11 1998/10/18 13:27:12 tsbogend Exp $ +/* $Id: head.S,v 1.12 1999/07/26 19:42:40 harald Exp $ * * arch/mips/kernel/head.S * @@ -26,7 +26,6 @@ #include <asm/regdef.h> #include <asm/cachectl.h> #include <asm/mipsregs.h> -#include <asm/mipsconfig.h> #include <asm/stackframe.h> #include <asm/bootinfo.h> #include <asm/cpu.h> diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 9350a3be0..c8e3d23b6 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -1,4 +1,4 @@ -/* $Id: ptrace.c,v 1.13 1999/06/17 13:25:46 ralf Exp $ +/* $Id: ptrace.c,v 1.15 1999/08/09 19:43:14 harald Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -348,17 +348,13 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) break; case FPR_BASE ... FPR_BASE + 31: if (child->used_math) { - unsigned long long *fregs; - if (last_task_used_math == child) { enable_cp1(); save_fp(child); disable_cp1(); last_task_used_math = NULL; } - fregs = (unsigned long long *) - &child->tss.fpu.hard.fp_regs[0]; - tmp = (unsigned long) fregs[(addr - 32)]; + tmp = child->tss.fpu.hard.fp_regs[addr - 32]; } else { tmp = -1; /* FP not yet used */ } @@ -381,9 +377,15 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) case FPC_CSR: tmp = child->tss.fpu.hard.control; break; - case FPC_EIR: /* implementation / version register */ - tmp = 0; /* XXX */ + case FPC_EIR: { /* implementation / version register */ + unsigned int flags; + + __save_flags(flags); + enable_cp1(); + __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); + __restore_flags(flags); break; + } default: tmp = 0; res = -EIO; @@ -401,22 +403,24 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) goto out; case PTRACE_POKEUSR: { - unsigned long long *fregs; struct pt_regs *regs; int res = 0; + regs = (struct pt_regs *) ((unsigned long) child + + KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs)); switch (addr) { case 0 ... 31: - regs = (struct pt_regs *) ((unsigned long) child + - KERNEL_STACK_SIZE - 32 - sizeof(struct pt_regs)); + regs->regs[addr] = data; break; - case FPR_BASE ... FPR_BASE + 31: + case FPR_BASE ... FPR_BASE + 31: { + unsigned int *fregs; if (child->used_math) { if (last_task_used_math == child) { enable_cp1(); save_fp(child); disable_cp1(); last_task_used_math = NULL; + regs->cp0_status &= ~ST0_CU1; } } else { /* FP not yet used */ @@ -424,10 +428,10 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) sizeof(child->tss.fpu.hard)); child->tss.fpu.hard.control = 0; } - fregs = (unsigned long long *) - &child->tss.fpu.hard.fp_regs[0]; - fregs[(addr - 32)] = (unsigned long long) data; + fregs = child->tss.fpu.hard.fp_regs; + fregs[addr - FPR_BASE] = data; break; + } case PC: regs->cp0_epc = data; break; diff --git a/arch/mips/kernel/r2300_misc.S b/arch/mips/kernel/r2300_misc.S index 23869af7d..e5bef295f 100644 --- a/arch/mips/kernel/r2300_misc.S +++ b/arch/mips/kernel/r2300_misc.S @@ -1,4 +1,4 @@ -/* $Id: misc.S,v 1.3 1999/05/01 22:40:36 ralf Exp $ +/* $Id: r2300_misc.S,v 1.4 1999/08/09 19:43:14 harald Exp $ * misc.S: Misc. exception handling code for R3000/R2000. * * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse @@ -17,7 +17,6 @@ #include <asm/bootinfo.h> #include <asm/cachectl.h> #include <asm/fpregdef.h> -#include <asm/mipsconfig.h> #include <asm/mipsregs.h> #include <asm/page.h> #include <asm/pgtable.h> diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S index 9341a31e0..710345c00 100644 --- a/arch/mips/kernel/r2300_switch.S +++ b/arch/mips/kernel/r2300_switch.S @@ -1,4 +1,4 @@ -/* $Id: r2300_switch.S,v 1.6 1999/06/13 16:30:32 ralf Exp $ +/* $Id: r2300_switch.S,v 1.7 1999/08/09 19:43:14 harald Exp $ * * r2300_switch.S: R2300 specific task switching code. * @@ -16,7 +16,6 @@ #include <asm/cachectl.h> #include <asm/current.h> #include <asm/fpregdef.h> -#include <asm/mipsconfig.h> #include <asm/mipsregs.h> #include <asm/offset.h> #include <asm/page.h> @@ -87,12 +86,12 @@ LEAF(lazy_fpu_switch) and t1, t3 sw t1, ST_OFF(a0) swc1 $f0, (THREAD_FPU + 0x00)(a0) - FPU_SAVE(a0, t1) # clobbers t1 + FPU_SAVE_SINGLE(a0, t1) # clobbers t1 2: lwc1 $f0, (THREAD_FPU + 0x00)($28) .set reorder - FPU_RESTORE($28, t0) # clobbers t0 + FPU_RESTORE_SINGLE($28, t0) # clobbers t0 jr ra END(lazy_fpu_switch) @@ -101,7 +100,7 @@ LEAF(lazy_fpu_switch) */ .set noreorder LEAF(save_fp) - FPU_SAVE(a0, t1) # clobbers t1 + FPU_SAVE_SINGLE(a0, t1) # clobbers t1 jr ra swc1 $f0, (THREAD_FPU + 0x00)(a0) END(save_fp) diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index dbd2eba43..39ec93b57 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S @@ -10,7 +10,7 @@ * Multi-arch abstraction and asm macros for easier reading: * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * - * $Id: r4k_fpu.S,v 1.5 1999/05/01 22:40:36 ralf Exp $ + * $Id: r4k_fpu.S,v 1.6 1999/08/09 19:43:15 harald Exp $ */ #include <asm/asm.h> #include <asm/fpregdef.h> @@ -28,28 +28,7 @@ .set mips3 /* Save floating point context */ LEAF(save_fp_context) - mfc0 t1,CP0_STATUS - sll t2,t1,5 - - bgez t2,1f - cfc1 t1,fcr31 - /* Store the 16 odd double precision registers */ - EX(sdc1 $f1,(SC_FPREGS+8)(a0)) - EX(sdc1 $f3,(SC_FPREGS+24)(a0)) - EX(sdc1 $f5,(SC_FPREGS+40)(a0)) - EX(sdc1 $f7,(SC_FPREGS+56)(a0)) - EX(sdc1 $f9,(SC_FPREGS+72)(a0)) - EX(sdc1 $f11,(SC_FPREGS+88)(a0)) - EX(sdc1 $f13,(SC_FPREGS+104)(a0)) - EX(sdc1 $f15,(SC_FPREGS+120)(a0)) - EX(sdc1 $f17,(SC_FPREGS+136)(a0)) - EX(sdc1 $f19,(SC_FPREGS+152)(a0)) - EX(sdc1 $f21,(SC_FPREGS+168)(a0)) - EX(sdc1 $f23,(SC_FPREGS+184)(a0)) - EX(sdc1 $f25,(SC_FPREGS+200)(a0)) - EX(sdc1 $f27,(SC_FPREGS+216)(a0)) - EX(sdc1 $f29,(SC_FPREGS+232)(a0)) - EX(sdc1 $f31,(SC_FPREGS+248)(a0)) + cfc1 t1,fcr31 /* Store the 16 even double precision registers */ 1: @@ -88,30 +67,7 @@ LEAF(save_fp_context) * stack frame which might have been changed by the user. */ LEAF(restore_fp_context) - mfc0 t1, CP0_STATUS - sll t0,t1,5 - bgez t0,1f - EX(lw t0,SC_FPC_CSR(a0)) - - /* Restore the 16 odd double precision registers only - * when enabled in the cp0 status register. - */ - EX(ldc1 $f1,(SC_FPREGS+8)(a0)) - EX(ldc1 $f3,(SC_FPREGS+24)(a0)) - EX(ldc1 $f5,(SC_FPREGS+40)(a0)) - EX(ldc1 $f7,(SC_FPREGS+56)(a0)) - EX(ldc1 $f9,(SC_FPREGS+72)(a0)) - EX(ldc1 $f11,(SC_FPREGS+88)(a0)) - EX(ldc1 $f13,(SC_FPREGS+104)(a0)) - EX(ldc1 $f15,(SC_FPREGS+120)(a0)) - EX(ldc1 $f17,(SC_FPREGS+136)(a0)) - EX(ldc1 $f19,(SC_FPREGS+152)(a0)) - EX(ldc1 $f21,(SC_FPREGS+168)(a0)) - EX(ldc1 $f23,(SC_FPREGS+184)(a0)) - EX(ldc1 $f25,(SC_FPREGS+200)(a0)) - EX(ldc1 $f27,(SC_FPREGS+216)(a0)) - EX(ldc1 $f29,(SC_FPREGS+232)(a0)) - EX(ldc1 $f31,(SC_FPREGS+248)(a0)) + EX(lw t0,SC_FPC_CSR(a0)) /* * Restore the 16 even double precision registers diff --git a/arch/mips/kernel/r4k_misc.S b/arch/mips/kernel/r4k_misc.S index e4e2801a9..c791f3275 100644 --- a/arch/mips/kernel/r4k_misc.S +++ b/arch/mips/kernel/r4k_misc.S @@ -6,7 +6,7 @@ * Multi-cpu abstraction and reworking: * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * - * $Id: r4k_misc.S,v 1.4 1997/12/01 17:57:30 ralf Exp $ + * $Id: r4k_misc.S,v 1.5 1999/08/09 19:43:15 harald Exp $ */ #include <asm/asm.h> #include <asm/current.h> @@ -15,7 +15,6 @@ #include <asm/cachectl.h> #include <asm/current.h> #include <asm/fpregdef.h> -#include <asm/mipsconfig.h> #include <asm/mipsregs.h> #include <asm/page.h> #include <asm/pgtable.h> diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 842bc1c38..8f16bdd80 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -1,4 +1,4 @@ -/* $Id: r4k_switch.S,v 1.7 1999/06/13 16:30:32 ralf Exp $ +/* $Id: r4k_switch.S,v 1.8 1999/08/09 19:43:15 harald Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -13,7 +13,6 @@ #include <asm/cachectl.h> #include <asm/current.h> #include <asm/fpregdef.h> -#include <asm/mipsconfig.h> #include <asm/mipsregs.h> #include <asm/offset.h> #include <asm/page.h> @@ -76,41 +75,26 @@ LEAF(lazy_fpu_switch) beqz a0, 2f # Save floating point state nor t3, zero, t3 + lw t1, ST_OFF(a0) # last thread looses fpu and t1, t3 sw t1, ST_OFF(a0) - sll t2, t1, 5 - bgez t2, 1f - sdc1 $f0, (THREAD_FPU + 0x00)(a0) - FPU_SAVE_16ODD(a0) -1: - FPU_SAVE_16EVEN(a0, t1) # clobbers t1 + + + FPU_SAVE_DOUBLE(a0, t1) # clobbers t1 2: - sll t0, t0, 5 # load new fp state - bgez t0, 1f - ldc1 $f0, (THREAD_FPU + 0x00)($28) - FPU_RESTORE_16ODD($28) -1: .set reorder - FPU_RESTORE_16EVEN($28, t0) # clobbers t0 + FPU_RESTORE_DOUBLE($28, t0) # clobbers t0 jr ra END(lazy_fpu_switch) /* * Save a thread's fp context. */ - .set noreorder LEAF(save_fp) - mfc0 t0, CP0_STATUS - sll t1, t0, 5 - bgez t1, 1f # 16 register mode? - nop - FPU_SAVE_16ODD(a0) -1: - FPU_SAVE_16EVEN(a0, t1) # clobbers t1 + FPU_SAVE_DOUBLE(a0, t1) # clobbers t1 jr ra - sdc1 $f0, (THREAD_FPU + 0x00)(a0) END(save_fp) /* @@ -128,32 +112,13 @@ LEAF(init_fpu) li t1, 0x20000000 or t0, t1 mtc0 t0, CP0_STATUS - sll t0, t0, 5 li t1, FPU_DEFAULT ctc1 t1, fcr31 - bgez t0, 1f # 16 / 32 register mode? - li t0, -1 - - dmtc1 t0, $f1 - dmtc1 t0, $f3 - dmtc1 t0, $f5 - dmtc1 t0, $f7 - dmtc1 t0, $f9 - dmtc1 t0, $f11 - dmtc1 t0, $f13 - dmtc1 t0, $f15 - dmtc1 t0, $f17 - dmtc1 t0, $f19 - dmtc1 t0, $f21 - dmtc1 t0, $f23 - dmtc1 t0, $f25 - dmtc1 t0, $f27 - dmtc1 t0, $f29 - dmtc1 t0, $f31 - -1: dmtc1 t0, $f0 + li t0, -1 + + dmtc1 t0, $f0 dmtc1 t0, $f2 dmtc1 t0, $f4 dmtc1 t0, $f6 @@ -168,6 +133,8 @@ LEAF(init_fpu) dmtc1 t0, $f24 dmtc1 t0, $f26 dmtc1 t0, $f28 + .set noreorder jr ra dmtc1 t0, $f30 + .set reorder END(init_fpu) |