diff options
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/Makefile | 19 | ||||
| -rw-r--r-- | arch/mips/mm/andes.c | 36 | ||||
| -rw-r--r-- | arch/mips/mm/fault.c | 4 | ||||
| -rw-r--r-- | arch/mips/mm/init.c | 34 | ||||
| -rw-r--r-- | arch/mips/mm/loadmmu.c | 44 | ||||
| -rw-r--r-- | arch/mips/mm/r2300.c | 39 | ||||
| -rw-r--r-- | arch/mips/mm/r4xx0.c | 41 | ||||
| -rw-r--r-- | arch/mips/mm/r6000.c | 41 | ||||
| -rw-r--r-- | arch/mips/mm/tfp.c | 34 |
9 files changed, 85 insertions, 207 deletions
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 8f0b902a6..5ae85bd0a 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -8,8 +8,23 @@ # Note 2! The CFLAGS definition is now in the main makefile... O_TARGET := mm.o -O_OBJS := extable.o init.o fault.o r4xx0.o r2300.o r6000.o tfp.o \ - andes.o loadmmu.o +O_OBJS := extable.o init.o fault.o loadmmu.o + +ifdef CONFIG_CPU_R3000 +O_OBJS += r2300.o +endif + +ifdef CONFIG_CPU_R4300 +O_OBJS += r4xx0.o +endif + +ifdef CONFIG_CPU_R4X00 +O_OBJS += r4xx0.o +endif + +ifdef CONFIG_CPU_R6000 +O_OBJS += r6000.o +endif ifdef CONFIG_SGI O_OBJS += umap.o diff --git a/arch/mips/mm/andes.c b/arch/mips/mm/andes.c index c0653eb64..4663ad657 100644 --- a/arch/mips/mm/andes.c +++ b/arch/mips/mm/andes.c @@ -1,4 +1,4 @@ -/* $Id: andes.c,v 1.5 1998/05/04 09:12:55 ralf Exp $ +/* $Id: andes.c,v 1.6 1999/01/04 16:03:52 ralf Exp $ * * andes.c: MMU and cache operations for the R10000 (ANDES). * @@ -14,8 +14,6 @@ #include <asm/sgialib.h> #include <asm/mmu_context.h> -extern unsigned long mips_tlb_entries; - /* Cache operations. XXX Write these dave... */ static inline void andes_flush_cache_all(void) { @@ -51,46 +49,41 @@ static void andes_flush_cache_sigtramp(unsigned long page) } /* TLB operations. XXX Write these dave... */ -static inline void andes_flush_tlb_all(void) +inline void flush_tlb_all(void) { /* XXX */ } -static void andes_flush_tlb_mm(struct mm_struct *mm) +void flush_tlb_mm(struct mm_struct *mm) { /* XXX */ } -static void andes_flush_tlb_range(struct mm_struct *mm, unsigned long start, +void flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { /* XXX */ } -static void andes_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { /* XXX */ } -static void andes_load_pgd(unsigned long pg_dir) +void load_pgd(unsigned long pg_dir) { } -static void andes_pgd_init(unsigned long page) +void pgd_init(unsigned long page) { } -static void andes_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask) { /* XXX */ } -static int andes_user_mode(struct pt_regs *regs) -{ - return (regs->cp0_status & ST0_KSU) == KSU_USER; -} - __initfunc(void ld_mmu_andes(void)) { flush_cache_all = andes_flush_cache_all; @@ -100,19 +93,6 @@ __initfunc(void ld_mmu_andes(void)) flush_cache_sigtramp = andes_flush_cache_sigtramp; flush_page_to_ram = andes_flush_page_to_ram; - flush_tlb_all = andes_flush_tlb_all; - flush_tlb_mm = andes_flush_tlb_mm; - flush_tlb_range = andes_flush_tlb_range; - flush_tlb_page = andes_flush_tlb_page; - andes_asid_setup(); - - add_wired_entry = andes_add_wired_entry; - - user_mode = andes_user_mode; - - load_pgd = andes_load_pgd; - pgd_init = andes_pgd_init; - flush_cache_all(); flush_tlb_all(); } diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index 18bfbf80e..fbcea015d 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c @@ -1,4 +1,4 @@ -/* $Id: fault.c,v 1.8 1998/09/19 19:16:18 ralf Exp $ +/* $Id: fault.c,v 1.9 1999/01/04 16:03:53 ralf Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -31,7 +31,7 @@ extern void die(char *, struct pt_regs *, unsigned long write); -unsigned long asid_cache; +unsigned long asid_cache = ASID_FIRST_VERSION; /* * Macro for exception fixup code to access integer registers. diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 29a6d787d..90342db23 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -1,4 +1,4 @@ -/* $Id: init.c,v 1.14 1999/06/22 23:06:28 ralf Exp $ +/* $Id: init.c,v 1.15 1999/07/05 23:09:46 ralf Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -381,35 +381,3 @@ void si_meminfo(struct sysinfo *val) val->sharedram <<= PAGE_SHIFT; return; } - -/* Fixup an immediate instruction */ -__initfunc(static void __i_insn_fixup(unsigned int **start, unsigned int **stop, - unsigned int i_const)) -{ - unsigned int **p, *ip; - - for (p = start;p < stop; p++) { - ip = *p; - *ip = (*ip & 0xffff0000) | i_const; - } -} - -#define i_insn_fixup(section, const) \ -do { \ - extern unsigned int *__start_ ## section; \ - extern unsigned int *__stop_ ## section; \ - __i_insn_fixup(&__start_ ## section, &__stop_ ## section, const); \ -} while(0) - -/* Caller is assumed to flush the caches before the first context switch. */ -__initfunc(void __asid_setup(unsigned int inc, unsigned int mask, - unsigned int version_mask, - unsigned int first_version)) -{ - i_insn_fixup(__asid_inc, inc); - i_insn_fixup(__asid_mask, mask); - i_insn_fixup(__asid_version_mask, version_mask); - i_insn_fixup(__asid_first_version, first_version); - - asid_cache = first_version; -} diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c index 8538ff2dc..cd6a884c7 100644 --- a/arch/mips/mm/loadmmu.c +++ b/arch/mips/mm/loadmmu.c @@ -3,7 +3,7 @@ * * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * - * $Id: loadmmu.c,v 1.9 1999/06/13 16:30:35 ralf Exp $ + * $Id: loadmmu.c,v 1.10 1999/06/17 13:25:51 ralf Exp $ */ #include <linux/init.h> #include <linux/kernel.h> @@ -34,44 +34,35 @@ void (*dma_cache_wback_inv)(unsigned long start, unsigned long size); void (*dma_cache_wback)(unsigned long start, unsigned long size); void (*dma_cache_inv)(unsigned long start, unsigned long size); -/* TLB operations. */ -void (*flush_tlb_all)(void); -void (*flush_tlb_mm)(struct mm_struct *mm); -void (*flush_tlb_range)(struct mm_struct *mm, unsigned long start, - unsigned long end); -void (*flush_tlb_page)(struct vm_area_struct *vma, unsigned long page); - -/* Miscellaneous. */ -void (*load_pgd)(unsigned long pg_dir); -void (*pgd_init)(unsigned long page); -void (*update_mmu_cache)(struct vm_area_struct * vma, - unsigned long address, pte_t pte); - -void (*show_regs)(struct pt_regs *); - -void (*add_wired_entry)(unsigned long entrylo0, unsigned long entrylo1, - unsigned long entryhi, unsigned long pagemask); - -int (*user_mode)(struct pt_regs *); - -asmlinkage void *(*resume)(void *last, void *next); - +#ifdef CONFIG_CPU_R3000 extern void ld_mmu_r2300(void); +#endif +#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_R4300) extern void ld_mmu_r4xx0(void); +#endif +#ifdef CONFIG_CPU_R6000 extern void ld_mmu_r6000(void); +#endif +#ifdef CONFIG_CPU_R8000 extern void ld_mmu_tfp(void); +#endif +#ifdef CONFIG_CPU_R10000 extern void ld_mmu_andes(void); +#endif __initfunc(void loadmmu(void)) { switch(mips_cputype) { +#ifdef CONFIG_CPU_R3000 case CPU_R2000: case CPU_R3000: case CPU_R3000A: printk("Loading R[23]00 MMU routines.\n"); ld_mmu_r2300(); break; +#endif +#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_R4300) case CPU_R4000PC: case CPU_R4000SC: case CPU_R4000MC: @@ -90,22 +81,29 @@ __initfunc(void loadmmu(void)) printk("Loading R4000 MMU routines.\n"); ld_mmu_r4xx0(); break; +#endif +#ifdef CONFIG_CPU_R6000 case CPU_R6000: case CPU_R6000A: printk("Loading R6000 MMU routines.\n"); ld_mmu_r6000(); break; +#endif +#ifdef CONFIG_CPU_R8000 case CPU_R8000: printk("Loading TFP MMU routines.\n"); ld_mmu_tfp(); break; +#endif +#ifdef CONFIG_CPU_R10000 case CPU_R10000: printk("Loading R10000 MMU routines.\n"); ld_mmu_andes(); break; +#endif default: /* XXX We need an generic routine in the MIPS port diff --git a/arch/mips/mm/r2300.c b/arch/mips/mm/r2300.c index 6e4127e7e..656e7797f 100644 --- a/arch/mips/mm/r2300.c +++ b/arch/mips/mm/r2300.c @@ -42,8 +42,6 @@ static struct cache_space { #undef DEBUG_TLB #undef DEBUG_CACHE -extern unsigned long mips_tlb_entries; - #define NTLB_ENTRIES 64 /* Fixed on all R23000 variants... */ /* page functions */ @@ -427,7 +425,7 @@ static void r2300_flush_cache_sigtramp(unsigned long page) } /* TLB operations. */ -static inline void r2300_flush_tlb_all(void) +inline void flush_tlb_all(void) { unsigned long flags; unsigned long old_ctx; @@ -449,7 +447,7 @@ static inline void r2300_flush_tlb_all(void) restore_flags(flags); } -static void r2300_flush_tlb_mm(struct mm_struct *mm) +void flush_tlb_mm(struct mm_struct *mm) { if(mm->context != 0) { unsigned long flags; @@ -465,7 +463,7 @@ static void r2300_flush_tlb_mm(struct mm_struct *mm) } } -static void r2300_flush_tlb_range(struct mm_struct *mm, unsigned long start, +void flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { if(mm->context != 0) { @@ -508,7 +506,7 @@ static void r2300_flush_tlb_range(struct mm_struct *mm, unsigned long start, } } -static void r2300_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { if(vma->vm_mm->context != 0) { unsigned long flags; @@ -544,7 +542,7 @@ static void r2300_load_pgd(unsigned long pg_dir) /* * Initialize new page directory with pointers to invalid ptes */ -static void r2300_pgd_init(unsigned long page) +void pgd_init(unsigned long page) { unsigned long dummy1, dummy2; @@ -573,7 +571,7 @@ static void r2300_pgd_init(unsigned long page) "1" (PAGE_SIZE/(sizeof(pmd_t)*8))); } -static void r2300_update_mmu_cache(struct vm_area_struct * vma, +void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte) { unsigned long flags; @@ -629,7 +627,7 @@ static void r2300_update_mmu_cache(struct vm_area_struct * vma, restore_flags(flags); } -static void r2300_show_regs(struct pt_regs * regs) +void show_regs(struct pt_regs * regs) { /* * Saved main processor registers @@ -662,7 +660,7 @@ static void r2300_show_regs(struct pt_regs * regs) (unsigned int) regs->cp0_cause); } -static void r2300_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask) { printk("r2300_add_wired_entry"); @@ -671,11 +669,6 @@ printk("r2300_add_wired_entry"); */ } -static int r2300_user_mode(struct pt_regs *regs) -{ - return !(regs->cp0_status & KU_USER); -} - __initfunc(void ld_mmu_r2300(void)) { printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID)); @@ -693,23 +686,7 @@ __initfunc(void ld_mmu_r2300(void)) flush_cache_sigtramp = r2300_flush_cache_sigtramp; flush_page_to_ram = r2300_flush_page_to_ram; - flush_tlb_all = r2300_flush_tlb_all; - flush_tlb_mm = r2300_flush_tlb_mm; - flush_tlb_range = r2300_flush_tlb_range; - flush_tlb_page = r2300_flush_tlb_page; - dma_cache_wback_inv = r3k_dma_cache_wback_inv; - load_pgd = r2300_load_pgd; - pgd_init = r2300_pgd_init; - update_mmu_cache = r2300_update_mmu_cache; - r3000_asid_setup(); - - show_regs = r2300_show_regs; - - add_wired_entry = r2300_add_wired_entry; - - user_mode = r2300_user_mode; - flush_tlb_all(); } diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c index 31e76cead..be843351e 100644 --- a/arch/mips/mm/r4xx0.c +++ b/arch/mips/mm/r4xx0.c @@ -1,4 +1,4 @@ -/* $Id: r4xx0.c,v 1.21 1999/01/04 16:03:54 ralf Exp $ +/* $Id: r4xx0.c,v 1.22 1999/06/17 13:25:51 ralf Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -2222,7 +2222,7 @@ static void r4600v20k_flush_cache_sigtramp(unsigned long addr) #define NTLB_ENTRIES_HALF 24 /* Fixed on all R4XX0 variants... */ -static inline void r4k_flush_tlb_all(void) +inline void flush_tlb_all(void) { unsigned long flags; unsigned long old_ctx; @@ -2255,7 +2255,7 @@ static inline void r4k_flush_tlb_all(void) restore_flags(flags); } -static void r4k_flush_tlb_mm(struct mm_struct *mm) +void flush_tlb_mm(struct mm_struct *mm) { if(mm->context != 0) { unsigned long flags; @@ -2271,7 +2271,7 @@ static void r4k_flush_tlb_mm(struct mm_struct *mm) } } -static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start, +void flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { if(mm->context != 0) { @@ -2320,7 +2320,7 @@ static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start, } } -static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { if(vma->vm_mm->context != 0) { unsigned long flags; @@ -2354,11 +2354,11 @@ static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) } /* Load a new root pointer into the TLB. */ -static void r4k_load_pgd(unsigned long pg_dir) +void load_pgd(unsigned long pg_dir) { } -static void r4k_pgd_init(unsigned long page) +void pgd_init(unsigned long page) { unsigned long *p = (unsigned long *) page; int i; @@ -2385,7 +2385,7 @@ static unsigned long el1_debug[NTLB_ENTRIES]; * updates the TLB with the new pte(s), and another which also checks * for the R4k "end of page" hardware bug and does the needy. */ -static void r4k_update_mmu_cache(struct vm_area_struct * vma, +void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte) { unsigned long flags; @@ -2459,7 +2459,7 @@ static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma, } #endif -static void r4k_show_regs(struct pt_regs * regs) +void show_regs(struct pt_regs * regs) { /* Saved main processor registers. */ printk("$0 : %08lx %08lx %08lx %08lx\n", @@ -2484,7 +2484,7 @@ static void r4k_show_regs(struct pt_regs * regs) regs->cp0_epc, regs->cp0_status, regs->cp0_cause); } -static void r4k_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask) { unsigned long flags; @@ -2765,11 +2765,6 @@ __initfunc(static inline void setup_scache(unsigned int config)) setup_noscache_funcs(); } -static int r4k_user_mode(struct pt_regs *regs) -{ - return (regs->cp0_status & ST0_KSU) == KSU_USER; -} - __initfunc(void ld_mmu_r4xx0(void)) { unsigned long config = read_32bit_cp0_register(CP0_CONFIG); @@ -2795,22 +2790,6 @@ __initfunc(void ld_mmu_r4xx0(void)) flush_cache_sigtramp = r4600v20k_flush_cache_sigtramp; } - flush_tlb_all = r4k_flush_tlb_all; - flush_tlb_mm = r4k_flush_tlb_mm; - flush_tlb_range = r4k_flush_tlb_range; - flush_tlb_page = r4k_flush_tlb_page; - r4xx0_asid_setup(); - - load_pgd = r4k_load_pgd; - pgd_init = r4k_pgd_init; - update_mmu_cache = r4k_update_mmu_cache; - - show_regs = r4k_show_regs; - - add_wired_entry = r4k_add_wired_entry; - - user_mode = r4k_user_mode; - flush_cache_all(); write_32bit_cp0_register(CP0_WIRED, 0); diff --git a/arch/mips/mm/r6000.c b/arch/mips/mm/r6000.c index b8b442728..7f2919db8 100644 --- a/arch/mips/mm/r6000.c +++ b/arch/mips/mm/r6000.c @@ -1,4 +1,4 @@ -/* $Id: r6000.c,v 1.5 1998/08/25 09:14:47 ralf Exp $ +/* $Id: r6000.c,v 1.6 1999/01/04 16:03:54 ralf Exp $ * * r6000.c: MMU and cache routines for the R6000 processors. * @@ -53,32 +53,32 @@ static void r6000_flush_cache_sigtramp(unsigned long page) } /* TLB operations. XXX Write these dave... */ -static inline void r6000_flush_tlb_all(void) +inline void flush_tlb_all(void) { /* XXX */ } -static void r6000_flush_tlb_mm(struct mm_struct *mm) +void flush_tlb_mm(struct mm_struct *mm) { /* XXX */ } -static void r6000_flush_tlb_range(struct mm_struct *mm, unsigned long start, +void flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { /* XXX */ } -static void r6000_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { /* XXX */ } -static void r6000_load_pgd(unsigned long pg_dir) +void load_pgd(unsigned long pg_dir) { } -static void r6000_pgd_init(unsigned long page) +void pgd_init(unsigned long page) { unsigned long dummy1, dummy2; @@ -115,7 +115,7 @@ static void r6000_pgd_init(unsigned long page) "i" (Create_Dirty_Excl_D)); } -static void r6000_update_mmu_cache(struct vm_area_struct * vma, +void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte) { r6000_flush_tlb_page(vma, address); @@ -125,7 +125,7 @@ static void r6000_update_mmu_cache(struct vm_area_struct * vma, */ } -static void r6000_show_regs(struct pt_regs * regs) +void show_regs(struct pt_regs * regs) { /* * Saved main processor registers @@ -158,17 +158,12 @@ static void r6000_show_regs(struct pt_regs * regs) (unsigned int) regs->cp0_cause); } -static void r6000_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask) { /* XXX */ } -static int r6000_user_mode(struct pt_regs *regs) -{ - return !(regs->cp0_status & 0x4); -} - __initfunc(void ld_mmu_r6000(void)) { flush_cache_all = r6000_flush_cache_all; @@ -178,22 +173,6 @@ __initfunc(void ld_mmu_r6000(void)) flush_cache_sigtramp = r6000_flush_cache_sigtramp; flush_page_to_ram = r6000_flush_page_to_ram; - flush_tlb_all = r6000_flush_tlb_all; - flush_tlb_mm = r6000_flush_tlb_mm; - flush_tlb_range = r6000_flush_tlb_range; - flush_tlb_page = r6000_flush_tlb_page; - r6000_asid_setup(); - - load_pgd = r6000_load_pgd; - pgd_init = r6000_pgd_init; - update_mmu_cache = r6000_update_mmu_cache; - - show_regs = r6000_show_regs; - - add_wired_entry = r6000_add_wired_entry; - - user_mode = r6000_user_mode; - flush_cache_all(); flush_tlb_all(); } diff --git a/arch/mips/mm/tfp.c b/arch/mips/mm/tfp.c index 0d8ab7c86..bf520e247 100644 --- a/arch/mips/mm/tfp.c +++ b/arch/mips/mm/tfp.c @@ -1,4 +1,4 @@ -/* $Id: tfp.c,v 1.6 1998/10/16 19:22:44 ralf Exp $ +/* $Id: tfp.c,v 1.6 1999/01/04 16:03:55 ralf Exp $ * * tfp.c: MMU and cache routines specific to the r8000 (TFP). * @@ -53,46 +53,41 @@ static void tfp_flush_cache_sigtramp(unsigned long page) } /* TLB operations. XXX Write these dave... */ -static inline void tfp_flush_tlb_all(void) +inline void flush_tlb_all(void) { /* XXX */ } -static void tfp_flush_tlb_mm(struct mm_struct *mm) +void flush_tlb_mm(struct mm_struct *mm) { /* XXX */ } -static void tfp_flush_tlb_range(struct mm_struct *mm, unsigned long start, +void flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { /* XXX */ } -static void tfp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { /* XXX */ } -static void tfp_load_pgd(unsigned long pg_dir) +void load_pgd(unsigned long pg_dir) { } -static void tfp_pgd_init(unsigned long page) +void pgd_init(unsigned long page) { } -static void tfp_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask) { /* XXX */ } -static int tfp_user_mode(struct pt_regs *regs) -{ - return (regs->cp0_status & ST0_KSU) == KSU_USER; -} - __initfunc(void ld_mmu_tfp(void)) { flush_cache_all = tfp_flush_cache_all; @@ -102,19 +97,6 @@ __initfunc(void ld_mmu_tfp(void)) flush_cache_sigtramp = tfp_flush_cache_sigtramp; flush_page_to_ram = tfp_flush_page_to_ram; - flush_tlb_all = tfp_flush_tlb_all; - flush_tlb_mm = tfp_flush_tlb_mm; - flush_tlb_range = tfp_flush_tlb_range; - flush_tlb_page = tfp_flush_tlb_page; - tfp_asid_setup(); - - add_wired_entry = tfp_add_wired_entry; - - user_mode = tfp_user_mode; - - load_pgd = tfp_load_pgd; - pgd_init = tfp_pgd_init; - flush_cache_all(); flush_tlb_all(); } |