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-rw-r--r--arch/mips64/mm/andes.c22
-rw-r--r--arch/mips64/mm/loadmmu.c6
-rw-r--r--arch/mips64/mm/r4xx0.c6
3 files changed, 33 insertions, 1 deletions
diff --git a/arch/mips64/mm/andes.c b/arch/mips64/mm/andes.c
index 885443032..fa140bf94 100644
--- a/arch/mips64/mm/andes.c
+++ b/arch/mips64/mm/andes.c
@@ -6,6 +6,7 @@
*
* Copyright (C) 1997, 1998, 1999 Ralf Baechle (ralf@gnu.org)
* Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
*/
#include <linux/init.h>
#include <linux/kernel.h>
@@ -88,6 +89,26 @@ andes_flush_cache_all(void)
blast_dcache32(); blast_icache64();
}
+/*
+ * This is only used during initialization time. vmalloc() also calls
+ * this, but that will be changed pretty soon.
+ */
+static void
+andes_flush_cache_l2(void)
+{
+ switch (sc_lsize()) {
+ case 64:
+ blast_scache64();
+ break;
+ case 128:
+ blast_scache128();
+ break;
+ default:
+ printk("Unknown L2 line size\n");
+ while(1);
+ }
+}
+
static void
andes_flush_cache_mm(struct mm_struct *mm)
{
@@ -441,6 +462,7 @@ void __init ld_mmu_andes(void)
_copy_page = andes_copy_page;
_flush_cache_all = andes_flush_cache_all;
+ _flush_cache_l2 = andes_flush_cache_l2;
_flush_cache_mm = andes_flush_cache_mm;
_flush_cache_range = andes_flush_cache_range;
_flush_cache_page = andes_flush_cache_page;
diff --git a/arch/mips64/mm/loadmmu.c b/arch/mips64/mm/loadmmu.c
index 69f661c0b..b8d04273d 100644
--- a/arch/mips64/mm/loadmmu.c
+++ b/arch/mips64/mm/loadmmu.c
@@ -30,9 +30,13 @@ void (*_flush_cache_mm)(struct mm_struct *mm);
void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
unsigned long end);
void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
-void (*_flush_cache_sigtramp)(unsigned long addr);
void (*_flush_page_to_ram)(struct page * page);
+/* MIPS specific cache operations */
+void (*_flush_cache_sigtramp)(unsigned long addr);
+void (*_flush_cache_l2)(void);
+
+
/* DMA cache operations. */
void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
void (*_dma_cache_wback)(unsigned long start, unsigned long size);
diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c
index 2b3ca03a4..84078b824 100644
--- a/arch/mips64/mm/r4xx0.c
+++ b/arch/mips64/mm/r4xx0.c
@@ -2146,6 +2146,11 @@ static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
}
}
+static void
+r4k_flush_cache_l2(void)
+{
+}
+
#ifdef DEBUG_TLBUPDATE
static unsigned long ehi_debug[NTLB_ENTRIES];
static unsigned long el0_debug[NTLB_ENTRIES];
@@ -2538,6 +2543,7 @@ void __init ld_mmu_r4xx0(void)
_flush_tlb_mm = r4k_flush_tlb_mm;
_flush_tlb_range = r4k_flush_tlb_range;
_flush_tlb_page = r4k_flush_tlb_page;
+ _flush_cache_l2 = r4k_flush_cache_l2;
update_mmu_cache = r4k_update_mmu_cache;