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-rw-r--r--arch/ppc/kernel/align.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
index 5b7366adc..cfa2fe0aa 100644
--- a/arch/ppc/kernel/align.c
+++ b/arch/ppc/kernel/align.c
@@ -21,7 +21,7 @@ struct aligninfo {
unsigned char flags;
};
-#if defined(CONFIG_4xx)
+#if defined(CONFIG_4xx) || defined(CONFIG_POWER4)
#define OPCD(inst) (((inst) & 0xFC000000) >> 26)
#define RS(inst) (((inst) & 0x03E00000) >> 21)
#define RA(inst) (((inst) & 0x001F0000) >> 16)
@@ -184,7 +184,7 @@ int
fix_alignment(struct pt_regs *regs)
{
int instr, nb, flags;
-#if defined(CONFIG_4xx)
+#if defined(CONFIG_4xx) || defined(CONFIG_POWER4)
int opcode, f1, f2, f3;
#endif
int i, t;
@@ -197,9 +197,11 @@ fix_alignment(struct pt_regs *regs)
unsigned char v[8];
} data;
-#if defined(CONFIG_4xx)
+#if defined(CONFIG_4xx) || defined(CONFIG_POWER4)
/* The 4xx-family processors have no DSISR register,
* so we emulate it.
+ * The POWER4 has a DSISR register but doesn't set it on
+ * an alignment fault. -- paulus
*/
instr = *((unsigned int *)regs->nip);