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-rw-r--r--arch/mips/jazz/int-handler.S6
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/fpe.c4
-rw-r--r--arch/mips/kernel/gdb-stub.c6
-rw-r--r--arch/mips/kernel/pci.c4
-rw-r--r--arch/mips/kernel/r2300_fpu.S6
-rw-r--r--arch/mips/kernel/r2300_misc.S4
-rw-r--r--arch/mips/kernel/r4k_fpu.S6
-rw-r--r--arch/mips/kernel/r4k_switch.S6
-rw-r--r--arch/mips/kernel/r6000_fpu.S6
-rw-r--r--arch/mips/kernel/setup.c4
-rw-r--r--arch/mips/kernel/sysirix.c4
-rw-r--r--arch/mips/kernel/traps.c4
-rw-r--r--arch/mips/kernel/unaligned.c6
-rw-r--r--arch/mips/lib/watch.S2
-rw-r--r--arch/mips/mm/init.c4
16 files changed, 37 insertions, 37 deletions
diff --git a/arch/mips/jazz/int-handler.S b/arch/mips/jazz/int-handler.S
index f008dfdc6..d2f2f6cc7 100644
--- a/arch/mips/jazz/int-handler.S
+++ b/arch/mips/jazz/int-handler.S
@@ -1,4 +1,4 @@
-/* $Id: int-handler.S,v 1.12 1998/10/18 13:18:58 tsbogend Exp $
+/* $Id: int-handler.S,v 1.13 1999/02/25 21:56:30 tsbogend Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -101,7 +101,7 @@ ll_isa_irq: lw a0,JAZZ_EISA_IRQ_ACK
/*
* Hmm... This is not just a plain PC clone so the question is
* which devices on Jazz machines can generate an (E)ISA NMI?
- * (Writing to nonexistant memory?)
+ * (Writing to nonexistent memory?)
*/
ll_isa_nmi: li s1,~IE_IRQ3
PANIC("Unimplemented isa_nmi handler")
@@ -109,7 +109,7 @@ ll_isa_nmi: li s1,~IE_IRQ3
/*
* Timer IRQ - remapped to be more similar to an IBM compatible.
*
- * The timer interrupt is handled specially to insure that the jiffies
+ * The timer interrupt is handled specially to ensure that the jiffies
* variable is updated at all times. Specifically, the timer interrupt is
* just like the complete handlers except that it is invoked with interrupts
* disabled and should never re-enable them. If other interrupts were
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 9d296130d..66306b16b 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -23,7 +23,7 @@ M_OBJS += fpe.o
endif
#
-# SGI's have very different interrupt/timer hardware.
+# SGIs have very different interrupt/timer hardware.
#
ifndef CONFIG_SGI
ifndef CONFIG_DECSTATION
diff --git a/arch/mips/kernel/fpe.c b/arch/mips/kernel/fpe.c
index 8491c95d1..66703471c 100644
--- a/arch/mips/kernel/fpe.c
+++ b/arch/mips/kernel/fpe.c
@@ -6,7 +6,7 @@
*
* Copyright (C) 1997 Ralf Baechle
*
- * $Id: fpe.c,v 1.2 1997/12/01 17:57:26 ralf Exp $
+ * $Id: fpe.c,v 1.3 1998/04/05 11:23:50 ralf Exp $
*/
#include <linux/kernel.h>
#include <linux/module.h>
@@ -39,7 +39,7 @@ out:
/*
* For easier experimentation we never increment/decrement
- * the module useable counter.
+ * the module usable counter.
*/
int register_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31));
int unregister_fpe(void (*handler)(struct pt_regs *regs, unsigned int fcr31));
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index fe999bb31..db40422c0 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -12,7 +12,7 @@
*
* Copyright (C) 1995 Andreas Busse
*
- * $Id: gdb-stub.c,v 1.4 1997/09/01 21:00:01 marks Exp $
+ * $Id: gdb-stub.c,v 1.5 1997/09/16 14:59:54 marks Exp $
*/
/*
@@ -326,7 +326,7 @@ static struct hard_trap_info
{ 7, SIGBUS }, /* data bus error */
{ 9, SIGTRAP }, /* break */
{ 10, SIGILL }, /* reserved instruction */
-/* { 11, SIGILL }, */ /* cpu unusable */
+/* { 11, SIGILL }, */ /* CPU unusable */
{ 12, SIGFPE }, /* overflow */
{ 13, SIGTRAP }, /* trap */
{ 14, SIGSEGV }, /* virtual instruction cache coherency */
@@ -379,7 +379,7 @@ extern void fltr_set_mem_err(void)
}
/*
- * Convert the MIPS hardware trap type code to a unix signal number.
+ * Convert the MIPS hardware trap type code to a Unix signal number.
*/
static int computeSignal(int tt)
{
diff --git a/arch/mips/kernel/pci.c b/arch/mips/kernel/pci.c
index 992e893a2..7861789d6 100644
--- a/arch/mips/kernel/pci.c
+++ b/arch/mips/kernel/pci.c
@@ -1,4 +1,4 @@
-/* $Id: pci.c,v 1.6 1998/08/25 09:14:40 ralf Exp $
+/* $Id: pci.c,v 1.7 1999/01/03 17:50:51 ralf Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -36,7 +36,7 @@ int pcibios_present (void)
}
/*
- * The functions below are machine specific and must be reimplented for
+ * The functions below are machine specific and must be reimplimented for
* each PCI chipset configuration. We just run the hook to the machine
* specific implementation.
*/
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S
index de682be45..3b0336e6d 100644
--- a/arch/mips/kernel/r2300_fpu.S
+++ b/arch/mips/kernel/r2300_fpu.S
@@ -1,4 +1,4 @@
-/* $Id: $
+/* $Id: r2300_fpu.S,v 1.4 1999/04/11 17:13:55 harald Exp $
* r2300_fpu.S: Save/restore floating point context for signal handlers.
*
* This file is subject to the terms and conditions of the GNU General Public
@@ -72,11 +72,11 @@ LEAF(r2300_save_fp_context)
END(r2300_save_fp_context)
/*
- * Restore fpu state:
+ * Restore FPU state:
* - fp gp registers
* - cp1 status/control register
*
- * We base the decission which registers to restore from the signal stack
+ * We base the decision which registers to restore from the signal stack
* frame on the current content of c0_status, not on the content of the
* stack frame which might have been changed by the user.
*/
diff --git a/arch/mips/kernel/r2300_misc.S b/arch/mips/kernel/r2300_misc.S
index 935e783d7..31fed0b7d 100644
--- a/arch/mips/kernel/r2300_misc.S
+++ b/arch/mips/kernel/r2300_misc.S
@@ -1,9 +1,9 @@
-/* $Id: r2300_misc.S,v 1.2 1996/06/29 12:41:08 dm Exp $
+/* $Id: r2300_misc.S,v 1.2 1999/04/11 17:13:55 harald Exp $
* r2300_misc.S: Misc. exception handling code for R3000/R2000.
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
*
- * Multi-cpu abstraction reworking:
+ * Multi-CPU abstraction reworking:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
* Further modifications to make this work:
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index c37b90612..d07899bef 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -10,7 +10,7 @@
* Multi-arch abstraction and asm macros for easier reading:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r4k_fpu.S,v 1.3 1997/12/01 17:57:30 ralf Exp $
+ * $Id: r4k_fpu.S,v 1.4 1998/04/05 11:23:52 ralf Exp $
*/
#include <asm/asm.h>
#include <asm/fpregdef.h>
@@ -79,11 +79,11 @@ LEAF(r4k_save_fp_context)
END(r4k_save_fp_context)
/*
- * Restore fpu state:
+ * Restore FPU state:
* - fp gp registers
* - cp1 status/control register
*
- * We base the decission which registers to restore from the signal stack
+ * We base the decision which registers to restore from the signal stack
* frame on the current content of c0_status, not on the content of the
* stack frame which might have been changed by the user.
*/
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index a4cdfdd24..afc1591f5 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -1,4 +1,4 @@
-/* $Id: r4k_switch.S,v 1.4 1998/07/16 19:10:02 ralf Exp $
+/* $Id: r4k_switch.S,v 1.5 1999/05/01 10:08:18 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -110,8 +110,8 @@ LEAF(r4xx0_save_fp)
/*
* Load the FPU with signalling NANS. This bit pattern we're using has
- * the property that no matter wether considered as single or as double
- * precission represents signaling NANS.
+ * the property that no matter whether considered as single or as double
+ * precision represents signaling NANS.
*
* We initialize fcr31 to rounding to nearest, no exceptions.
*/
diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
index 523733420..424bc8138 100644
--- a/arch/mips/kernel/r6000_fpu.S
+++ b/arch/mips/kernel/r6000_fpu.S
@@ -10,7 +10,7 @@
* Multi-arch abstraction and asm macros for easier reading:
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r6000_fpu.S,v 1.3 1997/12/01 17:57:30 ralf Exp $
+ * $Id: r6000_fpu.S,v 1.4 1999/04/11 18:37:55 harald Exp $
*/
#include <asm/asm.h>
#include <asm/fpregdef.h>
@@ -51,11 +51,11 @@
nop
END(r6000_save_fp_context)
-/* Restore fpu state:
+/* Restore FPU state:
* - fp gp registers
* - cp1 status/control register
*
- * We base the decission which registers to restore from the signal stack
+ * We base the decision which registers to restore from the signal stack
* frame on the current content of c0_status, not on the content of the
* stack frame which might have been changed by the user.
*/
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 1d9b76b5c..9af079b7d 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -1,4 +1,4 @@
-/* $Id: setup.c,v 1.13 1999/03/13 12:33:26 tsbogend Exp $
+/* $Id: setup.c,v 1.14 1999/05/01 12:23:45 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -97,7 +97,7 @@ struct kbd_ops *kbd_ops;
/*
* Setup information
*
- * These are intialized so they are in the .data section
+ * These are initialized so they are in the .data section
*/
unsigned long mips_memory_upper = KSEG0; /* this is set by kernel_entry() */
unsigned long mips_cputype = CPU_UNKNOWN;
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index ba5aead85..b3336d864 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -1,4 +1,4 @@
-/* $Id: sysirix.c,v 1.16 1999/02/15 02:16:52 ralf Exp $
+/* $Id: sysirix.c,v 1.17 1999/05/01 21:54:19 ralf Exp $
*
* sysirix.c: IRIX system call emulation.
*
@@ -172,7 +172,7 @@ asmlinkage int irix_prctl(struct pt_regs *regs)
case PR_RESIDENT:
printk("irix_prctl[%s:%ld]: Wants PR_RESIDENT\n",
current->comm, current->pid);
- error = 0; /* Compatability indeed. */
+ error = 0; /* Compatibility indeed. */
break;
case PR_ATTACHADDR:
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 67b0a1d3e..1d2cd9647 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1,4 +1,4 @@
-/* $Id: traps.c,v 1.17 1998/10/31 13:18:43 ulfc Exp $
+/* $Id: traps.c,v 1.18 1999/04/12 19:13:21 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -324,7 +324,7 @@ void do_bp(struct pt_regs *regs)
/*
* (A short test says that IRIX 5.3 sends SIGTRAP for all break
* insns, even for break codes that indicate arithmetic failures.
- * Wiered ...)
+ * Weird ...)
*/
force_sig(SIGTRAP, current);
}
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index dd633877c..bdfc29ea1 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1998 by Ralf Baechle
*
- * $Id: unaligned.c,v 1.3 1998/05/04 09:12:51 ralf Exp $
+ * $Id: unaligned.c,v 1.4 1998/08/25 09:14:44 ralf Exp $
*
* This file contains exception handler for address error exception with the
* special capability to execute faulting instructions in software. The
@@ -17,7 +17,7 @@
* Putting data to unaligned addresses is a bad practice even on Intel where
* only the performance is affected. Much worse is that such code is non-
* portable. Due to several programs that die on MIPS due to alignment
- * problems I decieded to implement this handler anyway though I originally
+ * problems I decided to implement this handler anyway though I originally
* didn't intend to do this at all for user code.
*
* For now I enable fixing of address errors by default to make life easier.
@@ -140,7 +140,7 @@ emulate_load_store_insn(struct pt_regs *regs,
goto sigbus;
/*
- * The remaining opcodes are the ones that are really of interrest.
+ * The remaining opcodes are the ones that are really of interest.
*/
case lh_op:
check_axs(pc, addr, 2);
diff --git a/arch/mips/lib/watch.S b/arch/mips/lib/watch.S
index 096375257..351c734ff 100644
--- a/arch/mips/lib/watch.S
+++ b/arch/mips/lib/watch.S
@@ -1,6 +1,6 @@
/*
* Kernel debug stuff to use the Watch registers.
- * Usefull to find stack overflows, dangeling pointers etc.
+ * Useful to find stack overflows, dangling pointers etc.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 05401f096..544c3e186 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -1,4 +1,4 @@
-/* $Id: init.c,v 1.11 1999/02/15 02:16:54 ralf Exp $
+/* $Id: init.c,v 1.12 1999/02/25 21:06:44 tsbogend Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -309,7 +309,7 @@ __initfunc(void mem_init(unsigned long start_mem, unsigned long end_mem))
for (tmp = PAGE_OFFSET; tmp < end_mem; tmp += PAGE_SIZE) {
/*
* This is only for PC-style DMA. The onboard DMA
- * of Jazz and Tyne machines is completly different and
+ * of Jazz and Tyne machines is completely different and
* not handled via a flag in mem_map_t.
*/
if (tmp >= MAX_DMA_ADDRESS)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 22:45:44 +0000