diff options
Diffstat (limited to 'drivers/net/tlan.h')
| -rw-r--r-- | drivers/net/tlan.h | 264 |
1 files changed, 149 insertions, 115 deletions
diff --git a/drivers/net/tlan.h b/drivers/net/tlan.h index 94613d3a6..fa1f91bbe 100644 --- a/drivers/net/tlan.h +++ b/drivers/net/tlan.h @@ -5,9 +5,9 @@ * Linux ThunderLAN Driver * * tlan.h - * by James Banks, james.banks@caldera.com + * by James Banks * - * (C) 1997 Caldera, Inc. + * (C) 1997-1998 Caldera, Inc. * * This software may be used and distributed according to the terms * of the GNU Public License, incorporated herein by reference. @@ -33,23 +33,23 @@ * ****************************************************************/ -#define FALSE 0 -#define TRUE 1 +#define FALSE 0 +#define TRUE 1 #define TLAN_MIN_FRAME_SIZE 64 #define TLAN_MAX_FRAME_SIZE 1600 -#define TLAN_NUM_RX_LISTS 4 -#define TLAN_NUM_TX_LISTS 8 +#define TLAN_NUM_RX_LISTS 4 +#define TLAN_NUM_TX_LISTS 8 -#define TLAN_IGNORE 0 -#define TLAN_RECORD 1 +#define TLAN_IGNORE 0 +#define TLAN_RECORD 1 #define TLAN_DBG(lvl, format, args...) if (debug&lvl) printk( format, ##args ); -#define TLAN_DEBUG_GNRL 0x0001 -#define TLAN_DEBUG_TX 0x0002 -#define TLAN_DEBUG_RX 0x0004 -#define TLAN_DEBUG_LIST 0x0008 +#define TLAN_DEBUG_GNRL 0x0001 +#define TLAN_DEBUG_TX 0x0002 +#define TLAN_DEBUG_RX 0x0004 +#define TLAN_DEBUG_LIST 0x0008 @@ -59,23 +59,47 @@ * ****************************************************************/ - /* NOTE: These have been moved to pci.h, will use them - eventually */ -#define PCI_DEVICE_ID_NETELLIGENT_10 0xAE34 -#define PCI_DEVICE_ID_NETELLIGENT_10_100 0xAE32 -#define PCI_DEVICE_ID_NETFLEX_3P_INTEGRATED 0xAE35 -#define PCI_DEVICE_ID_NETFLEX_3P 0xF130 -#define PCI_DEVICE_ID_NETFLEX_3P_BNC 0xF150 -#define PCI_DEVICE_ID_NETELLIGENT_10_100_PROLIANT 0xAE43 -#define PCI_DEVICE_ID_NETELLIGENT_10_100_DUAL 0xAE40 -#define PCI_DEVICE_ID_DESKPRO_4000_5233MMX 0xB011 - - -typedef struct tlan_pci_id { +#define PCI_DEVICE_ID_NETELLIGENT_10 0xAE34 +#define PCI_DEVICE_ID_NETELLIGENT_10_100 0xAE32 +#define PCI_DEVICE_ID_NETFLEX_3P_INTEGRATED 0xAE35 +#define PCI_DEVICE_ID_NETFLEX_3P 0xF130 +#define PCI_DEVICE_ID_NETFLEX_3P_BNC 0xF150 +#define PCI_DEVICE_ID_NETELLIGENT_10_100_PROLIANT 0xAE43 +#define PCI_DEVICE_ID_NETELLIGENT_10_100_DUAL 0xAE40 +#define PCI_DEVICE_ID_DESKPRO_4000_5233MMX 0xB011 +#define PCI_DEVICE_ID_NETELLIGENT_10_T2 0xB012 +#define PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100 0xB030 +#ifndef PCI_DEVICE_ID_OLICOM_OC2183 +#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 +#endif +#ifndef PCI_DEVICE_ID_OLICOM_OC2325 +#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 +#endif +#ifndef PCI_DEVICE_ID_OLICOM_OC2326 +#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 +#endif + +typedef struct tlan_adapter_entry { u16 vendorId; u16 deviceId; - char *deviceName; -} TLanPciId; + char *deviceLabel; + u32 flags; + u16 addrOfs; +} TLanAdapterEntry; + +#define TLAN_ADAPTER_NONE 0x00000000 +#define TLAN_ADAPTER_UNMANAGED_PHY 0x00000001 +#define TLAN_ADAPTER_BIT_RATE_PHY 0x00000002 +#define TLAN_ADAPTER_USE_INTERN_10 0x00000004 +#define TLAN_ADAPTER_ACTIVITY_LED 0x00000008 + +#define TLAN_SPEED_DEFAULT 0 +#define TLAN_SPEED_10 10 +#define TLAN_SPEED_100 100 + +#define TLAN_DUPLEX_DEFAULT 0 +#define TLAN_DUPLEX_HALF 1 +#define TLAN_DUPLEX_FULL 2 @@ -121,25 +145,7 @@ typedef u8 TLanBuffer[TLAN_MAX_FRAME_SIZE]; ****************************************************************/ #define TLAN_PHY_MAX_ADDR 0x1F - -#define TLAN_PHY_ACTIVITY 0x00000001 -#define TLAN_PHY_AUTONEG 0x00000002 -#define TLAN_PHY_INTS 0x00000004 -#define TLAN_PHY_BIT_RATE 0x00000008 -#define TLAN_PHY_UNMANAGED 0x00000010 -#define TLAN_PHY_INTERNAL 0x00000020 - - -typedef int (TLanPhyFunc)( struct device * ); - - -typedef struct tlan_phy_id_entry_tag { - u16 idHi; - u16 idLo; - TLanPhyFunc *check; - TLanPhyFunc *service; - u32 flags; -} TLanPhyIdEntry; +#define TLAN_PHY_NONE 0x20 @@ -164,21 +170,22 @@ typedef struct tlan_private_tag { u32 txInProgress; u32 txTail; u32 txBusyCount; - u32 phyAddr; - u32 phyEntry; u32 phyOnline; - u32 phyFlags; - TLanPhyFunc *phyCheck; - TLanPhyFunc *phyService; u32 timerSetAt; u32 timerType; struct timer_list timer; struct net_device_stats stats; - u32 pciEntry; - u8 pciRevision; - u8 pciBus; - u8 pciDeviceFn; + TLanAdapterEntry *adapter; + u32 adapterRev; + u32 aui; + u32 debug; + u32 duplex; + u32 phy[2]; + u32 phyNum; + u32 sa_int; + u32 speed; u8 tlanRev; + u8 tlanFullDuplex; char devName[8]; } TLanPrivateInfo; @@ -191,10 +198,15 @@ typedef struct tlan_private_tag { ****************************************************************/ #define TLAN_TIMER_LINK 1 -#define TLAN_TIMER_ACT 2 +#define TLAN_TIMER_ACTIVITY 2 +#define TLAN_TIMER_PHY_PDOWN 3 +#define TLAN_TIMER_PHY_PUP 4 +#define TLAN_TIMER_PHY_RESET 5 +#define TLAN_TIMER_PHY_START_LINK 6 +#define TLAN_TIMER_PHY_FINISH_AN 7 +#define TLAN_TIMER_FINISH_RESET 8 -#define TLAN_TIMER_LINK_DELAY 230 -#define TLAN_TIMER_ACT_DELAY 10 +#define TLAN_TIMER_ACT_DELAY 10 @@ -215,29 +227,29 @@ typedef struct tlan_private_tag { * ****************************************************************/ -#define TLAN_HOST_CMD 0x00 +#define TLAN_HOST_CMD 0x00 #define TLAN_HC_GO 0x80000000 -#define TLAN_HC_STOP 0x40000000 +#define TLAN_HC_STOP 0x40000000 #define TLAN_HC_ACK 0x20000000 -#define TLAN_HC_CS_MASK 0x1FE00000 +#define TLAN_HC_CS_MASK 0x1FE00000 #define TLAN_HC_EOC 0x00100000 #define TLAN_HC_RT 0x00080000 #define TLAN_HC_NES 0x00040000 -#define TLAN_HC_AD_RST 0x00008000 -#define TLAN_HC_LD_TMR 0x00004000 -#define TLAN_HC_LD_THR 0x00002000 -#define TLAN_HC_REQ_INT 0x00001000 -#define TLAN_HC_INT_OFF 0x00000800 -#define TLAN_HC_INT_ON 0x00000400 -#define TLAN_HC_AC_MASK 0x000000FF -#define TLAN_CH_PARM 0x04 -#define TLAN_DIO_ADR 0x08 -#define TLAN_DA_ADR_INC 0x8000 -#define TLAN_DA_RAM_ADR 0x4000 -#define TLAN_HOST_INT 0x0A -#define TLAN_HI_IV_MASK 0x1FE0 -#define TLAN_HI_IT_MASK 0x001C -#define TLAN_DIO_DATA 0x0C +#define TLAN_HC_AD_RST 0x00008000 +#define TLAN_HC_LD_TMR 0x00004000 +#define TLAN_HC_LD_THR 0x00002000 +#define TLAN_HC_REQ_INT 0x00001000 +#define TLAN_HC_INT_OFF 0x00000800 +#define TLAN_HC_INT_ON 0x00000400 +#define TLAN_HC_AC_MASK 0x000000FF +#define TLAN_CH_PARM 0x04 +#define TLAN_DIO_ADR 0x08 +#define TLAN_DA_ADR_INC 0x8000 +#define TLAN_DA_RAM_ADR 0x4000 +#define TLAN_HOST_INT 0x0A +#define TLAN_HI_IV_MASK 0x1FE0 +#define TLAN_HI_IT_MASK 0x001C +#define TLAN_DIO_DATA 0x0C /* ThunderLAN Internal Register DIO Offsets */ @@ -264,7 +276,7 @@ typedef struct tlan_private_tag { #define TLAN_NET_STS_MIRQ 0x80 #define TLAN_NET_STS_HBEAT 0x40 #define TLAN_NET_STS_TXSTOP 0x20 -#define TLAN_NET_STS_RXSTOP 0x10 +#define TLAN_NET_STS_RXSTOP 0x10 #define TLAN_NET_STS_RSRVD 0x0F #define TLAN_NET_MASK 0x03 #define TLAN_NET_MASK_MASK7 0x80 @@ -283,36 +295,36 @@ typedef struct tlan_private_tag { #define TLAN_NET_CFG_MTEST 0x0100 #define TLAN_NET_CFG_PHY_EN 0x0080 #define TLAN_NET_CFG_MSMASK 0x007F -#define TLAN_MAN_TEST 0x06 -#define TLAN_DEF_VENDOR_ID 0x08 -#define TLAN_DEF_DEVICE_ID 0x0A -#define TLAN_DEF_REVISION 0x0C -#define TLAN_DEF_SUBCLASS 0x0D -#define TLAN_DEF_MIN_LAT 0x0E -#define TLAN_DEF_MAX_LAT 0x0F +#define TLAN_MAN_TEST 0x06 +#define TLAN_DEF_VENDOR_ID 0x08 +#define TLAN_DEF_DEVICE_ID 0x0A +#define TLAN_DEF_REVISION 0x0C +#define TLAN_DEF_SUBCLASS 0x0D +#define TLAN_DEF_MIN_LAT 0x0E +#define TLAN_DEF_MAX_LAT 0x0F #define TLAN_AREG_0 0x10 #define TLAN_AREG_1 0x16 #define TLAN_AREG_2 0x1C #define TLAN_AREG_3 0x22 #define TLAN_HASH_1 0x28 #define TLAN_HASH_2 0x2C -#define TLAN_GOOD_TX_FRMS 0x30 -#define TLAN_TX_UNDERUNS 0x33 -#define TLAN_GOOD_RX_FRMS 0x34 -#define TLAN_RX_OVERRUNS 0x37 -#define TLAN_DEFERRED_TX 0x38 -#define TLAN_CRC_ERRORS 0x3A -#define TLAN_CODE_ERRORS 0x3B -#define TLAN_MULTICOL_FRMS 0x3C -#define TLAN_SINGLECOL_FRMS 0x3E -#define TLAN_EXCESSCOL_FRMS 0x40 -#define TLAN_LATE_COLS 0x41 -#define TLAN_CARRIER_LOSS 0x42 -#define TLAN_ACOMMIT 0x43 -#define TLAN_LED_REG 0x44 -#define TLAN_LED_ACT 0x10 -#define TLAN_LED_LINK 0x01 -#define TLAN_BSIZE_REG 0x45 +#define TLAN_GOOD_TX_FRMS 0x30 +#define TLAN_TX_UNDERUNS 0x33 +#define TLAN_GOOD_RX_FRMS 0x34 +#define TLAN_RX_OVERRUNS 0x37 +#define TLAN_DEFERRED_TX 0x38 +#define TLAN_CRC_ERRORS 0x3A +#define TLAN_CODE_ERRORS 0x3B +#define TLAN_MULTICOL_FRMS 0x3C +#define TLAN_SINGLECOL_FRMS 0x3E +#define TLAN_EXCESSCOL_FRMS 0x40 +#define TLAN_LATE_COLS 0x41 +#define TLAN_CARRIER_LOSS 0x42 +#define TLAN_ACOMMIT 0x43 +#define TLAN_LED_REG 0x44 +#define TLAN_LED_ACT 0x10 +#define TLAN_LED_LINK 0x01 +#define TLAN_BSIZE_REG 0x45 #define TLAN_MAX_RX 0x46 #define TLAN_INT_DIS 0x48 #define TLAN_ID_TX_EOC 0x04 @@ -327,11 +339,11 @@ typedef struct tlan_private_tag { #define TLAN_INT_NONE 0x0000 #define TLAN_INT_TX_EOF 0x0001 -#define TLAN_INT_STAT_OVERFLOW 0x0002 +#define TLAN_INT_STAT_OVERFLOW 0x0002 #define TLAN_INT_RX_EOF 0x0003 #define TLAN_INT_DUMMY 0x0004 #define TLAN_INT_TX_EOC 0x0005 -#define TLAN_INT_STATUS_CHECK 0x0006 +#define TLAN_INT_STATUS_CHECK 0x0006 #define TLAN_INT_RX_EOC 0x0007 @@ -340,7 +352,7 @@ typedef struct tlan_private_tag { /* Generic MII/PHY Registers */ -#define MII_GEN_CTL 0x00 +#define MII_GEN_CTL 0x00 #define MII_GC_RESET 0x8000 #define MII_GC_LOOPBK 0x4000 #define MII_GC_SPEEDSEL 0x2000 @@ -351,7 +363,7 @@ typedef struct tlan_private_tag { #define MII_GC_DUPLEX 0x0100 #define MII_GC_COLTEST 0x0080 #define MII_GC_RESERVED 0x007F -#define MII_GEN_STS 0x01 +#define MII_GEN_STS 0x01 #define MII_GS_100BT4 0x8000 #define MII_GS_100BTXFD 0x4000 #define MII_GS_100BTXHD 0x2000 @@ -359,19 +371,19 @@ typedef struct tlan_private_tag { #define MII_GS_10BTHD 0x0800 #define MII_GS_RESERVED 0x07C0 #define MII_GS_AUTOCMPLT 0x0020 -#define MII_GS_RFLT 0x0010 +#define MII_GS_RFLT 0x0010 #define MII_GS_AUTONEG 0x0008 -#define MII_GS_LINK 0x0004 +#define MII_GS_LINK 0x0004 #define MII_GS_JABBER 0x0002 #define MII_GS_EXTCAP 0x0001 #define MII_GEN_ID_HI 0x02 #define MII_GEN_ID_LO 0x03 -#define MII_GIL_OUI 0xFC00 +#define MII_GIL_OUI 0xFC00 #define MII_GIL_MODEL 0x03F0 #define MII_GIL_REVISION 0x000F -#define MII_AN_ADV 0x04 -#define MII_AN_LPA 0x05 -#define MII_AN_EXP 0x06 +#define MII_AN_ADV 0x04 +#define MII_AN_LPA 0x05 +#define MII_AN_EXP 0x06 /* ThunderLAN Specific MII/PHY Registers */ @@ -394,6 +406,7 @@ typedef struct tlan_private_tag { #define TLAN_TS_RESERVED 0x0FFF +#define CIRC_INC( a, b ) if ( ++a >= b ) a = 0 /* Routines to access internal registers. */ @@ -456,7 +469,7 @@ inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data) - +#if 0 inline void TLan_ClearBit(u8 bit, u16 port) { outb_p(inb_p(port) & ~bit, port); @@ -477,7 +490,30 @@ inline void TLan_SetBit(u8 bit, u16 port) { outb_p(inb_p(port) | bit, port); } +#endif + +#define TLan_ClearBit( bit, port ) outb_p(inb_p(port) & ~bit, port) +#define TLan_GetBit( bit, port ) ((int) (inb_p(port) & bit)) +#define TLan_SetBit( bit, port ) outb_p(inb_p(port) | bit, port) + +#ifdef I_LIKE_A_FAST_HASH_FUNCTION +/* given 6 bytes, view them as 8 6-bit numbers and return the XOR of those */ +/* the code below is about seven times as fast as the original code */ +inline u32 TLan_HashFunc( u8 *a ) +{ + u8 hash; + + hash = (a[0]^a[3]); /* & 077 */ + hash ^= ((a[0]^a[3])>>6); /* & 003 */ + hash ^= ((a[1]^a[4])<<2); /* & 074 */ + hash ^= ((a[1]^a[4])>>4); /* & 017 */ + hash ^= ((a[2]^a[5])<<4); /* & 060 */ + hash ^= ((a[2]^a[5])>>2); /* & 077 */ + + return (hash & 077); +} +#else /* original code */ inline u32 xor( u32 a, u32 b ) { @@ -501,7 +537,5 @@ inline u32 TLan_HashFunc( u8 *a ) } - - - +#endif /* I_LIKE_A_FAST_HASH_FUNCTION */ #endif |