diff options
Diffstat (limited to 'include/asm-arm')
24 files changed, 231 insertions, 134 deletions
diff --git a/include/asm-arm/arch-arc/ide.h b/include/asm-arm/arch-arc/ide.h index 031225380..5729b956d 100644 --- a/include/asm-arm/arch-arc/ide.h +++ b/include/asm-arm/arch-arc/ide.h @@ -19,7 +19,8 @@ * Set up a hw structure for a specified data port, control port and IRQ. * This should follow whatever the default interface uses. */ -static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq) +static __inline__ void +ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq) { ide_ioreg_t reg = (ide_ioreg_t) data_port; int i; diff --git a/include/asm-arm/arch-ebsa285/ide.h b/include/asm-arm/arch-ebsa285/ide.h index d86a6f98a..1a09f1827 100644 --- a/include/asm-arm/arch-ebsa285/ide.h +++ b/include/asm-arm/arch-ebsa285/ide.h @@ -12,7 +12,8 @@ * Set up a hw structure for a specified data port, control port and IRQ. * This should follow whatever the default interface uses. */ -static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq) +static __inline__ void +ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int irq) { ide_ioreg_t reg = (ide_ioreg_t) data_port; int i; @@ -22,7 +23,7 @@ static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctr reg += 1; } hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port; - hw->irq = *irq; + hw->irq = irq; } /* diff --git a/include/asm-arm/arch-ebsa285/irq.h b/include/asm-arm/arch-ebsa285/irq.h index ca1a55cdb..d8f0ab21d 100644 --- a/include/asm-arm/arch-ebsa285/irq.h +++ b/include/asm-arm/arch-ebsa285/irq.h @@ -10,7 +10,6 @@ * 26-Jan-1999 PJB Don't use IACK on CATS * 16-Mar-1999 RMK Added autodetect of ISA PICs */ -#include <linux/config.h> #include <asm/hardware.h> #include <asm/dec21285.h> #include <asm/irq.h> diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index a03cea639..745750e3b 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -15,8 +15,6 @@ #ifndef __ASM_ARCH_MMU_H #define __ASM_ARCH_MMU_H -#include <linux/config.h> - #if defined(CONFIG_HOST_FOOTBRIDGE) /* diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h index a8f94c198..4f3850b44 100644 --- a/include/asm-arm/arch-ebsa285/system.h +++ b/include/asm-arm/arch-ebsa285/system.h @@ -20,16 +20,7 @@ extern __inline__ void arch_reset(char mode) mcr p15, 0, ip, c7, c7 @ flush caches mov pc, lr" : : : "cc"); } else { - if (machine_is_ebsa285() || machine_is_co285()) { - /* To reboot, we set up the 21285 watchdog and - * enable it. We then wait for it to timeout. - */ - *CSR_TIMER4_LOAD = 0x8000; - *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | - TIMER_CNTL_AUTORELOAD | - TIMER_CNTL_DIV16; - *CSR_SA110_CNTL |= 1 << 13; - } else if (machine_is_netwinder()) { + if (machine_is_netwinder()) { /* open up the SuperIO chip */ outb(0x87, 0x370); @@ -48,6 +39,15 @@ extern __inline__ void arch_reset(char mode) /* set a RED LED and toggle WD_TIMER for rebooting */ outb(0xc4, 0x338); + } else { + /* To reboot, we set up the 21285 watchdog and + * enable it. We then wait for it to timeout. + */ + *CSR_TIMER4_LOAD = 0x8000; + *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | + TIMER_CNTL_AUTORELOAD | + TIMER_CNTL_DIV16; + *CSR_SA110_CNTL |= 1 << 13; } } } diff --git a/include/asm-arm/arch-ebsa285/time.h b/include/asm-arm/arch-ebsa285/time.h index ed70ecf25..7c5cd89c4 100644 --- a/include/asm-arm/arch-ebsa285/time.h +++ b/include/asm-arm/arch-ebsa285/time.h @@ -333,7 +333,7 @@ extern __inline__ void setup_timer(void) set_rtc_mmss = set_dummy_time; } - if (machine_is_ebsa285()) { + if (machine_is_ebsa285() || machine_is_co285()) { gettimeoffset = timer1_gettimeoffset; *CSR_TIMER1_CLR = 0; diff --git a/include/asm-arm/arch-rpc/ide.h b/include/asm-arm/arch-rpc/ide.h index 9826f15f5..ccbc7cf76 100644 --- a/include/asm-arm/arch-rpc/ide.h +++ b/include/asm-arm/arch-rpc/ide.h @@ -12,30 +12,31 @@ * Set up a hw structure for a specified data port, control port and IRQ. * This should follow whatever the default interface uses. */ -static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq) +static __inline__ void +ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int irq) { ide_ioreg_t reg = (ide_ioreg_t) data_port; int i; + memset(hw, 0, sizeof(*hw)); + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { hw->io_ports[i] = reg; reg += 1; } hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port; - hw->irq = *irq; + hw->irq = irq; } /* * This registers the standard ports for this architecture with the IDE * driver. */ -static __inline__ void ide_init_default_hwifs(void) +static __inline__ void +ide_init_default_hwifs(void) { hw_regs_t hw; - memset(hw, 0, sizeof(*hw)); - - ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, NULL); - hw.irq = IRQ_HARDDISK; + ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, IRQ_HARDDISK); ide_register_hw(&hw, NULL); } diff --git a/include/asm-arm/current.h b/include/asm-arm/current.h index 9f08dae30..01e20e285 100644 --- a/include/asm-arm/current.h +++ b/include/asm-arm/current.h @@ -4,17 +4,19 @@ static inline unsigned long get_sp(void) { unsigned long sp; - __asm__ ("mov %0,sp" : "=r" (sp)); + __asm__ ("mov %0,sp" : "=r" (sp)); return sp; } +//static inline struct task_struct *get_current(void) __attribute__ (( __const__ )); + static inline struct task_struct *get_current(void) { struct task_struct *ts; - __asm__ __volatile__(" - bic %0, sp, #0x1f00 - bic %0, %0, #0x00ff - " : "=r" (ts)); + __asm__ __volatile__ ( + "bic %0, sp, #0x1f00 @ get_current + bic %0, %0, #0x00ff" + : "=r" (ts)); return ts; } diff --git a/include/asm-arm/dma.h b/include/asm-arm/dma.h index 46d7cab05..bc7d03ddd 100644 --- a/include/asm-arm/dma.h +++ b/include/asm-arm/dma.h @@ -119,6 +119,10 @@ extern void set_dma_count(dmach_t channel, unsigned long count); */ extern void set_dma_mode(dmach_t channel, dmamode_t mode); +/* Set the transfer speed for this channel + */ +extern void set_dma_speed(dmach_t channel, int cycle_ns); + /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is * still in progress will return unpredictable results. diff --git a/include/asm-arm/ide.h b/include/asm-arm/ide.h index 6bd9d3c02..5b898dfee 100644 --- a/include/asm-arm/ide.h +++ b/include/asm-arm/ide.h @@ -46,6 +46,13 @@ typedef union { #define ide_release_lock(lock) do {} while (0) #define ide_get_lock(lock, hdlr, data) do {} while (0) +/* + * We always use the new IDE port registering, + * so these are fixed here. + */ +#define ide_default_io_base(i) ((ide_ioreg_t)0) +#define ide_default_irq(b) (0) + #endif /* __KERNEL__ */ #endif /* __ASMARM_IDE_H */ diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index cfa021bcd..35db8e667 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -189,21 +189,10 @@ __IO(l,"",long) #define inl_p(port) __inl_p((port)) #endif -/* Nothing to do */ - -#ifndef dma_cache_inv -#define dma_cache_inv(_start,_size) do { } while (0) -#endif -#ifndef dma_cache_wback -#define dma_cache_wback(_start,_size) do { } while (0) -#ifndef ARCH_READWRITE -#ifndef dma_cache_wback_inv -#define dma_cache_wback_inv(_start,_size) do { } while (0) #endif -#endif /* __KERNEL__ */ +#ifndef ARCH_READWRITE -#endif /* __ASM_ARM_IO_H */ /* for panic */ #include <linux/kernel.h> diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 9bdd7e00e..ce5930243 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -24,8 +24,5 @@ extern void disable_irq(unsigned int); extern void enable_irq(unsigned int); -#define __STR(x) #x -#define STR(x) __STR(x) - #endif diff --git a/include/asm-arm/proc-armo/ptrace.h b/include/asm-arm/proc-armo/ptrace.h index f53aa229d..513501b7d 100644 --- a/include/asm-arm/proc-armo/ptrace.h +++ b/include/asm-arm/proc-armo/ptrace.h @@ -44,6 +44,8 @@ struct pt_regs { #define CC_Z_BIT (1 << 30) #define CC_N_BIT (1 << 31) +#ifdef __KERNEL__ + #define processor_mode(regs) \ ((regs)->ARM_pc & MODE_MASK) @@ -70,11 +72,19 @@ struct pt_regs { */ static inline int valid_user_regs(struct pt_regs *regs) { - if (!user_mode(regs) || regs->ARM_pc & (F_BIT | I_BIT)) + if (user_mode(regs) && + (regs->ARM_pc & (F_BIT | I_BIT)) == 0) return 1; + /* + * force it to be something sensible + */ + regs->ARM_pc &= ~(MODE_MASK | F_BIT | I_BIT); + return 0; } +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-arm/proc-armo/semaphore.h b/include/asm-arm/proc-armo/semaphore.h index 9cd99cf50..19fa29bf9 100644 --- a/include/asm-arm/proc-armo/semaphore.h +++ b/include/asm-arm/proc-armo/semaphore.h @@ -14,13 +14,13 @@ extern inline void down(struct semaphore * sem) @ atomic down operation mov r0, pc orr lr, r0, #0x08000000 - and r0, r0, #0x0c000003 teqp lr, #0 ldr lr, [%0] + and r0, r0, #0x0c000003 subs lr, lr, #1 str lr, [%0] - mov lr, pc, lsr #28 - teqp r0, lr, lsl #28 + orrmi r0, r0, #0x80000000 @ set N + teqp r0, #0 movmi r0, %0 blmi " SYMBOL_NAME_STR(__down_failed) : @@ -39,14 +39,13 @@ extern inline int down_interruptible (struct semaphore * sem) @ atomic down operation mov r0, pc orr lr, r0, #0x08000000 - and r0, r0, #0x0c000003 teqp lr, #0 ldr lr, [%1] + and r0, r0, #0x0c000003 subs lr, lr, #1 str lr, [%1] - mov lr, pc, lsr #28 orrmi r0, r0, #0x80000000 @ set N - teqp r0, lr, lsl #28 + teqp r0, #0 movmi r0, %1 movpl r0, #0 blmi " SYMBOL_NAME_STR(__down_interruptible_failed) " @@ -64,14 +63,13 @@ extern inline int down_trylock(struct semaphore * sem) @ atomic down operation mov r0, pc orr lr, r0, #0x08000000 - and r0, r0, #0x0c000003 teqp lr, #0 ldr lr, [%1] + and r0, r0, #0x0c000003 subs lr, lr, #1 str lr, [%1] - mov lr, pc, lsr #28 orrmi r0, r0, #0x80000000 @ set N - teqp r0, lr, lsl #28 + teqp r0, #0 movmi r0, %1 movpl r0, #0 blmi " SYMBOL_NAME_STR(__down_trylock_failed) " @@ -94,14 +92,13 @@ extern inline void up(struct semaphore * sem) @ atomic up operation mov r0, pc orr lr, r0, #0x08000000 - and r0, r0, #0x0c000003 teqp lr, #0 ldr lr, [%0] + and r0, r0, #0x0c000003 adds lr, lr, #1 str lr, [%0] - mov lr, pc, lsr #28 - orrls r0, r0, #0x80000000 @ set N - teqp r0, lr, lsl #28 + orrle r0, r0, #0x80000000 @ set N + teqp r0, #0 movmi r0, %0 blmi " SYMBOL_NAME_STR(__up_wakeup) : diff --git a/include/asm-arm/proc-armo/system.h b/include/asm-arm/proc-armo/system.h index 471daf654..733a6cdff 100644 --- a/include/asm-arm/proc-armo/system.h +++ b/include/asm-arm/proc-armo/system.h @@ -110,6 +110,12 @@ extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int : "memory"); \ } while (0) +/* For spinlocks etc */ +#define local_irq_save(x) __save_flags_cli(x) +#define local_irq_restore(x) __restore_flags(x) +#define local_irq_disable() __cli() +#define local_irq_enable() __sti() + #ifdef __SMP__ #error SMP not supported #else diff --git a/include/asm-arm/proc-armv/ptrace.h b/include/asm-arm/proc-armv/ptrace.h index b24305bd4..01f0a8ac8 100644 --- a/include/asm-arm/proc-armv/ptrace.h +++ b/include/asm-arm/proc-armv/ptrace.h @@ -52,6 +52,8 @@ struct pt_regs { #define CC_Z_BIT (1 << 30) #define CC_N_BIT (1 << 31) +#ifdef __KERNEL__ + #if 0 /* GCC/egcs should be able to optimise this, IMHO */ #define user_mode(regs) \ ((((regs)->ARM_cpsr & MODE_MASK) == USR_MODE) || \ @@ -81,8 +83,8 @@ struct pt_regs { */ static inline int valid_user_regs(struct pt_regs *regs) { - if ((regs->ARM_cpsr & 0xf) == 0 || - (regs->ARM_cpsr & (F_BIT|I_BIT))) + if ((regs->ARM_cpsr & 0xf) == 0 && + (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0) return 1; /* @@ -93,5 +95,7 @@ static inline int valid_user_regs(struct pt_regs *regs) return 0; } +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-arm/proc-armv/semaphore.h b/include/asm-arm/proc-armv/semaphore.h index 52098bc5c..45ceaa3f1 100644 --- a/include/asm-arm/proc-armv/semaphore.h +++ b/include/asm-arm/proc-armv/semaphore.h @@ -16,12 +16,12 @@ extern inline void down(struct semaphore * sem) @ atomic down operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N subs %1, %1, #1 - orrmi %0, %0, #0x80000000 @ set N str %1, [%2] + orrmi %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 blmi " SYMBOL_NAME_STR(__down_failed) @@ -42,12 +42,12 @@ extern inline int down_interruptible (struct semaphore * sem) @ atomic down interruptible operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N subs %1, %1, #1 - orrmi %0, %0, #0x80000000 @ set N str %1, [%2] + orrmi %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 movpl r0, #0 @@ -68,12 +68,12 @@ extern inline int down_trylock(struct semaphore *sem) @ atomic down try lock operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N subs %1, %1, #1 - orrmi %0, %0, #0x80000000 @ set N str %1, [%2] + orrmi %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 movpl r0, #0 @@ -100,12 +100,12 @@ extern inline void up(struct semaphore * sem) @ atomic up operation mrs %0, cpsr orr %1, %0, #128 @ disable IRQs - bic %0, %0, #0x80000000 @ clear N msr cpsr, %1 ldr %1, [%2] + bic %0, %0, #0x80000000 @ clear N adds %1, %1, #1 - orrls %0, %0, #0x80000000 @ set N str %1, [%2] + orrle %0, %0, #0x80000000 @ set N msr cpsr, %0 movmi r0, %2 blmi " SYMBOL_NAME_STR(__up_wakeup) diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h index 9de0fccc5..2aa59a26e 100644 --- a/include/asm-arm/proc-armv/system.h +++ b/include/asm-arm/proc-armv/system.h @@ -121,6 +121,12 @@ extern unsigned long cr_alignment; /* defined in entry-armv.S */ : "memory"); \ } while (0) +/* For spinlocks etc */ +#define local_irq_save(x) __save_flags_cli(x) +#define local_irq_restore(x) __restore_flags(x) +#define local_irq_disable() __cli() +#define local_irq_enable() __sti() + #ifdef __SMP__ #error SMP not supported #else diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h index f308d67b1..97141aa25 100644 --- a/include/asm-arm/processor.h +++ b/include/asm-arm/processor.h @@ -36,6 +36,7 @@ typedef unsigned long mm_segment_t; /* domain register */ #define NR_DEBUGS 5 +#include <asm/proc/ptrace.h> #include <asm/arch/processor.h> #include <asm/proc/processor.h> @@ -86,6 +87,7 @@ extern __inline__ void init_thread_css(struct context_save_struct *save) } /* Forward declaration, a strange C thing */ +struct task_struct; struct mm_struct; /* Free all resources held by a thread. */ diff --git a/include/asm-arm/semaphore.h b/include/asm-arm/semaphore.h index 05456d7de..111e24f96 100644 --- a/include/asm-arm/semaphore.h +++ b/include/asm-arm/semaphore.h @@ -6,6 +6,7 @@ #include <linux/linkage.h> #include <asm/atomic.h> +#include <linux/wait.h> struct semaphore { atomic_t count; @@ -13,8 +14,35 @@ struct semaphore { wait_queue_head_t wait; }; -#define MUTEX ((struct semaphore) { ATOMIC_INIT(1), 0, NULL }) -#define MUTEX_LOCKED ((struct semaphore) { ATOMIC_INIT(0), 0, NULL }) +#define __SEMAPHORE_INIT(name,count) \ + { ATOMIC_INIT(count), 0, \ + __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) } + +#define __MUTEX_INITIALIZER(name) \ + __SEMAPHORE_INIT(name,1) + +#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ + struct semaphore name = __SEMAPHORE_INIT(name,count) + +#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) +#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) + +#define sema_init(sem, val) \ +do { \ + atomic_set(&((sem)->count), (val)); \ + (sem)->waking = 0; \ + init_waitqueue_head(&(sem)->wait); \ +} while (0) + +static inline void init_MUTEX(struct semaphore *sem) +{ + sema_init(sem, 1); +} + +static inline void init_MUTEX_LOCKED(struct semaphore *sem) +{ + sema_init(sem, 0); +} asmlinkage void __down_failed (void /* special register calling convention */); asmlinkage int __down_interruptible_failed (void /* special register calling convention */); @@ -26,7 +54,7 @@ extern int __down_interruptible(struct semaphore * sem); extern int __down_trylock(struct semaphore * sem); extern void __up(struct semaphore * sem); -#define sema_init(sem, val) atomic_set(&((sem)->count), (val)) +extern spinlock_t semaphore_wake_lock; #include <asm/proc/semaphore.h> diff --git a/include/asm-arm/softirq.h b/include/asm-arm/softirq.h index 6bad79dd4..28ac2eb2a 100644 --- a/include/asm-arm/softirq.h +++ b/include/asm-arm/softirq.h @@ -5,10 +5,18 @@ #include <asm/hardirq.h> extern unsigned int local_bh_count[NR_CPUS]; -#define in_bh() (local_bh_count[smp_processor_id()] != 0) + +#define cpu_bh_disable(cpu) do { local_bh_count[(cpu)]++; barrier(); } while (0) +#define cpu_bh_enable(cpu) do { barrier(); local_bh_count[(cpu)]--; } while (0) + +#define cpu_bh_trylock(cpu) (local_bh_count[(cpu)] ? 0 : (local_bh_count[(cpu)] = 1)) +#define cpu_bh_endlock(cpu) (local_bh_count[(cpu)] = 0) + +#define local_bh_disable() cpu_bh_disable(smp_processor_id()) +#define local_bh_enable() cpu_bh_enable(smp_processor_id()) #define get_active_bhs() (bh_mask & bh_active) -#define clear_active_bhs(x) atomic_clear_mask((int)(x),&bh_active) +#define clear_active_bhs(x) atomic_clear_mask((x),&bh_active) extern inline void init_bh(int nr, void (*routine)(void)) { @@ -19,8 +27,9 @@ extern inline void init_bh(int nr, void (*routine)(void)) extern inline void remove_bh(int nr) { - bh_base[nr] = NULL; bh_mask &= ~(1 << nr); + mb(); + bh_base[nr] = NULL; } extern inline void mark_bh(int nr) @@ -34,20 +43,20 @@ extern inline void mark_bh(int nr) extern inline void start_bh_atomic(void) { - local_bh_count[smp_processor_id()]++; + local_bh_disable(); barrier(); } extern inline void end_bh_atomic(void) { barrier(); - local_bh_count[smp_processor_id()]--; + local_bh_enable(); } /* These are for the irq's testing the lock */ -#define softirq_trylock(cpu) (in_bh() ? 0 : (local_bh_count[smp_processor_id()]=1)) -#define softirq_endlock(cpu) (local_bh_count[smp_processor_id()] = 0) -#define synchronize_bh() do { } while (0) +#define softirq_trylock(cpu) (cpu_bh_trylock(cpu)) +#define softirq_endlock(cpu) (cpu_bh_endlock(cpu)) +#define synchronize_bh() barrier() #endif /* SMP */ diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h index 33e1fe183..74022ebae 100644 --- a/include/asm-arm/spinlock.h +++ b/include/asm-arm/spinlock.h @@ -1,39 +1,96 @@ #ifndef __ASM_SPINLOCK_H #define __ASM_SPINLOCK_H -#ifndef __SMP__ - /* * To be safe, we assume the only compiler that can cope with * empty initialisers is EGCS. */ #if (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 90)) -#define EMPTY_INIT_OK +#define EMPTY_STRUCT struct { } +#define EMPTY_STRUCT_INIT(t) (t) { } +#else +#define EMPTY_STRUCT unsigned char +#define EMPTY_STRUCT_INIT(t) (t) 0 #endif /* + * These are the generic versions of the spinlocks + * and read-write locks.. We should actually do a + * <linux/spinlock.h> with all of this. Oh, well. + */ +#define spin_lock_irqsave(lock, flags) do { local_irq_save(flags); spin_lock(lock); } while (0) +#define spin_lock_irq(lock) do { local_irq_disable(); spin_lock(lock); } while (0) +#define spin_lock_bh(lock) do { local_bh_disable(); spin_lock(lock); } while (0) + +#define read_lock_irqsave(lock, flags) do { local_irq_save(flags); read_lock(lock); } while (0) +#define read_lock_irq(lock) do { local_irq_disable(); read_lock(lock); } while (0) +#define read_lock_bh(lock) do { local_bh_disable(); read_lock(lock); } while (0) + +#define write_lock_irqsave(lock, flags) do { local_irq_save(flags); write_lock(lock); } while (0) +#define write_lock_irq(lock) do { local_irq_disable(); write_lock(lock); } while (0) +#define write_lock_bh(lock) do { local_bh_disable(); write_lock(lock); } while (0) + +#define spin_unlock_irqrestore(lock, flags) do { spin_unlock(lock); local_irq_restore(flags); } while (0) +#define spin_unlock_irq(lock) do { spin_unlock(lock); local_irq_enable(); } while (0) +#define spin_unlock_bh(lock) do { spin_unlock(lock); local_bh_enable(); } while (0) + +#define read_unlock_irqrestore(lock, flags) do { read_unlock(lock); local_irq_restore(flags); } while (0) +#define read_unlock_irq(lock) do { read_unlock(lock); local_irq_enable(); } while (0) +#define read_unlock_bh(lock) do { read_unlock(lock); local_bh_enable(); } while (0) + +#define write_unlock_irqrestore(lock, flags) do { write_unlock(lock); local_irq_restore(flags); } while (0) +#define write_unlock_irq(lock) do { write_unlock(lock); local_irq_enable(); } while (0) +#define write_unlock_bh(lock) do { write_unlock(lock); local_bh_enable(); } while (0) + +#ifndef __SMP__ + +#define DEBUG_SPINLOCKS 0 /* 0 == no debugging, 1 == maintain lock state, 2 == full debugging */ + +#if (DEBUG_SPINLOCKS < 1) +/* * Your basic spinlocks, allowing only a single CPU anywhere */ -#ifdef EMPTY_INIT_OK - typedef struct { } spinlock_t; -# define SPIN_LOCK_UNLOCKED (spinlock_t) { } -#else - typedef unsigned char spinlock_t; -# define SPIN_LOCK_UNLOCKED 0 -#endif +typedef EMPTY_STRUCT spinlock_t; +#define SPIN_LOCK_UNLOCKED EMPTY_STRUCT_INIT(spinlock_t) #define spin_lock_init(lock) do { } while(0) #define spin_lock(lock) do { } while(0) -#define spin_trylock(lock) do { } while(0) +#define spin_trylock(lock) (1) #define spin_unlock_wait(lock) do { } while(0) #define spin_unlock(lock) do { } while(0) -#define spin_lock_irq(lock) cli() -#define spin_unlock_irq(lock) sti() -#define spin_lock_irqsave(lock, flags) \ - do { __save_flags_cli(flags); } while (0) -#define spin_unlock_irqrestore(lock, flags) \ - restore_flags(flags) +#elif (DEBUG_SPINLOCKS < 2) + +typedef struct { + volatile unsigned int lock; +} spinlock_t; +#define SPIN_LOCK_UNLOCKED (pinlock_t) { 0 } + +#define spin_lock_init(x) do { (x)->lock = 0; } while (0) +#define spin_lock(x) do { (x)->lock = 1; } while (0) +#define spin_trylock(lock) (!test_and_set_bit(0,(lock))) +#define spin_unlock_wait(x) do { } while (0) +#define spin_unlock(x) do { (x)->lock = 0; } while (0) + +#else /* (DEBUG_SPINLOCKS >= 2) */ + +typedef struct { + volatule unsigned int lock; + volatile unsigned int babble; + const char *module; +} spinlock_t; +#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0, 25, __BASE_FILE__ } + +#include <linux/kernel.h> + +#define spin_lock_init(x) do { (x)->lock = 0; } while (0) +#define spin_trylock(lock) (!test_and_set_bit(0,(lock))) + +#define spin_lock(x) do {unsigned long __spinflags; save_flags(__spinflags); cli(); if ((x)->lock&&(x)->babble) {printk("%s:%d: spin_lock(%s:%p) already locked\n", __BASE_FILE__,__LINE__, (x)->module, (x));(x)->babble--;} (x)->lock = 1; restore_flags(__spinflags);} while (0) +#define spin_unlock_wait(x) do {unsigned long __spinflags; save_flags(__spinflags); cli(); if ((x)->lock&&(x)->babble) {printk("%s:%d: spin_unlock_wait(%s:%p) deadlock\n", __BASE_FILE__,__LINE__, (x)->module, (x));(x)->babble--;} restore_flags(__spinflags);} while (0) +#define spin_unlock(x) do {unsigned long __spinflags; save_flags(__spinflags); cli(); if (!(x)->lock&&(x)->babble) {printk("%s:%d: spin_unlock(%s:%p) not locked\n", __BASE_FILE__,__LINE__, (x)->module, (x));(x)->babble--;} (x)->lock = 0; restore_flags(__spinflags);} while (0) + +#endif /* * Read-write spinlocks, allowing multiple readers @@ -45,31 +102,13 @@ * irq-safe write-lock, but readers can get non-irqsafe * read-locks. */ -#ifdef EMPTY_INIT_OK - typedef struct { } rwlock_t; -# define RW_LOCK_UNLOCKED (rwlock_t) { } -#else - typedef unsigned char rwlock_t; -# define RW_LOCK_UNLOCKED 0 -#endif +typedef EMPTY_STRUCT rwlock_t; +#define RW_LOCK_UNLOCKED EMPTY_STRUCT_INIT(rwlock_t) #define read_lock(lock) do { } while(0) #define read_unlock(lock) do { } while(0) #define write_lock(lock) do { } while(0) #define write_unlock(lock) do { } while(0) -#define read_lock_irq(lock) cli() -#define read_unlock_irq(lock) sti() -#define write_lock_irq(lock) cli() -#define write_unlock_irq(lock) sti() - -#define read_lock_irqsave(lock, flags) \ - do { __save_flags_cli(flags); } while (0) -#define read_unlock_irqrestore(lock, flags) \ - restore_flags(flags) -#define write_lock_irqsave(lock, flags) \ - do { __save_flags_cli(flags); } while (0) -#define write_unlock_irqrestore(lock, flags) \ - restore_flags(flags) #else #error ARM architecture does not support spin locks diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 2874c4661..80252899d 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -35,7 +35,7 @@ extern unsigned int __machine_arch_type; /* * Sort out a definition for machine_arch_type - * The rules basically are: + * The rules are: * 1. If one architecture is selected, then all machine_is_xxx() * are constant. * 2. If two or more architectures are selected, then the selected @@ -118,28 +118,16 @@ extern unsigned int __machine_arch_type; #define machine_arch_type __machine_arch_type #endif -/* - * task_struct isn't always declared - forward-declare it here. - */ -struct task_struct; - #include <asm/proc-fns.h> -extern void arm_malalignedptr(const char *, void *, volatile void *); -extern void arm_invalidptr(const char *, int); - #define xchg(ptr,x) \ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) #define tas(ptr) (xchg((ptr),1)) -/* - * switch_to(prev, next) should switch from task `prev' to `next' - * `prev' will never be the same as `next'. - * - * `next' and `prev' should be struct task_struct, but it isn't always defined - */ -#define switch_to(prev,next,last) do { last = processor._switch_to(prev,next); } while (0) +extern void arm_malalignedptr(const char *, void *, volatile void *); +extern void arm_invalidptr(const char *, int); +extern asmlinkage void __backtrace(void); /* * Include processor dependent parts @@ -152,7 +140,16 @@ extern void arm_invalidptr(const char *, int); #define wmb() mb() #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); -extern asmlinkage void __backtrace(void); +/* + * switch_to(prev, next) should switch from task `prev' to `next' + * `prev' will never be the same as `next'. + * The `mb' is to tell GCC not to cache `current' across this call. + */ +#define switch_to(prev,next,last) \ + do { \ + last = processor._switch_to(prev,next); \ + mb(); \ + } while (0) #endif diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 86c0c2883..f4a7ed33a 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -59,7 +59,7 @@ #define __NR_geteuid (__NR_SYSCALL_BASE+ 49) #define __NR_getegid (__NR_SYSCALL_BASE+ 50) #define __NR_acct (__NR_SYSCALL_BASE+ 51) -#define __NR_phys (__NR_SYSCALL_BASE+ 52) +#define __NR_umount2 (__NR_SYSCALL_BASE+ 52) #define __NR_lock (__NR_SYSCALL_BASE+ 53) #define __NR_ioctl (__NR_SYSCALL_BASE+ 54) #define __NR_fcntl (__NR_SYSCALL_BASE+ 55) |