diff options
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-arc/memory.h | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa110/memory.h | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-ebsa285/memory.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-nexuspci/memory.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-rpc/memory.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-rpc/system.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-sa1100/memory.h | 5 | ||||
-rw-r--r-- | include/asm-arm/io.h | 17 | ||||
-rw-r--r-- | include/asm-arm/page.h | 18 | ||||
-rw-r--r-- | include/asm-arm/pgtable.h | 287 | ||||
-rw-r--r-- | include/asm-arm/proc-armo/cache.h | 8 | ||||
-rw-r--r-- | include/asm-arm/proc-armo/pgtable.h | 259 | ||||
-rw-r--r-- | include/asm-arm/proc-armo/shmparam.h | 4 | ||||
-rw-r--r-- | include/asm-arm/proc-armv/cache.h | 7 | ||||
-rw-r--r-- | include/asm-arm/proc-armv/pgtable.h | 285 | ||||
-rw-r--r-- | include/asm-arm/proc-armv/shmparam.h | 4 | ||||
-rw-r--r-- | include/asm-arm/processor.h | 10 | ||||
-rw-r--r-- | include/asm-arm/setup.h | 18 | ||||
-rw-r--r-- | include/asm-arm/shmparam.h | 35 | ||||
-rw-r--r-- | include/asm-arm/termios.h | 1 |
20 files changed, 375 insertions, 601 deletions
diff --git a/include/asm-arm/arch-arc/memory.h b/include/asm-arm/arch-arc/memory.h index 4cc800cea..903e48d72 100644 --- a/include/asm-arm/arch-arc/memory.h +++ b/include/asm-arm/arch-arc/memory.h @@ -21,6 +21,7 @@ * Page offset: 32MB */ #define PAGE_OFFSET (0x02000000UL) +#define PHYS_OFFSET (0x02000000UL) #define __virt_to_phys__is_a_macro #define __virt_to_phys(vpage) vpage diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 81bbb720f..36f899faa 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -22,6 +22,7 @@ * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x00000000UL) #define __virt_to_phys__is_a_macro #define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET) diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index 25e720489..14ba9d4fd 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -29,6 +29,7 @@ * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x00000000UL) #define __virt_to_bus__is_a_macro #define __virt_to_bus(x) ((x) - 0xe0000000) @@ -49,6 +50,7 @@ * Page offset: 1.5GB */ #define PAGE_OFFSET (0x60000000UL) +#define PHYS_OFFSET (0x00000000UL) #else diff --git a/include/asm-arm/arch-nexuspci/memory.h b/include/asm-arm/arch-nexuspci/memory.h index 7b89119aa..3018e8c40 100644 --- a/include/asm-arm/arch-nexuspci/memory.h +++ b/include/asm-arm/arch-nexuspci/memory.h @@ -18,12 +18,13 @@ * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x40000000UL) /* * On NexusPCI, the DRAM is contiguous */ -#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET + 0x40000000) -#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET - 0x40000000) +#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET + PHYS_OFFSET) +#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET - PHYS_OFFSET) #define __virt_to_phys__is_a_macro #define __phys_to_virt__is_a_macro diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h index d5a6a4f9f..e5f59abdb 100644 --- a/include/asm-arm/arch-rpc/memory.h +++ b/include/asm-arm/arch-rpc/memory.h @@ -24,11 +24,12 @@ * Page offset: 3GB */ #define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x10000000UL) #define __virt_to_phys__is_a_macro -#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET + 0x10000000) +#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET + PHYS_OFFSET) #define __phys_to_virt__is_a_macro -#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET - 0x10000000) +#define __phys_to_virt(ppage) ((ppage) + PAGE_OFFSET - PHYS_OFFSET) /* * These are exactly the same on the RiscPC as the diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h index af4ebc348..c40aadcad 100644 --- a/include/asm-arm/arch-rpc/system.h +++ b/include/asm-arm/arch-rpc/system.h @@ -18,7 +18,7 @@ extern __inline__ void arch_reset(char mode) outb(0, IOMD_ROMCR0); __asm__ __volatile__( - "mcr p15, 0, %0, c1, c0, 0\n\t" - "movs pc, #0" + "mcr p15, 0, %0, c1, c0, 0\n\t" + "mov pc, #0" : : "r" (cpu_reset())); } diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index a49764467..884157c86 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -11,12 +11,13 @@ /* * Task size: 3GB */ -#define TASK_SIZE (0xc0000000UL) +#define TASK_SIZE (0xc0000000UL) /* * Page offset: 3GB */ -#define PAGE_OFFSET (0xc0000000UL) +#define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0x00000000UL) #define __virt_to_phys__is_a_macro #define __phys_to_virt__is_a_macro diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 5f72c4ecd..a726d7afa 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -185,17 +185,16 @@ __IO(l,"",long) #endif -#ifndef ARCH_READWRITE +extern void __readwrite_bug(const char *fn); -/* for panic */ -#include <linux/kernel.h> +#ifndef ARCH_READWRITE -#define readb(p) (panic("readb called, but not implemented"),0) -#define readw(p) (panic("readw called, but not implemented"),0) -#define readl(p) (panic("readl called, but not implemented"),0) -#define writeb(v,p) panic("writeb called, but not implemented") -#define writew(v,p) panic("writew called, but not implemented") -#define writel(v,p) panic("writel called, but not implemented") +#define readb(p) (__readwrite_bug("readb"),0) +#define readw(p) (__readwrite_bug("readw"),0) +#define readl(p) (__readwrite_bug("readl"),0) +#define writeb(v,p) __readwrite_bug("writeb") +#define writew(v,p) __readwrite_bug("writew") +#define writel(v,p) __readwrite_bug("writel") #endif diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index 977b2f619..20edac085 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -12,7 +12,7 @@ #define STRICT_MM_TYPECHECKS #define clear_page(page) memzero((void *)(page), PAGE_SIZE) -extern void copy_page(unsigned long to, unsigned long from); +extern void copy_page(void *to, void *from); #ifdef STRICT_MM_TYPECHECKS /* @@ -60,22 +60,18 @@ typedef unsigned long pgprot_t; #ifndef __ASSEMBLY__ -#define BUG() do { \ - printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \ - *(int *)0 = 0; \ -} while (0) +extern void __bug(const char *file, int line, void *data); -#define PAGE_BUG(page) do { \ - BUG(); \ -} while (0) +#define BUG() __bug(__FILE__, __LINE__, NULL) +#define PAGE_BUG(page) __bug(__FILE__, __LINE__, page) #endif /* !__ASSEMBLY__ */ #include <asm/arch/memory.h> -#define __pa(x) __virt_to_phys((unsigned long)(x)) -#define __va(x) ((void *)(__phys_to_virt((unsigned long)(x)))) -#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT) +#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) +#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) +#define MAP_NR(addr) (__pa(addr) >> PAGE_SHIFT) #endif diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 1f9d7b175..b9fb442d7 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -1,55 +1,155 @@ +/* + * linux/include/asm-arm/pgtable.h + */ #ifndef _ASMARM_PGTABLE_H #define _ASMARM_PGTABLE_H #include <linux/config.h> -#include <asm/arch/memory.h> /* For TASK_SIZE */ +#include <asm/arch/memory.h> #include <asm/proc-fns.h> #include <asm/system.h> -#include <asm/proc/cache.h> + +/* + * PMD_SHIFT determines the size of the area a second-level page table can map + * PGDIR_SHIFT determines what a third-level page table entry can map + */ +#define PMD_SHIFT 20 +#define PGDIR_SHIFT 20 #define LIBRARY_TEXT_START 0x0c000000 -#undef TEST_VERIFY_AREA +#ifndef __ASSEMBLY__ +extern void __pte_error(const char *file, int line, unsigned long val); +extern void __pmd_error(const char *file, int line, unsigned long val); +extern void __pgd_error(const char *file, int line, unsigned long val); + +#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte)) +#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd)) +#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd)) +#endif /* !__ASSEMBLY__ */ +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) + +/* + * The table below defines the page protection levels that we insert into our + * Linux page table version. These get translated into the best that the + * architecture can perform. Note that on most ARM hardware: + * 1) We cannot do execute protection + * 2) If we could do execute protection, then read is implied + * 3) write implies read permissions + */ +#define __P000 PAGE_NONE +#define __P001 PAGE_READONLY +#define __P010 PAGE_COPY +#define __P011 PAGE_COPY +#define __P100 PAGE_READONLY +#define __P101 PAGE_READONLY +#define __P110 PAGE_COPY +#define __P111 PAGE_COPY + +#define __S000 PAGE_NONE +#define __S001 PAGE_READONLY +#define __S010 PAGE_SHARED +#define __S011 PAGE_SHARED +#define __S100 PAGE_READONLY +#define __S101 PAGE_READONLY +#define __S110 PAGE_SHARED +#define __S111 PAGE_SHARED + +#ifndef __ASSEMBLY__ /* - * BAD_PAGETABLE is used when we need a bogus page-table, while - * BAD_PAGE is used for a bogus page. - * * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ -extern pte_t __bad_page(void); -extern pte_t * __bad_pagetable(void); -extern unsigned long *empty_zero_page; +struct page *empty_zero_page; +#define ZERO_PAGE(vaddr) (empty_zero_page) + +/* + * Handling allocation failures during page table setup. + */ +extern void __handle_bad_pmd(pmd_t *pmd); +extern void __handle_bad_pmd_kernel(pmd_t *pmd); + +#define pte_none(pte) (!pte_val(pte)) +#define pte_clear(ptep) set_pte((ptep), __pte(0)) +#define pte_pagenr(pte) ((unsigned long)(((pte_val(pte) - PHYS_OFFSET) >> PAGE_SHIFT))) + +#define pmd_none(pmd) (!pmd_val(pmd)) +#define pmd_clear(pmdp) set_pmd(pmdp, __pmd(0)) + +/* + * Permanent address of a page. + */ +#define page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) +#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) +#define pte_page(x) (mem_map + pte_pagenr(x)) + +/* + * The "pgd_xxx()" functions here are trivial for a folded two-level + * setup: the pgd is never bad, and a pmd always exists (as it's folded + * into the pgd entry) + */ +#define pgd_none(pgd) (0) +#define pgd_bad(pgd) (0) +#define pgd_present(pgd) (1) +#define pgd_clear(pgdp) + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) +{ + pte_t pte; + pte_val(pte) = physpage | pgprot_val(pgprot); + return pte; +} -#define BAD_PAGETABLE __bad_pagetable() -#define BAD_PAGE __bad_page() -#define ZERO_PAGE(vaddr) ((unsigned long) empty_zero_page) +extern __inline__ pte_t mk_pte(struct page *page, pgprot_t pgprot) +{ + pte_t pte; + pte_val(pte) = (PHYS_OFFSET + ((page - mem_map) << PAGE_SHIFT)) | pgprot_val(pgprot); + return pte; +} -/* number of bits that fit into a memory pointer */ -#define BYTES_PER_PTR (sizeof(unsigned long)) -#define BITS_PER_PTR (8*BYTES_PER_PTR) +#define page_pte_prot(page,prot) mk_pte(page, prot) +#define page_pte(page) mk_pte(page, __pgprot(0)) -/* to align the pointer to a pointer address */ -#define PTR_MASK (~(sizeof(void*)-1)) +/* to find an entry in a page-table-directory */ +#define __pgd_offset(addr) ((addr) >> PGDIR_SHIFT) -/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ -#define SIZEOF_PTR_LOG2 2 +#define pgd_offset(mm, addr) ((mm)->pgd+__pgd_offset(addr)) -/* to find an entry in a page-table */ -#define PAGE_PTR(address) \ - ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(addr) pgd_offset(&init_mm, addr) -extern void __bad_pmd(pmd_t *pmd); -extern void __bad_pmd_kernel(pmd_t *pmd); +/* Find an entry in the second-level page table.. */ +#define pmd_offset(dir, addr) ((pmd_t *)(dir)) + +/* Find an entry in the third-level page table.. */ +#define __pte_offset(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) +#define pte_offset(dir, addr) ((pte_t *)pmd_page(*(dir)) + __pte_offset(addr)) + +/* + * Get the cache handling stuff now. + */ +#include <asm/proc/cache.h> /* * Page table cache stuff */ #ifndef CONFIG_NO_PGT_CACHE -#ifndef __SMP__ +#ifdef __SMP__ +#error Pgtable caches have to be per-CPU, so that no locking is needed. +#endif /* __SMP__ */ + extern struct pgtable_cache_struct { unsigned long *pgd_cache; unsigned long *pte_cache; @@ -61,10 +161,6 @@ extern struct pgtable_cache_struct { #define pte_quicklist (quicklists.pte_cache) #define pgtable_cache_size (quicklists.pgtable_cache_sz) -#else /* __SMP__ */ -#error Pgtable caches have to be per-CPU, so that no locking is needed. -#endif /* __SMP__ */ - /* used for quicklists */ #define __pgd_next(pgd) (((unsigned long *)pgd)[1]) #define __pte_next(pte) (((unsigned long *)pte)[0]) @@ -73,7 +169,7 @@ extern __inline__ pgd_t *get_pgd_fast(void) { unsigned long *ret; - if((ret = pgd_quicklist) != NULL) { + if ((ret = pgd_quicklist) != NULL) { pgd_quicklist = (unsigned long *)__pgd_next(ret); ret[1] = ret[2]; clean_cache_area(ret + 1, 4); @@ -82,10 +178,18 @@ extern __inline__ pgd_t *get_pgd_fast(void) return (pgd_t *)ret; } +extern __inline__ void free_pgd_fast(pgd_t *pgd) +{ + __pgd_next(pgd) = (unsigned long) pgd_quicklist; + pgd_quicklist = (unsigned long *) pgd; + pgtable_cache_size++; +} + /* We don't use pmd cache, so this is a dummy routine */ -extern __inline__ pmd_t *get_pmd_fast(void) +#define get_pmd_fast() ((pmd_t *)0) + +extern __inline__ void free_pmd_fast(pmd_t *pmd) { - return (pmd_t *)0; } extern __inline__ pte_t *get_pte_fast(void) @@ -101,17 +205,6 @@ extern __inline__ pte_t *get_pte_fast(void) return (pte_t *)ret; } -extern __inline__ void free_pgd_fast(pgd_t *pgd) -{ - __pgd_next(pgd) = (unsigned long) pgd_quicklist; - pgd_quicklist = (unsigned long *) pgd; - pgtable_cache_size++; -} - -extern __inline__ void free_pmd_fast(pmd_t *pmd) -{ -} - extern __inline__ void free_pte_fast(pte_t *pte) { __pte_next(pte) = (unsigned long) pte_quicklist; @@ -121,9 +214,13 @@ extern __inline__ void free_pte_fast(pte_t *pte) #else /* CONFIG_NO_PGT_CACHE */ -#define get_pgd_fast() (NULL) -#define get_pmd_fast() (NULL) -#define get_pte_fast() (NULL) +#define pgd_quicklist ((unsigned long *)0) +#define pmd_quicklist ((unsigned long *)0) +#define pte_quicklist ((unsigned long *)0) + +#define get_pgd_fast() ((pgd_t *)0) +#define get_pmd_fast() ((pmd_t *)0) +#define get_pte_fast() ((pte_t *)0) #define free_pgd_fast(pgd) free_pgd_slow(pgd) #define free_pmd_fast(pmd) free_pmd_slow(pmd) @@ -131,8 +228,93 @@ extern __inline__ void free_pte_fast(pte_t *pte) #endif /* CONFIG_NO_PGT_CACHE */ +extern pgd_t *get_pgd_slow(void); +extern void free_pgd_slow(pgd_t *pgd); + +#define free_pmd_slow(pmd) do { } while (0) + +extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long addr_preadjusted); +extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long addr_preadjusted); +extern void free_pte_slow(pte_t *pte); + #include <asm/proc/pgtable.h> +extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); + return pte; +} + +/* + * Allocate and free page tables. The xxx_kernel() versions are + * used to allocate a kernel page table - this turns on ASN bits + * if any. + */ +#define pte_free_kernel(pte) free_pte_fast(pte) +#define pte_free(pte) free_pte_fast(pte) + +#ifndef pte_alloc_kernel +extern __inline__ pte_t * pte_alloc_kernel(pmd_t *pmd, unsigned long address) +{ + address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + if (pmd_none(*pmd)) { + pte_t *page = (pte_t *) get_pte_fast(); + + if (!page) + return get_pte_kernel_slow(pmd, address); + set_pmd(pmd, mk_kernel_pmd(page)); + return page + address; + } + if (pmd_bad(*pmd)) { + __handle_bad_pmd_kernel(pmd); + return NULL; + } + return (pte_t *) pmd_page(*pmd) + address; +} +#endif + +extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address) +{ + address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + if (pmd_none(*pmd)) { + pte_t *page = (pte_t *) get_pte_fast(); + + if (!page) + return get_pte_slow(pmd, address); + set_pmd(pmd, mk_user_pmd(page)); + return page + address; + } + if (pmd_bad(*pmd)) { + __handle_bad_pmd(pmd); + return NULL; + } + return (pte_t *) pmd_page(*pmd) + address; +} + +#define pmd_free_kernel pmd_free +#define pmd_free(pmd) do { } while (0) + +#define pmd_alloc_kernel pmd_alloc +extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address) +{ + return (pmd_t *) pgd; +} + +#define pgd_free(pgd) free_pgd_fast(pgd) + +extern __inline__ pgd_t *pgd_alloc(void) +{ + pgd_t *pgd; + + pgd = get_pgd_fast(); + if (!pgd) + pgd = get_pgd_slow(); + + return pgd; +} + +extern int do_check_pgt_cache(int, int); + extern __inline__ void set_pgdir(unsigned long address, pgd_t entry) { struct task_struct * p; @@ -159,15 +341,16 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; #define update_mmu_cache(vma,address,pte) -#define SWP_TYPE(entry) (((entry) >> 2) & 0x7f) -#define SWP_OFFSET(entry) ((entry) >> 9) -#define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << 9)) +/* + * We support up to 32GB of swap on 4k machines + */ +#define SWP_TYPE(entry) (((pte_val(entry)) >> 2) & 0x7f) +#define SWP_OFFSET(entry) ((pte_val(entry)) >> 9) +#define SWP_ENTRY(type,offset) __pte((((type) << 2) | ((offset) << 9))) #define module_map vmalloc #define module_unmap vfree -extern int do_check_pgt_cache(int, int); - /* * We rely on GCC optimising this code away for * architectures which it doesn't apply to. Note @@ -190,4 +373,6 @@ extern __inline__ int __kern_valid_addr(unsigned long addr) #define io_remap_page_range remap_page_range +#endif /* !__ASSEMBLY__ */ + #endif /* _ASMARM_PGTABLE_H */ diff --git a/include/asm-arm/proc-armo/cache.h b/include/asm-arm/proc-armo/cache.h index d39b7b79f..cb0aa1975 100644 --- a/include/asm-arm/proc-armo/cache.h +++ b/include/asm-arm/proc-armo/cache.h @@ -46,18 +46,18 @@ extern __inline__ void memc_update_mm(struct mm_struct *mm) } extern __inline__ void -memc_update_addr(struct mm_struct *mm, pte_t pte, unsigned long addr) +memc_update_addr(struct mm_struct *mm, pte_t pte, unsigned long vaddr) { - cpu_memc_update_entry(mm->pgd, pte_val(pte), addr); + cpu_memc_update_entry(mm->pgd, pte_val(pte), vaddr); if (mm == current->active_mm) processor._set_pgd(mm->pgd); } extern __inline__ void -memc_clear(struct mm_struct *mm, unsigned long phys_addr) +memc_clear(struct mm_struct *mm, struct page *page) { - cpu_memc_update_entry(mm->pgd, phys_addr, 0); + cpu_memc_update_entry(mm->pgd, page_address(page), 0); if (mm == current->active_mm) processor._set_pgd(mm->pgd); diff --git a/include/asm-arm/proc-armo/pgtable.h b/include/asm-arm/proc-armo/pgtable.h index be9174ffa..56456e0e1 100644 --- a/include/asm-arm/proc-armo/pgtable.h +++ b/include/asm-arm/proc-armo/pgtable.h @@ -9,31 +9,46 @@ #define __ASM_PROC_PGTABLE_H /* - * PMD_SHIFT determines the size of the area a second-level page table can map + * entries per page directory level: they are two-level, so + * we don't really have any PMD directory. */ -#define PMD_SHIFT 20 -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) +#define PTRS_PER_PTE 32 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 32 /* - * PGDIR_SHIFT determines what a third-level page table entry can map + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) */ -#define PGDIR_SHIFT 20 -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) +#define VMALLOC_START 0x01a00000 +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END 0x01c00000 -/* - * entries per page directory level: the arm3 is one-level, so - * we don't really have any PMD or PTE directory physically. - */ -#define PTRS_PER_PTE 32 -#define PTRS_PER_PMD 1 -#define PTRS_PER_PGD 32 -#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) +#define _PAGE_TABLE (0x01) -#define VMALLOC_START 0x01a00000 -#define VMALLOC_VMADDR(x) ((unsigned long)(x)) -#define VMALLOC_END 0x01c00000 +#define pmd_bad(pmd) ((pmd_val(pmd) & 0xfc000002)) +#define set_pmd(pmdp,pmd) ((*(pmdp)) = (pmd)) + +extern __inline__ pmd_t __mk_pmd(pte_t *ptep, unsigned long prot) +{ + unsigned long pte_ptr = (unsigned long)ptep; + pmd_t pmd; + + pmd_val(pmd) = __virt_to_phys(pte_ptr) | prot; + + return pmd; +} + +/* these are aliases for the above function */ +#define mk_user_pmd(ptep) __mk_pmd(ptep, _PAGE_TABLE) +#define mk_kernel_pmd(ptep) __mk_pmd(ptep, _PAGE_TABLE) + +extern __inline__ unsigned long pmd_page(pmd_t pmd) +{ + return __phys_to_virt(pmd_val(pmd) & ~_PAGE_TABLE); +} + +#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) #define _PAGE_PRESENT 0x01 #define _PAGE_READONLY 0x02 @@ -41,9 +56,6 @@ #define _PAGE_OLD 0x08 #define _PAGE_CLEAN 0x10 -#define _PAGE_TABLE (_PAGE_PRESENT) -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN) - /* -- present -- -- !dirty -- --- !write --- ---- !user --- */ #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY | _PAGE_NOT_USER) #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_CLEAN ) @@ -51,59 +63,19 @@ #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY ) #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_NOT_USER) -/* - * The arm can't do page protection for execute, and considers that the same are read. - * Also, write permissions imply read permissions. This is the closest we can get.. - */ -#define __P000 PAGE_NONE -#define __P001 PAGE_READONLY -#define __P010 PAGE_COPY -#define __P011 PAGE_COPY -#define __P100 PAGE_READONLY -#define __P101 PAGE_READONLY -#define __P110 PAGE_COPY -#define __P111 PAGE_COPY - -#define __S000 PAGE_NONE -#define __S001 PAGE_READONLY -#define __S010 PAGE_SHARED -#define __S011 PAGE_SHARED -#define __S100 PAGE_READONLY -#define __S101 PAGE_READONLY -#define __S110 PAGE_SHARED -#define __S111 PAGE_SHARED - -extern unsigned long physical_start; -extern unsigned long physical_end; +#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN) -#define pte_none(pte) (!pte_val(pte)) -#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) -#define pte_clear(ptep) set_pte((ptep), __pte(0)) - -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_bad(pmd) ((pmd_val(pmd) & 0xfc000002)) -#define pmd_present(pmd) (pmd_val(pmd) & _PAGE_PRESENT) -#define pmd_clear(pmdp) set_pmd(pmdp, __pmd(0)) - -/* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -#define pgd_none(pgd) (0) -#define pgd_bad(pgd) (0) -#define pgd_present(pgd) (1) -#define pgd_clear(pgdp) /* * The following only work if pte_present() is true. * Undefined behaviour if not.. */ -extern inline int pte_read(pte_t pte) { return !(pte_val(pte) & _PAGE_NOT_USER); } -extern inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_READONLY); } -extern inline int pte_exec(pte_t pte) { return !(pte_val(pte) & _PAGE_NOT_USER); } -extern inline int pte_dirty(pte_t pte) { return !(pte_val(pte) & _PAGE_CLEAN); } -extern inline int pte_young(pte_t pte) { return !(pte_val(pte) & _PAGE_OLD); } +#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) +#define pte_read(pte) (!(pte_val(pte) & _PAGE_NOT_USER)) +#define pte_write(pte) (!(pte_val(pte) & _PAGE_READONLY)) +#define pte_exec(pte) (!(pte_val(pte) & _PAGE_NOT_USER)) +#define pte_dirty(pte) (!(pte_val(pte) & _PAGE_CLEAN)) +#define pte_young(pte) (!(pte_val(pte) & _PAGE_OLD)) extern inline pte_t pte_nocache(pte_t pte) { return pte; } extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_READONLY; return pte; } @@ -118,155 +90,6 @@ extern inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USE extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) &= ~_PAGE_CLEAN; return pte; } extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) &= ~_PAGE_OLD; return pte; } -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -extern __inline__ pte_t mk_pte(unsigned long page, pgprot_t pgprot) -{ - pte_t pte; - pte_val(pte) = __virt_to_phys(page) | pgprot_val(pgprot); - return pte; -} - -/* This takes a physical page address that is used by the remapping functions */ -extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) -{ - pte_t pte; - pte_val(pte) = physpage + pgprot_val(pgprot); - return pte; -} - -extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); - return pte; -} - -/* Certain architectures need to do special things when pte's - * within a page table are directly modified. Thus, the following - * hook is made available. - */ -#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) - -extern __inline__ unsigned long pte_page(pte_t pte) -{ - return __phys_to_virt(pte_val(pte) & PAGE_MASK); -} - -extern __inline__ pmd_t mk_pmd(pte_t *ptep) -{ - pmd_t pmd; - pmd_val(pmd) = __virt_to_phys((unsigned long)ptep) | _PAGE_TABLE; - return pmd; -} - -/* these are aliases for the above function */ -#define mk_user_pmd(ptep) mk_pmd(ptep) -#define mk_kernel_pmd(ptep) mk_pmd(ptep) - -#define set_pmd(pmdp,pmd) ((*(pmdp)) = (pmd)) - -extern __inline__ unsigned long pmd_page(pmd_t pmd) -{ - return __phys_to_virt(pmd_val(pmd) & ~_PAGE_TABLE); -} - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* to find an entry in a page-table-directory */ -extern __inline__ pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) -{ - return mm->pgd + (address >> PGDIR_SHIFT); -} - -/* Find an entry in the second-level page table.. */ -#define pmd_offset(dir, address) ((pmd_t *)(dir)) - -/* Find an entry in the third-level page table.. */ -extern __inline__ pte_t * pte_offset(pmd_t *dir, unsigned long address) -{ - return (pte_t *)pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); -} - -/* - * Allocate and free page tables. The xxx_kernel() versions are - * used to allocate a kernel page table - this turns on ASN bits - * if any. - */ - -extern void free_table(void *table); - -/* keep this as an inline so we get type checking */ -extern __inline__ void free_pgd_slow(pgd_t *pgd) -{ - free_table(pgd); -} - -/* keep this as an inline so we get type checking */ -extern __inline__ void free_pte_slow(pte_t *pte) -{ - free_table(pte); -} - -extern __inline__ void free_pmd_slow(pmd_t *pmd) -{ -} - -#define pgd_free(pgd) free_pgd_fast(pgd) - -extern __inline__ pgd_t *pgd_alloc(void) -{ - extern pgd_t *get_pgd_slow(void); - pgd_t *pgd; - - pgd = get_pgd_fast(); - if (!pgd) - pgd = get_pgd_slow(); - - return pgd; -} - -#define pte_free_kernel(pte) free_pte_fast(pte) -#define pte_free(pte) free_pte_fast(pte) - -extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address) -{ - extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); - - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - - if (pmd_none (*pmd)) { - pte_t *page = (pte_t *) get_pte_fast(); - - if (!page) - return get_pte_slow(pmd, address); - set_pmd(pmd, mk_pmd(page)); - return page + address; - } - if (pmd_bad (*pmd)) { - __bad_pmd(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; -} - -/* - * allocating and freeing a pmd is trivial: the 1-entry pmd is - * inside the pgd, so has no extra memory associated with it. - */ -extern __inline__ void pmd_free(pmd_t *pmd) -{ -} - -extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address) -{ - return (pmd_t *) pgd; -} - -#define pmd_free_kernel pmd_free -#define pmd_alloc_kernel pmd_alloc #define pte_alloc_kernel pte_alloc #endif /* __ASM_PROC_PGTABLE_H */ diff --git a/include/asm-arm/proc-armo/shmparam.h b/include/asm-arm/proc-armo/shmparam.h index e61096091..e85eadb3f 100644 --- a/include/asm-arm/proc-armo/shmparam.h +++ b/include/asm-arm/proc-armo/shmparam.h @@ -9,9 +9,7 @@ #ifndef __ASM_PROC_SHMPARAM_H #define __ASM_PROC_SHMPARAM_H -#ifndef SHM_RANGE_START -#define SHM_RANGE_START 0x00a00000 -#define SHM_RANGE_END 0x00c00000 +#ifndef SHMMAX #define SHMMAX 0x003fa000 #endif diff --git a/include/asm-arm/proc-armv/cache.h b/include/asm-arm/proc-armv/cache.h index 9b79c7747..5e700bfad 100644 --- a/include/asm-arm/proc-armv/cache.h +++ b/include/asm-arm/proc-armv/cache.h @@ -54,8 +54,11 @@ * This flushes back any buffered write data. We have to clean the entries * in the cache for this page. This does not invalidate either I or D caches. */ -#define flush_page_to_ram(_page) \ - cpu_flush_ram_page((_page) & PAGE_MASK); +static __inline__ void flush_page_to_ram(struct page *page) +{ + unsigned long virt = page_address(page); + cpu_flush_ram_page(virt); +} /* * TLB flushing: diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h index d4f416d37..e9260057f 100644 --- a/include/asm-arm/proc-armv/pgtable.h +++ b/include/asm-arm/proc-armv/pgtable.h @@ -14,27 +14,12 @@ #include <asm/proc/domain.h> /* - * PMD_SHIFT determines the size of the area a second-level page table can map + * entries per page directory level: they are two-level, so + * we don't really have any PMD directory. */ -#define PMD_SHIFT 20 -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) - -/* - * PGDIR_SHIFT determines what a third-level page table entry can map - */ -#define PGDIR_SHIFT 20 -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* - * entries per page directory level: the sa110 is two-level, so - * we don't really have any PMD directory physically. - */ -#define PTRS_PER_PTE 256 -#define PTRS_PER_PMD 1 -#define PTRS_PER_PGD 4096 -#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) +#define PTRS_PER_PTE 256 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 4096 /* * Just any arbitrary offset to the start of the vmalloc VM area: the @@ -49,15 +34,6 @@ #define VMALLOC_VMADDR(x) ((unsigned long)(x)) #define VMALLOC_END (PAGE_OFFSET + 0x10000000) -extern unsigned long get_page_2k(int priority); -extern void free_page_2k(unsigned long page); - -/* - * Allocate and free page tables. The xxx_kernel() versions are - * used to allocate a kernel page table - this turns on ASN bits - * if any. - */ - /**************** * PMD functions * ****************/ @@ -77,47 +53,15 @@ extern void free_page_2k(unsigned long page); #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_DOMAIN(DOMAIN_USER)) #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_DOMAIN(DOMAIN_KERNEL)) -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_clear(pmdp) set_pmd(pmdp, __pmd(0)) #define pmd_bad(pmd) (pmd_val(pmd) & 2) -#define mk_user_pmd(ptep) __mk_pmd(ptep, _PAGE_USER_TABLE) -#define mk_kernel_pmd(ptep) __mk_pmd(ptep, _PAGE_KERNEL_TABLE) #define set_pmd(pmdp,pmd) cpu_set_pmd(pmdp,pmd) -/* Find an entry in the second-level page table.. */ -#define pmd_offset(dir, address) ((pmd_t *)(dir)) - -extern __inline__ int pmd_present(pmd_t pmd) -{ - return ((pmd_val(pmd) + 1) & 2); -} - -extern __inline__ void free_pmd_slow(pmd_t *pmd) -{ -} - -/* - * allocating and freeing a pmd is trivial: the 1-entry pmd is - * inside the pgd, so has no extra memory associated with it. - */ -extern __inline__ void pmd_free(pmd_t *pmd) -{ -} - -extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address) -{ - return (pmd_t *) pgd; -} - -#define pmd_free_kernel pmd_free -#define pmd_alloc_kernel pmd_alloc - extern __inline__ pmd_t __mk_pmd(pte_t *ptep, unsigned long prot) { unsigned long pte_ptr = (unsigned long)ptep; pmd_t pmd; - pte_ptr -= PTRS_PER_PTE * BYTES_PER_PTR; + pte_ptr -= PTRS_PER_PTE * sizeof(void *); /* * The pmd must be loaded with the physical @@ -128,13 +72,17 @@ extern __inline__ pmd_t __mk_pmd(pte_t *ptep, unsigned long prot) return pmd; } +/* these are aliases for the above function */ +#define mk_user_pmd(ptep) __mk_pmd(ptep, _PAGE_USER_TABLE) +#define mk_kernel_pmd(ptep) __mk_pmd(ptep, _PAGE_KERNEL_TABLE) + extern __inline__ unsigned long pmd_page(pmd_t pmd) { unsigned long ptr; - ptr = pmd_val(pmd) & ~(PTRS_PER_PTE * BYTES_PER_PTR - 1); + ptr = pmd_val(pmd) & ~(PTRS_PER_PTE * sizeof(void *) - 1); - ptr += PTRS_PER_PTE * BYTES_PER_PTR; + ptr += PTRS_PER_PTE * sizeof(void *); return __phys_to_virt(ptr); } @@ -153,48 +101,8 @@ extern __inline__ unsigned long pmd_page(pmd_t pmd) #define PTE_CACHEABLE 0x0008 #define PTE_BUFFERABLE 0x0004 -#define pte_none(pte) (!pte_val(pte)) -#define pte_clear(ptep) set_pte(ptep, __pte(0)) - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -extern __inline__ pte_t mk_pte(unsigned long page, pgprot_t pgprot) -{ - pte_t pte; - pte_val(pte) = __virt_to_phys(page) | pgprot_val(pgprot); - return pte; -} - -/* This takes a physical page address that is used by the remapping functions */ -extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) -{ - pte_t pte; - pte_val(pte) = physpage + pgprot_val(pgprot); - return pte; -} - #define set_pte(ptep, pte) cpu_set_pte(ptep,pte) -extern __inline__ unsigned long pte_page(pte_t pte) -{ - return __phys_to_virt(pte_val(pte) & PAGE_MASK); -} - -extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted); - -extern __inline__ void free_pte_slow(pte_t *pte) -{ - free_page_2k((unsigned long)(pte - PTRS_PER_PTE)); -} - -#define pte_free_kernel(pte) free_pte_fast(pte) -#define pte_free(pte) free_pte_fast(pte) - -/*############################################################################### - * New PageTableEntry stuff... - */ /* We now keep two sets of ptes - the physical and the linux version. * This gives us many advantages, and allows us greater flexibility. * @@ -227,7 +135,6 @@ extern __inline__ void free_pte_slow(pte_t *pte) */ #define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG #define _L_PTE_READ L_PTE_USER | L_PTE_CACHEABLE -#define _L_PTE_EXEC _L_PTE_READ | L_PTE_EXEC #define PAGE_NONE __pgprot(_L_PTE_DEFAULT) #define PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_BUFFERABLE) @@ -235,40 +142,14 @@ extern __inline__ void free_pte_slow(pte_t *pte) #define PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) #define PAGE_KERNEL __pgprot(_L_PTE_DEFAULT | L_PTE_CACHEABLE | L_PTE_BUFFERABLE | L_PTE_DIRTY | L_PTE_WRITE) -#define _PAGE_CHG_MASK (PAGE_MASK | L_PTE_DIRTY | L_PTE_YOUNG) +#define _PAGE_CHG_MASK (PAGE_MASK | L_PTE_DIRTY | L_PTE_YOUNG) -/* - * The table below defines the page protection levels that we insert into our - * Linux page table version. These get translated into the best that the - * architecture can perform. Note that on most ARM hardware: - * 1) We cannot do execute protection - * 2) If we could do execute protection, then read is implied - * 3) write implies read permissions - */ -#define __P000 PAGE_NONE -#define __P001 PAGE_READONLY -#define __P010 PAGE_COPY -#define __P011 PAGE_COPY -#define __P100 PAGE_READONLY -#define __P101 PAGE_READONLY -#define __P110 PAGE_COPY -#define __P111 PAGE_COPY - -#define __S000 PAGE_NONE -#define __S001 PAGE_READONLY -#define __S010 PAGE_SHARED -#define __S011 PAGE_SHARED -#define __S100 PAGE_READONLY -#define __S101 PAGE_READONLY -#define __S110 PAGE_SHARED -#define __S111 PAGE_SHARED - -#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) /* * The following only work if pte_present() is true. * Undefined behaviour if not.. */ +#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) #define pte_read(pte) (pte_val(pte) & L_PTE_USER) #define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) #define pte_exec(pte) (pte_val(pte) & L_PTE_EXEC) @@ -276,130 +157,18 @@ extern __inline__ void free_pte_slow(pte_t *pte) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) #define PTE_BIT_FUNC(fn,op) \ -extern inline pte_t fn##(pte_t pte) { pte_val(pte) op##; return pte; } - -/*PTE_BIT_FUNC(pte_rdprotect, &= ~L_PTE_USER);*/ -PTE_BIT_FUNC(pte_wrprotect, &= ~L_PTE_WRITE); -PTE_BIT_FUNC(pte_exprotect, &= ~L_PTE_EXEC); -PTE_BIT_FUNC(pte_mkclean, &= ~L_PTE_DIRTY); -PTE_BIT_FUNC(pte_mkold, &= ~L_PTE_YOUNG); -/*PTE_BIT_FUNC(pte_mkread, |= L_PTE_USER);*/ -PTE_BIT_FUNC(pte_mkwrite, |= L_PTE_WRITE); -PTE_BIT_FUNC(pte_mkexec, |= L_PTE_EXEC); -PTE_BIT_FUNC(pte_mkdirty, |= L_PTE_DIRTY); -PTE_BIT_FUNC(pte_mkyoung, |= L_PTE_YOUNG); -PTE_BIT_FUNC(pte_nocache, &= ~L_PTE_CACHEABLE); - -extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); - return pte; -} - -/* Find an entry in the third-level page table.. */ -extern __inline__ pte_t * pte_offset(pmd_t * dir, unsigned long address) -{ - return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); -} - -extern __inline__ pte_t * pte_alloc_kernel(pmd_t *pmd, unsigned long address) -{ - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - if (pmd_none(*pmd)) { - pte_t *page = (pte_t *) get_pte_fast(); - - if (!page) - return get_pte_kernel_slow(pmd, address); - set_pmd(pmd, mk_kernel_pmd(page)); - return page + address; - } - if (pmd_bad(*pmd)) { - __bad_pmd_kernel(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; -} - -extern __inline__ pte_t * pte_alloc(pmd_t * pmd, unsigned long address) -{ - extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted); - - address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); - - if (pmd_none(*pmd)) { - pte_t *page = (pte_t *) get_pte_fast(); - - if (!page) - return get_pte_slow(pmd, address); - set_pmd(pmd, mk_user_pmd(page)); - return page + address; - } - if (pmd_bad(*pmd)) { - __bad_pmd(pmd); - return NULL; - } - return (pte_t *) pmd_page(*pmd) + address; -} - -/* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -#define pgd_none(pgd) (0) -#define pgd_bad(pgd) (0) -#define pgd_present(pgd) (1) -#define pgd_clear(pgdp) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* to find an entry in a page-table-directory */ -extern __inline__ pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) -{ - return mm->pgd + (address >> PGDIR_SHIFT); -} - -extern __inline__ void free_pgd_slow(pgd_t *pgd) -{ - do { - if (pgd) { /* can pgd be NULL? */ - pmd_t *pmd; - pte_t *pte; - - /* pgd is never none and bad - it is - * detected in the pmd macros. - */ - pmd = pmd_offset(pgd, 0); - if (pmd_none(*pmd)) - break; - if (pmd_bad(*pmd)) { - printk("free_pgd_slow: bad directory entry %08lx\n", pmd_val(*pmd)); - pmd_clear(pmd); - break; - } - - pte = pte_offset(pmd, 0); - pmd_clear(pmd); - pte_free(pte); - pmd_free(pmd); - } - } while (0); - free_pages((unsigned long) pgd, 2); -} - -#define pgd_free(pgd) free_pgd_fast(pgd) - -extern __inline__ pgd_t *pgd_alloc(void) -{ - extern pgd_t *get_pgd_slow(void); - pgd_t *pgd; - - pgd = get_pgd_fast(); - if (!pgd) - pgd = get_pgd_slow(); - - return pgd; -} +extern inline pte_t pte_##fn##(pte_t pte) { pte_val(pte) op##; return pte; } + +/*PTE_BIT_FUNC(rdprotect, &= ~L_PTE_USER);*/ +/*PTE_BIT_FUNC(mkread, |= L_PTE_USER);*/ +PTE_BIT_FUNC(wrprotect, &= ~L_PTE_WRITE); +PTE_BIT_FUNC(mkwrite, |= L_PTE_WRITE); +PTE_BIT_FUNC(exprotect, &= ~L_PTE_EXEC); +PTE_BIT_FUNC(mkexec, |= L_PTE_EXEC); +PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY); +PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY); +PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG); +PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); +PTE_BIT_FUNC(nocache, &= ~L_PTE_CACHEABLE); #endif /* __ASM_PROC_PGTABLE_H */ diff --git a/include/asm-arm/proc-armv/shmparam.h b/include/asm-arm/proc-armv/shmparam.h index 10e280b6d..664b8deaf 100644 --- a/include/asm-arm/proc-armv/shmparam.h +++ b/include/asm-arm/proc-armv/shmparam.h @@ -10,9 +10,7 @@ #ifndef __ASM_PROC_SHMPARAM_H #define __ASM_PROC_SHMPARAM_H -#ifndef SHM_RANGE_START -#define SHM_RANGE_START 0x50000000 -#define SHM_RANGE_END 0x60000000 +#ifndef SHMMAX #define SHMMAX 0x01000000 #endif diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h index 33b98efa1..bac831217 100644 --- a/include/asm-arm/processor.h +++ b/include/asm-arm/processor.h @@ -107,6 +107,16 @@ extern void release_thread(struct task_struct *); #define release_segments(mm) do { } while (0) #define forget_segments() do { } while (0) +unsigned long get_wchan(struct task_struct *p); + +#ifdef CONFIG_CPU_26 +# define KSTK_EIP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)))[1022]) +# define KSTK_ESP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)))[1020]) +#else +# define KSTK_EIP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)))[1021]) +# define KSTK_ESP(tsk) (((unsigned long *)(4096+(unsigned long)(tsk)))[1019]) +#endif + extern struct task_struct *alloc_task_struct(void); extern void free_task_struct(struct task_struct *); diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index de737ee40..2fe6424b8 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -16,6 +16,8 @@ * - when adding fields, don't rely on the address until * a patch from me has been released * - unused fields should be zero (for future expansion) + * - this structure is relatively short-lived - only + * guaranteed to contain useful data in setup_arch() */ #define COMMAND_LINE_SIZE 1024 @@ -60,4 +62,20 @@ struct param_struct { char commandline[COMMAND_LINE_SIZE]; }; +/* + * Memory map description + */ +#define NR_BANKS 4 + +struct meminfo { + int nr_banks; + unsigned long end; + struct { + unsigned long start; + unsigned long size; + } bank[NR_BANKS]; +}; + +extern struct meminfo meminfo; + #endif diff --git a/include/asm-arm/shmparam.h b/include/asm-arm/shmparam.h index 02c9b195f..0b94f747d 100644 --- a/include/asm-arm/shmparam.h +++ b/include/asm-arm/shmparam.h @@ -3,39 +3,6 @@ #include <asm/proc/shmparam.h> -/* - * Format of a swap-entry for shared memory pages currently out in - * swap space (see also mm/swap.c). - * - * SWP_TYPE = SHM_SWP_TYPE - * SWP_OFFSET is used as follows: - * - * bits 0..6 : id of shared memory segment page belongs to (SHM_ID) - * bits 7..21: index of page within shared memory segment (SHM_IDX) - * (actually fewer bits get used since SHMMAX is so low) - */ - -/* - * Keep _SHM_ID_BITS as low as possible since SHMMNI depends on it and - * there is a static array of size SHMMNI. - */ -#define _SHM_ID_BITS 7 -#define SHM_ID_MASK ((1<<_SHM_ID_BITS)-1) - -#define SHM_IDX_SHIFT (_SHM_ID_BITS) -#define _SHM_IDX_BITS 15 -#define SHM_IDX_MASK ((1<<_SHM_IDX_BITS)-1) - -/* - * _SHM_ID_BITS + _SHM_IDX_BITS must be <= 24 on the i386 and - * SHMMAX <= (PAGE_SIZE << _SHM_IDX_BITS). - */ - -#define SHMMIN 1 /* really PAGE_SIZE */ /* min shared seg size (bytes) */ -#define SHMMNI (1<<_SHM_ID_BITS) /* max num of segs system wide */ -#define SHMALL /* max shm system wide (pages) */ \ - (1<<(_SHM_IDX_BITS+_SHM_ID_BITS)) -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ -#define SHMSEG SHMMNI /* max shared segs per process */ +#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ #endif /* _ASMARM_SHMPARAM_H */ diff --git a/include/asm-arm/termios.h b/include/asm-arm/termios.h index df8a343b0..1ccc31eb7 100644 --- a/include/asm-arm/termios.h +++ b/include/asm-arm/termios.h @@ -63,6 +63,7 @@ struct termio { #define N_IRDA 11 /* Linux IrDa - http://www.cs.uit.no/~dagb/irda/irda.html */ #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */ #define N_HDLC 13 /* synchronous HDLC */ +#define N_SYNC_PPP 14 #ifdef __KERNEL__ |