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-rw-r--r--include/asm-mips64/pgtable.h12
1 files changed, 10 insertions, 2 deletions
diff --git a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h
index b0c97ced1..867e78041 100644
--- a/include/asm-mips64/pgtable.h
+++ b/include/asm-mips64/pgtable.h
@@ -32,14 +32,12 @@ extern void (*_flush_cache_mm)(struct mm_struct *mm);
extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
unsigned long end);
extern void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
-extern void (*_flush_cache_sigtramp)(unsigned long addr);
extern void (*_flush_page_to_ram)(struct page * page);
#define flush_cache_all() _flush_cache_all()
#define flush_cache_mm(mm) _flush_cache_mm(mm)
#define flush_cache_range(mm,start,end) _flush_cache_range(mm,start,end)
#define flush_cache_page(vma,page) _flush_cache_page(vma, page)
-#define flush_cache_sigtramp(addr) _flush_cache_sigtramp(addr)
#define flush_page_to_ram(page) _flush_page_to_ram(page)
#define flush_icache_range(start, end) flush_cache_all()
@@ -52,6 +50,16 @@ do { \
} while (0)
/*
+ * The foll cache flushing routines are MIPS specific.
+ * flush_cache_l2 is needed only during initialization.
+ */
+extern void (*_flush_cache_sigtramp)(unsigned long addr);
+extern void (*_flush_cache_l2)(void);
+
+#define flush_cache_sigtramp(addr) _flush_cache_sigtramp(addr)
+#define flush_cache_l2() _flush_cache_l2()
+
+/*
* Each address space has 2 4K pages as its page directory, giving 1024
* (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
* pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to