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-rw-r--r--include/asm-mips/asm.h6
-rw-r--r--include/asm-mips/atomic.h10
-rw-r--r--include/asm-mips/bitops.h4
-rw-r--r--include/asm-mips/isadep.h12
-rw-r--r--include/asm-mips/pgtable.h5
-rw-r--r--include/asm-mips/semaphore-helper.h4
-rw-r--r--include/asm-mips/semaphore.h5
-rw-r--r--include/asm-mips/softirq.h6
-rw-r--r--include/asm-mips/stackframe.h5
-rw-r--r--include/asm-mips/string.h6
-rw-r--r--include/asm-mips/system.h7
-rw-r--r--include/asm-mips/wbflush.h6
12 files changed, 39 insertions, 37 deletions
diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h
index cd4dcf284..5f3ca01e2 100644
--- a/include/asm-mips/asm.h
+++ b/include/asm-mips/asm.h
@@ -151,17 +151,17 @@ symbol = value
/*
* MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
*/
-#if _MIPS_ISA == _MIPS_ISA_MIPS1
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
#define MOVN(rd,rs,rt) \
.set push; \
- .set reorder; \
+ .set noreorder; \
beqz rt,9f; \
move rd,rs; \
.set pop; \
9:
#define MOVZ(rd,rs,rt) \
.set push; \
- .set reorder; \
+ .set noreorder; \
bnez rt,9f; \
move rd,rt; \
.set pop; \
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 58e095a53..a38920e51 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -11,12 +11,12 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: atomic.h,v 1.5 1998/03/04 09:51:21 ralf Exp $
+ * $Id: atomic.h,v 1.6 1999/07/26 19:42:42 harald Exp $
*/
#ifndef __ASM_MIPS_ATOMIC_H
#define __ASM_MIPS_ATOMIC_H
-#include <asm/sgidefs.h>
+#include <linux/config.h>
#ifdef __SMP__
typedef struct { volatile int counter; } atomic_t;
@@ -30,7 +30,7 @@ typedef struct { int counter; } atomic_t;
#define atomic_read(v) ((v)->counter)
#define atomic_set(v,i) ((v)->counter = (i))
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if !defined(CONFIG_CPU_HAS_LLSC)
#include <asm/system.h>
@@ -101,10 +101,8 @@ extern __inline__ void atomic_clear_mask(unsigned long mask, unsigned long * v)
return;
}
-#endif
+#else
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
/*
* ... while for MIPS II and better we can use ll/sc instruction. This
* implementation is SMP safe ...
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 55e9940ec..0c580f128 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -17,6 +17,7 @@
#include <asm/sgidefs.h>
#include <asm/system.h>
+#include <linux/config.h>
/*
* Only disable interrupt for kernel mode stuff to keep usermode stuff
@@ -52,8 +53,7 @@ extern __inline__ int find_first_zero_bit (void *addr, unsigned size);
extern __inline__ int find_next_zero_bit (void * addr, int size, int offset);
extern __inline__ unsigned long ffz(unsigned long word);
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if defined(CONFIG_CPU_HAS_LLSC)
/*
* These functions for MIPS ISA > 1 are interrupt and SMP proof and
diff --git a/include/asm-mips/isadep.h b/include/asm-mips/isadep.h
index c3753dab0..16d07ccab 100644
--- a/include/asm-mips/isadep.h
+++ b/include/asm-mips/isadep.h
@@ -5,14 +5,14 @@
*
* Copyright (c) 1998 Harald Koerfgen
*
- * $Id: $
+ * $Id: isadep.h,v 1.1 1999/07/26 19:46:00 harald Exp $
*/
-#include <asm/sgidefs.h>
+#include <linux/config.h>
#ifndef __ASM_MIPS_ISADEP_H
#define __ASM_MIPS_ISADEP_H
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if defined(CONFIG_CPU_R3000)
/*
* R2000 or R3000
*/
@@ -26,16 +26,12 @@
#else
/*
- * R6000 or higher
- */
-
-/*
* kernel or user mode?
*/
#define KU_MASK 0x18
#define KU_USER 0x10
#define KU_KERN 0x00
-#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS1) */
+#endif
#endif /* __ASM_MIPS_ISADEP_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 4413ea45d..fd0860ca1 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -1,4 +1,4 @@
-/* $Id: pgtable.h,v 1.20 1999/07/22 01:58:28 ralf Exp $
+/* $Id: pgtable.h,v 1.22 1999/08/09 19:43:17 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -16,6 +16,7 @@
#include <linux/linkage.h>
#include <asm/cachectl.h>
+#include <linux/config.h>
/* Cache flushing:
*
@@ -111,7 +112,7 @@ extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
#define _PAGE_ACCESSED (1<<3) /* implemented in software */
#define _PAGE_MODIFIED (1<<4) /* implemented in software */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if defined(CONFIG_CPU_R3000)
#define _PAGE_GLOBAL (1<<8)
#define _PAGE_VALID (1<<9)
diff --git a/include/asm-mips/semaphore-helper.h b/include/asm-mips/semaphore-helper.h
index f80be5b9d..0517a1de9 100644
--- a/include/asm-mips/semaphore-helper.h
+++ b/include/asm-mips/semaphore-helper.h
@@ -9,6 +9,8 @@
#ifndef __ASM_MIPS_SEMAPHORE_HELPER_H
#define __ASM_MIPS_SEMAPHORE_HELPER_H
+#include <linux/config.h>
+
/*
* These two _must_ execute atomically wrt each other.
*/
@@ -17,7 +19,7 @@ static inline void wake_one_more(struct semaphore * sem)
atomic_inc(&sem->waking);
}
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if !defined(CONFIG_CPU_HAS_LLSC)
/*
* It doesn't make sense, IMHO, to endlessly turn interrupts off and on again.
diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h
index c6486fe5b..789c797f0 100644
--- a/include/asm-mips/semaphore.h
+++ b/include/asm-mips/semaphore.h
@@ -1,4 +1,4 @@
-/* $Id: semaphore.h,v 1.7 1999/06/22 22:12:59 tsbogend Exp $
+/* $Id: semaphore.h,v 1.8 1999/07/26 19:42:44 harald Exp $
*
* SMP- and interrupt-safe semaphores..
*
@@ -16,6 +16,7 @@
#include <asm/atomic.h>
#include <asm/spinlock.h>
#include <linux/wait.h>
+#include <linux/config.h>
struct semaphore {
atomic_t count;
@@ -92,7 +93,7 @@ extern inline int down_interruptible(struct semaphore * sem)
return ret;
}
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if !defined(CONFIG_CPU_HAS_LLSC)
extern inline int down_trylock(struct semaphore * sem)
{
diff --git a/include/asm-mips/softirq.h b/include/asm-mips/softirq.h
index 1e5f4a754..2b3055ea1 100644
--- a/include/asm-mips/softirq.h
+++ b/include/asm-mips/softirq.h
@@ -1,4 +1,4 @@
-/* $Id: softirq.h,v 1.6 1999/06/17 13:30:38 ralf Exp $
+/* $Id: softirq.h,v 1.7 1999/07/26 19:42:44 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -9,6 +9,8 @@
#ifndef __ASM_MIPS_SOFTIRQ_H
#define __ASM_MIPS_SOFTIRQ_H
+#include <linux/config.h>
+
/* The locking mechanism for base handlers, to prevent re-entrancy,
* is entirely private to an implementation, it should not be
* referenced at all outside of this file.
@@ -28,7 +30,7 @@ extern unsigned int local_bh_count[NR_CPUS];
#define get_active_bhs() (bh_mask & bh_active)
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if defined(CONFIG_CPU_R3000)
#define clear_active_bhs(x) atomic_clear_mask((x),&bh_active)
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 68c8eabb6..1c02b93d9 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -3,13 +3,14 @@
*
* Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Paul M. Antoine.
*
- * $Id: stackframe.h,v 1.8 1999/05/01 10:08:19 harald Exp $
+ * $Id: stackframe.h,v 1.9 1999/07/26 19:42:44 harald Exp $
*/
#ifndef __ASM_MIPS_STACKFRAME_H
#define __ASM_MIPS_STACKFRAME_H
#include <asm/asm.h>
#include <asm/offset.h>
+#include <linux/config.h>
#define SAVE_AT \
sw $1, PT_R1(sp)
@@ -128,7 +129,7 @@
lw $23, PT_R23(sp); \
lw $30, PT_R30(sp)
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if defined(CONFIG_CPU_R3000)
#define RESTORE_SOME \
.set push; \
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 2ca7e93e8..502822d0e 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -1,4 +1,4 @@
-/* $Id: string.h,v 1.9 1998/08/25 09:22:02 ralf Exp $
+/* $Id: string.h,v 1.10 1999/04/11 18:37:56 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -9,6 +9,8 @@
#ifndef __ASM_MIPS_STRING_H
#define __ASM_MIPS_STRING_H
+#include <linux/config.h>
+
#define __HAVE_ARCH_STRCPY
extern __inline__ char *strcpy(char *__dest, __const__ char *__src)
{
@@ -74,7 +76,7 @@ extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
"addiu\t%1,1\n\t"
"bnez\t%2,1b\n\t"
"lbu\t%2,(%0)\n\t"
-#if _MIPS_ISA == _MIPS_ISA_MIPS1
+#if defined(CONFIG_CPU_R3000)
"nop\n\t"
#endif
"move\t%2,$1\n"
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index ee2ebc438..5dff91cd7 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -1,4 +1,4 @@
-/* $Id: system.h,v 1.8 1999/02/15 02:22:13 ralf Exp $
+/* $Id: system.h,v 1.14 1999/08/09 19:43:18 harald Exp $
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -10,7 +10,7 @@
#ifndef __ASM_MIPS_SYSTEM_H
#define __ASM_MIPS_SYSTEM_H
-#include <asm/sgidefs.h>
+#include <linux/config.h>
#include <linux/kernel.h>
extern __inline__ void
@@ -159,8 +159,7 @@ do { \
*/
extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
{
-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5)
+#if defined(CONFIG_CPU_HAS_LLSC)
unsigned long dummy;
__asm__ __volatile__(
diff --git a/include/asm-mips/wbflush.h b/include/asm-mips/wbflush.h
index 81c581a2f..3a0b8b8b3 100644
--- a/include/asm-mips/wbflush.h
+++ b/include/asm-mips/wbflush.h
@@ -7,14 +7,14 @@
*
* Copyright (c) 1998 Harald Koerfgen
*
- * $Id: $
+ * $Id: wbflush.h,v 1.1 1999/07/26 19:46:00 harald Exp $
*/
#ifndef __ASM_MIPS_WBFLUSH_H
#define __ASM_MIPS_WBFLUSH_H
-#include <asm/sgidefs.h>
+#include <linux/config.h>
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
+#if defined(CONFIG_CPU_HAS_WB)
/*
* R2000 or R3000
*/
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-19 21:15:25 +0000