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-rw-r--r--include/asm-mips/bootinfo.h36
-rw-r--r--include/asm-mips/bugs.h2
-rw-r--r--include/asm-mips/byteorder.h2
-rw-r--r--include/asm-mips/checksum.h9
-rw-r--r--include/asm-mips/fcntl.h2
-rw-r--r--include/asm-mips/floppy.h45
-rw-r--r--include/asm-mips/io.h36
-rw-r--r--include/asm-mips/ioctls.h4
-rw-r--r--include/asm-mips/jazz.h2
-rw-r--r--include/asm-mips/jazzdma.h1
-rw-r--r--include/asm-mips/mipsconfig.h11
-rw-r--r--include/asm-mips/mipsregs.h20
-rw-r--r--include/asm-mips/namei.h3
-rw-r--r--include/asm-mips/pci.h59
-rw-r--r--include/asm-mips/pgtable.h7
-rw-r--r--include/asm-mips/posix_types.h1
-rw-r--r--include/asm-mips/processor.h19
-rw-r--r--include/asm-mips/r4kcache.h47
-rw-r--r--include/asm-mips/sigcontext.h8
-rw-r--r--include/asm-mips/signal.h2
-rw-r--r--include/asm-mips/string.h2
-rw-r--r--include/asm-mips/system.h9
-rw-r--r--include/asm-mips/termbits.h2
-rw-r--r--include/asm-mips/uaccess.h14
-rw-r--r--include/asm-mips/watch.h7
25 files changed, 197 insertions, 153 deletions
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index 4d8c0e171..d20831322 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -8,7 +8,7 @@
* License. See the file COPYING in the main directory of this archive
* for more details.
*
- * $Id:$
+ * $Id: bootinfo.h,v 1.3 1997/09/19 08:37:44 ralf Exp $
*/
#ifndef __ASM_MIPS_BOOTINFO_H
#define __ASM_MIPS_BOOTINFO_H
@@ -16,29 +16,6 @@
/* XXX */
#include <linux/config.h>
-#if 0
-/*
- * Valid machtype values
- * FIXME: note that we really need a hierarchy for this stuff, as there are
- * several models of DECStation (for example). PMA
- */
-#define MACH_UNKNOWN 0 /* whatever... */
-#define MACH_DESKSTATION_RPC44 1 /* Deskstation rPC44 */
-#define MACH_DESKSTATION_TYNE 2 /* Deskstation Tyne */
-#define MACH_ACER_PICA_61 3 /* Acer PICA-61 (PICA1) */
-#define MACH_MIPS_MAGNUM_4000 4 /* Mips Magnum 4000 "RC4030" */
-#define MACH_OLIVETTI_M700 4 /* almost a clone ... */
-#define MACH_DECSTATION 5 /* DECStation 5000/2x for now */
-#define MACH_SNI_RM200_PCI 6 /* RM200/RM300/RM400 PCI series */
-#define MACH_SGI_INDY 7 /* R4?K and R5K Indy workstaions */
-#define MACH_RESERVED 8 /* Erlkoenig ... */
-#define MACH_LAST 8
-
-#define MACH_NAMES {"unknown", "Deskstation rPC44", "Deskstation Tyne", \
- "Acer PICA 61", "Mips Magnum 4000", "DECStation", "RM200 PCI", \
- "SGI INDY" }
-#endif
-
/*
* Values for machgroup
*/
@@ -49,10 +26,10 @@
#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */
#define MACH_GROUP_ACN 5
#define MACH_GROUP_SGI 6 /* Silicon Graphics workstations and servers */
-#define MACH_GROUP_RESERVED 7 /* Erlkoenig ... */
+#define MACH_GROUP_RESERVED 7 /* No Such Architecture */
#define GROUP_NAMES { "unknown", "Jazz", "Digital", "ARC", \
- "SNI", "ACN", "You'd like to know" }
+ "SNI", "ACN", "SGI", "NSA" }
/*
* Valid machtype values for group unknown (low order halfword of mips_machtype)
@@ -106,12 +83,7 @@
*/
#define MACH_SGI_INDY 0 /* R4?K and R5K Indy workstaions */
-/*
- * Valid machtype for group RESERVED
- */
-#define MACH_RESERVED 0 /* Proto "27" hardware */
-
-#define GROUP_RESERVED { "You'd like to know" }
+#define GROUP_SGI_NAMES { "Indy" }
/*
* Valid cputype values
diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
index 15fe291f4..5c04e9bf0 100644
--- a/include/asm-mips/bugs.h
+++ b/include/asm-mips/bugs.h
@@ -4,7 +4,7 @@
* Copyright (C) 1995 Waldorf Electronics
* Copyright (C) 1997 Ralf Baechle
*
- * $Id:$
+ * $Id: bugs.h,v 1.2 1997/09/07 04:13:53 ralf Exp $
*/
#include <asm/bootinfo.h>
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h
index 00e85aedf..9cec1a26a 100644
--- a/include/asm-mips/byteorder.h
+++ b/include/asm-mips/byteorder.h
@@ -7,7 +7,7 @@
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*
- * $Id: byteorder.h,v 1.3 1997/06/25 20:51:39 ralf Exp $
+ * $Id: byteorder.h,v 1.4 1997/07/15 01:56:32 ralf Exp $
*/
#ifndef __ASM_MIPS_BYTEORDER_H
#define __ASM_MIPS_BYTEORDER_H
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index 01dbbb986..b3bfcae7c 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -5,9 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
- *
- * $Id:$
+ * Copyright (C) 1995 by Ralf Baechle
*/
#ifndef __ASM_MIPS_CHECKSUM_H
#define __ASM_MIPS_CHECKSUM_H
@@ -167,10 +165,7 @@ static inline unsigned short int csum_tcpudp_magic(unsigned long saddr,
*/
static inline unsigned short ip_compute_csum(unsigned char * buff, int len)
{
- unsigned int sum;
-
- sum = csum_partial(buff, len, 0);
- return csum_fold(sum);
+ return csum_fold(csum_partial(buff, len, 0));
}
#define _HAVE_ARCH_IPV6_CSUM
diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h
index 2a41473ba..3606b252a 100644
--- a/include/asm-mips/fcntl.h
+++ b/include/asm-mips/fcntl.h
@@ -23,9 +23,9 @@
#define F_SETFD 2 /* set f_flags */
#define F_GETFL 3 /* more flags (cloexec) */
#define F_SETFL 4
+#define F_GETLK 14
#define F_SETLK 6
#define F_SETLKW 7
-#define F_GETLK 14
#define F_SETOWN 24 /* for sockets. */
#define F_GETOWN 23 /* for sockets. */
diff --git a/include/asm-mips/floppy.h b/include/asm-mips/floppy.h
index 412057a0b..d047a68dd 100644
--- a/include/asm-mips/floppy.h
+++ b/include/asm-mips/floppy.h
@@ -5,9 +5,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995
+ * Copyright (C) 1995, 1996, 1997 Ralf Baechle
*
- * $Id:$
+ * $Id: floppy.h,v 1.3 1997/09/07 03:59:02 ralf Exp $
*/
#ifndef __ASM_MIPS_FLOPPY_H
#define __ASM_MIPS_FLOPPY_H
@@ -22,26 +22,29 @@
#define fd_inb(port) feature->fd_inb(port)
#define fd_outb(value,port) feature->fd_outb(value,port)
-#define fd_enable_dma() feature->fd_enable_dma()
-#define fd_disable_dma() feature->fd_disable_dma()
-#define fd_request_dma() feature->fd_request_dma()
-#define fd_free_dma() feature->fd_free_dma()
-#define fd_clear_dma_ff() feature->fd_clear_dma_ff()
-#define fd_set_dma_mode(mode) feature->fd_set_dma_mode(mode)
-#define fd_set_dma_addr(addr) feature->fd_set_dma_addr(virt_to_bus(addr))
-#define fd_set_dma_count(count) feature->fd_set_dma_count(count)
-#define fd_get_dma_residue() feature->fd_get_dma_residue()
-#define fd_enable_irq() feature->fd_enable_irq()
-#define fd_disable_irq() feature->fd_disable_irq()
-#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT|SA_SAMPLE_RANDOM, \
- "floppy", NULL)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
+#define fd_enable_dma(channel) feature->fd_enable_dma(channel)
+#define fd_disable_dma(channel) feature->fd_disable_dma(channel)
+#define fd_request_dma(channel) feature->fd_request_dma(channel)
+#define fd_free_dma(channel) feature->fd_free_dma(channel)
+#define fd_clear_dma_ff(channel) feature->fd_clear_dma_ff(channel)
+#define fd_set_dma_mode(channel, mode) feature->fd_set_dma_mode(channel, mode)
+#define fd_set_dma_addr(channel, addr) feature->fd_set_dma_addr(channel, \
+ virt_to_bus(addr))
+#define fd_set_dma_count(channel,count) feature->fd_set_dma_count(channel,count)
+#define fd_get_dma_residue(channel) feature->fd_get_dma_residue(channel)
+
+#define fd_enable_irq(irq) feature->fd_enable_irq(irq)
+#define fd_disable_irq(irq) feature->fd_disable_irq(irq)
+#define fd_request_irq(irq) request_irq(irq, floppy_interrupt, \
+ SA_INTERRUPT \
+ | SA_SAMPLE_RANDOM, \
+ "floppy", NULL)
+#define fd_free_irq(irq) free_irq(irq, NULL);
#define MAX_BUFFER_SECTORS 24
/* Pure 2^n version of get_order */
-extern __inline__ int __get_order(unsigned long size)
+extern inline int __get_order(unsigned long size)
{
int order;
@@ -54,7 +57,7 @@ extern __inline__ int __get_order(unsigned long size)
return order;
}
-extern __inline__ unsigned long mips_dma_mem_alloc(unsigned long size)
+extern inline unsigned long mips_dma_mem_alloc(unsigned long size)
{
int order = __get_order(size);
unsigned long mem;
@@ -69,11 +72,11 @@ extern __inline__ unsigned long mips_dma_mem_alloc(unsigned long size)
return mem;
}
-extern __inline__ void mips_dma_mem_free(unsigned long addr, unsigned long size)
+extern inline void mips_dma_mem_free(unsigned long addr, unsigned long size)
{
#ifdef CONFIG_MIPS_JAZZ
if (mips_machgroup == MACH_GROUP_JAZZ)
- vdma_free(vdma_phys2log(PHYSADDR(addr)));
+ vdma_free(PHYSADDR(addr));
#endif
free_pages(addr, __get_order(size));
}
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index be0d068a4..09e3dad1e 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -32,6 +32,16 @@
*/
/*
+ * On MIPS I/O ports are memory mapped, so we access them using normal
+ * load/store instructions. mips_io_port_base is the virtual address to
+ * which all ports are being mapped. For sake of efficiency some code
+ * assumes that this is an address that can be loaded with a single lui
+ * instruction, so the lower 16 bits must be zero. Should be true on
+ * on any sane architecture; generic code does not use this assumption.
+ */
+extern unsigned long mips_io_port_base;
+
+/*
* Thanks to James van Artsdalen for a better timing-fix than
* the two short jumps: using outb's to a nonexistent port seems
* to guarantee better timings even on fast machines.
@@ -46,7 +56,7 @@
#define __SLOW_DOWN_IO \
__asm__ __volatile__( \
"sb\t$0,0x80(%0)" \
- : : "r" (PORT_BASE));
+ : : "r" (mips_io_port_base));
#ifdef CONF_SLOWDOWN_IO
#ifdef REALLY_SLOW_IO
@@ -176,11 +186,11 @@ extern inline void __out##s(unsigned int value, unsigned int port) {
__asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
#define __OUT(m,s) \
-__OUT1(s) __OUT2(m) : : "r" (value), "i" (0), "r" (PORT_BASE+port)); } \
-__OUT1(s##c) __OUT2(m) : : "r" (value), "ir" (port), "r" (PORT_BASE)); } \
-__OUT1(s##_p) __OUT2(m) : : "r" (value), "i" (0), "r" (PORT_BASE+port)); \
+__OUT1(s) __OUT2(m) : : "r" (value), "i" (0), "r" (mips_io_port_base+port)); } \
+__OUT1(s##c) __OUT2(m) : : "r" (value), "ir" (port), "r" (mips_io_port_base)); } \
+__OUT1(s##_p) __OUT2(m) : : "r" (value), "i" (0), "r" (mips_io_port_base+port)); \
SLOW_DOWN_IO; } \
-__OUT1(s##c_p) __OUT2(m) : : "r" (value), "ir" (port), "r" (PORT_BASE)); \
+__OUT1(s##c_p) __OUT2(m) : : "r" (value), "ir" (port), "r" (mips_io_port_base)); \
SLOW_DOWN_IO; }
#define __IN1(t,s) \
@@ -193,10 +203,10 @@ extern __inline__ t __in##s(unsigned int port) { t _v;
__asm__ __volatile__ ("l" #m "\t%0,%1(%2)"
#define __IN(t,m,s) \
-__IN1(t,s) __IN2(m) : "=r" (_v) : "i" (0), "r" (PORT_BASE+port)); return _v; } \
-__IN1(t,s##c) __IN2(m) : "=r" (_v) : "ir" (port), "r" (PORT_BASE)); return _v; } \
-__IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i" (0), "r" (PORT_BASE+port)); SLOW_DOWN_IO; return _v; } \
-__IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (PORT_BASE)); SLOW_DOWN_IO; return _v; }
+__IN1(t,s) __IN2(m) : "=r" (_v) : "i" (0), "r" (mips_io_port_base+port)); return _v; } \
+__IN1(t,s##c) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); return _v; } \
+__IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i" (0), "r" (mips_io_port_base+port)); SLOW_DOWN_IO; return _v; } \
+__IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return _v; }
#define __INS1(s) \
extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
@@ -217,11 +227,11 @@ __asm__ __volatile__ ( \
#define __INS(m,s,i) \
__INS1(s) __INS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "i" (0), "r" (PORT_BASE+port), "I" (i) \
+ : "0" (addr), "1" (count), "i" (0), "r" (mips_io_port_base+port), "I" (i) \
: "$1");} \
__INS1(s##c) __INS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "ir" (port), "r" (PORT_BASE), "I" (i) \
+ : "0" (addr), "1" (count), "ir" (port), "r" (mips_io_port_base), "I" (i) \
: "$1");}
#define __OUTS1(s) \
@@ -243,11 +253,11 @@ __asm__ __volatile__ ( \
#define __OUTS(m,s,i) \
__OUTS1(s) __OUTS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "i" (0), "r" (PORT_BASE+port), "I" (i) \
+ : "0" (addr), "1" (count), "i" (0), "r" (mips_io_port_base+port), "I" (i) \
: "$1");} \
__OUTS1(s##c) __OUTS2(m) \
: "=r" (addr), "=r" (count) \
- : "0" (addr), "1" (count), "ir" (port), "r" (PORT_BASE), "I" (i) \
+ : "0" (addr), "1" (count), "ir" (port), "r" (mips_io_port_base), "I" (i) \
: "$1");}
__IN(unsigned char,b,b)
diff --git a/include/asm-mips/ioctls.h b/include/asm-mips/ioctls.h
index d2813722f..5648eae7f 100644
--- a/include/asm-mips/ioctls.h
+++ b/include/asm-mips/ioctls.h
@@ -110,9 +110,5 @@
#define TIOCSERSETMULTI 0x5490 /* Set multiport config */
#define TIOCMIWAIT 0x5491 /* wait for a change on serial input line(s) */
#define TIOCGICOUNT 0x5492 /* read serial port inline interrupt counts */
-#if 0
-#define TIOCSBRK 0x5491 /* BSD compatibility */
-#define TIOCCBRK 0x5492 /* BSD compatibility */
-#endif
#endif /* __ASM_MIPS_IOCTLS_H */
diff --git a/include/asm-mips/jazz.h b/include/asm-mips/jazz.h
index 14384ba65..c05a5f23d 100644
--- a/include/asm-mips/jazz.h
+++ b/include/asm-mips/jazz.h
@@ -8,6 +8,8 @@
* Copyright (C) 1995 by Andreas Busse and Ralf Baechle
*
* This file is a mess. It really needs some reorganisation!
+ *
+ * $Id:$
*/
#ifndef __ASM_MIPS_JAZZ_H
#define __ASM_MIPS_JAZZ_H
diff --git a/include/asm-mips/jazzdma.h b/include/asm-mips/jazzdma.h
index a8e6f11d5..6519a1cef 100644
--- a/include/asm-mips/jazzdma.h
+++ b/include/asm-mips/jazzdma.h
@@ -21,7 +21,6 @@ void vdma_set_mode(int channel, int mode);
void vdma_set_addr(int channel, long addr);
void vdma_set_count(int channel, int count);
int vdma_get_residue(int channel);
-int vdma_get_enable(int channel);
/*
* some definitions used by the driver functions
diff --git a/include/asm-mips/mipsconfig.h b/include/asm-mips/mipsconfig.h
index bb9907bc1..28d608c07 100644
--- a/include/asm-mips/mipsconfig.h
+++ b/include/asm-mips/mipsconfig.h
@@ -10,17 +10,6 @@
#ifndef __ASM_MIPS_MIPSCONFIG_H
#define __ASM_MIPS_MIPSCONFIG_H
-/*
- * This is the virtual address to which all ports are being mapped.
- * Must be a value that can be load with a lui instruction.
- */
-#ifndef PORT_BASE
-#if !defined (__LANGUAGE_ASSEMBLY__)
-extern unsigned long port_base;
-#endif
-#define PORT_BASE port_base
-#endif
-
/* Pgdir is 1 page mapped at 0xff800000. */
#define TLBMAP 0xff800000
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 0dcd71a44..2a563efb9 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -8,7 +8,7 @@
* Copyright (C) 1994, 1995, 1996, 1997 by Ralf Baechle
* Modified for further R[236]000 support by Paul M. Antoine, 1996.
*
- * $Id: mipsregs.h,v 1.2 1997/09/12 22:25:34 ralf Exp $
+ * $Id: mipsregs.h,v 1.4 1997/09/20 19:02:46 root Exp $
*/
#ifndef __ASM_MIPS_MIPSREGS_H
#define __ASM_MIPS_MIPSREGS_H
@@ -254,6 +254,22 @@ __BUILD_SET_CP0(config,CP0_CONFIG)
* Status register bits available in all MIPS CPUs.
*/
#define ST0_IM 0x0000ff00
+#define STATUSB_IP0 8
+#define STATUSF_IP0 (1 << 8)
+#define STATUSB_IP1 9
+#define STATUSF_IP1 (1 << 9)
+#define STATUSB_IP2 10
+#define STATUSF_IP2 (1 << 10)
+#define STATUSB_IP3 11
+#define STATUSF_IP3 (1 << 11)
+#define STATUSB_IP4 12
+#define STATUSF_IP4 (1 << 12)
+#define STATUSB_IP5 13
+#define STATUSF_IP5 (1 << 13)
+#define STATUSB_IP6 14
+#define STATUSF_IP6 (1 << 14)
+#define STATUSB_IP7 15
+#define STATUSF_IP7 (1 << 15)
#define ST0_DE 0x00010000
#define ST0_CE 0x00020000
#define ST0_CH 0x00040000
@@ -293,6 +309,8 @@ __BUILD_SET_CP0(config,CP0_CONFIG)
#define CAUSEF_IP6 (1 << 14)
#define CAUSEB_IP7 15
#define CAUSEF_IP7 (1 << 15)
+#define CAUSEB_IV 23
+#define CAUSEF_IV (1 << 23)
#define CAUSEB_CE 28
#define CAUSEF_CE (3 << 28)
#define CAUSEB_BD 31
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index 56dd5c690..eb895b003 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -2,6 +2,8 @@
* linux/include/asm-mips/namei.h
*
* Included from linux/fs/namei.c
+ *
+ * $Id: namei.h,v 1.6 1997/09/18 07:59:31 root Exp $
*/
#ifndef __ASM_MIPS_NAMEI_H
#define __ASM_MIPS_NAMEI_H
@@ -14,7 +16,6 @@
static inline struct dentry *
__mips_lookup_dentry(const char *name, int follow_link)
{
- int error;
struct dentry *base;
if (current->personality != PER_IRIX32)
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index a506e4bb2..3d48c2ca3 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -4,36 +4,41 @@
* for more details.
*
* Declarations for the MIPS specific implementation of the PCI BIOS32 services.
+ *
+ * $Id: pci.h,v 1.2 1997/09/20 21:16:37 ralf Exp $
*/
#ifndef __ASM_MIPS_PCI_H
#define __ASM_MIPS_PCI_H
-extern unsigned long (*_pcibios_init)(unsigned long memory_start, unsigned long memory_end);
-extern unsigned long (*_pcibios_fixup) (unsigned long memory_start,
- unsigned long memory_end);
-extern int (*_pcibios_read_config_byte) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned char *val);
-extern int (*_pcibios_read_config_word) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned short *val);
-extern int (*_pcibios_read_config_dword) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned int *val);
-extern int (*_pcibios_write_config_byte) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned char val);
-extern int (*_pcibios_write_config_word) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned short val);
-extern int (*_pcibios_write_config_dword) (unsigned char bus,
- unsigned char dev_fn,
- unsigned char where,
- unsigned int val);
+struct pci_ops {
+ unsigned long (*pcibios_fixup) (unsigned long memory_start,
+ unsigned long memory_end);
+ int (*pcibios_read_config_byte) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned char *val);
+ int (*pcibios_read_config_word) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned short *val);
+ int (*pcibios_read_config_dword) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned int *val);
+ int (*pcibios_write_config_byte) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned char val);
+ int (*pcibios_write_config_word) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned short val);
+ int (*pcibios_write_config_dword) (unsigned char bus,
+ unsigned char dev_fn,
+ unsigned char where,
+ unsigned int val);
+};
+
+extern struct pci_ops *pci_ops;
#endif /* __ASM_MIPS_PCI_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index c0b3a4d86..99f95a346 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -16,7 +16,6 @@
* - flush_cache_page(mm, vmaddr) flushes a single page
* - flush_cache_range(mm, start, end) flushes a range of pages
* - flush_page_to_ram(page) write back kernel page to ram
- *
*/
extern void (*flush_cache_all)(void);
extern void (*flush_cache_mm)(struct mm_struct *mm);
@@ -27,6 +26,12 @@ extern void (*flush_cache_sigtramp)(unsigned long addr);
extern void (*flush_page_to_ram)(unsigned long page);
#define flush_icache_range(start, end) flush_cache_all()
+/*
+ * Prototype of the DMA related cacheflushing stuff.
+ */
+extern void (*flush_cache_pre_dma_out)(unsigned long start, unsigned long size);
+extern void (*flush_cache_post_dma_in)(unsigned long start, unsigned long size);
+
/* TLB flushing:
*
* - flush_tlb_all() flushes all processes TLB entries
diff --git a/include/asm-mips/posix_types.h b/include/asm-mips/posix_types.h
index 21217ebae..ae9e5d14c 100644
--- a/include/asm-mips/posix_types.h
+++ b/include/asm-mips/posix_types.h
@@ -36,7 +36,6 @@ typedef long __kernel_time_t;
typedef long __kernel_clock_t;
typedef long __kernel_daddr_t;
typedef char * __kernel_caddr_t;
-typedef unsigned long __kernel_sigset_t;
#ifdef __GNUC__
typedef long long __kernel_loff_t;
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index c4c0e849b..e0d9ad387 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -4,6 +4,8 @@
* Copyright (C) 1994 Waldorf Electronics
* written by Ralf Baechle
* Modified further for R[236]000 compatibility by Paul M. Antoine
+ *
+ * $Id: processor.h,v 1.5 1997/12/01 16:48:39 ralf Exp $
*/
#ifndef __ASM_MIPS_PROCESSOR_H
#define __ASM_MIPS_PROCESSOR_H
@@ -15,9 +17,11 @@
#include <asm/system.h>
/*
- * System setup and hardware bug flags..
+ * System setup and hardware flags..
*/
extern char wait_available; /* only available on R4[26]00 */
+extern char cyclecounter_available; /* only available from R4000 upwards. */
+extern char dedicated_iv_available; /* some embedded MIPS like Nevada */
/*
* Bus types (default is ISA, but people can check others with these..)
@@ -128,7 +132,7 @@ struct thread_struct {
/* \
* Other stuff associated with the process \
*/ \
- 0, 0, 0, (unsigned long)&init_task_union + KERNEL_STACK_SIZE - 8, \
+ 0, 0, 0, (unsigned long)&init_task_union + KERNEL_STACK_SIZE - 32, \
(unsigned long) swapper_pg_dir, \
/* \
* For now the default is to fix address errors \
@@ -150,7 +154,13 @@ extern void release_thread(struct task_struct *);
*/
extern inline unsigned long thread_saved_pc(struct thread_struct *t)
{
- return ((struct pt_regs *)(long)t->reg29)->cp0_epc;
+ extern void ret_from_sys_call(void);
+
+ /* New born processes are a special case */
+ if (t->reg31 == (unsigned long) ret_from_sys_call)
+ return t->reg31;
+
+ return ((unsigned long*)t->reg29)[17];
}
/*
@@ -161,7 +171,8 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long
/*
* Does the process account for user or for system time?
*/
-#define USES_USER_TIME(regs) (!((regs)->cp0_status & 0x18))
+extern int (*running_in_user_mode)(void);
+#define USES_USER_TIME(regs) running_in_user_mode()
/* Allocation and freeing of basic task resources. */
/*
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 8813b7570..e31e29a6a 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -3,7 +3,9 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
- * $Id: r4kcache.h,v 1.3 1997/09/12 22:25:35 ralf Exp $
+ * $Id: r4kcache.h,v 1.5 1997/12/01 16:47:05 ralf Exp $
+ *
+ * FIXME: Handle split L2 caches.
*/
#ifndef _MIPS_R4KCACHE_H
#define _MIPS_R4KCACHE_H
@@ -76,6 +78,32 @@ extern inline void flush_dcache_line(unsigned long addr)
"i" (Hit_Writeback_Inv_D));
}
+extern inline void invalidate_dcache_line(unsigned long addr)
+{
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".set mips3\n\t"
+ "cache %1, (%0)\n\t"
+ ".set mips0\n\t"
+ ".set reorder"
+ :
+ : "r" (addr),
+ "i" (Hit_Invalidate_D));
+}
+
+extern inline void invalidate_scache_line(unsigned long addr)
+{
+ __asm__ __volatile__(
+ ".set noreorder\n\t"
+ ".set mips3\n\t"
+ "cache %1, (%0)\n\t"
+ ".set mips0\n\t"
+ ".set reorder"
+ :
+ : "r" (addr),
+ "i" (Hit_Invalidate_SD));
+}
+
extern inline void flush_scache_line(unsigned long addr)
{
__asm__ __volatile__(
@@ -372,11 +400,28 @@ extern inline void blast_dcache32(void)
}
}
+/*
+ * Call this function only with interrupts disabled or R4600 V2.0 may blow
+ * you up.
+ *
+ * R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
+ * Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Excl_D will only
+ * operate correctly if the internal data cache refill buffer is empty. These
+ * CACHE instructions should be separated from any potential data cache miss
+ * by a load instruction to an uncached address to empty the response buffer."
+ * (Revision 2.0 device errata from IDT available on http://www.idt.com/
+ * in .pdf format.)
+ */
extern inline void blast_dcache32_page(unsigned long page)
{
unsigned long start = page;
unsigned long end = (start + PAGE_SIZE);
+ /*
+ * Sigh ... workaround for R4600 v1.7 bug. Explanation see above.
+ */
+ *(volatile unsigned long *)KSEG1;
+
__asm__ __volatile__("nop;nop;nop;nop");
while(start < end) {
__asm__ __volatile__("
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index bdd80fd01..97dafc9ca 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -1,5 +1,5 @@
/*
- * include/asm-mips/uaccess.h
+ * include/asm-mips/sigcontext.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -7,13 +7,11 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: sigcontext.h,v 1.2 1997/06/25 20:49:07 ralf Exp $
+ * $Id: sigcontext.h,v 1.4 1997/12/01 16:46:19 ralf Exp $
*/
#ifndef __ASM_MIPS_SIGCONTEXT_H
#define __ASM_MIPS_SIGCONTEXT_H
-#include <linux/posix_types.h>
-
/*
* Keep this struct definition in sync with the sigcontext fragment
* in arch/mips/tools/offset.c
@@ -34,7 +32,7 @@ struct sigcontext {
unsigned int sc_cause; /* Unused */
unsigned int sc_badvaddr; /* Unused */
- __kernel_sigset_t sc_sigset; /* DANGER: kernel vs. libc sigset_t ... */
+ unsigned long sc_sigset; /* kernel's sigset_t */
unsigned long __pad0[3]; /* pad for constant size */
};
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index d7fe49864..7bdf024e5 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -7,7 +7,7 @@
*
* Copyright (C) 1995, 1996, 1997 by Ralf Baechle
*
- * $Id:$
+ * $Id: signal.h,v 1.2 1997/09/07 05:27:50 ralf Exp $
*/
#ifndef __ASM_MIPS_SIGNAL_H
#define __ASM_MIPS_SIGNAL_H
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index bc9007010..dc0ebed3f 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -7,7 +7,7 @@
*
* Copyright (c) 1994, 1995, 1996, 1997 by Ralf Baechle
*
- * $Id: string.h,v 1.2 1997/07/24 01:49:29 ralf Exp $
+ * $Id: string.h,v 1.3 1997/08/11 04:11:53 ralf Exp $
*/
#ifndef __ASM_MIPS_STRING_H
#define __ASM_MIPS_STRING_H
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 117d6c062..abeaa3343 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -252,13 +252,6 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int
return x;
}
-extern unsigned long IRQ_vectors[32];
-extern unsigned long exception_handlers[32];
-
-#define set_int_vector(n,addr) \
- IRQ_vectors[n] = (unsigned long) (addr)
-
-#define set_except_vector(n,addr) \
- exception_handlers[n] = (unsigned long) (addr)
+extern void set_except_vector(int n, void *addr);
#endif /* __ASM_MIPS_SYSTEM_H */
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index 5e4604089..fbce44aee 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -158,7 +158,7 @@ struct termios {
#define B230400 0010003
#define B460800 0010004
#define CIBAUD 002003600000 /* input baud rate (not used) */
-#define CISPAR 010000000000 /* mark or space (stick) parity */
+#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
#endif
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 608d86834..97181113a 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -7,7 +7,7 @@
*
* Copyright (C) 1996, 1997 by Ralf Baechle
*
- * $Id: uaccess.h,v 1.2 1997/06/25 20:18:19 ralf Exp $
+ * $Id: uaccess.h,v 1.5 1997/12/01 16:44:08 ralf Exp $
*/
#ifndef __ASM_MIPS_UACCESS_H
#define __ASM_MIPS_UACCESS_H
@@ -321,23 +321,23 @@ if (copy_from_user(to,from,n)) \
void *__cu_end; \
__asm__ __volatile__( \
".set\tnoreorder\n\t" \
- "1:\tsb\t$0,(%0)\n\t" \
+ "1:\taddiu\t%0,1\n" \
"bne\t%0,%1,1b\n\t" \
- "addiu\t%0,1\n" \
+ "sb\t$0,-1(%0)\n\t" \
"2:\t.set\treorder\n\t" \
".section\t.fixup,\"ax\"\n" \
"3:\t.set\tnoat\n\t" \
- "la\t$1,2b\n\t" \
- "jr\t$1\n\t" \
+ "subu\t%0,1\n\t" \
+ "j\t2b\n\t" \
".set\tat\n\t" \
".previous\n\t" \
".section\t__ex_table,\"a\"\n\t" \
STR(PTR)"\t1b,3b\n\t" \
".previous" \
:"=r" (addr), "=r" (__cu_end) \
- :"0" (addr), "1" (addr + size - 1), "i" (-EFAULT) \
+ :"0" (addr), "1" (addr + size), "i" (-EFAULT) \
:"$1","memory"); \
- size = __cu_end - (addr) - 1; \
+ size = __cu_end - (addr); \
})
#define clear_user(addr,n) ({ \
diff --git a/include/asm-mips/watch.h b/include/asm-mips/watch.h
index 9c44856ef..6fcde8428 100644
--- a/include/asm-mips/watch.h
+++ b/include/asm-mips/watch.h
@@ -5,7 +5,9 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996 by Ralf Baechle
+ * Copyright (C) 1996, 1997 by Ralf Baechle
+ *
+ * $Id: watch.h,v 1.2 1997/09/19 08:37:44 ralf Exp $
*/
#ifndef __ASM_WATCH_H
#define __ASM_WATCH_H
@@ -20,7 +22,8 @@ enum wref_type {
wr_load = 2
};
-extern asmlinkage unsigned int watch_available;
+extern char watch_available;
+
extern asmlinkage __watch_set(unsigned long addr, enum wref_type ref);
extern asmlinkage __watch_clear(void);
extern asmlinkage __watch_reenable(void);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 22:38:26 +0000