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-rw-r--r--include/asm-sparc/cache.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-sparc/cache.h b/include/asm-sparc/cache.h
index f537c5cc3..f1e694ea6 100644
--- a/include/asm-sparc/cache.h
+++ b/include/asm-sparc/cache.h
@@ -1,4 +1,4 @@
-/* $Id: cache.h,v 1.5 1996/08/29 09:48:06 davem Exp $
+/* $Id: cache.h,v 1.6 1996/12/28 19:55:12 davem Exp $
* cache.h: Cache specific code for the Sparc. These include flushing
* and direct tag/data line access.
*
@@ -10,6 +10,8 @@
#include <asm/asi.h>
+#define L1_CACHE_BYTES 32
+
/* Direct access to the instruction cache is provided through and
* alternate address space. The IDC bit must be off in the ICCR on
* HyperSparcs for these accesses to work. The code below does not do