diff options
Diffstat (limited to 'include/asm-sparc')
65 files changed, 5966 insertions, 1103 deletions
diff --git a/include/asm-sparc/a.out.h b/include/asm-sparc/a.out.h index 6443e7612..cdc3e76ca 100644 --- a/include/asm-sparc/a.out.h +++ b/include/asm-sparc/a.out.h @@ -1,4 +1,4 @@ -/* $Id: a.out.h,v 1.9 1996/05/29 13:44:54 ecd Exp $ */ +/* $Id: a.out.h,v 1.11 1996/12/03 08:44:56 jj Exp $ */ #ifndef __SPARC_A_OUT_H__ #define __SPARC_A_OUT_H__ @@ -89,7 +89,9 @@ struct relocation_info /* used when header.a_machtype == M_SPARC */ #ifdef __KERNEL__ -#define STACK_TOP TASK_SIZE +extern unsigned long stack_top; + +#define STACK_TOP (stack_top) #endif diff --git a/include/asm-sparc/ap1000/DdvReqTable.h b/include/asm-sparc/ap1000/DdvReqTable.h new file mode 100644 index 000000000..78ffacfd3 --- /dev/null +++ b/include/asm-sparc/ap1000/DdvReqTable.h @@ -0,0 +1,107 @@ + /* + * Copyright 1996 The Australian National University. + * Copyright 1996 Fujitsu Laboratories Limited + * + * This software may be distributed under the terms of the Gnu + * Public License version 2 or later + */ +/* + * Request table size + */ + +#define TABLE_SIZE 200 + +/* + * Indirect memory address table size + */ + +#define MTABLE_SIZE 1000 + +static inline int INC_T(int a) +{ + return (++a == TABLE_SIZE?0:a); +} + +static inline int INC_ML(int a) +{ + return (++a == MTABLE_SIZE?0:a); +} + +/* + * Status of requiest table + */ + +#define DDV_ERROR_RETURN 0 +#define DDV_NORMAL_RETURN 1 +#define DDV_REQ_FREE 2 +#define DDV_DISKREAD_REQ 3 +#define DDV_DISKWRITE_REQ 4 +#define DDV_RAWREAD_REQ 5 +#define DDV_RAWWRITE_REQ 6 +#define DDV_CACHEPOSTALL_REQ 11 +#define DDV_CACHEFLUSHALL_REQ 12 +#define DDV_CAPACITY_REQ 13 + +/* + * Specify type of interrupt (set by opiu in PBUF1) + */ + +#define DDV_PRINTK_INTR 1 +#define DDV_MLIST_INTR 2 +#define DDV_READY_INTR 3 +#define DDV_REQCOMP_INTR 4 + +struct RequestInformation { + volatile int status; + int rtn; + unsigned bnum; + int argv[8]; +}; + +struct DiskInfo { + u_long blocks; + u_long blk_size; + int pad[8]; + unsigned ptrs[4]; +}; + +struct RequestTable{ + volatile unsigned cell_pointer; /* Cell requiest pointer */ + volatile unsigned ddv_pointer; /* DDV operation pointer */ + struct RequestInformation async_info[TABLE_SIZE]; + volatile unsigned start_mtable; + volatile unsigned end_mtable; + unsigned mtable[MTABLE_SIZE]; +}; + +#define PRINT_BUFS 32 + +struct OPrintBuf { + char *fmt; + int args[6]; +}; + +struct OPrintBufArray { + volatile unsigned option_counter; + volatile unsigned cell_counter; + struct OPrintBuf bufs[PRINT_BUFS]; +}; + +#define ALIGN_SIZE 16 +#define ALIGN_BUFS 128 +#define ALIGN_BUF_SIZE 1024 + +struct AlignBuf { + char *dest; + unsigned size; + int offset; + char buf[ALIGN_BUF_SIZE+2*ALIGN_SIZE]; +}; + +struct OAlignBufArray { + volatile unsigned option_counter; + volatile unsigned cell_counter; + struct AlignBuf bufs[ALIGN_BUFS]; +}; + + diff --git a/include/asm-sparc/ap1000/apbif.h b/include/asm-sparc/ap1000/apbif.h new file mode 100644 index 000000000..6ef9bf0b6 --- /dev/null +++ b/include/asm-sparc/ap1000/apbif.h @@ -0,0 +1,205 @@ + /* + * Copyright 1996 The Australian National University. + * Copyright 1996 Fujitsu Laboratories Limited + * + * This software may be distributed under the terms of the Gnu + * Public License version 2 or later + */ + +/* +** BIF data registers (system mode) +*/ +#define BIF_DATA (BIF+0x0000) /* BIF send and receive data registe */ +#define BIF_EDATA (BIF+0x0004) /* BIF end data register */ +/* +** BIF data registers (user mode) +*/ +#define UBIF_DATA (UBIF+0x0000) /* BIF send and receive data registe */ +#define UBIF_EDATA (UBIF+0x0004) /* BIF end data register */ + +/* +** BIF scatter and gather parameter register (system mode) +*/ +#define BIF_X0SK (BIF+0x0010) /* initial X-skip register */ +#define BIF_XSK (BIF+0x0014) /* X-skip register */ +#define BIF_XSZ (BIF+0x0018) /* X-size register */ + +#define BIF_Y0SK (BIF+0x001c) /* initial Y-skip register */ +#define BIF_YSK (BIF+0x0020) /* Y-skip register */ +#define BIF_YSZ (BIF+0x0024) /* Y-size register */ + +#define BIF_CX0SK (BIF+0x0028) /* initial counter of X-skip */ +#define BIF_CXSK (BIF+0x002c) /* X-skip counter */ +#define BIF_CXSZ (BIF+0x0030) /* X-size counter */ + +#define BIF_CY0SK (BIF+0x0034) /* initial counter of Y-skip */ +#define BIF_CYSK (BIF+0x0038) /* Y-skip counter */ +#define BIF_CYSZ (BIF+0x003c) /* Y-size counter */ + +#define BIF_TTL (BIF+0x0040) /* number of data transfer register */ +#define BIF_CTTL (BIF+0x0044) /* number of data transfer counter */ + +/* +** BIF scatter and gather parameter register (user mode) +*/ +#define UBIF_X0SK (UBIF+0x0010) /* initial X-skip register */ +#define UBIF_XSK (UBIF+0x0014) /* X-skip register */ +#define UBIF_XSZ (UBIF+0x0018) /* X-size register */ + +#define UBIF_Y0SK (UBIF+0x001c) /* initial Y-skip register */ +#define UBIF_YSK (UBIF+0x0020) /* Y-skip register */ +#define UBIF_YSZ (UBIF+0x0024) /* Y-size register */ + +#define UBIF_CX0SK (UBIF+0x0028) /* initial counter of X-skip */ +#define UBIF_CXSK (UBIF+0x002c) /* X-skip counter */ +#define UBIF_CXSZ (UBIF+0x0030) /* X-size counter */ + +#define UBIF_CY0SK (UBIF+0x0034) /* initial counter of Y-skip */ +#define UBIF_CYSK (UBIF+0x0038) /* Y-skip counter */ +#define UBIF_CYSZ (UBIF+0x003c) /* Y-size counter */ + +#define UBIF_TTL (UBIF+0x0040) /* number of data transfer register */ +#define UBIF_CTTL (UBIF+0x0044) /* number of data transfer counter */ + +/* +** BIF control registers (system mode) +*/ +#define BIF_CIDR0 (BIF+0x0048) /* cell-id register 0 */ +#define BIF_CIDR1 (BIF+0x004c) /* cell-id register 1 (for cell mode) */ +#define BIF_CIDR2 (BIF+0x0050) /* cell-id register 2 */ +#define BIF_CIDR3 (BIF+0x0054) /* cell-id register 3 */ +#define BIF_HEADER (BIF+0x0058) /* header register */ +#define BIF_INTR (BIF+0x006c) /* BIF interrupt control register */ +#define BIF_SDCSR (BIF+0x0070) /* BIF data control set register */ +#define BIF_RDCSR (BIF+0x0074) /* BIF data control reset reregister */ +#define BIF_MHOCR (BIF+0x0078) /* BIF extentional control reregister */ + +/* +** BIF control registers (user mode) +*/ +#define UBIF_CIDR0 (UBIF+0x0048) /* cell-id register 0 */ +#define UBIF_CIDR1 (UBIF+0x004c) /* cell-id register 1 (for cell mode) */ +#define UBIF_CIDR2 (UBIF+0x0050) /* cell-id register 2 */ +#define UBIF_CIDR3 (UBIF+0x0054) /* cell-id register 3 */ +#define UBIF_HEADER (UBIF+0x0058) /* header register */ +#define UBIF_INTR (UBIF+0x006c) /* BIF interrupt control register */ +#define UBIF_SDCSR (UBIF+0x0070) /* BIF data control set register */ +#define UBIF_RDCSR (UBIF+0x0074) /* BIF data control reset reregister */ +#define UBIF_MHOCR (UBIF+0x0078) /* BIF extentional control reregister */ + +/* +** bit assignment +*/ +#define BIF_HEADER_ID 0xffff0000 /* cell-id */ +#define BIF_HEADER_BR 0x00008000 /* broad bit */ +#define BIF_HEADER_IS 0x00006000 /* ID select */ +#define BIF_HEADER_IS_00 0x00000000 +#define BIF_HEADER_IS_01 0x00002000 +#define BIF_HEADER_IS_10 0x00004000 +#define BIF_HEADER_IS_11 0x00006000 +#define BIF_HEADER_IN 0x00001000 /* interrupt bit */ +#define BIF_HEADER_LS 0x00000800 /* line send */ +#define BIF_HEADER_SC 0x00000400 /* scatter bit */ +#define BIF_HEADER_HS 0x00000200 /* header strip */ +#define BIF_HEADER_RS 0x00000100 /* bus release */ + +#define BIF_HEADER_ID_SHIFT 16 + +#define BIF_INTR_GS 0x00020000 /* grant interrupt select */ +#define BIF_INTR_GM 0x00010000 /* grant interrupt mask */ +#define BIF_INTR_GI 0x00008000 /* grant interrupt request */ +#define BIF_INTR_HS 0x00004000 /* header interrupt select */ +#define BIF_INTR_HM 0x00002000 /* header interrupt mask */ +#define BIF_INTR_HI 0x00001000 /* header interrupt request */ +#define BIF_INTR_SS 0x00000800 /* send interrupt select */ +#define BIF_INTR_SM 0x00000400 /* send interrupt mask */ +#define BIF_INTR_SI 0x00000200 /* send interrupt request */ +#define BIF_INTR_RS 0x00000100 /* receive interrupt select */ +#define BIF_INTR_RM 0x00000080 /* receive interrupt mask */ +#define BIF_INTR_RI 0x00000040 /* receive interrupt request */ +#define BIF_INTR_ES 0x00000020 /* error interrupt select */ +#define BIF_INTR_EM 0x00000010 /* error interrupt mask */ +#define BIF_INTR_EI 0x00000008 /* error interrupt request */ +#define BIF_INTR_AS 0x00000004 /* attention interrupt select */ +#define BIF_INTR_AM 0x00000002 /* attention interrupt mask */ +#define BIF_INTR_AI 0x00000001 /* attention interrupt request */ + +#define BIF_SDCSR_ER 0x7fffc000 /* error detected by BIF */ +#define BIF_SDCSR_PE 0x80000000 /* detect parity error in sync */ +#define BIF_SDCSR_SP 0x40000000 /* parity error in sync */ +#define BIF_SDCSR_LP 0x20000000 /* L-bus parity error */ +#define BIF_SDCSR_LR 0x10000000 /* */ +#define BIF_SDCSR_LW 0x08000000 /* */ +#define BIF_SDCSR_AL 0x04000000 /* specify end bit except of end data */ +#define BIF_SDCSR_SS 0x02000000 /* request bit but masked by slow sync */ +#define BIF_SDCSR_SC 0x01000000 /* clear bit but masked by slow sync */ +#define BIF_SDCSR_SY 0x00800000 /* set bit but masked by slow status */ +#define BIF_SDCSR_FS 0x00400000 /* request bit but masked by fast sync */ +#define BIF_SDCSR_FC 0x00200000 /* clear bit but masked by fast sync */ +#define BIF_SDCSR_FY 0x00100000 /* set bit but masked by fast status */ +#define BIF_SDCSR_CP 0x00080000 /* parity error in commnad bus */ +#define BIF_SDCSR_FP 0x00040000 /* execute scatter or gather but FN=0 */ +#define BIF_SDCSR_PS 0x00020000 /* header receive error */ +#define BIF_SDCSR_RA 0x00010000 /* change scatter,gather parameter */ +#define BIF_SDCSR_PA 0x00008000 /* check if send or receive error */ +#define BIF_SDCSR_DL 0x00004000 /* lost data */ +#define BIF_SDCSR_BB 0x00002000 /* check if some BIF use command bus */ +#define BIF_SDCSR_BG 0x00001000 /* check if command bus got */ +#define BIF_SDCSR_BR 0x00000800 /* request command bus */ +#define BIF_SDCSR_CN 0x00000400 /* release BIF from command bus */ +#define BIF_SDCSR_FN 0x00000200 /* scatter gather enable */ +#define BIF_SDCSR_EB 0x00000100 /* send data that have end bit */ +#define BIF_SDCSR_TB 0x000000E0 /* data in send FIFO */ +#define BIF_SDCSR_TB4 0x00000080 +#define BIF_SDCSR_TB2 0x00000040 +#define BIF_SDCSR_TB1 0x00000020 +#define BIF_SDCSR_RB 0x0000001c /* data in receive FIFO */ +#define BIF_SDCSR_RB4 0x00000010 +#define BIF_SDCSR_RB2 0x00000008 +#define BIF_SDCSR_RB1 0x00000004 +#define BIF_SDCSR_DE 0x00000002 /* DMA interface enable bitr */ +#define BIF_SDCSR_DR 0x00000001 /* data transfer direction */ + +#define BIF_RDCSR_ER BIF_SDCSR_ER /* error detected by BIF */ +#define BIF_RDCSR_PE BIF_SDCSR_PE /* detect parity error in sync */ +#define BIF_RDCSR_SP BIF_SDCSR_SP /* parity error in sync */ +#define BIF_RDCSR_LP BIF_SDCSR_LP /* L-bus parity error */ +#define BIF_RDCSR_LR BIF_SDCSR_LR /* */ +#define BIF_RDCSR_LW BIF_SDCSR_LW /* */ +#define BIF_RDCSR_AL BIF_SDCSR_AL /* specify end bit except of end data */ +#define BIF_RDCSR_SS BIF_SDCSR_SS /* request bit but masked by slow sync */ +#define BIF_RDCSR_SC BIF_SDCSR_SC /* clear bit but masked by slow sync */ +#define BIF_RDCSR_SY BIF_SDCSR_SY /* set bit but masked by slow status */ +#define BIF_RDCSR_FS BIF_SDCSR_FS /* request bit but masked by fast sync*/ +#define BIF_RDCSR_FC BIF_SDCSR_FC /* clear bit but masked by fast sync */ +#define BIF_RDCSR_FY BIF_SDCSR_FY /* set bit but masked by fast status */ +#define BIF_RDCSR_CP BIF_SDCSR_CP /* parity error in commnad bus */ +#define BIF_RDCSR_FP BIF_SDCSR_FP /* execute scatter or gather but FN=0 */ +#define BIF_RDCSR_PS BIF_SDCSR_PS /* header receive error */ +#define BIF_RDCSR_RA BIF_SDCSR_RA /* change scatter,gather parameter */ +#define BIF_RDCSR_DL BIF_SDCSR_DL /* lost data */ +#define BIF_RDCSR_PA BIF_SDCSR_PA /* check if send or receive error */ +#define BIF_RDCSR_BB BIF_SDCSR_BB /* check if some BIF use command bus */ +#define BIF_RDCSR_BG BIF_SDCSR_BG /* check if command bus got */ +#define BIF_RDCSR_BR BIF_SDCSR_BR /* request command bus */ +#define BIF_RDCSR_CN BIF_SDCSR_CN /* release BIF from command bus */ +#define BIF_RDCSR_EB BIF_SDCSR_EB /* send data that have end bit */ +#define BIF_RDCSR_TB BIF_SDCSR_TB /* data in send FIFO */ +#define BIF_RDCSR_RB BIF_SDCSR_RB /* data in receive FIFO */ +#define BIF_RDCSR_DE BIF_SDCSR_DE /* DMA interface enable bitr */ +#define BIF_RDCSR_DR BIF_SDCSR_DR /* data transfer direction */ +#define BIF_RDCSR_FN BIF_SDCSR_FN /* scatter gather enable */ + +#define BIF_MHOCR_RS 0x00000800 /* bif reset */ +#define BIF_MHOCR_RC 0x00000400 /* commnad bus circuit reset */ +#define BIF_MHOCR_RI 0x00000200 /* remove input buffer data */ +#define BIF_MHOCR_RO 0x00000100 /* remove output buffer data */ +#define BIF_MHOCR_BA 0x00000008 /* command bus arbitlater reset */ +#define BIF_MHOCR_MD 0x00000006 /* command bus mode */ +#define BIF_MHOCR_AT 0x00000001 /* command bus attention signal */ + +#define BIF_MHOCR_MD_NORMAL 0x00000006 /* command bus mode [normal] */ +#define BIF_MHOCR_MD_BUSWGR 0x00000004 /* command bus mode [bus gather] */ +#define BIF_MHOCR_MD_SETCID 0x00000002 /* command bus mode [set cid] */ + + diff --git a/include/asm-sparc/ap1000/aplib.h b/include/asm-sparc/ap1000/aplib.h new file mode 100644 index 000000000..55e2f528d --- /dev/null +++ b/include/asm-sparc/ap1000/aplib.h @@ -0,0 +1,119 @@ + /* + * Copyright 1996 The Australian National University. + * Copyright 1996 Fujitsu Laboratories Limited + * + * This software may be distributed under the terms of the Gnu + * Public License version 2 or later + */ + +/* aplib kernel interface definition */ + +#ifndef _APLIB_H_ +#define _APLIB_H_ + +struct aplib_struct { + unsigned *ringbuf; + unsigned write_pointer, read_pointer; /* in words */ + unsigned ringbuf_size; /* in words */ + unsigned rbuf_counter; /* read messages */ + unsigned rbuf_flag1, rbuf_flag2; /* received messages */ + unsigned *physical_cid; /* logical to physical mapping */ + unsigned *rel_cid; /* logical to relative (RTC) mapping */ + unsigned numcells; /* number of logical cells */ + unsigned numcells_x; /* number of logical cells in x direction */ + unsigned numcells_y; /* number of logical cells in y direction */ + unsigned cid, tid; /* this cells logical cell ID and task ID */ + unsigned cidx, cidy; /* logical cell id in x and y direction */ + unsigned ack_flag, ack_request; + unsigned ok_x, ok_y, ok_xy; /* whether hardware x, y and xy sends are allowed */ +}; + + +/* + * the system ringbuffer structure + * this is also the old way that tasks accessed the MSC hardware + */ +struct ringbuf_struct { + void *ringbuf; /* pointer to the ringbuf */ + void *shared; /* pointer to the shared page */ + int order; /* arg to __get_free_pages */ + unsigned write_ptr; /* write pointer into the ringbuf */ + unsigned vaddr; /* base virtual address of ringbuf for task */ + unsigned frag_count; /* how many words in the frag queue */ + unsigned frag_len; /* how many words expected in the frag queue */ + unsigned sq_fragment[16]; /* if the task switches part way through + an op then shove the partial op here */ +}; + + +#define APLIB_INIT 1 +#define APLIB_SYNC 2 +#define APLIB_GET 3 +#define APLIB_PUT 4 +#define APLIB_SEND 5 +#define APLIB_PROBE 6 +#define APLIB_POLL 7 +#define APLIB_XSEND 8 +#define APLIB_YSEND 9 +#define APLIB_XYSEND 10 +#define APLIB_XPUT 11 +#define APLIB_YPUT 12 +#define APLIB_XYPUT 13 + + +/* message kinds */ +#define RBUF_SYSTEM 0 +#define RBUF_SEND 1 +#define RBUF_X_BRD 2 +#define RBUF_Y_BRD 3 +#define RBUF_XY_BRD 4 +#define RBUF_RPC 5 +#define RBUF_GET 6 +#define RBUF_MPI 7 +#define RBUF_BIGSEND 8 +#define RBUF_SEEN 0xE +#define RBUF_READ 0xF + +#define APLIB_PAGE_BASE 0xd0000000 +#define APLIB_PAGE_LEN 8192 + +struct aplib_init { + unsigned numcells, cid; + unsigned numcells_x, numcells_y; + unsigned *phys_cells; /* physical cell list */ + unsigned *ringbuffer; /* pointer to user supplied ring buffer */ + unsigned ringbuf_size; /* in words */ +}; + + +struct aplib_putget { + unsigned cid; + unsigned *src_addr, *dest_addr; + unsigned size; /* in words */ + unsigned *dest_flag, *src_flag; + unsigned ack; +}; + + +struct aplib_send { + /* the ordering here is actually quite important - the parts to be + read by the bigrecv function must be in the first 24 bytes */ + unsigned src_addr; + unsigned size; + unsigned info1, info2; + unsigned flag_addr; + volatile unsigned flag; + unsigned type; + unsigned tag; + unsigned cid; +}; + +#ifdef __KERNEL__ +#define MAX_PUT_SIZE (1024*1024 - 1) /* in words */ +#define SMALL_SEND_THRESHOLD 128 + + +#endif + +#endif /* _APLIB_H_ */ + diff --git a/include/asm-sparc/ap1000/apreg.h b/include/asm-sparc/ap1000/apreg.h new file mode 100644 index 000000000..11a7a8666 --- /dev/null +++ b/include/asm-sparc/ap1000/apreg.h @@ -0,0 +1,619 @@ + /* + * Copyright 1996 The Australian National University. + * Copyright 1996 Fujitsu Laboratories Limited + * + * This software may be distributed under the terms of the Gnu + * Public License version 2 or later + */ +/* ap1000 register definitions needed for Linux/AP+ */ + +#ifndef _AP1000_APREG_H +#define _AP1000_APREG_H +#include <asm/page.h> +#include <asm/ap1000/apservice.h> +#include <asm/ap1000/apbif.h> +#include <linux/tasks.h> + +/* + * Macros for accessing I/O registers. + */ +#define BIF_IN(reg) (*(volatile unsigned *)(reg)) +#define BIF_OUT(reg,v) (*(volatile unsigned *)(reg) = (v)) +#define DMA_IN(reg) (*(volatile unsigned *)(reg)) +#define DMA_OUT(reg,v) (*(volatile unsigned *)(reg) = (v)) +#define MC_IN(reg) (*(volatile unsigned *)(reg)) +#define MC_OUT(reg,v) (*(volatile unsigned *)(reg) = (v)) +#define MSC_IN(reg) (*(volatile unsigned *)(reg)) +#define MSC_OUT(reg,v) (*(volatile unsigned *)(reg) = (v)) +#define MSC_IO(reg) (*(volatile unsigned *)(reg)) +#define RTC_IO(reg) (*(volatile unsigned *)(reg)) +#define MC_IO(reg) (*(volatile unsigned *)(reg)) +#define OPT_IO(reg) (*(volatile unsigned *)(reg)) + +/* + * B-net interface register definitions. + */ +#define BIF 0xfff30000 +#define BIF_CIDR1 (BIF+0x004c) /* cell-id register 1 (for cell mode)*/ +#define BIF_SDCSR (BIF+0x0070) /* BIF data control set register */ +#define BIF_DATA (BIF+0x0000) /* BIF send and receive data registe */ +#define BIF_EDATA (BIF+0x0004) /* BIF end data register */ +#define BIF_INTR (BIF+0x006c) /* BIF interrupt control register */ + +#define SSTT_SET (BIF+0xe0) /* set SSTT */ +#define SSTT_CLR (BIF+0xe4) /* clear SSTT */ +#define SSTT_SMSK (BIF+0xe8) /* set SSTT mask */ +#define SSTT_CMSK (BIF+0xec) /* clear SSTT mask */ +#define SSTT_SMD (BIF+0xf0) /* set SSYN & SSTT mode */ +#define SSTT_CMD (BIF+0xf4) /* clear SSYN & SSTT mode */ + +/* +** FSTT registers +*/ +#define FSTT BIF /* FSTT only system mode */ +#define FSTT_SET (FSTT+0xa0) /* set FSTT */ +#define FSTT_CLR (FSTT+0xa4) /* clear FSTT */ +#define FSTT_SMSK (FSTT+0xa8) /* set FSTT mask */ +#define FSTT_CMSK (FSTT+0xac) /* clear FSTT mask */ +#define FSTT_SMD (FSTT+0xb0) /* set FSYN & FSTT mode */ +#define FSTT_CMD (FSTT+0xb4) /* clear FSYN & FSTT mode */ +#define FSTT_TIM (FSTT+0xb8) /* status timer */ + + +#define BIF_SDCSR_RB 0x0000001c /* data in receive FIFO */ +#define BIF_SDCSR_EB 0x00000100 /* send data that have end bit */ +#define BIF_SDCSR_BG 0x00001000 /* check if command bus got */ +#define BIF_SDCSR_BR 0x00000800 /* request command bus */ +#define BIF_SDCSR_TB 0x000000E0 /* data in send FIFO */ +#define BIF_SDCSR_PE 0x80000000 /* detect parity error in sync */ +#define BIF_SDCSR_BB 0x00002000 /* check if some BIF use command bus */ + +#define BIF_SDCSR_RB_SHIFT 2 +#define BIF_SDCSR_TB_SHIFT 5 + +#define BIF_INTR_GET_SH 15 /* get bus interrupt */ +#define BIF_INTR_HEADER_SH 12 /* header interrupt */ +#define BIF_INTR_SEND_SH 9 /* send interrupt */ +#define BIF_INTR_RECV_SH 6 /* receive interrupt */ +#define BIF_INTR_ERR_SH 3 /* error interrupt */ +#define BIF_INTR_ATTN_SH 0 /* attention interrupt */ + + +#define BIF_HEADER_HS 0x00000200 /* header strip */ +#define BIF_HEADER_RS 0x00000100 /* bus release */ +#define BIF_HEADER_IN 0x00001000 /* interrupt bit */ +#define BIF_HEADER_BR 0x00008000 /* broad bit */ +#define BIF_INTR_HS 0x00004000 /* header interrupt select */ +#define HOST_CID 0x1000 +#define MAKE_HEADER(cid) (BIF_HEADER_IN | \ + ((cid)==-1?BIF_HEADER_BR:((cid)<<16) | (1<<13))) + +#define BIF_RDCSR (BIF+0x0074) /* BIF data control reset reregister */ + +/* + * Interrupt levels for AP+ devices + */ +#define APBIFGET_IRQ 1 /* have acquired B-net */ +#define APOPT0_IRQ 2 /* option interrupt level 0 */ +#define APSYNC_IRQ 3 /* sync (S-net) interrupt */ +#define APDMA_IRQ 4 /* DMA complete interrupt */ +#define APRTC_IRQ 5 /* RTC data transfer interrupt */ +#define APIPORT_IRQ 6 /* Interrupt port interrupt */ +#define APOPT1_IRQ 7 /* option interrupt level 1 */ +#define APBIF_IRQ 8 /* B-net interface interrupt */ +#define APMAS_IRQ 9 /* Send/Recv mem acc. seq. intr */ +#define APTIM1_IRQ 10 /* Timer 1 interrupt */ +#define APMSC_IRQ 11 /* MSC+ ring buf/queue spill etc. */ +#define APLBUS_IRQ 12 /* LBUS error interrupt */ +#define APATTN_IRQ 13 /* Attention interrupt */ +#define APTIM0_IRQ 14 /* Timer 0 interrupt */ +#define APMEM_IRQ 15 /* Memory error interrupt */ + +/* + * LBUS DMA controller register definitions + */ +#define DMA 0xfff00000 /* dma controller address */ +#define DMA3 (DMA+0xc0) /* DMA channel 3 */ +#define DMA_DMST 0x04 +#define DMA_MADDR 0x10 +#define DMA_HSKIP 0x08 +#define DMA_HCNT 0x0a +#define DMA_VSKIP 0x0c +#define DMA_VCNT 0x0e +#define DMA_DCMD 0x00 +#define DMA_HDRP 0x28 +#define DMA_DSIZE 0x02 +#define DMA_CSIZE 0x06 +#define DMA_VCNT 0x0e + +#define DMA_BIF_BCMD (DMA+0x120) /* BIF receive command register */ +#define DMA_BIF_BRST (DMA+0x124) /* BIF receive status register */ +#define DMA_BCMD_SA 0x40000000 /* software abort */ +#define DMA_DMST_AC 0x80000000 /* channel active */ +#define DMA_DMST_RST 0xffe40000 /* reset bits and reqs */ +#define DMA_DCMD_ST 0x80000000 /* start operation */ +#define DMA_DCMD_TYP_AUTO 0x30000000 /* 11: auto */ + +#define DMA_DCMD_TD_MD 0x04000000 /* transfer mem->dev */ +#define DMA_DCMD_TD_DM 0x00000000 /* transfer direction dev->mem*/ + +#define DMA_CH2 (DMA+0x80) /* DMA channel 2 */ +#define DMA_CH3 (DMA+0xc0) /* DMA channel 3 */ +#define DMA2_DMST (DMA_CH2+0x04) /* DMA2 status register */ +#define DMA3_DMST (DMA_CH3+0x04) /* DMA3 status register */ +#define DMA2_DCMD (DMA_CH2+0x00) /* DMA2 command register */ + +#define DMA_INTR_NORMAL_SH 19 /* normal DMA interrupt */ +#define DMA_INTR_ERROR_SH 16 /* error DMA interrupt */ + +#define DMA_DCMD_SA 0x40000000 /* software abort */ + + +#define DMA_MAX_TRANS_SIZE (0xffff<<2) +#define DMA_TRANS_BLOCK_SIZE (64<<2) + +#define WORD_SIZE 4 +#define B2W(x) (((x) + WORD_SIZE - 1) / WORD_SIZE) +#define W2B(x) ((x) * WORD_SIZE) + +#define DMA_GEN 0xfff00180 /* DMA general control reg */ + +/* AP1000+ Message Controller (MSC+) */ + +#define MSC_BASE0 0xfa008000 + +#define MSC_SQCTRL (MSC_BASE0 + 0x0) /* Send Queue control */ + +/* bits in MSC_SQCTRL */ +#define MSC_SQC_STABLE 0x400 /* Send Queue stable */ +#define MSC_SQC_MODE 0x300 /* Send Queue mode: */ +#define MSC_SQC_MODE_BLOCK 0 /* blocking */ +#define MSC_SQC_MODE_THRU 0x100 /* through */ +#define MSC_SQC_MODE_NORMAL 0x200 /* or normal */ +#define MSC_SQC_SPLF_SH 3 /* bit# for spill flags */ +#define MSC_SQC_SPLF_M 0x1f /* 5 bits wide */ +#define MSC_SQC_REPLYF 0x080 /* Reply queue full */ +#define MSC_SQC_REMRF 0x040 /* Remote reply queue full */ +#define MSC_SQC_USERF 0x020 /* User queue full */ +#define MSC_SQC_REMAF 0x010 /* Remote access queue full */ +#define MSC_SQC_SYSF 0x008 /* System queue full */ +#define MSC_SQC_PAUSE 0x004 /* Send Queue pause */ +#define MSC_SQC_RMODE 0x003 /* Requested mode: */ +#define MSC_SQC_RMODE_BLOCK 0 /* blocking */ +#define MSC_SQC_RMODE_THRU 1 /* through */ +#define MSC_SQC_RMODE_NORMAL 2 /* or normal */ + +#define MSC_SQPTR0 (MSC_BASE0 + 0x8) /* Send Queue 0 pointers */ +#define MSC_SQPTR1 (MSC_BASE0 + 0x10) /* Send Queue 1 pointers */ +#define MSC_SQPTR2 (MSC_BASE0 + 0x18) /* Send Queue 2 pointers */ +#define MSC_SQPTR3 (MSC_BASE0 + 0x20) /* Send Queue 3 pointers */ +#define MSC_SQPTR4 (MSC_BASE0 + 0x28) /* Send Queue 4 pointers */ + +/* bits in MSC_SQPTR[0-4] */ +#define MSC_SQP_MODE (1 << 20) /* 64/32 word queue mode */ +#define MSC_SQP_BP_SH 17 /* bit no. for base ptr */ +#define MSC_SQP_BP_M 7 /* (it's 3 bits wide) */ +#define MSC_SQP_CNT_SH 12 /* bit no. for count */ +#define MSC_SQP_CNT_M 0x1f /* (it's 5 bits wide) */ +#define MSC_SQP_RP_SH 6 /* bit no. for read ptr */ +#define MSC_SQP_RP_M 0x3f /* (it's 6 bits wide() */ +#define MSC_SQP_WP_SH 0 /* bit no. for write ptr */ +#define MSC_SQP_WP_M 0x3f /* (it's 6 bits wide() */ + +#define MSC_OPTADR (MSC_BASE0 + 0x30) /* option memory address */ + +#define MSC_MASCTRL (MSC_BASE0 + 0x38) /* Mem Access Sequencer ctrl */ + +/* Bits in MSC_MASCTRL */ +#define MSC_MASC_SPAUSE 0x80 /* Send MAS pause */ +#define MSC_MASC_RPAUSE 0x40 /* Recv MAS pause */ +#define MSC_MASC_SFEXIT 0x20 /* Send MAS fault/exit */ +#define MSC_MASC_RFEXIT 0x10 /* Recv MAS fault/exit */ +#define MSC_MASC_SREADY 0x08 /* Send MAS ready */ +#define MSC_MASC_RREADY 0x04 /* Recv MAS ready */ +#define MSC_MASC_SSTOP 0x02 /* Send MAS is stopped */ +#define MSC_MASC_RSTOP 0x01 /* Recv MAS is stopped */ + +#define MSC_SMASADR (MSC_BASE0 + 0x40) /* Send Mem Acc Seq address */ +#define MSC_RMASADR (MSC_BASE0 + 0x48) /* Recv Mem Acc Seq address */ + +#define MSC_PID (MSC_BASE0 + 0x50) /* Context number (proc id) */ + +#define MSC_QWORDCNT (MSC_BASE0 + 0x60) /* Queue word counts */ + +/* Fields in MSC_QWORDCNT */ +#define MSC_QWDC_SYSCNT_SH 24 /* bit# for system count */ +#define MSC_QWDC_SYSCNT_M 0x3f /* 6 bits wide */ +#define MSC_QWDC_SYSLEN_SH 16 /* bit# for len of sys cmd */ +#define MSC_QWDC_SYSLEN_M 0x3f /* 6 bits wide */ +#define MSC_QWDC_USRCNT_SH 8 /* bit# for user count */ +#define MSC_QWDC_USRCNT_M 0x3f /* 6 bits wide */ +#define MSC_QWDC_USRLEN_SH 0 /* bit# for len of user cmd */ +#define MSC_QWDC_USRLEN_M 0x3f /* 6 bits wide */ + +#define MSC_INTR (MSC_BASE0 + 0x70) /* Interrupt control/status */ + +/* Bit offsets of interrupt fields in MSC_INTR */ +#define MSC_INTR_QBMFUL_SH 28 /* Queue buffer full intr */ +#define MSC_INTR_SQFILL_SH 24 /* Send queue fill intr */ +#define MSC_INTR_RBMISS_SH 20 /* Ring buffer miss intr */ +#define MSC_INTR_RBFULL_SH 16 /* Ring buffer full intr */ +#define MSC_INTR_RMASF_SH 12 /* Recv MAS fault intr */ +#define MSC_INTR_RMASE_SH 8 /* Recv MAS error intr */ +#define MSC_INTR_SMASF_SH 4 /* Send MAS fault intr */ +#define MSC_INTR_SMASE_SH 0 /* Send MAS error intr */ + +#define MSC_PPIO (MSC_BASE0 + 0x1000) /* PArallel port I/O */ +#define MSC_PACSELECT (MSC_BASE0 + 0x1008) /* Performance analyser sel. */ + +#define MSC_CIDRANGE (MSC_BASE0 + 0x1010) /* Rel. Cell-id range limits */ + +/* Fields in MSC_CIDRANGE */ +#define MSC_CIDR_LRX_SH 24 /* Rel. X lower limit bit# */ +#define MSC_CIDR_LRX_M 0xFF /* it's 8 bits wide */ +#define MSC_CIDR_HRX_SH 16 /* Rel. X upper limit bit# */ +#define MSC_CIDR_HRX_M 0xFF /* it's 8 bits wide */ +#define MSC_CIDR_LRY_SH 8 /* Rel. Y lower limit bit# */ +#define MSC_CIDR_LRY_M 0xFF /* it's 8 bits wide */ +#define MSC_CIDR_HRY_SH 0 /* Rel. Y upper limit bit# */ +#define MSC_CIDR_HRY_M 0xFF /* it's 8 bits wide */ + +#define MSC_QBMPTR (MSC_BASE0 + 0x1018) /* Queue buffer mgr. ptrs */ + +/* Fields in MSC_QBMPTR */ +#define MSC_QBMP_LIM_SH 24 /* Pointer limit bit# */ +#define MSC_QBMP_LIM_M 0x3F /* (6 bits wide) */ +#define MSC_QBMP_BP_SH 16 /* Base pointer bit# */ +#define MSC_QBMP_BP_M 0xFF /* (8 bits wide) */ +#define MSC_QBMP_WP_SH 0 /* Write pointer bit# */ +#define MSC_QBMP_WP_M 0xFFFF /* (16 bits wide) */ + +#define MSC_SMASTWP (MSC_BASE0 + 0x1030) /* Send MAS virt page etc. */ +#define MSC_SMASREG (MSC_BASE0 + 0x1038) /* Send MAS context etc. */ +#define MSC_RMASTWP (MSC_BASE0 + 0x1040) /* Recv MAS virt page etc. */ +#define MSC_RMASREG (MSC_BASE0 + 0x1048) /* Recv MAS context etc. */ + +/* Bits in MSC_[SR]MASREG */ +#define MSC_MASR_CONTEXT_SH 20 /* Context at bit 20 */ +#define MSC_MASR_CONTEXT_M 0xfff /* 12 bits wide */ +#define MSC_MASR_AVIO 8 /* Address violation bit */ +#define MSC_MASR_CMD 7 /* MAS command bits */ +#define MSC_MASR_CMD_XFER 0 /* transfer data cmd */ +#define MSC_MASR_CMD_FOP 5 /* fetch & operate cmd */ +#define MSC_MASR_CMD_INC 6 /* increment cmd (i.e. flag) */ +#define MSC_MASR_CMD_CSI 7 /* compare & swap cmd */ + +#define MSC_HDGERRPROC (MSC_BASE0 + 0x1050) /* Header gen. error process */ +#define MSC_RHDERRPROC (MSC_BASE0 + 0x1058) /* Recv. header decoder err. */ + +#define MSC_SMASCNT (MSC_BASE0 + 0x1060) /* Send MAS counters */ + +/* Bits in MSC_SMASCNT */ +#define MSC_SMCT_ACCSZ_SH 28 /* Access size at bit 28 */ +#define MSC_SMCT_ACCSZ_M 7 /* 3 bits wide */ +#define MSC_SMCT_MCNT_SH 8 /* M(?) count at bit 8 */ +#define MSC_SMCT_MCNT_M 0xfffff /* 20 bits wide */ +#define MSC_SMCT_ICNT_SH 0 /* I(?) count at bit 0 */ +#define MSC_SMCT_ICNT_M 0xff /* 8 bits wide */ + +#define MSC_IRL (MSC_BASE0 + 0x1070) /* highest current int req */ +#define MSC_SIMMCHK (MSC_BASE0 + 0x1078) /* DRAM type installed */ + +#define MSC_SIMMCHK_MASK 0x00000008 + +#define MSC_SQRAM (MSC_BASE0 + 0x2000) /* Send Queue RAM (to +23f8) */ + +#define MSC_VERSION (MSC_BASE0 + 0x3000) /* MSC+ version */ + +#define MSC_NR_RBUFS 3 + +#define MSC_RBMBWP0 (MSC_BASE0 + 0x4000) /* Ring buf 0 base/write ptr */ +#define MSC_RBMMODE0 (MSC_BASE0 + 0x4008) /* Ring buf 0 mode/context */ +#define MSC_RBMBWP1 (MSC_BASE0 + 0x4010) /* Ring buf 1 base/write ptr */ +#define MSC_RBMMODE1 (MSC_BASE0 + 0x4018) /* Ring buf 1 mode/context */ +#define MSC_RBMBWP2 (MSC_BASE0 + 0x4020) /* Ring buf 2 base/write ptr */ +#define MSC_RBMMODE2 (MSC_BASE0 + 0x4028) /* Ring buf 2 mode/context */ + +#define MSC_RBMRP0 (MSC_BASE0 + 0x5000) /* Ring buf 0 read pointer */ +#define MSC_RBMRP1 (MSC_BASE0 + 0x6000) /* Ring buf 1 read pointer */ +#define MSC_RBMRP2 (MSC_BASE0 + 0x7000) /* Ring buf 2 read pointer */ + +/* locations of queues in virtual memory */ +#define MSC_QUEUE_BASE 0xfa800000 +#define MSC_PUT_QUEUE_S (MSC_QUEUE_BASE + 0*PAGE_SIZE) +#define MSC_GET_QUEUE_S (MSC_QUEUE_BASE + 1*PAGE_SIZE) +#define MSC_XYG_QUEUE_S (MSC_QUEUE_BASE + 2*PAGE_SIZE) +#define MSC_SEND_QUEUE_S (MSC_QUEUE_BASE + 3*PAGE_SIZE) +#define MSC_CPUT_QUEUE_S (MSC_QUEUE_BASE + 4*PAGE_SIZE) +#define MSC_BSEND_QUEUE_S (MSC_QUEUE_BASE + 5*PAGE_SIZE) +#define MSC_CXYG_QUEUE_S (MSC_QUEUE_BASE + 6*PAGE_SIZE) +#define MSC_CGET_QUEUE_S (MSC_QUEUE_BASE + 7*PAGE_SIZE) + +/* the 4 interrupt ports - physical addresses (on bus 8) */ +#define MC_INTP_0 0x80004000 +#define MC_INTP_1 0x80005000 +#define MC_INTP_2 0x80006000 +#define MC_INTP_3 0x80007000 + +/* the address used to send a remote signal - note that 32 pages + are used here - none of them are mapped to anything though */ +#define MSC_REM_SIGNAL (MSC_QUEUE_BASE + 0x10 * PAGE_SIZE) + +#define MSC_PUT_QUEUE (MSC_QUEUE_BASE + 0x100*PAGE_SIZE) +#define MSC_GET_QUEUE (MSC_QUEUE_BASE + 0x101*PAGE_SIZE) +#define MSC_SEND_QUEUE (MSC_QUEUE_BASE + 0x102*PAGE_SIZE) +#define MSC_XY_QUEUE (MSC_QUEUE_BASE + 0x103*PAGE_SIZE) +#define MSC_X_QUEUE (MSC_QUEUE_BASE + 0x104*PAGE_SIZE) +#define MSC_Y_QUEUE (MSC_QUEUE_BASE + 0x105*PAGE_SIZE) +#define MSC_XYG_QUEUE (MSC_QUEUE_BASE + 0x106*PAGE_SIZE) +#define MSC_XG_QUEUE (MSC_QUEUE_BASE + 0x107*PAGE_SIZE) +#define MSC_YG_QUEUE (MSC_QUEUE_BASE + 0x108*PAGE_SIZE) +#define MSC_CSI_QUEUE (MSC_QUEUE_BASE + 0x109*PAGE_SIZE) +#define MSC_FOP_QUEUE (MSC_QUEUE_BASE + 0x10a*PAGE_SIZE) + +#define SYSTEM_RINGBUF_BASE (MSC_QUEUE_BASE + 0x200*PAGE_SIZE) +#define SYSTEM_RINGBUF_ORDER 5 +#define SYSTEM_RINGBUF_SIZE ((1<<SYSTEM_RINGBUF_ORDER)*PAGE_SIZE) + +#define MSC_SYSTEM_DIRECT (MSC_QUEUE_BASE + 0x700 * PAGE_SIZE) +#define MSC_USER_DIRECT (MSC_QUEUE_BASE + 0x701 * PAGE_SIZE) +#define MSC_REMOTE_DIRECT (MSC_QUEUE_BASE + 0x702 * PAGE_SIZE) +#define MSC_REPLY_DIRECT (MSC_QUEUE_BASE + 0x703 * PAGE_SIZE) +#define MSC_REMREPLY_DIRECT (MSC_QUEUE_BASE + 0x704 * PAGE_SIZE) + +#define MSC_SYSTEM_DIRECT_END (MSC_QUEUE_BASE + 0x708 * PAGE_SIZE) +#define MSC_USER_DIRECT_END (MSC_QUEUE_BASE + 0x709 * PAGE_SIZE) +#define MSC_REMOTE_DIRECT_END (MSC_QUEUE_BASE + 0x70a * PAGE_SIZE) +#define MSC_REPLY_DIRECT_END (MSC_QUEUE_BASE + 0x70b * PAGE_SIZE) +#define MSC_REMREPLY_DIRECT_END (MSC_QUEUE_BASE + 0x70c * PAGE_SIZE) + +/* AP1000+ Memory Controller (MC+) */ + +#define MC_BASE0 0xfa000000 + +#define MC_DRAM_CTRL (MC_BASE0 + 0x0) /* DRAM control */ +#define MC_DRAM_CHKBIT (MC_BASE0 + 0x8) /* DRAM check bits */ +#define MC_DRAM_ERRADR (MC_BASE0 + 0x10) /* DRAM error address */ +#define MC_DRAM_ERRSYN (MC_BASE0 + 0x18) /* DRAM error syndrome */ + +#define MC_FREERUN (MC_BASE0 + 0x20) /* Free run ctr (12.5MHz) */ +#define MC_ITIMER0 (MC_BASE0 + 0x28) /* Interval timer 0 */ +#define MC_ITIMER1 (MC_BASE0 + 0x30) /* Interval timer 1 */ + +#define MC_INTR (MC_BASE0 + 0x38) /* Interrupt control/status */ + +/* Interrupt control/status fields in MC_INTR */ +#define MC_INTR_ECCD_SH 12 /* ECC double (uncorr.) err */ +#define MC_INTR_ECCS_SH 8 /* ECC single (corr.) error */ +#define MC_INTR_ITIM1_SH 4 /* Interval timer 1 intr */ +#define MC_INTR_ITIM0_SH 0 /* Interval timer 0 intr */ + +#define MC_CTP (MC_BASE0 + 0x50) /* Context table pointer */ + +#define MC_VBUS_FAST (MC_BASE0 + 0x60) /* VBus fast data mode ctrl */ + +#define MC_INTR_PORT (MC_BASE0 + 0x68) /* Interrupt port ctrl/stat */ + +/* Interrupt control/status fields in MC_INTR_PORT */ +#define MC_INTP_3_SH 12 /* port 0 (880007000) */ +#define MC_INTP_2_SH 8 /* port 1 (880006000) */ +#define MC_INTP_1_SH 4 /* port 1 (880005000) */ +#define MC_INTP_0_SH 0 /* port 1 (880004000) */ + +#define MC_PAC_COUNT (MC_BASE0 + 0x1000) /* Perf. an. counters */ +#define MC_PAC_SELECT (MC_BASE0 + 0x1008) /* Perf. an. ctr. select */ + +#define MC_VERSION (MC_BASE0 + 0x3000) /* MC+ version/date */ + +#define MC_MMU_TLB4K (MC_BASE0 + 0x6000) /* MC+ TLB for 4k pages */ +#define MC_MMU_TLB256K (MC_BASE0 + 0x7000) /* MC+ TLB for 256k pages */ +#define MC_MMU_TLB4K_SIZE 256 +#define MC_MMU_TLB256K_SIZE 64 + + +/* + * Bit values for a standard AP1000 3-bit interrupt control/status field. + */ +#define AP_INTR_REQ 1 /* interrupt request bit */ +#define AP_INTR_MASK 2 /* interrupt mask bit (1 disables) */ +#define AP_INTR_WENABLE 4 /* enable write to mask/req bits */ +#define AP_CLR_INTR_REQ 4 /* clear req. bit (dismiss intr) */ +#define AP_CLR_INTR_MASK 5 /* clear mask bit (enable ints) */ +#define AP_SET_INTR_REQ 6 /* set request bit */ +#define AP_SET_INTR_MASK 7 /* set mask bit (disable ints) */ + +/* + * Bit field extraction/insertion macros. + */ +#define EXTFIELD(val, fld) (((val) >> fld ## _SH) & fld ## _M) +#define MKFIELD(val, fld) (((val) & fld ## _M) << fld ## _SH) +#define INSFIELD(dst, val, fld) (((dst) & ~(fld ## _M << fld ## _SH)) \ + | MKFIELD(val, fld)) + +/* + * RTC registers + */ +#define RTC 0xfff10000 /* RTC system mode */ +#define RTC_CSR (RTC+0x0010) /* RTC control register */ +#define RTC_STR (RTC+0x0020) /* RTC status register */ +#define RTC_ITRR (RTC+0x0030) /* RTC interrupt register */ +#define RTC_RSTR (RTC+0x0070) /* RTC reset register */ +#define RTC_RSTR_TR 0x00008000 /* RTC through mode */ +#define RTC_RSTR_TS 0x00004000 /* RTC test mode */ +#define RTC_RSTR_ED 0x00002000 /* RTC reverse mode */ +#define RTC_RSTR_AC 0x00001000 /* RTC long mode */ +#define RTC_RSTR_SN 0x00000800 /* SOUTH/NORTH direction */ +#define RTC_RSTR_EW 0x00000400 /* EAST/WEST direction */ +#define RTC_RSTR_NC 0x00000200 /* get NORTH channel */ +#define RTC_RSTR_SC 0x00000100 /* get SOUTH channel */ +#define RTC_RSTR_WC 0x00000080 /* get WEST channel */ +#define RTC_RSTR_EC 0x00000040 /* get EAST channel */ +#define RTC_RSTR_BM 0x00000020 /* broad also my cell */ +#define RTC_RSTR_RT 0x00000020 /* reset */ + + +#define RTC_ITRR_PA 0x00040000 /* parity error for LBUS */ +#define RTC_ITRR_LR 0x00020000 /* MSC read but FIFO is empty*/ +#define RTC_ITRR_LW 0x00010000 /* MSC write but FIFO is full*/ +#define RTC_ITRR_AL 0x00008000 /* specify end data in data transfer */ +#define RTC_ITRR_DN 0x00002000 /* parity error in NORTH channel */ +#define RTC_ITRR_DS 0x00001000 /* parity error in SOUTH channel */ +#define RTC_ITRR_DW 0x00000800 /* parity error in WEST channel */ +#define RTC_ITRR_DE 0x00000400 /* parity error in EAST channel */ +#define RTC_ITRR_BD 0x00000200 /* receive 2 kind of broad data */ +#define RTC_ITRR_EW 0x00000100 /* control to write error bits */ +#define RTC_ITRR_EM 0x00000080 /* mask error interrupt request */ +#define RTC_ITRR_ER 0x00000040 /* error interrput request */ +#define RTC_ITRR_SW 0x00000020 /* control to write SR, SM */ +#define RTC_ITRR_SM 0x00000010 /* mask send interrupt */ +#define RTC_ITRR_SR 0x00000008 /* send interrupt request */ +#define RTC_ITRR_RW 0x00000004 /* icontrol to read RR, RM */ +#define RTC_ITRR_RM 0x00000002 /* mask read interrupt */ +#define RTC_ITRR_RR 0x00000001 /* receive interrupt request */ + +#define RTC_ITRR_RWM (RTC_ITRR_RW|RTC_ITRR_RM) +#define RTC_ITRR_SWM (RTC_ITRR_SW|RTC_ITRR_SM) +#define RTC_ITRR_EWM (RTC_ITRR_EW|RTC_ITRR_EM) +#define RTC_ITRR_RWR (RTC_ITRR_RW|RTC_ITRR_RR) +#define RTC_ITRR_SWR (RTC_ITRR_SW|RTC_ITRR_SR) +#define RTC_ITRR_EWR (RTC_ITRR_EW|RTC_ITRR_ER) +#define RTC_ITRR_RRM (RTC_ITRR_RM|RTC_ITRR_RR) +#define RTC_ITRR_SRM (RTC_ITRR_SM|RTC_ITRR_SR) +#define RTC_ITRR_ERM (RTC_ITRR_EM|RTC_ITRR_ER) +#define RTC_ITRR_RWMR (RTC_ITRR_RW|RTC_ITRR_RM|RTC_ITRR_RR) +#define RTC_ITRR_SWMR (RTC_ITRR_SW|RTC_ITRR_SM|RTC_ITRR_SR) +#define RTC_ITRR_EWMR (RTC_ITRR_EW|RTC_ITRR_EM|RTC_ITRR_ER) + +#define RTC_ITRR_ALLMSK (RTC_ITRR_RWM|RTC_ITRR_SWM|RTC_ITRR_EWM) +#define RTC_ITRR_ALLCLR (RTC_ITRR_RW|RTC_ITRR_SW|RTC_ITRR_EW) +#define RTC_ITRR_ALLWR (RTC_ITRR_RWMR|RTC_ITRR_SWMR|RTC_ITRR_EWMR) +#define RTC_ITRR_ALLRD (RTC_ITRR_RRM|RTC_ITRR_SRM|RTC_ITRR_ERM) + + +/* + * macros to manipulate context/task/pid numbers for parallel programs + */ +#define MPP_CONTEXT_BASE (AP_NUM_CONTEXTS - (NR_TASKS - MPP_TASK_BASE)) +#define MPP_TASK_TO_CTX(taskid) (((taskid) - MPP_TASK_BASE)+MPP_CONTEXT_BASE) +#define MPP_CTX_TO_TASK(ctx) (((ctx)-MPP_CONTEXT_BASE)+MPP_TASK_BASE) +#define MPP_IS_PAR_TASK(taskid) ((taskid) >= MPP_TASK_BASE) +#define MPP_IS_PAR_CTX(ctx) ((ctx) >= MPP_CONTEXT_BASE) + + +/* + * ioctls available on the ring buffer + */ +#define CAP_GETINIT 1 +#define CAP_SYNC 2 +#define CAP_SETTASK 3 +#define CAP_SETGANG 4 +#define CAP_MAP 5 + +/* + * the structure shared by the kernel and the parallel tasks in the + * front of the cap_shared area + */ +#ifndef _ASM_ +#ifdef _APLIB_ +struct _kernel_cap_shared { + unsigned rbuf_read_ptr; + unsigned dummy[32]; /* for future expansion */ +}; +#endif +#endif + +/* + * the mmap'd ringbuffer region is layed out like this: + + shared page - one page + queue pages - 11 pages + ring buffer - xx pages + mirror of ring buffer - xx pages + */ +#define RBUF_VBASE 0xd0000000 +#define RBUF_SHARED_PAGE_OFF 0 +#define RBUF_PUT_QUEUE PAGE_SIZE +#define RBUF_GET_QUEUE 2*PAGE_SIZE +#define RBUF_SEND_QUEUE 3*PAGE_SIZE +#define RBUF_XY_QUEUE 4*PAGE_SIZE +#define RBUF_X_QUEUE 5*PAGE_SIZE +#define RBUF_Y_QUEUE 6*PAGE_SIZE +#define RBUF_XYG_QUEUE 7*PAGE_SIZE +#define RBUF_XG_QUEUE 8*PAGE_SIZE +#define RBUF_YG_QUEUE 9*PAGE_SIZE +#define RBUF_CSI_QUEUE 10*PAGE_SIZE +#define RBUF_FOP_QUEUE 11*PAGE_SIZE +#define RBUF_RING_BUFFER_OFFSET 15*PAGE_SIZE + + +/* + * number of MMU contexts to use + */ +#define AP_NUM_CONTEXTS 1024 +#define SYSTEM_CONTEXT 1 + +/* + * the default gang scheduling factor +*/ +#define DEF_GANG_FACTOR 15 + +/* + * useful for bypassing the cache +*/ +#ifdef _APLIB_ +#ifndef _ASM_ +static inline unsigned long phys_8_in(unsigned long paddr) +{ + unsigned long word; + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (word) : + "r" (paddr), "i" (0x28) : + "memory"); + return word; +} + +/* + * useful for bypassing the cache +*/ +static inline unsigned long phys_9_in(unsigned long paddr) +{ + unsigned long word; + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (word) : + "r" (paddr), "i" (0x29) : + "memory"); + return word; +} +#endif +#endif + +/* + * DDV definitions +*/ +#define OBASE (0xfff40010) +#define OPTION_BASE 0xfc000000 +#define _OPIBUS_BASE (OPTION_BASE + 0x800000) +#ifdef CAP2_OPTION +#define OPIBUS_BASE 0 +#else +#define OPIBUS_BASE _OPIBUS_BASE +#endif +#define PBUF0 (OPIBUS_BASE+0x7e0080) +#define PBUF1 (OPIBUS_BASE+0x7e0084) +#define PBUF2 (OPIBUS_BASE+0x7e0088) +#define PBUF3 (OPIBUS_BASE+0x7e008c) +#define PIRQ (OPIBUS_BASE+0x7e0090) +#define PRST (OPIBUS_BASE+0x7e0094) + +#define IRC0 (OPIBUS_BASE+0x7d00a0) +#define IRC1 (OPIBUS_BASE+0x7d00a4) + +#define PRST_IRST (0x00000001) + +#define OPIU_RESET (0x00000000) +#define OPIU_OP (PBUF0) + +#define LSTR(s) (_OPIBUS_BASE + (s)) + +#endif /* _AP1000_APREG_H */ + diff --git a/include/asm-sparc/ap1000/apservice.h b/include/asm-sparc/ap1000/apservice.h new file mode 100644 index 000000000..902e774d6 --- /dev/null +++ b/include/asm-sparc/ap1000/apservice.h @@ -0,0 +1,111 @@ + /* + * Copyright 1996 The Australian National University. + * Copyright 1996 Fujitsu Laboratories Limited + * + * This software may be distributed under the terms of the Gnu + * Public License version 2 or later + */ +/* this defines service requests that can be made by the cells of the + front end "bootap" server + + tridge, March 1996 + */ +#ifndef _APSERVICE_H +#define _APSERVICE_H +#ifdef __KERNEL__ +#include <linux/sched.h> +#endif + +#ifndef _ASM_ + +/* all requests start with this structure */ +struct cap_request { + unsigned header; /* for the hardware */ + int size; /* the total request size in bytes, including this header */ + int cid; /* the cell it came from */ + int type; /* the type of request */ + int data[4]; /* misc data */ +}; + +/* Initialisation data to be sent to boot cell program */ +struct cap_init { + int bootcid; /* base cid to boot */ + int numcells; /* number of cells */ + int physcells; /* physical number of cells */ + unsigned long baseIP; /* IP address of cell 0 */ + unsigned long netmask; /* netmask of cells net */ + int gdbcell; /* what cell is the debugger running on */ + unsigned init_time; /* time at startup */ +}; +#endif + +/* what fake host number to use for the aliased IP device */ +#define AP_ALIAS_IP 2 + +/* request types */ +#define REQ_WRITE 0 +#define REQ_SHUTDOWN 1 +#define REQ_LOAD_AOUT 2 +#define REQ_PUTCHAR 3 +#define REQ_GETBOOTARGS 4 +#define REQ_PUTDEBUGCHAR 5 +#define REQ_GETDEBUGCHAR 6 +#define REQ_OPENNET 7 +#define REQ_IP 8 +#define REQ_BREAK 9 +#define REQ_INIT 10 +#define REQ_PUTDEBUGSTRING 11 +#define REQ_BREAD 12 +#define REQ_BWRITE 13 +#define REQ_BOPEN 14 +#define REQ_BCLOSE 15 +#define REQ_DDVOPEN 16 +#define REQ_BIF_TOKEN 17 +#define REQ_KILL 18 +#define REQ_SCHEDULE 19 + +/* the bit used to indicate that the host wants the BIF */ +#define HOST_STATUS_BIT 2 + +#ifdef __KERNEL__ +/* some prototypes */ +extern int ap_dma_wait(int ch); +extern int ap_dma_go(unsigned long ch,unsigned int p,int size,unsigned long cmd); +extern int mpp_cid(void); +extern void ap_start_debugger(void); +extern int bif_queue(struct cap_request *req,char *buf,int bufsize); +extern void write_bif_polled(char *buf1,int len1,char *buf2,int len2); +extern void read_bif(char *buf,int size); +extern void ap_wait_request(struct cap_request *req,int type); +extern void bif_set_poll(int set); +extern void ap_led(unsigned char d); +extern void ap_xor_led(unsigned char d); +extern void ap_set_led(unsigned char d); +extern void ap_unset_led(unsigned char d); +extern void bif_toss(int size); +void ap_msc_init(void); +void mac_dma_complete(void); +void ap_dbg_flush(void); +void bif_queue_flush(void); +/* void ap_printk(char *msg,int a1,int a2,int a3,int a4,int a5); */ +void show_mapping_ctx(unsigned *ctp,int context,unsigned Vm); +void async_fault(unsigned long address, int write, int taskid, + void (*callback)(int,unsigned long,int,int)); +void ap_bif_init(void); +void ap_tnet_init(void); +int wait_on_int(volatile int *p,int x,int interval); +void ap_put(int dest_cell,u_long local_addr,int size, + u_long remote_addr,u_long dest_flag,u_long local_flag); +void ap_bput(u_long local_addr,int size, + u_long remote_addr,u_long dest_flag,u_long local_flag); +void msc_switch_check(struct task_struct *tsk); +int bif_queue_nocopy(struct cap_request *req,char *buf,int bufsize); +void mpp_set_gang_factor(int factor); +void bif_register_request(int type,void (*fn)(struct cap_request *)); +void bif_add_debug_key(char key,void (*fn)(void),char *description); +void ap_complete(struct cap_request *creq); +void ap_reboot(char *bootstr); +#endif + + +#endif /* _APSERVICE_H */ diff --git a/include/asm-sparc/ap1000/pgtapmmu.h b/include/asm-sparc/ap1000/pgtapmmu.h new file mode 100644 index 000000000..8a46b1df0 --- /dev/null +++ b/include/asm-sparc/ap1000/pgtapmmu.h @@ -0,0 +1,140 @@ + /* + * Copyright 1996 The Australian National University. + * Copyright 1996 Fujitsu Laboratories Limited + * + * This software may be distributed under the terms of the Gnu + * Public License version 2 or later + */ +/* + * based on pgtsrmmu.h + * + */ + +#ifndef _SPARC_PGTAPMMU_H +#define _SPARC_PGTAPMMU_H + +#include <asm/page.h> +#include <asm/ap1000/apreg.h> + + +/* PMD_SHIFT determines the size of the area a second-level page table can map */ +#define APMMU_PMD_SHIFT 18 +#define APMMU_PMD_SIZE (1UL << APMMU_PMD_SHIFT) +#define APMMU_PMD_MASK (~(APMMU_PMD_SIZE-1)) +#define APMMU_PMD_ALIGN(addr) (((addr)+APMMU_PMD_SIZE-1)&APMMU_PMD_MASK) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define APMMU_PGDIR_SHIFT 24 +#define APMMU_PGDIR_SIZE (1UL << APMMU_PGDIR_SHIFT) +#define APMMU_PGDIR_MASK (~(APMMU_PGDIR_SIZE-1)) +#define APMMU_PGDIR_ALIGN(addr) (((addr)+APMMU_PGDIR_SIZE-1)&APMMU_PGDIR_MASK) + +#define APMMU_PTRS_PER_PTE 64 +#define APMMU_PTRS_PER_PMD 64 +#define APMMU_PTRS_PER_PGD 256 + +#define APMMU_PTE_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */ +#define APMMU_PMD_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */ +#define APMMU_PGD_TABLE_SIZE 0x400 /* 256 entries, 4 bytes a piece */ + +#define APMMU_VMALLOC_START (0xfe300000) + +/* Definition of the values in the ET field of PTD's and PTE's */ +#define APMMU_ET_MASK 0x3 +#define APMMU_ET_INVALID 0x0 +#define APMMU_ET_PTD 0x1 +#define APMMU_ET_PTE 0x2 +#define APMMU_ET_REPTE 0x3 /* AIEEE, SuperSparc II reverse endian page! */ + +/* Physical page extraction from PTP's and PTE's. */ +#define APMMU_CTX_PMASK 0xfffffff0 +#define APMMU_PTD_PMASK 0xfffffff0 +#define APMMU_PTE_PMASK 0xffffff00 + +/* The pte non-page bits. Some notes: + * 1) cache, dirty, valid, and ref are frobbable + * for both supervisor and user pages. + * 2) exec and write will only give the desired effect + * on user pages + * 3) use priv and priv_readonly for changing the + * characteristics of supervisor ptes + */ +#define APMMU_CACHE 0x80 +#define APMMU_DIRTY 0x40 +#define APMMU_REF 0x20 +#define APMMU_EXEC 0x08 +#define APMMU_WRITE 0x04 +#define APMMU_VALID 0x02 /* APMMU_ET_PTE */ +#define APMMU_PRIV 0x1c +#define APMMU_PRIV_RDONLY 0x18 + +#define APMMU_CHG_MASK (0xffffff00 | APMMU_REF | APMMU_DIRTY) + +/* + * "normal" sun systems have their memory on bus 0. This means the top + * 4 bits of 36 bit physical addresses are 0. We use this define to + * determine if a piece of memory might be normal memory, or if its + * definately some sort of device memory. + * + * On the AP+ normal memory is on bus 8. Why? Ask Fujitsu :-) +*/ +#define MEM_BUS_SPACE 8 + +/* Some day I will implement true fine grained access bits for + * user pages because the APMMU gives us the capabilities to + * enforce all the protection levels that vma's can have. + * XXX But for now... + */ +#define APMMU_PAGE_NONE __pgprot((MEM_BUS_SPACE<<28) | \ + APMMU_VALID | APMMU_CACHE | \ + APMMU_PRIV | APMMU_REF) +#define APMMU_PAGE_SHARED __pgprot((MEM_BUS_SPACE<<28) | \ + APMMU_VALID | APMMU_CACHE | \ + APMMU_EXEC | APMMU_WRITE | APMMU_REF) +#define APMMU_PAGE_COPY __pgprot((MEM_BUS_SPACE<<28) | \ + APMMU_VALID | APMMU_CACHE | \ + APMMU_EXEC | APMMU_REF) +#define APMMU_PAGE_RDONLY __pgprot((MEM_BUS_SPACE<<28) | \ + APMMU_VALID | APMMU_CACHE | \ + APMMU_EXEC | APMMU_REF) +#define APMMU_PAGE_KERNEL __pgprot((MEM_BUS_SPACE<<28) | \ + APMMU_VALID | APMMU_CACHE | APMMU_PRIV | \ + APMMU_DIRTY | APMMU_REF) + +#define APMMU_CTXTBL_PTR 0x00000100 +#define APMMU_CTX_REG 0x00000200 + +extern __inline__ unsigned long apmmu_get_ctable_ptr(void) +{ + unsigned int retval; + + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (retval) : + "r" (APMMU_CTXTBL_PTR), + "i" (ASI_M_MMUREGS)); + return (retval & APMMU_CTX_PMASK) << 4; +} + +extern __inline__ void apmmu_set_context(int context) +{ + __asm__ __volatile__("sta %0, [%1] %2\n\t" : : + "r" (context), "r" (APMMU_CTX_REG), + "i" (ASI_M_MMUREGS) : "memory"); + /* The AP1000+ message controller also needs to know + the current task's context. */ + MSC_OUT(MSC_PID, context); +} + +extern __inline__ int apmmu_get_context(void) +{ + register int retval; + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (retval) : + "r" (APMMU_CTX_REG), + "i" (ASI_M_MMUREGS)); + return retval; +} + +#endif /* !(_SPARC_PGTAPMMU_H) */ + + diff --git a/include/asm-sparc/asm_offsets.h b/include/asm-sparc/asm_offsets.h new file mode 100644 index 000000000..3b0abf580 --- /dev/null +++ b/include/asm-sparc/asm_offsets.h @@ -0,0 +1,256 @@ +/* Automatically generated. Do not edit. */ +#ifndef __ASM_OFFSETS_H__ +#define __ASM_OFFSETS_H__ + +#define AOFF_task_state 0x00000000 +#define ASIZ_task_state 0x00000004 +#define AOFF_task_counter 0x00000004 +#define ASIZ_task_counter 0x00000004 +#define AOFF_task_priority 0x00000008 +#define ASIZ_task_priority 0x00000004 +#define AOFF_task_signal 0x0000000c +#define ASIZ_task_signal 0x00000004 +#define AOFF_task_blocked 0x00000010 +#define ASIZ_task_blocked 0x00000004 +#define AOFF_task_flags 0x00000014 +#define ASIZ_task_flags 0x00000004 +#define AOFF_task_errno 0x00000018 +#define ASIZ_task_errno 0x00000004 +#define AOFF_task_debugreg 0x0000001c +#define ASIZ_task_debugreg 0x00000020 +#define AOFF_task_exec_domain 0x0000003c +#define ASIZ_task_exec_domain 0x00000004 +#define AOFF_task_binfmt 0x00000040 +#define ASIZ_task_binfmt 0x00000004 +#define AOFF_task_next_task 0x00000044 +#define ASIZ_task_next_task 0x00000004 +#define AOFF_task_prev_task 0x00000048 +#define ASIZ_task_prev_task 0x00000004 +#define AOFF_task_next_run 0x0000004c +#define ASIZ_task_next_run 0x00000004 +#define AOFF_task_prev_run 0x00000050 +#define ASIZ_task_prev_run 0x00000004 +#define AOFF_task_saved_kernel_stack 0x00000054 +#define ASIZ_task_saved_kernel_stack 0x00000004 +#define AOFF_task_kernel_stack_page 0x00000058 +#define ASIZ_task_kernel_stack_page 0x00000004 +#define AOFF_task_exit_code 0x0000005c +#define ASIZ_task_exit_code 0x00000004 +#define AOFF_task_exit_signal 0x00000060 +#define ASIZ_task_exit_signal 0x00000004 +#define AOFF_task_personality 0x00000064 +#define ASIZ_task_personality 0x00000004 +#define AOFF_task_pid 0x0000006c +#define ASIZ_task_pid 0x00000004 +#define AOFF_task_pgrp 0x00000070 +#define ASIZ_task_pgrp 0x00000004 +#define AOFF_task_tty_old_pgrp 0x00000074 +#define ASIZ_task_tty_old_pgrp 0x00000004 +#define AOFF_task_session 0x00000078 +#define ASIZ_task_session 0x00000004 +#define AOFF_task_leader 0x0000007c +#define ASIZ_task_leader 0x00000004 +#define AOFF_task_ngroups 0x00000080 +#define ASIZ_task_ngroups 0x00000004 +#define AOFF_task_groups 0x00000084 +#define ASIZ_task_groups 0x00000040 +#define AOFF_task_p_opptr 0x000000c4 +#define ASIZ_task_p_opptr 0x00000004 +#define AOFF_task_p_pptr 0x000000c8 +#define ASIZ_task_p_pptr 0x00000004 +#define AOFF_task_p_cptr 0x000000cc +#define ASIZ_task_p_cptr 0x00000004 +#define AOFF_task_p_ysptr 0x000000d0 +#define ASIZ_task_p_ysptr 0x00000004 +#define AOFF_task_p_osptr 0x000000d4 +#define ASIZ_task_p_osptr 0x00000004 +#define AOFF_task_wait_chldexit 0x000000d8 +#define ASIZ_task_wait_chldexit 0x00000004 +#define AOFF_task_uid 0x000000dc +#define ASIZ_task_uid 0x00000002 +#define AOFF_task_euid 0x000000de +#define ASIZ_task_euid 0x00000002 +#define AOFF_task_suid 0x000000e0 +#define ASIZ_task_suid 0x00000002 +#define AOFF_task_fsuid 0x000000e2 +#define ASIZ_task_fsuid 0x00000002 +#define AOFF_task_gid 0x000000e4 +#define ASIZ_task_gid 0x00000002 +#define AOFF_task_egid 0x000000e6 +#define ASIZ_task_egid 0x00000002 +#define AOFF_task_sgid 0x000000e8 +#define ASIZ_task_sgid 0x00000002 +#define AOFF_task_fsgid 0x000000ea +#define ASIZ_task_fsgid 0x00000002 +#define AOFF_task_timeout 0x000000ec +#define ASIZ_task_timeout 0x00000004 +#define AOFF_task_policy 0x000000f0 +#define ASIZ_task_policy 0x00000004 +#define AOFF_task_rt_priority 0x000000f4 +#define ASIZ_task_rt_priority 0x00000004 +#define AOFF_task_it_real_value 0x000000f8 +#define ASIZ_task_it_real_value 0x00000004 +#define AOFF_task_it_prof_value 0x000000fc +#define ASIZ_task_it_prof_value 0x00000004 +#define AOFF_task_it_virt_value 0x00000100 +#define ASIZ_task_it_virt_value 0x00000004 +#define AOFF_task_it_real_incr 0x00000104 +#define ASIZ_task_it_real_incr 0x00000004 +#define AOFF_task_it_prof_incr 0x00000108 +#define ASIZ_task_it_prof_incr 0x00000004 +#define AOFF_task_it_virt_incr 0x0000010c +#define ASIZ_task_it_virt_incr 0x00000004 +#define AOFF_task_real_timer 0x00000110 +#define ASIZ_task_real_timer 0x00000014 +#define AOFF_task_utime 0x00000124 +#define ASIZ_task_utime 0x00000004 +#define AOFF_task_stime 0x00000128 +#define ASIZ_task_stime 0x00000004 +#define AOFF_task_cutime 0x0000012c +#define ASIZ_task_cutime 0x00000004 +#define AOFF_task_cstime 0x00000130 +#define ASIZ_task_cstime 0x00000004 +#define AOFF_task_start_time 0x00000134 +#define ASIZ_task_start_time 0x00000004 +#define AOFF_task_min_flt 0x00000138 +#define ASIZ_task_min_flt 0x00000004 +#define AOFF_task_maj_flt 0x0000013c +#define ASIZ_task_maj_flt 0x00000004 +#define AOFF_task_nswap 0x00000140 +#define ASIZ_task_nswap 0x00000004 +#define AOFF_task_cmin_flt 0x00000144 +#define ASIZ_task_cmin_flt 0x00000004 +#define AOFF_task_cmaj_flt 0x00000148 +#define ASIZ_task_cmaj_flt 0x00000004 +#define AOFF_task_cnswap 0x0000014c +#define ASIZ_task_cnswap 0x00000004 +#define AOFF_task_swap_address 0x00000154 +#define ASIZ_task_swap_address 0x00000004 +#define AOFF_task_old_maj_flt 0x00000158 +#define ASIZ_task_old_maj_flt 0x00000004 +#define AOFF_task_dec_flt 0x0000015c +#define ASIZ_task_dec_flt 0x00000004 +#define AOFF_task_swap_cnt 0x00000160 +#define ASIZ_task_swap_cnt 0x00000004 +#define AOFF_task_rlim 0x00000164 +#define ASIZ_task_rlim 0x00000050 +#define AOFF_task_used_math 0x000001b4 +#define ASIZ_task_used_math 0x00000002 +#define AOFF_task_comm 0x000001b6 +#define ASIZ_task_comm 0x00000010 +#define AOFF_task_link_count 0x000001c8 +#define ASIZ_task_link_count 0x00000004 +#define AOFF_task_tty 0x000001cc +#define ASIZ_task_tty 0x00000004 +#define AOFF_task_semundo 0x000001d0 +#define ASIZ_task_semundo 0x00000004 +#define AOFF_task_semsleeping 0x000001d4 +#define ASIZ_task_semsleeping 0x00000004 +#define AOFF_task_ldt 0x000001d8 +#define ASIZ_task_ldt 0x00000004 +#define AOFF_task_tss 0x000001e0 +#define ASIZ_task_tss 0x00000390 +#define AOFF_task_fs 0x00000570 +#define ASIZ_task_fs 0x00000004 +#define AOFF_task_files 0x00000574 +#define ASIZ_task_files 0x00000004 +#define AOFF_task_mm 0x00000578 +#define ASIZ_task_mm 0x00000004 +#define AOFF_task_sig 0x0000057c +#define ASIZ_task_sig 0x00000004 +#define AOFF_task_processor 0x00000580 +#define ASIZ_task_processor 0x00000004 +#define AOFF_task_last_processor 0x00000584 +#define ASIZ_task_last_processor 0x00000004 +#define AOFF_task_lock_depth 0x00000588 +#define ASIZ_task_lock_depth 0x00000004 +#define AOFF_mm_count 0x00000000 +#define ASIZ_mm_count 0x00000004 +#define AOFF_mm_pgd 0x00000004 +#define ASIZ_mm_pgd 0x00000004 +#define AOFF_mm_context 0x00000008 +#define ASIZ_mm_context 0x00000004 +#define AOFF_mm_start_code 0x0000000c +#define ASIZ_mm_start_code 0x00000004 +#define AOFF_mm_end_code 0x00000010 +#define ASIZ_mm_end_code 0x00000004 +#define AOFF_mm_start_data 0x00000014 +#define ASIZ_mm_start_data 0x00000004 +#define AOFF_mm_end_data 0x00000018 +#define ASIZ_mm_end_data 0x00000004 +#define AOFF_mm_start_brk 0x0000001c +#define ASIZ_mm_start_brk 0x00000004 +#define AOFF_mm_brk 0x00000020 +#define ASIZ_mm_brk 0x00000004 +#define AOFF_mm_start_stack 0x00000024 +#define ASIZ_mm_start_stack 0x00000004 +#define AOFF_mm_start_mmap 0x00000028 +#define ASIZ_mm_start_mmap 0x00000004 +#define AOFF_mm_arg_start 0x0000002c +#define ASIZ_mm_arg_start 0x00000004 +#define AOFF_mm_arg_end 0x00000030 +#define ASIZ_mm_arg_end 0x00000004 +#define AOFF_mm_env_start 0x00000034 +#define ASIZ_mm_env_start 0x00000004 +#define AOFF_mm_env_end 0x00000038 +#define ASIZ_mm_env_end 0x00000004 +#define AOFF_mm_rss 0x0000003c +#define ASIZ_mm_rss 0x00000004 +#define AOFF_mm_total_vm 0x00000040 +#define ASIZ_mm_total_vm 0x00000004 +#define AOFF_mm_locked_vm 0x00000044 +#define ASIZ_mm_locked_vm 0x00000004 +#define AOFF_mm_def_flags 0x00000048 +#define ASIZ_mm_def_flags 0x00000004 +#define AOFF_mm_mmap 0x0000004c +#define ASIZ_mm_mmap 0x00000004 +#define AOFF_mm_mmap_avl 0x00000050 +#define ASIZ_mm_mmap_avl 0x00000004 +#define AOFF_mm_mmap_sem 0x00000054 +#define ASIZ_mm_mmap_sem 0x0000000c +#define AOFF_thread_uwinmask 0x00000000 +#define ASIZ_thread_uwinmask 0x00000004 +#define AOFF_thread_kregs 0x00000004 +#define ASIZ_thread_kregs 0x00000004 +#define AOFF_thread_sig_address 0x00000008 +#define ASIZ_thread_sig_address 0x00000004 +#define AOFF_thread_sig_desc 0x0000000c +#define ASIZ_thread_sig_desc 0x00000004 +#define AOFF_thread_ksp 0x00000010 +#define ASIZ_thread_ksp 0x00000004 +#define AOFF_thread_kpc 0x00000014 +#define ASIZ_thread_kpc 0x00000004 +#define AOFF_thread_kpsr 0x00000018 +#define ASIZ_thread_kpsr 0x00000004 +#define AOFF_thread_kwim 0x0000001c +#define ASIZ_thread_kwim 0x00000004 +#define AOFF_thread_fork_kpsr 0x00000020 +#define ASIZ_thread_fork_kpsr 0x00000004 +#define AOFF_thread_fork_kwim 0x00000024 +#define ASIZ_thread_fork_kwim 0x00000004 +#define AOFF_thread_reg_window 0x00000028 +#define ASIZ_thread_reg_window 0x00000200 +#define AOFF_thread_rwbuf_stkptrs 0x00000228 +#define ASIZ_thread_rwbuf_stkptrs 0x00000020 +#define AOFF_thread_w_saved 0x00000248 +#define ASIZ_thread_w_saved 0x00000004 +#define AOFF_thread_float_regs 0x00000250 +#define ASIZ_thread_float_regs 0x00000080 +#define AOFF_thread_fsr 0x000002d0 +#define ASIZ_thread_fsr 0x00000004 +#define AOFF_thread_fpqdepth 0x000002d4 +#define ASIZ_thread_fpqdepth 0x00000004 +#define AOFF_thread_fpqueue 0x000002d8 +#define ASIZ_thread_fpqueue 0x00000080 +#define AOFF_thread_sstk_info 0x00000358 +#define ASIZ_thread_sstk_info 0x00000008 +#define AOFF_thread_flags 0x00000360 +#define ASIZ_thread_flags 0x00000004 +#define AOFF_thread_current_ds 0x00000364 +#define ASIZ_thread_current_ds 0x00000004 +#define AOFF_thread_core_exec 0x00000368 +#define ASIZ_thread_core_exec 0x00000020 +#define AOFF_thread_new_signal 0x00000388 +#define ASIZ_thread_new_signal 0x00000004 + +#endif /* __ASM_OFFSETS_H__ */ diff --git a/include/asm-sparc/asmmacro.h b/include/asm-sparc/asmmacro.h index 8bf441c27..25211c93f 100644 --- a/include/asm-sparc/asmmacro.h +++ b/include/asm-sparc/asmmacro.h @@ -33,164 +33,14 @@ * lose. It makes sure the kernel has a proper window so that * c-code can be called. */ -#ifndef SMP_DEBUG -#define SAVE_ALL \ +#define SAVE_ALL_HEAD \ sethi %hi(trap_setup), %l4; \ - jmpl %l4 + %lo(trap_setup), %l6; \ - nop; -#else + jmpl %l4 + %lo(trap_setup), %l6; #define SAVE_ALL \ - GET_PROCESSOR_ID(l4); \ - set C_LABEL(trap_log), %l5; \ - sll %l4, 11, %l6; \ - add %l5, %l6, %l5; \ - set C_LABEL(trap_log_ent), %l6; \ - sll %l4, 2, %l4; \ - add %l6, %l4, %l6; \ - ld [%l6], %l6; \ - sll %l6, 3, %l6; \ - st %l1, [%l5 + %l6]; \ - add %l5, 4, %l5; \ - st %l0, [%l5 + %l6]; \ - set C_LABEL(trap_log_ent), %l5; \ - add %l5, %l4, %l5; \ - srl %l6, 3, %l6; \ - add %l6, 1, %l6; \ - and %l6, 255, %l6; \ - st %l6, [%l5]; \ - sethi %hi(trap_setup), %l4; \ - jmpl %l4 + %lo(trap_setup), %l6; \ + SAVE_ALL_HEAD \ nop; -#endif -/* All traps low-level code here must end with this macro. - * For SMP configurations the ret_trap_entry routine will - * have to appropriate code to actually release the kernel - * entry lock. - */ +/* All traps low-level code here must end with this macro. */ #define RESTORE_ALL b ret_trap_entry; clr %l6; -#ifndef __SMP__ - -#define ENTER_SYSCALL -#define LEAVE_SYSCALL -#define ENTER_IRQ -#define LEAVE_IRQ - -#else - -#define INCREMENT_COUNTER(symbol, tmp1, tmp2) \ - set C_LABEL(symbol), %tmp1; \ - ld [%tmp1], %tmp2; \ - add %tmp2, 1, %tmp2; \ - st %tmp2, [%tmp1]; - -#define DECREMENT_COUNTER(symbol, tmp1, tmp2) \ - set C_LABEL(symbol), %tmp1; \ - ld [%tmp1], %tmp2; \ - sub %tmp2, 1, %tmp2; \ - st %tmp2, [%tmp1]; - - /* This is so complicated I suggest you don't look at it. */ -#define ENTER_MASK(mask) \ - GET_PROCESSOR_OFFSET(l4) \ - set C_LABEL(smp_proc_in_lock), %l5; \ - ld [%l5 + %l4], %l6; \ - or %l6, mask, %l6; \ - st %l6, [%l5 + %l4]; \ -1: \ - set C_LABEL(kernel_flag), %l5; \ - ldstub [%l5], %l6; \ - cmp %l6, 0; \ - be 3f; \ - nop; \ - set C_LABEL(active_kernel_processor), %l5; \ - GET_PROCESSOR_ID(l4) \ - ldub [%l5], %l6; \ - cmp %l6, %l4; \ - be 4f; \ - nop; \ -2: \ - GET_PROCESSOR_MID(l4, l5) \ - set C_LABEL(sun4m_interrupts), %l5; \ - ld [%l5], %l5; \ - sll %l4, 12, %l4; \ - add %l5, %l4, %l5; \ - ld [%l5], %l4; \ - sethi %hi(0x80000000), %l6; \ - andcc %l6, %l4, %g0; \ - be 5f; \ - nop; \ - st %l6, [%l5 + 4]; \ - nop; nop; nop; \ - ld [%l5], %g0; \ - nop; nop; nop; \ - or %l0, PSR_PIL, %l4; \ - wr %l4, 0x0, %psr; \ - nop; nop; nop; \ - wr %l4, PSR_ET, %psr; \ - nop; nop; nop; \ - call C_LABEL(smp_message_irq); \ - nop; \ - wr %l0, 0x0, %psr; \ - nop; nop; nop; \ -5: \ - set C_LABEL(kernel_flag), %l5; \ - ldub [%l5], %l6; \ - cmp %l6, 0; \ - bne 2b; \ - nop; \ - b 1b; \ - nop; \ -3: \ - GET_PROCESSOR_ID(l4) \ - set C_LABEL(active_kernel_processor), %l5; \ - stb %l4, [%l5]; \ - GET_PROCESSOR_MID(l4, l5) \ - set C_LABEL(irq_rcvreg), %l5; \ - ld [%l5], %l5; \ - st %l4, [%l5]; \ -4: \ - -#define ENTER_SYSCALL \ - ENTER_MASK(SMP_FROM_SYSCALL) \ - INCREMENT_COUNTER(kernel_counter, l6, l5) \ - INCREMENT_COUNTER(syscall_count, l6, l5) - -#define ENTER_IRQ \ - ENTER_MASK(SMP_FROM_INT) \ - INCREMENT_COUNTER(kernel_counter, l6, l5) - -#define LEAVE_MASK(mask) \ - GET_PROCESSOR_OFFSET(l4) \ - set C_LABEL(smp_proc_in_lock), %l5; \ - ld [%l5 + %l4], %l6; \ - andn %l6, mask, %l6; \ - st %l6, [%l5 + %l4]; - -#define LEAVE_SYSCALL \ - LEAVE_MASK(SMP_FROM_SYSCALL) \ - DECREMENT_COUNTER(syscall_count, l6, l5) \ - set C_LABEL(kernel_counter), %l6; \ - ld [%l6], %l5; \ - subcc %l5, 1, %l5; \ - st %l5, [%l6]; \ - bne 1f; \ - nop; \ - set C_LABEL(active_kernel_processor), %l6; \ - mov NO_PROC_ID, %l5; \ - stb %l5, [%l6]; \ - set C_LABEL(kernel_flag), %l6; \ - stb %g0, [%l6]; \ -1: - -#define LEAVE_IRQ \ - LEAVE_MASK(SMP_FROM_INT) \ - INCREMENT_COUNTER(syscall_count, l6, l5) - - -#define RESTORE_ALL_FASTIRQ b,a ret_irq_entry; - -#endif /* !(__SMP__) */ - #endif /* !(_SPARC_ASMMACRO_H) */ diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h index 3e46c262e..b74eebb46 100644 --- a/include/asm-sparc/atomic.h +++ b/include/asm-sparc/atomic.h @@ -1,4 +1,4 @@ -/* atomic.h: These really suck for now. +/* atomic.h: These still suck, but the I-cache hit rate is higher. * * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) */ @@ -6,99 +6,119 @@ #ifndef __ARCH_SPARC_ATOMIC__ #define __ARCH_SPARC_ATOMIC__ -typedef int atomic_t; +#ifdef __SMP__ +/* This is a temporary measure. -DaveM */ +typedef struct { volatile int counter; } atomic_t; +#else +typedef struct { int counter; } atomic_t; +#endif + +#define ATOMIC_INIT(i) { (i << 8) } #ifdef __KERNEL__ #include <asm/system.h> #include <asm/psr.h> -/* - * Make sure gcc doesn't try to be clever and move things around +/* We do the bulk of the actual work out of line in two common + * routines in assembler, see arch/sparc/lib/atomic.S for the + * "fun" details. + * + * For SMP the trick is you embed the spin lock byte within + * the word, use the low byte so signedness is easily retained + * via a quick arithmetic shift. It looks like this: + * + * ---------------------------------------- + * | signed 24-bit counter value | lock | atomic_t + * ---------------------------------------- + * 31 8 7 0 + */ + +static __inline__ int atomic_read(atomic_t *v) +{ + int val; + + __asm__ __volatile__("sra %1, 0x8, %0" + : "=r" (val) + : "r" (v->counter)); + return val; +} +#define atomic_set(v, i) (((v)->counter) = ((i) << 8)) + +/* Make sure gcc doesn't try to be clever and move things around * on us. We need to use _exactly_ the address the user gave us, * not some alias that contains the same information. */ #define __atomic_fool_gcc(x) ((struct { int a[100]; } *)x) -static __inline__ void atomic_add(atomic_t i, atomic_t *v) +static __inline__ void atomic_add(int i, atomic_t *v) { + register atomic_t *ptr asm("g1"); + register int increment asm("g2"); + ptr = (atomic_t *) __atomic_fool_gcc(v); + increment = i; + __asm__ __volatile__(" - rd %%psr, %%g2 - andcc %%g2, %2, %%g0 - be,a 1f - wr %%g2, %2, %%psr -1: ld [%0], %%g3 - add %%g3, %1, %%g3 - andcc %%g2, %2, %%g0 - st %%g3, [%0] - be,a 1f - wr %%g2, 0x0, %%psr -1: nop; nop; - " - : : "r" (__atomic_fool_gcc(v)), "r" (i), "i" (PSR_PIL) - : "g2", "g3"); + mov %%o7, %%g4 + call ___atomic_add + add %%o7, 8, %%o7 +" : "=&r" (increment) + : "0" (increment), "r" (ptr) + : "g3", "g4", "g7", "memory", "cc"); } -static __inline__ void atomic_sub(atomic_t i, atomic_t *v) +static __inline__ void atomic_sub(int i, atomic_t *v) { + register atomic_t *ptr asm("g1"); + register int increment asm("g2"); + + ptr = (atomic_t *) __atomic_fool_gcc(v); + increment = i; + __asm__ __volatile__(" - rd %%psr, %%g2 - andcc %%g2, %2, %%g0 - be,a 1f - wr %%g2, %2, %%psr -1: ld [%0], %%g3 - sub %%g3, %1, %%g3 - andcc %%g2, %2, %%g0 - st %%g3, [%0] - be,a 1f - wr %%g2, 0x0, %%psr -1: nop; nop; - " - : : "r" (__atomic_fool_gcc(v)), "r" (i), "i" (PSR_PIL) - : "g2", "g3"); + mov %%o7, %%g4 + call ___atomic_sub + add %%o7, 8, %%o7 +" : "=&r" (increment) + : "0" (increment), "r" (ptr) + : "g3", "g4", "g7", "memory", "cc"); } -static __inline__ int atomic_add_return(atomic_t i, atomic_t *v) +static __inline__ int atomic_add_return(int i, atomic_t *v) { + register atomic_t *ptr asm("g1"); + register int increment asm("g2"); + + ptr = (atomic_t *) __atomic_fool_gcc(v); + increment = i; + __asm__ __volatile__(" - rd %%psr, %%g2 - andcc %%g2, %3, %%g0 - be,a 1f - wr %%g2, %3, %%psr -1: ld [%1], %%g3 - add %%g3, %2, %0 - andcc %%g2, %3, %%g0 - st %0, [%1] - be,a 1f - wr %%g2, 0x0, %%psr -1: nop; nop; - " - : "=&r" (i) - : "r" (__atomic_fool_gcc(v)), "0" (i), "i" (PSR_PIL) - : "g2", "g3"); - - return i; + mov %%o7, %%g4 + call ___atomic_add + add %%o7, 8, %%o7 +" : "=&r" (increment) + : "0" (increment), "r" (ptr) + : "g3", "g4", "g7", "memory", "cc"); + + return increment; } -static __inline__ int atomic_sub_return(atomic_t i, atomic_t *v) +static __inline__ int atomic_sub_return(int i, atomic_t *v) { + register atomic_t *ptr asm("g1"); + register int increment asm("g2"); + + ptr = (atomic_t *) __atomic_fool_gcc(v); + increment = i; + __asm__ __volatile__(" - rd %%psr, %%g2 - andcc %%g2, %3, %%g0 - be,a 1f - wr %%g2, %3, %%psr -1: ld [%1], %%g3 - sub %%g3, %2, %0 - andcc %%g2, %3, %%g0 - st %0, [%1] - be,a 1f - wr %%g2, 0x0, %%psr -1: nop; nop; - " - : "=&r" (i) - : "r" (__atomic_fool_gcc(v)), "0" (i), "i" (PSR_PIL) - : "g2", "g3"); - - return i; + mov %%o7, %%g4 + call ___atomic_sub + add %%o7, 8, %%o7 +" : "=&r" (increment) + : "0" (increment), "r" (ptr) + : "g3", "g4", "g7", "memory", "cc"); + + return increment; } #define atomic_dec_return(v) atomic_sub_return(1,(v)) diff --git a/include/asm-sparc/auxio.h b/include/asm-sparc/auxio.h index be4107408..f5b9d5591 100644 --- a/include/asm-sparc/auxio.h +++ b/include/asm-sparc/auxio.h @@ -1,4 +1,4 @@ -/* $Id: auxio.h,v 1.14 1996/10/31 06:29:10 davem Exp $ +/* $Id: auxio.h,v 1.16 1997/01/31 23:26:05 tdyas Exp $ * auxio.h: Definitions and code for the Auxiliary I/O register. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -56,6 +56,8 @@ extern __inline__ void set_auxio(unsigned char bits_on, unsigned char bits_off) *AUXREG = ((regval | bits_on) & ~bits_off) | AUXIO_ORMEIN; break; case sun4m: + if(!AUXREG) + break; /* VME chassic sun4m, no auxio. */ regval = *AUXREG; *AUXREG = ((regval | bits_on) & ~bits_off) | AUXIO_ORMEIN4M; break; @@ -67,4 +69,13 @@ extern __inline__ void set_auxio(unsigned char bits_on, unsigned char bits_off) } #endif /* !(__ASSEMBLY__) */ + +/* AUXIO2 (Power Off Control) */ +extern __volatile__ unsigned char * auxio_power_register; + +#define AUXIO_POWER_DETECT_FAILURE 32 +#define AUXIO_POWER_CLEAR_FAILURE 2 +#define AUXIO_POWER_OFF 1 + + #endif /* !(_SPARC_AUXIO_H) */ diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h index 85d86c6dd..f78b3b22a 100644 --- a/include/asm-sparc/bitops.h +++ b/include/asm-sparc/bitops.h @@ -1,4 +1,4 @@ -/* $Id: bitops.h,v 1.36 1996/09/29 22:57:21 davem Exp $ +/* $Id: bitops.h,v 1.46 1997/04/13 06:38:24 davem Exp $ * bitops.h: Bit string operations on the Sparc. * * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) @@ -97,86 +97,55 @@ extern __inline__ unsigned long change_bit(unsigned long nr, void *addr) extern __inline__ unsigned long set_bit(unsigned long nr, __SMPVOL void *addr) { - int mask; - unsigned long *ADDR = (unsigned long *) addr; - - ADDR += nr >> 5; + register unsigned long mask asm("g2"); + register unsigned long *ADDR asm("g1"); + ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); __asm__ __volatile__(" - rd %%psr, %%g3 - andcc %%g3, %3, %%g0 - be,a 1f - wr %%g3, %3, %%psr -1: ld [%0], %%g4 - or %%g4, %2, %%g2 - andcc %%g3, %3, %%g0 - st %%g2, [%0] - be,a 1f - wr %%g3, 0x0, %%psr -1: nop - and %%g4, %2, %0 - " - : "=&r" (ADDR) - : "0" (ADDR), "r" (mask), "i" (PSR_PIL) - : "g2", "g3", "g4"); - - return (unsigned long) ADDR; + mov %%o7, %%g4 + call ___set_bit + add %%o7, 8, %%o7 +" : "=&r" (mask) + : "0" (mask), "r" (ADDR) + : "g3", "g4", "g5", "g7", "cc"); + + return mask; } extern __inline__ unsigned long clear_bit(unsigned long nr, __SMPVOL void *addr) { - int mask; - unsigned long *ADDR = (unsigned long *) addr; + register unsigned long mask asm("g2"); + register unsigned long *ADDR asm("g1"); - ADDR += nr >> 5; + ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); __asm__ __volatile__(" - rd %%psr, %%g3 - andcc %%g3, %3, %%g0 - be,a 1f - wr %%g3, %3, %%psr -1: ld [%0], %%g4 - andn %%g4, %2, %%g2 - andcc %%g3, %3, %%g0 - st %%g2, [%0] - be,a 1f - wr %%g3, 0x0, %%psr -1: nop - and %%g4, %2, %0 - " - : "=&r" (ADDR) - : "0" (ADDR), "r" (mask), "i" (PSR_PIL) - : "g2", "g3", "g4"); - - return (unsigned long) ADDR; + mov %%o7, %%g4 + call ___clear_bit + add %%o7, 8, %%o7 +" : "=&r" (mask) + : "0" (mask), "r" (ADDR) + : "g3", "g4", "g5", "g7", "cc"); + + return mask; } extern __inline__ unsigned long change_bit(unsigned long nr, __SMPVOL void *addr) { - int mask; - unsigned long *ADDR = (unsigned long *) addr; + register unsigned long mask asm("g2"); + register unsigned long *ADDR asm("g1"); - ADDR += nr >> 5; + ADDR = ((unsigned long *) addr) + (nr >> 5); mask = 1 << (nr & 31); __asm__ __volatile__(" - rd %%psr, %%g3 - andcc %%g3, %3, %%g0 - be,a 1f - wr %%g3, %3, %%psr -1: ld [%0], %%g4 - xor %%g4, %2, %%g2 - andcc %%g3, %3, %%g0 - st %%g2, [%0] - be,a 1f - wr %%g3, 0x0, %%psr -1: nop - and %%g4, %2, %0 - " - : "=&r" (ADDR) - : "0" (ADDR), "r" (mask), "i" (PSR_PIL) - : "g2", "g3", "g4"); - - return (unsigned long) ADDR; + mov %%o7, %%g4 + call ___change_bit + add %%o7, 8, %%o7 +" : "=&r" (mask) + : "0" (mask), "r" (ADDR) + : "g3", "g4", "g5", "g7", "cc"); + + return mask; } #endif /* __KERNEL__ */ @@ -249,7 +218,7 @@ found_middle: #ifndef __KERNEL__ -extern __inline__ int __ext2_set_bit(int nr, void *addr) +extern __inline__ int set_le_bit(int nr, void *addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; @@ -269,7 +238,7 @@ extern __inline__ int __ext2_set_bit(int nr, void *addr) return (int) ADDR; } -extern __inline__ int __ext2_clear_bit(int nr, void *addr) +extern __inline__ int clear_le_bit(int nr, void *addr) { int mask; unsigned char *ADDR = (unsigned char *) addr; @@ -293,65 +262,45 @@ extern __inline__ int __ext2_clear_bit(int nr, void *addr) /* Now for the ext2 filesystem bit operations and helper routines. */ -extern __inline__ int __ext2_set_bit(int nr,void * addr) +extern __inline__ int set_le_bit(int nr,void * addr) { - int mask; - unsigned char *ADDR = (unsigned char *) addr; + register int mask asm("g2"); + register unsigned char *ADDR asm("g1"); - ADDR += nr >> 3; + ADDR = ((unsigned char *) addr) + (nr >> 3); mask = 1 << (nr & 0x07); __asm__ __volatile__(" - rd %%psr, %%g3 - andcc %%g3, %3, %%g0 - be,a 1f - wr %%g3, %3, %%psr -1: ldub [%0], %%g4 - or %%g4, %2, %%g2 - andcc %%g3, %3, %%g0 - stb %%g2, [%0] - be,a 1f - wr %%g3, 0x0, %%psr -1: nop - and %%g4, %2, %0 - " - : "=&r" (ADDR) - : "0" (ADDR), "r" (mask), "i" (PSR_PIL) - : "g2", "g3", "g4"); - - return (int) ADDR; + mov %%o7, %%g4 + call ___set_le_bit + add %%o7, 8, %%o7 +" : "=&r" (mask) + : "0" (mask), "r" (ADDR) + : "g3", "g4", "g5", "g7", "cc"); + + return mask; } -extern __inline__ int __ext2_clear_bit(int nr, void * addr) +extern __inline__ int clear_le_bit(int nr, void * addr) { - int mask; - unsigned char *ADDR = (unsigned char *) addr; + register int mask asm("g2"); + register unsigned char *ADDR asm("g1"); - ADDR += nr >> 3; + ADDR = ((unsigned char *) addr) + (nr >> 3); mask = 1 << (nr & 0x07); __asm__ __volatile__(" - rd %%psr, %%g3 - andcc %%g3, %3, %%g0 - be,a 1f - wr %%g3, %3, %%psr -1: ldub [%0], %%g4 - andn %%g4, %2, %%g2 - andcc %%g3, %3, %%g0 - stb %%g2, [%0] - be,a 1f - wr %%g3, 0x0, %%psr -1: nop - and %%g4, %2, %0 - " - : "=&r" (ADDR) - : "0" (ADDR), "r" (mask), "i" (PSR_PIL) - : "g2", "g3", "g4"); - - return (int) ADDR; + mov %%o7, %%g4 + call ___clear_le_bit + add %%o7, 8, %%o7 +" : "=&r" (mask) + : "0" (mask), "r" (ADDR) + : "g3", "g4", "g5", "g7", "cc"); + + return mask; } #endif /* __KERNEL__ */ -extern __inline__ int __ext2_test_bit(int nr, __const__ void * addr) +extern __inline__ int test_le_bit(int nr, __const__ void * addr) { int mask; __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; @@ -361,21 +310,24 @@ extern __inline__ int __ext2_test_bit(int nr, __const__ void * addr) return ((mask & *ADDR) != 0); } -extern __inline__ unsigned short __swab16(unsigned short value) -{ - return ((value >> 8) | (value << 8)); -} +#ifdef __KERNEL__ + +#define ext2_set_bit set_le_bit +#define ext2_clear_bit clear_le_bit +#define ext2_test_bit test_le_bit + +#endif /* __KERNEL__ */ + +#define find_first_zero_le_bit(addr, size) \ + find_next_zero_le_bit((addr), (size), 0) extern __inline__ unsigned long __swab32(unsigned long value) { - return ((value >> 24) | ((value >> 8) & 0xff00) | - ((value << 8) & 0xff0000) | (value << 24)); + return((value>>24) | ((value>>8)&0xff00) | + ((value<<8)&0xff0000) | (value<<24)); } -#define __ext2_find_first_zero_bit(addr, size) \ - __ext2_find_next_zero_bit((addr), (size), 0) - -extern __inline__ unsigned long __ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) +extern __inline__ unsigned long find_next_zero_le_bit(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; @@ -411,5 +363,17 @@ found_middle: return result + ffz(__swab32(tmp)); } -#endif /* defined(_SPARC_BITOPS_H) */ +#ifdef __KERNEL__ + +#define ext2_find_first_zero_bit find_first_zero_le_bit +#define ext2_find_next_zero_bit find_next_zero_le_bit + +/* Bitmap functions for the minix filesystem. */ +#define minix_set_bit(nr,addr) set_bit(nr,addr) +#define minix_clear_bit(nr,addr) clear_bit(nr,addr) +#define minix_test_bit(nr,addr) test_bit(nr,addr) +#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) +#endif /* __KERNEL__ */ + +#endif /* defined(_SPARC_BITOPS_H) */ diff --git a/include/asm-sparc/bpp.h b/include/asm-sparc/bpp.h new file mode 100644 index 000000000..d1b967a00 --- /dev/null +++ b/include/asm-sparc/bpp.h @@ -0,0 +1,82 @@ +#ifndef _SPARC_BPP_H +#define _SPARC_BPP_H + +/* + * Copyright (c) 1995 Picture Elements + * Stephen Williams + * Gus Baldauf + * + * Linux/SPARC port by Peter Zaitcev. + * Integration into SPARC tree by Tom Dyas. + */ + +#include <linux/ioctl.h> + +/* + * This is a driver that supports IEEE Std 1284-1994 communications + * with compliant or compatible devices. It will use whatever features + * the device supports, prefering those that are typically faster. + * + * When the device is opened, it is left in COMPATABILITY mode, and + * writes work like any printer device. The driver only attempt to + * negotiate 1284 modes when needed so that plugs can be pulled, + * switch boxes switched, etc., without disrupting things. It will + * also leave the device in compatibility mode when closed. + */ + + + +/* + * This driver also supplies ioctls to manually manipulate the + * pins. This is great for testing devices, or writing code to deal + * with bizzarro-mode of the ACME Special TurboThingy Plus. + * + * NOTE: These ioctl currently do not interact well with + * read/write. Caveat emptor. + * + * PUT_PINS allows us to assign the sense of all the pins, including + * the data pins if being driven by the host. The GET_PINS returns the + * pins that the peripheral drives, including data if appropriate. + */ + +# define BPP_PUT_PINS _IOW('B', 1, int) +# define BPP_GET_PINS _IOR('B', 2, void) +# define BPP_PUT_DATA _IOW('B', 3, int) +# define BPP_GET_DATA _IOR('B', 4, void) + +/* + * Set the data bus to input mode. Disengage the data bin driver and + * be prepared to read values from the peripheral. If the arg is 0, + * then revert the bus to output mode. + */ +# define BPP_SET_INPUT _IOW('B', 5, int) + +/* + * These bits apply to the PUT operation... + */ +# define BPP_PP_nStrobe 0x0001 +# define BPP_PP_nAutoFd 0x0002 +# define BPP_PP_nInit 0x0004 +# define BPP_PP_nSelectIn 0x0008 + +/* + * These apply to the GET operation, which also reads the current value + * of the previously put values. A bit mask of these will be returned + * as a bit mask in the return code of the ioctl(). + */ +# define BPP_GP_nAck 0x0100 +# define BPP_GP_Busy 0x0200 +# define BPP_GP_PError 0x0400 +# define BPP_GP_Select 0x0800 +# define BPP_GP_nFault 0x1000 + + +/* + * Prototype for the initialization routine. + */ + +#ifdef __KERNEL__ +extern int bpp_init(void); +#endif + +#endif diff --git a/include/asm-sparc/byteorder.h b/include/asm-sparc/byteorder.h index 4f1cd2e65..6fd6d02e2 100644 --- a/include/asm-sparc/byteorder.h +++ b/include/asm-sparc/byteorder.h @@ -1,17 +1,17 @@ -/* $Id: byteorder.h,v 1.9 1996/08/30 05:21:34 davem Exp $ */ +/* $Id: byteorder.h,v 1.12 1996/12/19 08:08:20 davem Exp $ */ #ifndef _SPARC_BYTEORDER_H #define _SPARC_BYTEORDER_H -#define ntohl(x) x -#define ntohs(x) x -#define htonl(x) x -#define htons(x) x +#define ntohl(x) (x) +#define ntohs(x) (x) +#define htonl(x) (x) +#define htons(x) (x) /* Some programs depend upon these being around. */ -#define __constant_ntohl(x) x -#define __constant_ntohs(x) x -#define __constant_htonl(x) x -#define __constant_htons(x) x +#define __constant_ntohl(x) (x) +#define __constant_ntohs(x) (x) +#define __constant_htonl(x) (x) +#define __constant_htons(x) (x) #ifndef __BIG_ENDIAN #define __BIG_ENDIAN 4321 @@ -21,4 +21,36 @@ #define __BIG_ENDIAN_BITFIELD #endif +#ifdef __KERNEL__ + +/* Convert from CPU byte order, to specified byte order. */ +extern __inline__ __u16 cpu_to_le16(__u16 value) +{ + return (value >> 8) | (value << 8); +} + +extern __inline__ __u32 cpu_to_le32(__u32 value) +{ + return((value>>24) | ((value>>8)&0xff00) | + ((value<<8)&0xff0000) | (value<<24)); +} +#define cpu_to_be16(x) (x) +#define cpu_to_be32(x) (x) + +/* Convert from specified byte order, to CPU byte order. */ +extern __inline__ __u16 le16_to_cpu(__u16 value) +{ + return (value >> 8) | (value << 8); +} + +extern __inline__ __u32 le32_to_cpu(__u32 value) +{ + return((value>>24) | ((value>>8)&0xff00) | + ((value<<8)&0xff0000) | (value<<24)); +} +#define be16_to_cpu(x) (x) +#define be32_to_cpu(x) (x) + +#endif /* __KERNEL__ */ + #endif /* !(_SPARC_BYTEORDER_H) */ diff --git a/include/asm-sparc/cache.h b/include/asm-sparc/cache.h index f537c5cc3..f1e694ea6 100644 --- a/include/asm-sparc/cache.h +++ b/include/asm-sparc/cache.h @@ -1,4 +1,4 @@ -/* $Id: cache.h,v 1.5 1996/08/29 09:48:06 davem Exp $ +/* $Id: cache.h,v 1.6 1996/12/28 19:55:12 davem Exp $ * cache.h: Cache specific code for the Sparc. These include flushing * and direct tag/data line access. * @@ -10,6 +10,8 @@ #include <asm/asi.h> +#define L1_CACHE_BYTES 32 + /* Direct access to the instruction cache is provided through and * alternate address space. The IDC bit must be off in the ICCR on * HyperSparcs for these accesses to work. The code below does not do diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h index a11777025..85311970c 100644 --- a/include/asm-sparc/checksum.h +++ b/include/asm-sparc/checksum.h @@ -1,4 +1,4 @@ -/* $Id: checksum.h,v 1.22 1996/11/10 21:28:25 davem Exp $ */ +/* $Id: checksum.h,v 1.27 1997/04/11 00:42:18 davem Exp $ */ #ifndef __SPARC_CHECKSUM_H #define __SPARC_CHECKSUM_H @@ -8,12 +8,16 @@ * Copyright(C) 1995 Miguel de Icaza * Copyright(C) 1996 David S. Miller * Copyright(C) 1996 Eddie C. Dost + * Copyright(C) 1997 Jakub Jelinek * * derived from: * Alpha checksum c-code * ix86 inline assembly * RFC1071 Computing the Internet Checksum */ + +#include <asm/uaccess.h> +#include <asm/cprefix.h> /* computes the checksum of a memory block at buff, length len, * and adds in "sum" (32-bit) @@ -34,11 +38,86 @@ extern unsigned int csum_partial(unsigned char * buff, int len, unsigned int sum * here even more important to align src and dst on a 32-bit (or even * better 64-bit) boundary */ -extern unsigned int csum_partial_copy(char *src, char *dst, int len, int sum); +/* FIXME: Remove these two macros ASAP */ +#define csum_partial_copy(src, dst, len, sum) \ + csum_partial_copy_nocheck(src,dst,len,sum) #define csum_partial_copy_fromuser(s, d, l, w) \ - csum_partial_copy((char *) (s), (d), (l), (w)) + csum_partial_copy((char *) (s), (d), (l), (w)) + +extern unsigned int __csum_partial_copy_sparc_generic (const char *, char *); +extern __inline__ unsigned int +csum_partial_copy_nocheck (const char *src, char *dst, int len, + unsigned int sum) +{ + register unsigned int ret asm("o0") = (unsigned int)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + + __asm__ __volatile__ (" + call " C_LABEL_STR(__csum_partial_copy_sparc_generic) " + mov %4, %%g7 + " : "=r" (ret) : "0" (ret), "r" (d), "r" (l), "r" (sum) : + "o1", "o2", "o3", "o4", "o5", "o7", "g1", "g2", "g3", "g4", "g5", "g7"); + return ret; +} + +extern __inline__ unsigned int +csum_partial_copy_from_user(const char *src, char *dst, int len, + unsigned int sum, int *err) + { + if (!access_ok (VERIFY_READ, src, len)) { + *err = -EFAULT; + memset (dst, 0, len); + return sum; + } else { + register unsigned int ret asm("o0") = (unsigned int)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + register unsigned int s asm("g7") = sum; + + __asm__ __volatile__ (" + .section __ex_table,#alloc + .align 4 + .word 1f,2 + .previous +1: + call " C_LABEL_STR(__csum_partial_copy_sparc_generic) " + st %5, [%%sp + 64] + " : "=r" (ret) : "0" (ret), "r" (d), "r" (l), "r" (s), "r" (err) : + "o1", "o2", "o3", "o4", "o5", "o7", "g1", "g2", "g3", "g4", "g5", "g7"); + return ret; + } + } + +extern __inline__ unsigned int +csum_partial_copy_to_user(const char *src, char *dst, int len, + unsigned int sum, int *err) +{ + if (!access_ok (VERIFY_WRITE, dst, len)) { + *err = -EFAULT; + return sum; + } else { + register unsigned int ret asm("o0") = (unsigned int)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + register unsigned int s asm("g7") = sum; + + __asm__ __volatile__ (" + .section __ex_table,#alloc + .align 4 + .word 1f,1 + .previous +1: + call " C_LABEL_STR(__csum_partial_copy_sparc_generic) " + st %5, [%%sp + 64] + " : "=r" (ret) : "0" (ret), "r" (d), "r" (l), "r" (s), "r" (err) : + "o1", "o2", "o3", "o4", "o5", "o7", "g1", "g2", "g3", "g4", "g5", "g7"); + return ret; + } +} + /* ihl is always 5 or greater, almost always is 5, and iph is word aligned * the majority of the time. */ @@ -75,7 +154,7 @@ extern __inline__ unsigned short ip_fast_csum(__const__ unsigned char *iph, "xnor\t%%g0, %0, %0" : "=r" (sum), "=&r" (iph) : "r" (ihl), "1" (iph) - : "g2", "g3", "g4"); + : "g2", "g3", "g4", "cc"); return sum; } @@ -99,7 +178,8 @@ extern __inline__ unsigned short csum_tcpudp_magic(unsigned long saddr, "xnor\t%%g0, %0, %0" : "=r" (sum), "=r" (saddr) : "r" (daddr), "r" ((proto<<16)+len), "0" (sum), - "1" (saddr)); + "1" (saddr) + : "cc"); return sum; } @@ -113,7 +193,8 @@ extern __inline__ unsigned int csum_fold(unsigned int sum) "addx\t%1, %%g0, %1\n\t" "xnor\t%%g0, %1, %0" : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" (sum<<16)); + : "0" (sum), "1" (sum<<16) + : "cc"); return sum; } @@ -149,7 +230,7 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, : "=&r" (sum) : "r" (saddr), "r" (daddr), "r"(htonl((__u32) (len))), "r"(htonl(proto)), "r"(sum) - : "g2", "g3", "g4"); + : "g2", "g3", "g4", "cc"); return csum_fold(sum); } diff --git a/include/asm-sparc/cprefix.h b/include/asm-sparc/cprefix.h index 61cde329a..42e7bd577 100644 --- a/include/asm-sparc/cprefix.h +++ b/include/asm-sparc/cprefix.h @@ -11,8 +11,10 @@ #if defined(__svr4__) || defined(__ELF__) #define C_LABEL_PREFIX +#define C_LABEL_STR(name) #name #else #define C_LABEL_PREFIX _ +#define C_LABEL_STR(name) "_" #name #endif #define CONCAT(a, b) CONCAT2(a, b) diff --git a/include/asm-sparc/current.h b/include/asm-sparc/current.h new file mode 100644 index 000000000..254ce5618 --- /dev/null +++ b/include/asm-sparc/current.h @@ -0,0 +1,13 @@ +#ifndef _SPARC_CURRENT_H +#define _SPARC_CURRENT_H + +/* Some architectures may want to do something "clever" here since + * this is the most frequently accessed piece of data in the entire + * kernel. + */ +extern struct task_struct *current_set[NR_CPUS]; + +/* Sparc rules... */ +register struct task_struct *current asm("g6"); + +#endif /* !(_SPARC_CURRENT_H) */ diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h index 71e1154a0..e604769ed 100644 --- a/include/asm-sparc/delay.h +++ b/include/asm-sparc/delay.h @@ -1,4 +1,4 @@ -/* $Id: delay.h,v 1.8 1996/01/28 02:09:21 davem Exp $ +/* $Id: delay.h,v 1.9 1997/04/11 00:42:19 davem Exp $ * delay.h: Linux delay routines on the Sparc. * * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu). @@ -15,7 +15,8 @@ extern __inline__ void __delay(unsigned long loops) "1: bne 1b\n\t" "subcc %0, 1, %0\n" : "=&r" (loops) : - "0" (loops)); + "0" (loops) : + "cc"); } /* This is too messy with inline asm on the Sparc. */ diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h index a86379a71..9c6885d10 100644 --- a/include/asm-sparc/dma.h +++ b/include/asm-sparc/dma.h @@ -1,4 +1,4 @@ -/* $Id: dma.h,v 1.22 1996/10/17 05:29:01 davem Exp $ +/* $Id: dma.h,v 1.24 1997/04/10 05:13:21 davem Exp $ * include/asm-sparc/dma.h * * Copyright 1995 (C) David S. Miller (davem@caip.rutgers.edu) @@ -8,6 +8,7 @@ #define _ASM_SPARC_DMA_H #include <linux/kernel.h> +#include <linux/types.h> #include <asm/vac-ops.h> /* for invalidate's, etc. */ #include <asm/sbus.h> @@ -28,10 +29,10 @@ /* Structure to describe the current status of DMA registers on the Sparc */ struct sparc_dma_registers { - __volatile__ unsigned long cond_reg; /* DMA condition register */ - __volatile__ char * st_addr; /* Start address of this transfer */ - __volatile__ unsigned long cnt; /* How many bytes to transfer */ - __volatile__ unsigned long dma_test; /* DMA test register */ + __volatile__ __u32 cond_reg; /* DMA condition register */ + __volatile__ __u32 st_addr; /* Start address of this transfer */ + __volatile__ __u32 cnt; /* How many bytes to transfer */ + __volatile__ __u32 dma_test; /* DMA test register */ }; /* DVMA chip revisions */ @@ -74,7 +75,6 @@ extern struct Linux_SBus_DMA *dma_chain; #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) /* Main routines in dma.c */ -extern void dump_dma_regs(struct sparc_dma_registers *); extern unsigned long dvma_init(struct linux_sbus *, unsigned long); /* Fields in the cond_reg register */ diff --git a/include/asm-sparc/errno.h b/include/asm-sparc/errno.h index 3348a3833..6e47578f3 100644 --- a/include/asm-sparc/errno.h +++ b/include/asm-sparc/errno.h @@ -1,4 +1,4 @@ -/* $Id: errno.h,v 1.5 1996/07/13 02:05:13 tridge Exp $ */ +/* $Id: errno.h,v 1.6 1997/04/15 09:03:38 davem Exp $ */ #ifndef _SPARC_ERRNO_H #define _SPARC_ERRNO_H @@ -130,4 +130,7 @@ #define ELIBMAX 123 /* Atmpt to link in too many shared libs */ #define ELIBSCN 124 /* .lib section in a.out corrupted */ +#define ENOMEDIUM 125 /* No medium found */ +#define EMEDIUMTYPE 126 /* Wrong medium type */ + #endif diff --git a/include/asm-sparc/fbio.h b/include/asm-sparc/fbio.h index b7eb21003..7c4ba26e4 100644 --- a/include/asm-sparc/fbio.h +++ b/include/asm-sparc/fbio.h @@ -33,6 +33,9 @@ #define FBTYPE_LASTPLUSONE 21 /* This is not last + 1 in fact... */ +/* Does not seem to be listed in the Sun file either */ +#define FBTYPE_CREATOR 22 + /* fbio ioctls */ /* Returned by FBIOGTYPE */ struct fbtype { diff --git a/include/asm-sparc/fcntl.h b/include/asm-sparc/fcntl.h index 792e29b56..5e4a68af6 100644 --- a/include/asm-sparc/fcntl.h +++ b/include/asm-sparc/fcntl.h @@ -1,4 +1,4 @@ -/* $Id: fcntl.h,v 1.8 1996/10/27 08:55:26 davem Exp $ */ +/* $Id: fcntl.h,v 1.9 1997/02/04 07:29:20 davem Exp $ */ #ifndef _SPARC_FCNTL_H #define _SPARC_FCNTL_H @@ -8,7 +8,6 @@ #define O_WRONLY 0x0001 #define O_RDWR 0x0002 #define O_ACCMODE 0x0003 -#define O_NDELAY 0x0004 #define O_APPEND 0x0008 #define FASYNC 0x0040 /* fcntl, for BSD compatibility */ #define O_CREAT 0x0200 /* not fcntl */ @@ -16,6 +15,7 @@ #define O_EXCL 0x0800 /* not fcntl */ #define O_SYNC 0x2000 #define O_NONBLOCK 0x4000 +#define O_NDELAY (0x0004 | O_NONBLOCK) #define O_NOCTTY 0x8000 /* not fcntl */ #define F_DUPFD 0 /* dup */ diff --git a/include/asm-sparc/hardirq.h b/include/asm-sparc/hardirq.h new file mode 100644 index 000000000..2d3f70bc6 --- /dev/null +++ b/include/asm-sparc/hardirq.h @@ -0,0 +1,71 @@ +/* hardirq.h: 32-bit Sparc hard IRQ support. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC_HARDIRQ_H +#define __SPARC_HARDIRQ_H + +#include <linux/tasks.h> + +extern unsigned int local_irq_count[NR_CPUS]; +#define in_interrupt() (local_irq_count[smp_processor_id()] != 0) + +#ifndef __SMP__ + +#define hardirq_trylock(cpu) (local_irq_count[cpu] == 0) +#define hardirq_endlock(cpu) do { } while(0) + +#define hardirq_enter(cpu) (local_irq_count[cpu]++) +#define hardirq_exit(cpu) (local_irq_count[cpu]--) + +#define synchronize_irq() do { } while(0) + +#else /* __SMP__ */ + +#include <asm/atomic.h> +#include <asm/spinlock.h> +#include <asm/system.h> +#include <asm/smp.h> + +extern unsigned char global_irq_holder; +extern spinlock_t global_irq_lock; +extern atomic_t global_irq_count; + +#define release_irqlock(cpu) \ +do { if(global_irq_holder == (unsigned char) cpu) { \ + global_irq_holder = NO_PROC_ID; \ + spin_unlock(&global_irq_lock); \ + } \ +} while(0) + +/* Ordering of the counter bumps is _deadly_ important. */ +#define hardirq_enter(cpu) \ + do { ++local_irq_count[cpu]; atomic_inc(&global_irq_count); } while(0) + +#define hardirq_exit(cpu) \ + do { atomic_dec(&global_irq_count); --local_irq_count[cpu]; } while(0) + +#define hardirq_trylock(cpu) \ +({ unsigned long flags; int ret = 1; \ + __save_flags(flags); \ + __cli(); \ + if(atomic_add_return(1, &global_irq_count) != 1 || \ + global_irq_lock) { \ + atomic_dec(&global_irq_count); \ + __restore_flags(flags); \ + ret = 0; \ + } else { \ + ++local_irq_count[cpu]; \ + __sti(); \ + } \ + ret; \ +}) + +#define hardirq_endlock(cpu) do { __cli(); hardirq_exit(cpu); __sti(); } while(0) + +extern void synchronize_irq(void); + +#endif /* __SMP__ */ + +#endif /* __SPARC_HARDIRQ_H */ diff --git a/include/asm-sparc/head.h b/include/asm-sparc/head.h index f89e41fc8..306328e96 100644 --- a/include/asm-sparc/head.h +++ b/include/asm-sparc/head.h @@ -1,4 +1,4 @@ -/* $Id: head.h,v 1.30 1996/07/29 21:00:28 miguel Exp $ */ +/* $Id: head.h,v 1.32 1996/12/04 00:12:48 ecd Exp $ */ #ifndef __SPARC_HEAD_H #define __SPARC_HEAD_H @@ -54,16 +54,16 @@ /* Software trap for Slowaris system calls. */ #define SOLARIS_SYSCALL_TRAP \ - sethi %hi(C_LABEL(sys_call_table)), %l7; \ - or %l7, %lo(C_LABEL(sys_call_table)), %l7; \ b solaris_syscall; \ - rd %psr, %l0; + rd %psr, %l0; \ + nop; \ + nop; #define INDIRECT_SOLARIS_SYSCALL(x) \ - sethi %hi(C_LABEL(sys_call_table)), %l7; \ - or %g0,%lo(x),%g1; \ - b solaris_indirect_syscall; \ - rd %psr, %l0; + mov x, %g1; \ + b solaris_syscall; \ + rd %psr, %l0; \ + nop; #define BREAKPOINT_TRAP \ b breakpoint_trap; \ diff --git a/include/asm-sparc/init.h b/include/asm-sparc/init.h new file mode 100644 index 000000000..eddd82ca8 --- /dev/null +++ b/include/asm-sparc/init.h @@ -0,0 +1,24 @@ +#ifndef _SPARC_INIT_H +#define _SPARC_INIT_H + +#if (defined (__svr4__) || defined (__ELF__)) +#define __init __attribute__ ((__section__ (".text.init"))) +#define __initdata __attribute__ ((__section__ (".data.init"))) +#define __initfunc(__arginit) \ + __arginit __init; \ + __arginit +/* For assembly routines */ +#define __INIT .section ".text.init",#alloc,#execinstr +#define __FINIT .previous +#define __INITDATA .section ".data.init",#alloc,#write +#else +#define __init +#define __initdata +#define __initfunc(__arginit) __arginit +/* For assembly routines */ +#define __INIT +#define __FINIT +#define __INITDATA +#endif + +#endif diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h index 88adf1621..b1fb5b30e 100644 --- a/include/asm-sparc/io.h +++ b/include/asm-sparc/io.h @@ -1,8 +1,9 @@ -/* $Id: io.h,v 1.10 1996/08/29 09:48:14 davem Exp $ */ +/* $Id: io.h,v 1.14 1997/04/10 05:13:22 davem Exp $ */ #ifndef __SPARC_IO_H #define __SPARC_IO_H #include <linux/kernel.h> +#include <linux/types.h> #include <asm/page.h> /* IO address mapping routines need this */ #include <asm/system.h> @@ -135,8 +136,21 @@ extern __inline__ void unmapioaddr(unsigned long virt_addr) return; } -extern void *sparc_alloc_io (void *, void *, int, char *, int, int); -extern void sparc_free_io (void *, int); -extern void *sparc_dvma_malloc (int, char *); +extern void *sparc_alloc_io (u32 pa, void *va, int sz, char *name, u32 io, int rdonly); +extern void sparc_free_io (void *vaddr, int sz); +extern void *_sparc_dvma_malloc (int sz, char *name); + +/* Returns CPU visible address, dvmaaddr_p is a pointer to where + * the DVMA visible (ie. SBUS/PSYCO+PCI) address should be stored. + */ +static __inline__ void *sparc_dvma_malloc(int size, char *name, __u32 *dvmaaddr_p) +{ + void *cpuaddr = _sparc_dvma_malloc(size, name); + *dvmaaddr_p = (__u32) cpuaddr; + return cpuaddr; +} + +#define virt_to_phys(x) __pa((unsigned long)(x)) +#define phys_to_virt(x) __va((unsigned long)(x)) #endif /* !(__SPARC_IO_H) */ diff --git a/include/asm-sparc/ipc.h b/include/asm-sparc/ipc.h new file mode 100644 index 000000000..ea6733264 --- /dev/null +++ b/include/asm-sparc/ipc.h @@ -0,0 +1,28 @@ +#ifndef __SPARC_IPC_H__ +#define __SPARC_IPC_H__ + +/* + * These are used to wrap system calls on the sparc. + * + * See arch/sparc/kernel/sys_sparc.c for ugly details.. + */ +struct ipc_kludge { + struct msgbuf *msgp; + long msgtyp; +}; + +#define SEMOP 1 +#define SEMGET 2 +#define SEMCTL 3 +#define MSGSND 11 +#define MSGRCV 12 +#define MSGGET 13 +#define MSGCTL 14 +#define SHMAT 21 +#define SHMDT 22 +#define SHMGET 23 +#define SHMCTL 24 + +#define IPCCALL(version,op) ((version)<<16 | (op)) + +#endif diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h index 7b1a13efb..16c2ca5a1 100644 --- a/include/asm-sparc/irq.h +++ b/include/asm-sparc/irq.h @@ -1,4 +1,4 @@ -/* $Id: irq.h,v 1.14 1996/08/29 09:48:18 davem Exp $ +/* $Id: irq.h,v 1.17 1997/04/18 05:44:52 davem Exp $ * irq.h: IRQ registers on the Sparc. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -13,6 +13,38 @@ #define NR_IRQS 15 +/* IRQ handler dispatch entry and exit. */ +#ifdef __SMP__ +extern __inline__ void irq_enter(int cpu, int irq) +{ + register int proc asm("g1"); + proc = cpu; + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___irq_enter + add %%o7, 8, %%o7 +" : "=&r" (proc) + : "0" (proc) + : "g2", "g3", "g4", "g5", "memory", "cc"); +} + +extern __inline__ void irq_exit(int cpu, int irq) +{ + register int proc asm("g7"); + proc = cpu; + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___irq_exit + add %%o7, 8, %%o7 +" : "=&r" (proc) + : "0" (proc) + : "g1", "g2", "g3", "g4", "g5", "memory", "cc"); +} +#else +#define irq_enter(cpu, irq) (local_irq_count[cpu]++) +#define irq_exit(cpu, irq) (local_irq_count[cpu]--) +#endif + /* Dave Redman (djhr@tadpole.co.uk) * changed these to function pointers.. it saves cycles and will allow * the irq dependencies to be split into different files at a later date @@ -20,9 +52,11 @@ */ extern void (*disable_irq)(unsigned int); extern void (*enable_irq)(unsigned int); -extern void (*clear_clock_irq)( void ); -extern void (*clear_profile_irq)( void ); -extern void (*load_profile_irq)( unsigned int timeout ); +extern void (*disable_pil_irq)(unsigned int); +extern void (*enable_pil_irq)(unsigned int); +extern void (*clear_clock_irq)(void); +extern void (*clear_profile_irq)(int); +extern void (*load_profile_irq)(int cpu, unsigned int timeout); extern void (*init_timers)(void (*lvl10_irq)(int, void *, struct pt_regs *)); extern void claim_ticker14(void (*irq_handler)(int, void *, struct pt_regs *), int irq, @@ -122,5 +156,6 @@ extern struct sun4m_intregs *sun4m_interrupts; #define SUN4M_INT_SBUSBITS 0x00003F80 /* sbus int bits */ #define SUN4M_INT_SBUS(x) (1 << (x+7)) +#define SUN4M_INT_VME(x) (1 << (x)) #endif diff --git a/include/asm-sparc/kbio.h b/include/asm-sparc/kbio.h index 7382d396f..3cf496bdf 100644 --- a/include/asm-sparc/kbio.h +++ b/include/asm-sparc/kbio.h @@ -32,6 +32,18 @@ enum { /* Get keyboard leds */ #define KIOCGLED _IOR('k', 15, unsigned char) +/* Used by KIOC[GS]RATE */ +struct kbd_rate { + unsigned char delay; /* Delay in Hz before first repeat. */ + unsigned char rate; /* In characters per second (0..50). */ +}; + +/* Set keyboard rate */ +#define KIOCSRATE _IOW('k', 40, struct kbd_rate) + +/* Get keyboard rate */ +#define KIOCGRATE _IOW('k', 41, struct kbd_rate) + /* Top bit records if the key is up or down */ #define KBD_UP 0x80 diff --git a/include/asm-sparc/linux_logo.h b/include/asm-sparc/linux_logo.h new file mode 100644 index 000000000..4c323b49e --- /dev/null +++ b/include/asm-sparc/linux_logo.h @@ -0,0 +1,2090 @@ +/* $Id: linux_logo.h,v 1.1 1997/04/16 17:51:24 jj Exp $ + * include/asm-sparc/linux_logo.h: This is a linux logo + * to be displayed on boot. + * + * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu) + * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + * + * You can put anything here, but: + * LINUX_LOGO_COLORS has to be less than 224 + * image size has to be 80x80 + * values have to start from 0x20 + * (i.e. RGB(linux_logo_red[0], + * linux_logo_green[0], + * linux_logo_blue[0]) is color 0x20) + * BW image has to be 80x80 as well, with MS bit + * on the left + * Serial_console ascii image can be any size, + * but should contain %s to display the version + */ + +#include <linux/init.h> +#include <linux/version.h> + +#define linux_logo_banner "Linux/SPARC version " UTS_RELEASE + +#define LINUX_LOGO_COLORS 221 + +unsigned char linux_logo_red[] __initdata = { + 0xF3, 0xF6, 0xF8, 0xF7, 0xEF, 0xE7, 0xE5, 0xE3, + 0xCA, 0xD4, 0xDD, 0xC8, 0xC7, 0xC4, 0xC2, 0xE5, + 0xF1, 0xED, 0xEE, 0xE6, 0xC6, 0xDA, 0xDD, 0xE5, + 0xD9, 0xC6, 0xE3, 0xD0, 0xC6, 0xBA, 0xB0, 0xB6, + 0xBB, 0xBE, 0xB9, 0xB8, 0xB3, 0xB2, 0xB0, 0xAD, + 0xAC, 0xA9, 0xA8, 0xA6, 0xA4, 0xA1, 0xA0, 0x9D, + 0xA0, 0x9F, 0x9E, 0x9C, 0x9B, 0x99, 0x9A, 0x99, + 0x98, 0x95, 0x96, 0x94, 0x93, 0x92, 0x8F, 0x8D, + 0x8C, 0x8A, 0x87, 0x86, 0x83, 0x81, 0x0D, 0x03, + 0x66, 0x44, 0x24, 0x08, 0xD6, 0xE6, 0xE9, 0xE6, + 0xE7, 0xCA, 0xDC, 0xDB, 0xD5, 0xD0, 0xC9, 0xE2, + 0xD5, 0xC6, 0xC4, 0xB3, 0xB2, 0xB9, 0xA9, 0x9A, + 0xB2, 0x9D, 0xE8, 0xEC, 0xF5, 0xF5, 0xF4, 0xF4, + 0xEC, 0xEE, 0xF0, 0xF5, 0xE0, 0xD6, 0xC5, 0xC2, + 0xD9, 0xD5, 0xD8, 0xD6, 0xF6, 0xF4, 0xED, 0xEC, + 0xEB, 0xF1, 0xF6, 0xF5, 0xF5, 0xEE, 0xEF, 0xEC, + 0xE7, 0xE3, 0xE6, 0xD6, 0xDD, 0xC3, 0xD6, 0xD7, + 0xCD, 0xCA, 0xC3, 0xAC, 0x95, 0x99, 0xB7, 0xA3, + 0x8B, 0x88, 0x95, 0x8A, 0x94, 0xD2, 0xCC, 0xC4, + 0xA8, 0x8E, 0x8F, 0xAE, 0xB8, 0xAC, 0xB6, 0xB4, + 0xAD, 0xA5, 0xA0, 0x9B, 0x8B, 0xA3, 0x94, 0x87, + 0x85, 0x89, 0x53, 0x80, 0x7D, 0x7C, 0x7A, 0x78, + 0x76, 0x71, 0x73, 0x6E, 0x6B, 0x67, 0x65, 0x62, + 0x4B, 0x5B, 0x5F, 0x53, 0x56, 0x52, 0x4F, 0x46, + 0x42, 0x0F, 0x75, 0x78, 0x7D, 0x72, 0x5F, 0x6E, + 0x7A, 0x75, 0x6A, 0x58, 0x48, 0x4F, 0x00, 0x2B, + 0x37, 0x3E, 0x32, 0x33, 0x25, 0x2C, 0x3B, 0x11, + 0x1D, 0x14, 0x06, 0x02, 0x00 +}; + +unsigned char linux_logo_green[] __initdata = { + 0xF3, 0xF6, 0xF8, 0xF7, 0xEF, 0xE7, 0xE5, 0xE3, + 0xCA, 0xD4, 0xDD, 0xC8, 0xC7, 0xC4, 0xC2, 0xD3, + 0xDA, 0xD4, 0xD7, 0xCC, 0xC1, 0xCC, 0xCB, 0xC9, + 0xC5, 0xBC, 0xBC, 0xBB, 0xB7, 0xA5, 0xB0, 0xB6, + 0xBB, 0xBE, 0xB9, 0xB8, 0xB3, 0xB2, 0xAD, 0xAD, + 0xAC, 0xA9, 0xA8, 0xA6, 0xA4, 0xA1, 0xA0, 0x95, + 0xA0, 0x9F, 0x9E, 0x9C, 0x9B, 0x99, 0x9A, 0x99, + 0x98, 0x95, 0x96, 0x94, 0x93, 0x92, 0x8F, 0x8D, + 0x8C, 0x8A, 0x87, 0x86, 0x83, 0x81, 0x08, 0x02, + 0x53, 0x2E, 0x19, 0x06, 0xC6, 0xC8, 0xCF, 0xBD, + 0xB3, 0xB6, 0xB4, 0xAB, 0xA5, 0xA3, 0x9B, 0xB6, + 0xA7, 0x99, 0x92, 0xA4, 0x9E, 0x9D, 0x98, 0x8C, + 0x8A, 0x86, 0xCD, 0xCC, 0xC9, 0xD7, 0xCA, 0xC4, + 0xCA, 0xC3, 0xC7, 0xC3, 0xC8, 0xB4, 0x91, 0x8E, + 0x8A, 0x82, 0x87, 0x85, 0xBD, 0xBF, 0xB6, 0xBC, + 0xAE, 0xB7, 0xBC, 0xB8, 0xBF, 0xB6, 0xBC, 0xB5, + 0xAB, 0xA6, 0xAD, 0xB2, 0xA5, 0x87, 0x9C, 0x96, + 0x95, 0x8E, 0x87, 0x8F, 0x86, 0x86, 0x8E, 0x80, + 0x7A, 0x70, 0x7B, 0x78, 0x78, 0x7F, 0x77, 0x6F, + 0x70, 0x76, 0x59, 0x77, 0x68, 0x64, 0x7B, 0x7C, + 0x75, 0x6D, 0x77, 0x69, 0x65, 0x5F, 0x5B, 0x54, + 0x4F, 0x5B, 0x39, 0x80, 0x7D, 0x7C, 0x7A, 0x78, + 0x76, 0x71, 0x73, 0x6E, 0x6B, 0x67, 0x65, 0x62, + 0x4B, 0x5B, 0x5F, 0x53, 0x56, 0x52, 0x4F, 0x46, + 0x42, 0x0B, 0x69, 0x66, 0x64, 0x57, 0x4A, 0x4E, + 0x55, 0x4B, 0x46, 0x3B, 0x30, 0x33, 0x00, 0x2B, + 0x37, 0x3E, 0x32, 0x33, 0x25, 0x2C, 0x29, 0x0D, + 0x1D, 0x14, 0x06, 0x02, 0x00 +}; + +unsigned char linux_logo_blue[] __initdata = { + 0xF3, 0xF6, 0xF8, 0xF7, 0xEF, 0xEE, 0xE5, 0xDE, + 0xD7, 0xD3, 0xDD, 0xC8, 0xC7, 0xC4, 0xC2, 0xB5, + 0xB0, 0xA6, 0xAC, 0x9B, 0xB5, 0xB5, 0xAE, 0x84, + 0x90, 0xA9, 0x81, 0x8D, 0x96, 0x86, 0xB0, 0xB6, + 0xBB, 0xBE, 0xB9, 0xB8, 0xB3, 0xB2, 0xA7, 0xAD, + 0xAC, 0xA9, 0xA8, 0xA6, 0xA4, 0xA1, 0xA5, 0x87, + 0xA0, 0x9F, 0x9E, 0x9C, 0x9B, 0x9A, 0x9A, 0x99, + 0x98, 0x95, 0x96, 0x94, 0x93, 0x92, 0x8F, 0x8D, + 0x8C, 0x8A, 0x87, 0x86, 0x83, 0x81, 0xC8, 0xD7, + 0x9B, 0x8E, 0x8C, 0xB2, 0x77, 0x77, 0x4E, 0x77, + 0x69, 0x71, 0x78, 0x6B, 0x65, 0x66, 0x64, 0x59, + 0x5C, 0x5A, 0x48, 0x72, 0x7B, 0x6B, 0x67, 0x6E, + 0x42, 0x5B, 0x29, 0x36, 0x25, 0x10, 0x17, 0x14, + 0x19, 0x16, 0x13, 0x0E, 0x08, 0x2E, 0x2E, 0x3D, + 0x24, 0x24, 0x24, 0x24, 0x13, 0x12, 0x14, 0x14, + 0x0E, 0x08, 0x0D, 0x0F, 0x08, 0x0D, 0x0E, 0x08, + 0x08, 0x0C, 0x06, 0x06, 0x07, 0x16, 0x07, 0x0E, + 0x08, 0x0A, 0x07, 0x0D, 0x2D, 0x3E, 0x09, 0x4E, + 0x68, 0x52, 0x56, 0x58, 0x4B, 0x22, 0x20, 0x20, + 0x27, 0x39, 0x28, 0x19, 0x1E, 0x1E, 0x08, 0x06, + 0x07, 0x09, 0x08, 0x08, 0x05, 0x1D, 0x1F, 0x17, + 0x18, 0x06, 0x79, 0x80, 0x7D, 0x7C, 0x7A, 0x78, + 0x76, 0x71, 0x73, 0x6E, 0x6B, 0x68, 0x65, 0x62, + 0x4B, 0x5B, 0x5F, 0x55, 0x56, 0x52, 0x4F, 0x46, + 0x42, 0x5A, 0x14, 0x23, 0x3D, 0x2B, 0x21, 0x14, + 0x06, 0x04, 0x03, 0x07, 0x09, 0x13, 0x2A, 0x3A, + 0x37, 0x3E, 0x32, 0x33, 0x25, 0x2C, 0x07, 0x09, + 0x1D, 0x14, 0x06, 0x02, 0x00 +}; + +unsigned char linux_logo[] __initdata = { + 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, + 0x57, 0x57, 0x58, 0x57, 0x57, 0x57, 0x57, 0x57, + 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 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0xEB, 0xF6, + 0xD0, 0x57, 0x57, 0x47, 0x47, 0x5B, 0xD4, 0xD4, + 0xCD, 0x44, 0x3E, 0x4B, 0x50, 0x4B, 0x51, 0xD5, + 0xDB, 0xD8, 0xDE, 0x4B, 0xF6, 0xF6, 0xEA, 0xE9, + 0xE8, 0xEA, 0xEB, 0x67, 0x5E, 0xCC, 0xD6, 0xDC, + 0xD5, 0x58, 0xCE, 0xCE, 0x62, 0x50, 0xCC, 0xD3, + 0xD2, 0xCD, 0xCD, 0x4B, 0x64, 0xCE, 0xCE, 0x64, + 0xCC, 0xD3, 0xD2, 0xD2, 0x61, 0x47, 0x5D, 0x5C, + 0xDD, 0xDD, 0xD9, 0xD1, 0x4C, 0x47, 0x49, 0x4A, + 0x4B, 0xD1, 0xD8, 0xE0, 0xDF, 0xDD, 0x5D, 0x4A, + 0x48, 0x52, 0x51, 0x3F, 0xF6, 0xEC, 0xE0, 0xE0, + 0xD3, 0x5E, 0x5F, 0x50, 0x4B, 0x50, 0xCB, 0xCE, + 0x64, 0x45, 0x4C, 0x57, 0x57, 0x58, 0x52, 0xD6, + 0xD3, 0xDE, 0xDF, 0xD1, 0x3E, 0x4B, 0xF6, 0xF6, + 0xEC, 0x66, 0x53, 0x43, 0x56, 0xD1, 0xD9, 0xDE, + 0xD4, 0x5E, 0xCE, 0xCC, 0x5B, 0x2C, 0xD4, 0xD5, + 0xD2, 0xD0, 0x63, 0x5D, 0xCD, 0xD0, 0xCD, 0x5E, + 0xD0, 0xCF, 0xCE, 0xD2, 0x5E, 0x50, 0x60, 0x5D, + 0xDE, 0xDD, 0xDC, 0xD7, 0x5D, 0x45, 0x47, 0x3E, + 0x4B, 0x5E, 0xDE, 0xDF, 0xE0, 0xD8, 0xCF, 0x3E, + 0x45, 0x51, 0x58, 0x42, 0xCB, 0xDA, 0xDE, 0xD8, + 0xD2, 0x61, 0xCC, 0xCF, 0xD6, 0xDA, 0xDA, 0xD5, + 0xD0, 0x50, 0x44, 0x57, 0x57, 0x58, 0x45, 0xD1, + 0xD1, 0xD7, 0xDF, 0xDF, 0xD7, 0xCF, 0x64, 0x60, + 0xCE, 0xCE, 0xCE, 0x63, 0xCF, 0xDA, 0xDE, 0xD9, + 0xCF, 0x63, 0xCD, 0x63, 0x4D, 0x4B, 0xD6, 0xD5, + 0xCE, 0xD3, 0x60, 0xCB, 0xD0, 0xD0, 0x65, 0x47, + 0xD0, 0xCC, 0xCC, 0xD1, 0x59, 0x5D, 0x63, 0x5E, + 0xDD, 0xDD, 0xDE, 0xDC, 0xCB, 0x40, 0x48, 0x45, + 0x3E, 0x3E, 0xD9, 0xDF, 0xE0, 0xDF, 0xDA, 0x51, + 0x4C, 0x48, 0x56, 0x4C, 0x5B, 0xD2, 0xDA, 0xDB, + 0xCB, 0x5F, 0xD0, 0xCC, 0xDC, 0xF0, 0xF3, 0xE0, + 0xDD, 0xCC, 0x41, 0x50, 0x57, 0x57, 0x4B, 0x5D, + 0xD3, 0xD1, 0xDE, 0xDF, 0xDE, 0xD7, 0xD0, 0xD0, + 0xD5, 0xD6, 0xD6, 0xCE, 0xD7, 0xDC, 0xDA, 0xD5, + 0x60, 0x63, 0x64, 0x5E, 0x47, 0x61, 0xD5, 0xD2, + 0xCF, 0xD0, 0x59, 0xCD, 0xD1, 0xCF, 0x61, 0x4D, + 0xCC, 0xCE, 0xCD, 0xD0, 0x52, 0x61, 0x64, 0x60, + 0xDA, 0xDE, 0xDE, 0xDD, 0xD1, 0x4B, 0x4A, 0x45, + 0x3E, 0x41, 0xCD, 0xDE, 0xE0, 0xF1, 0xDE, 0x63, + 0x4A, 0x4A, 0x4A, 0x4B, 0x50, 0xCB, 0xD4, 0xD7, + 0x5E, 0x54, 0x62, 0xD3, 0xD4, 0xF0, 0xF3, 0xF3, + 0xF2, 0xDE, 0x61, 0x40, 0x49, 0x56, 0x4D, 0x3E, + 0x4B, 0xCE, 0xD9, 0xD8, 0xD9, 0xD5, 0xCF, 0xD2, + 0xD6, 0xD6, 0xD1, 0xD1, 0xD7, 0xD5, 0xCF, 0xD0, + 0x54, 0x64, 0x63, 0x56, 0x2C, 0xCB, 0xD1, 0xCC, + 0xD3, 0xCD, 0x54, 0xCF, 0xD1, 0xCE, 0x5E, 0x5C, + 0xCE, 0xCE, 0xCE, 0xCB, 0x4B, 0x63, 0xCC, 0x61, + 0xD4, 0xDC, 0xDE, 0xDE, 0xDA, 0x5D, 0x45, 0x45, + 0x48, 0x3F, 0x52, 0xD9, 0xD8, 0xDF, 0xDF, 0xD2, + 0x52, 0x4B, 0x3E, 0x2E, 0x47, 0x60, 0xCF, 0xD3, + 0x59, 0x48, 0x50, 0x5E, 0xCC, 0xDE, 0xF2, 0xF2, + 0xF3, 0xF3, 0xDD, 0x5D, 0x3E, 0x48, 0x47, 0x47, + 0x58, 0xD1, 0xDA, 0xDA, 0xD5, 0xD1, 0xCD, 0xD2, + 0xD3, 0xCF, 0xD3, 0xD1, 0xCD, 0xD3, 0xD2, 0x5E, + 0x52, 0x64, 0x60, 0x4B, 0x45, 0x61, 0xCD, 0xD3, + 0xD3, 0x64, 0x61, 0xD0, 0xD0, 0x64, 0x45, 0x63, + 0xD0, 0xCE, 0xD0, 0x60, 0x56, 0xCB, 0xCC, 0x62, + 0xCE, 0xDA, 0xDE, 0xD8, 0xDD, 0xCC, 0x45, 0x49, + 0x3E, 0x47, 0x42, 0xD1, 0xDC, 0xD8, 0xD8, 0xD3, + 0x5D, 0x4C, 0x49, 0x3F, 0x47, 0x59, 0xCD, 0xCF, + 0x59, 0x2E, 0x48, 0x47, 0x52, 0x63, 0xF0, 0xF2, + 0xF3, 0xF3, 0xF2, 0xDA, 0x52, 0x4B, 0x52, 0x58, + 0x5E, 0x63, 0xD0, 0xD0, 0xD0, 0xCF, 0xCE, 0xCE, + 0xCF, 0x65, 0x61, 0xD6, 0xD6, 0xD6, 0xCB, 0x4B, + 0x61, 0x62, 0x5D, 0x43, 0x4B, 0x61, 0xD0, 0xD4, + 0xD1, 0x61, 0xCE, 0xD2, 0xCD, 0x5E, 0x4A, 0xCE, + 0xD0, 0xCC, 0xD0, 0x59, 0x61, 0xCC, 0xCC, 0x62, + 0xD1, 0xD5, 0xDE, 0xD8, 0xDD, 0xCF, 0x4B, 0x4A, + 0x45, 0x3E, 0x2D, 0xCB, 0xDC, 0xDE, 0xD8, 0xD5, + 0x60, 0x54, 0x51, 0x4C, 0x4D, 0x5C, 0xCC, 0xCE, + 0x5A, 0x2C, 0x50, 0x53, 0x3E, 0x59, 0xD8, 0xF3, + 0xF2, 0xF3, 0xF3, 0xE0, 0x5E, 0x4A, 0x4C, 0x53, + 0x5E, 0x63, 0xCC, 0xCC, 0xCC, 0xCD, 0xCF, 0xD3, + 0x62, 0x53, 0xD6, 0xD6, 0xD6, 0xD6, 0x5B, 0x48, + 0x64, 0x63, 0x59, 0x44, 0x57, 0x63, 0xD2, 0xD3, + 0xD0, 0x5E, 0xD0, 0xD1, 0xCB, 0x58, 0x4C, 0xCF, + 0xCF, 0xCE, 0xCE, 0x57, 0x63, 0xCC, 0xCD, 0x57, +}; + +unsigned char linux_logo_bw[] __initdata = { + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x80, 0x00, 0x3F, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x1F, + 0xFE, 0x1F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFE, 0x3F, 0xFF, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFE, 0x7F, 0xFF, 0xC7, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xFF, 0xFF, 0xC3, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xFF, + 0xFB, 0xE3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFD, 0xFF, 0xFF, 0xE1, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xFF, 0xFF, 0xF1, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xFF, 0xFF, 0xF1, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xFF, + 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xFF, 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xCF, 0xC3, 0xF8, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0x87, 0x81, 0xF9, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xA7, + 0x99, 0xF9, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xF3, 0xBC, 0xF9, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xE3, 0xBC, 0xF9, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xB0, 0x3C, 0xF9, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xB0, + 0x19, 0xF0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xC0, 0x03, 0xF0, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0x80, 0x01, 0xF8, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0x80, 0x01, 0xF8, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0x80, + 0x01, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xC0, 0x21, 0xD8, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xB1, 0x80, 0xEC, 0xC0, 0x1F, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF1, 0x90, 0x00, 0xE4, + 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xF1, 0x8C, + 0xC0, 0x7C, 0x04, 0x81, 0xFF, 0xFF, 0xFF, 0xFF, + 0xE3, 0x80, 0x00, 0x7C, 0x40, 0x11, 0xFF, 0xFF, + 0xFF, 0xFF, 0xE3, 0x80, 0x00, 0x7F, 0xD2, 0x29, + 0xFF, 0xFF, 0xFF, 0xFF, 0x87, 0x00, 0x00, 0x3F, + 0x80, 0x19, 0xFF, 0xFF, 0xFF, 0xFF, 0x0E, 0x00, + 0x00, 0x3F, 0x80, 0x19, 0xFF, 0xFF, 0xFF, 0xFF, + 0x1E, 0x00, 0x00, 0x1F, 0x80, 0x19, 0xFF, 0xFF, + 0xFF, 0xFE, 0x1C, 0x00, 0x00, 0x1E, 0x80, 0x19, + 0xFF, 0xFF, 0xFF, 0xFE, 0x3C, 0x00, 0x00, 0x1E, + 0x80, 0x11, 0xFF, 0xFF, 0xFF, 0xFC, 0x7C, 0x00, + 0x00, 0x0F, 0x80, 0x11, 0xFF, 0xFF, 0xFF, 0xFC, + 0xF8, 0x00, 0x00, 0x0E, 0x80, 0x11, 0xFF, 0xFF, + 0xFF, 0xFC, 0xF8, 0x00, 0x00, 0x06, 0x00, 0x11, + 0xFF, 0xFF, 0xFF, 0xF8, 0xF8, 0x00, 0x00, 0x06, + 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xF9, 0xF0, 0x00, + 0x00, 0x02, 0x00, 0x09, 0xFF, 0xFF, 0xFF, 0xF1, + 0xF0, 0x00, 0x00, 0x02, 0x80, 0x10, 0xFF, 0xFF, + 0xFF, 0xF1, 0xE0, 0x00, 0x00, 0x00, 0x97, 0x10, + 0xFF, 0xFF, 0xFF, 0xE3, 0xE0, 0x00, 0x00, 0x00, + 0xDF, 0xF0, 0xFF, 0xFF, 0xFF, 0xE3, 0xC0, 0x00, + 0x00, 0x00, 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0xC7, + 0xC0, 0x00, 0x00, 0x01, 0xFF, 0xF8, 0xFF, 0xFF, + 0xFF, 0xC7, 0x80, 0x00, 0x00, 0x01, 0xFF, 0xF8, + 0xFF, 0xFF, 0xFF, 0x8F, 0x80, 0x00, 0x00, 0x01, + 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0x8F, 0x80, 0x00, + 0x00, 0x01, 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0x9F, + 0x80, 0x00, 0x00, 0x01, 0xFF, 0xF8, 0xFF, 0xFF, + 0xFF, 0x9F, 0x80, 0x00, 0x00, 0x01, 0x80, 0x18, + 0xFF, 0xFF, 0xFF, 0x9E, 0x80, 0x00, 0x00, 0x03, + 0xA8, 0x11, 0xFF, 0xFF, 0xFF, 0x9F, 0x80, 0x00, + 0x00, 0x02, 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0x99, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x09, 0xFF, 0xFF, + 0xFF, 0x00, 0x80, 0x00, 0x00, 0x01, 0xC0, 0x01, + 0xFF, 0xFF, 0xFE, 0x20, 0x60, 0x00, 0x00, 0x00, + 0xFF, 0xC3, 0xFF, 0xFF, 0xF8, 0x00, 0x30, 0x00, + 0x00, 0x00, 0xFF, 0x0F, 0xFF, 0xFF, 0xC0, 0x40, + 0x38, 0x00, 0x00, 0x00, 0xFE, 0x47, 0xFF, 0xFF, + 0x81, 0x00, 0x1C, 0x00, 0x00, 0x00, 0xFC, 0x23, + 0xFF, 0xFF, 0x90, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x78, 0x11, 0xFF, 0xFF, 0x80, 0x00, 0x0F, 0x80, + 0x00, 0x00, 0x00, 0x01, 0xFF, 0xFF, 0x80, 0x00, + 0x07, 0xC0, 0x00, 0x00, 0x00, 0x08, 0xFF, 0xFF, + 0xC0, 0x00, 0x07, 0xC0, 0x00, 0x00, 0x00, 0x04, + 0x7F, 0xFF, 0x80, 0x00, 0x03, 0xC0, 0x00, 0x10, + 0x00, 0x00, 0x1F, 0xFF, 0x80, 0x00, 0x01, 0x80, + 0x00, 0x30, 0x00, 0x00, 0x0F, 0xFF, 0x80, 0x00, + 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, 0x4F, 0xFF, + 0x80, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0x00, + 0x0F, 0xFF, 0xC0, 0x00, 0x00, 0x80, 0x03, 0xF0, + 0x00, 0x00, 0x8F, 0xFF, 0x80, 0x00, 0x00, 0x40, + 0x0F, 0xF0, 0x00, 0x04, 0x1F, 0xFF, 0x80, 0x00, + 0x00, 0x7F, 0xFF, 0xF0, 0x00, 0x10, 0x1F, 0xFF, + 0xC0, 0x00, 0x00, 0x7F, 0xFF, 0xF0, 0x00, 0x40, + 0xFF, 0xFF, 0x98, 0x00, 0x00, 0xFF, 0xFF, 0xF0, + 0x00, 0x83, 0xFF, 0xFF, 0x81, 0xE0, 0x01, 0xFF, + 0xFF, 0xF8, 0x02, 0x07, 0xFF, 0xFF, 0x80, 0x3F, + 0x07, 0xE0, 0x00, 0x1C, 0x0C, 0x1F, 0xFF, 0xFF, + 0xF8, 0x03, 0xFF, 0x80, 0x00, 0x1F, 0x78, 0x1F, + 0xFF, 0xFF, 0xFF, 0x80, 0x7F, 0x00, 0x07, 0x0F, + 0xF0, 0x7F, 0xFF, 0xFF, 0xFF, 0xFE, 0x0C, 0x07, + 0xFF, 0x83, 0xC0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x1F, 0xFF, 0xC0, 0x03, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF8, 0x07, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, +}; + +/* Painted by Johnny Stenback <jst@uwasa.fi> */ + +unsigned char *linux_serial_image __initdata = "\n" +" .u$e.\n" +" .$$$$$:S\n" +" $\"*$/\"*$$\n" +" $.`$ . ^F\n" +" 4k+#+T.$F\n" +" 4P+++\"$\"$\n" +" :R\"+ t$$B\n" +" ___# $$$\n" +" | | R$$k\n" +" dd. | Linux $!$\n" +" ddd | Sparc $9$F\n" +" '!!!!!$ !!#!`\n" +" !!!!!* .!!!!!`\n" +"'!!!!!!!W..e$$!!!!!!` %s\n" +" \"~^^~ ^~~^\n" +"\n"; +/* $Id: linux_logo.h,v 1.1 1997/04/16 17:51:24 jj Exp $ + * include/asm-sparc/linux_logo.h: This is a linux logo + * to be displayed on boot. + * + * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu) + * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + * + * You can put anything here, but: + * LINUX_LOGO_COLORS has to be less than 224 + * image size has to be 80x80 + * values have to start from 0x20 + * (i.e. RGB(linux_logo_red[0], + * linux_logo_green[0], + * linux_logo_blue[0]) is color 0x20) + * BW image has to be 80x80 as well, with MS bit + * on the left + * Serial_console ascii image can be any size, + * but should contain %s to display the version + */ + +#include <linux/init.h> +#include <linux/version.h> + +#define linux_logo_banner "Linux/SPARC version " UTS_RELEASE + +#define LINUX_LOGO_COLORS 221 + +unsigned char linux_logo_red[] __initdata = { + 0xF3, 0xF6, 0xF8, 0xF7, 0xEF, 0xE7, 0xE5, 0xE3, + 0xCA, 0xD4, 0xDD, 0xC8, 0xC7, 0xC4, 0xC2, 0xE5, + 0xF1, 0xED, 0xEE, 0xE6, 0xC6, 0xDA, 0xDD, 0xE5, + 0xD9, 0xC6, 0xE3, 0xD0, 0xC6, 0xBA, 0xB0, 0xB6, + 0xBB, 0xBE, 0xB9, 0xB8, 0xB3, 0xB2, 0xB0, 0xAD, + 0xAC, 0xA9, 0xA8, 0xA6, 0xA4, 0xA1, 0xA0, 0x9D, + 0xA0, 0x9F, 0x9E, 0x9C, 0x9B, 0x99, 0x9A, 0x99, + 0x98, 0x95, 0x96, 0x94, 0x93, 0x92, 0x8F, 0x8D, + 0x8C, 0x8A, 0x87, 0x86, 0x83, 0x81, 0x0D, 0x03, + 0x66, 0x44, 0x24, 0x08, 0xD6, 0xE6, 0xE9, 0xE6, + 0xE7, 0xCA, 0xDC, 0xDB, 0xD5, 0xD0, 0xC9, 0xE2, + 0xD5, 0xC6, 0xC4, 0xB3, 0xB2, 0xB9, 0xA9, 0x9A, + 0xB2, 0x9D, 0xE8, 0xEC, 0xF5, 0xF5, 0xF4, 0xF4, + 0xEC, 0xEE, 0xF0, 0xF5, 0xE0, 0xD6, 0xC5, 0xC2, + 0xD9, 0xD5, 0xD8, 0xD6, 0xF6, 0xF4, 0xED, 0xEC, + 0xEB, 0xF1, 0xF6, 0xF5, 0xF5, 0xEE, 0xEF, 0xEC, + 0xE7, 0xE3, 0xE6, 0xD6, 0xDD, 0xC3, 0xD6, 0xD7, + 0xCD, 0xCA, 0xC3, 0xAC, 0x95, 0x99, 0xB7, 0xA3, + 0x8B, 0x88, 0x95, 0x8A, 0x94, 0xD2, 0xCC, 0xC4, + 0xA8, 0x8E, 0x8F, 0xAE, 0xB8, 0xAC, 0xB6, 0xB4, + 0xAD, 0xA5, 0xA0, 0x9B, 0x8B, 0xA3, 0x94, 0x87, + 0x85, 0x89, 0x53, 0x80, 0x7D, 0x7C, 0x7A, 0x78, + 0x76, 0x71, 0x73, 0x6E, 0x6B, 0x67, 0x65, 0x62, + 0x4B, 0x5B, 0x5F, 0x53, 0x56, 0x52, 0x4F, 0x46, + 0x42, 0x0F, 0x75, 0x78, 0x7D, 0x72, 0x5F, 0x6E, + 0x7A, 0x75, 0x6A, 0x58, 0x48, 0x4F, 0x00, 0x2B, + 0x37, 0x3E, 0x32, 0x33, 0x25, 0x2C, 0x3B, 0x11, + 0x1D, 0x14, 0x06, 0x02, 0x00 +}; + +unsigned char linux_logo_green[] __initdata = { + 0xF3, 0xF6, 0xF8, 0xF7, 0xEF, 0xE7, 0xE5, 0xE3, + 0xCA, 0xD4, 0xDD, 0xC8, 0xC7, 0xC4, 0xC2, 0xD3, + 0xDA, 0xD4, 0xD7, 0xCC, 0xC1, 0xCC, 0xCB, 0xC9, + 0xC5, 0xBC, 0xBC, 0xBB, 0xB7, 0xA5, 0xB0, 0xB6, + 0xBB, 0xBE, 0xB9, 0xB8, 0xB3, 0xB2, 0xAD, 0xAD, + 0xAC, 0xA9, 0xA8, 0xA6, 0xA4, 0xA1, 0xA0, 0x95, + 0xA0, 0x9F, 0x9E, 0x9C, 0x9B, 0x99, 0x9A, 0x99, + 0x98, 0x95, 0x96, 0x94, 0x93, 0x92, 0x8F, 0x8D, + 0x8C, 0x8A, 0x87, 0x86, 0x83, 0x81, 0x08, 0x02, + 0x53, 0x2E, 0x19, 0x06, 0xC6, 0xC8, 0xCF, 0xBD, + 0xB3, 0xB6, 0xB4, 0xAB, 0xA5, 0xA3, 0x9B, 0xB6, + 0xA7, 0x99, 0x92, 0xA4, 0x9E, 0x9D, 0x98, 0x8C, + 0x8A, 0x86, 0xCD, 0xCC, 0xC9, 0xD7, 0xCA, 0xC4, + 0xCA, 0xC3, 0xC7, 0xC3, 0xC8, 0xB4, 0x91, 0x8E, + 0x8A, 0x82, 0x87, 0x85, 0xBD, 0xBF, 0xB6, 0xBC, + 0xAE, 0xB7, 0xBC, 0xB8, 0xBF, 0xB6, 0xBC, 0xB5, + 0xAB, 0xA6, 0xAD, 0xB2, 0xA5, 0x87, 0x9C, 0x96, + 0x95, 0x8E, 0x87, 0x8F, 0x86, 0x86, 0x8E, 0x80, + 0x7A, 0x70, 0x7B, 0x78, 0x78, 0x7F, 0x77, 0x6F, + 0x70, 0x76, 0x59, 0x77, 0x68, 0x64, 0x7B, 0x7C, + 0x75, 0x6D, 0x77, 0x69, 0x65, 0x5F, 0x5B, 0x54, + 0x4F, 0x5B, 0x39, 0x80, 0x7D, 0x7C, 0x7A, 0x78, + 0x76, 0x71, 0x73, 0x6E, 0x6B, 0x67, 0x65, 0x62, + 0x4B, 0x5B, 0x5F, 0x53, 0x56, 0x52, 0x4F, 0x46, + 0x42, 0x0B, 0x69, 0x66, 0x64, 0x57, 0x4A, 0x4E, + 0x55, 0x4B, 0x46, 0x3B, 0x30, 0x33, 0x00, 0x2B, + 0x37, 0x3E, 0x32, 0x33, 0x25, 0x2C, 0x29, 0x0D, + 0x1D, 0x14, 0x06, 0x02, 0x00 +}; + +unsigned char linux_logo_blue[] __initdata = { + 0xF3, 0xF6, 0xF8, 0xF7, 0xEF, 0xEE, 0xE5, 0xDE, + 0xD7, 0xD3, 0xDD, 0xC8, 0xC7, 0xC4, 0xC2, 0xB5, + 0xB0, 0xA6, 0xAC, 0x9B, 0xB5, 0xB5, 0xAE, 0x84, + 0x90, 0xA9, 0x81, 0x8D, 0x96, 0x86, 0xB0, 0xB6, + 0xBB, 0xBE, 0xB9, 0xB8, 0xB3, 0xB2, 0xA7, 0xAD, + 0xAC, 0xA9, 0xA8, 0xA6, 0xA4, 0xA1, 0xA5, 0x87, + 0xA0, 0x9F, 0x9E, 0x9C, 0x9B, 0x9A, 0x9A, 0x99, + 0x98, 0x95, 0x96, 0x94, 0x93, 0x92, 0x8F, 0x8D, + 0x8C, 0x8A, 0x87, 0x86, 0x83, 0x81, 0xC8, 0xD7, + 0x9B, 0x8E, 0x8C, 0xB2, 0x77, 0x77, 0x4E, 0x77, + 0x69, 0x71, 0x78, 0x6B, 0x65, 0x66, 0x64, 0x59, + 0x5C, 0x5A, 0x48, 0x72, 0x7B, 0x6B, 0x67, 0x6E, + 0x42, 0x5B, 0x29, 0x36, 0x25, 0x10, 0x17, 0x14, + 0x19, 0x16, 0x13, 0x0E, 0x08, 0x2E, 0x2E, 0x3D, + 0x24, 0x24, 0x24, 0x24, 0x13, 0x12, 0x14, 0x14, + 0x0E, 0x08, 0x0D, 0x0F, 0x08, 0x0D, 0x0E, 0x08, + 0x08, 0x0C, 0x06, 0x06, 0x07, 0x16, 0x07, 0x0E, + 0x08, 0x0A, 0x07, 0x0D, 0x2D, 0x3E, 0x09, 0x4E, + 0x68, 0x52, 0x56, 0x58, 0x4B, 0x22, 0x20, 0x20, + 0x27, 0x39, 0x28, 0x19, 0x1E, 0x1E, 0x08, 0x06, + 0x07, 0x09, 0x08, 0x08, 0x05, 0x1D, 0x1F, 0x17, + 0x18, 0x06, 0x79, 0x80, 0x7D, 0x7C, 0x7A, 0x78, + 0x76, 0x71, 0x73, 0x6E, 0x6B, 0x68, 0x65, 0x62, + 0x4B, 0x5B, 0x5F, 0x55, 0x56, 0x52, 0x4F, 0x46, + 0x42, 0x5A, 0x14, 0x23, 0x3D, 0x2B, 0x21, 0x14, + 0x06, 0x04, 0x03, 0x07, 0x09, 0x13, 0x2A, 0x3A, + 0x37, 0x3E, 0x32, 0x33, 0x25, 0x2C, 0x07, 0x09, + 0x1D, 0x14, 0x06, 0x02, 0x00 +}; + +unsigned char linux_logo[] __initdata = { + 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, + 0x57, 0x57, 0x58, 0x57, 0x57, 0x57, 0x57, 0x57, + 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x58, 0x57, + 0x58, 0x58, 0x59, 0x5C, 0x5D, 0x5F, 0x60, 0x61, + 0x62, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63, 0x63, + 0x61, 0x61, 0x61, 0x61, 0x61, 0x60, 0x5E, 0x5E, + 0x5E, 0x5D, 0x5D, 0x5C, 0x5D, 0x5B, 0x58, 0x58, + 0x58, 0x57, 0x58, 0x57, 0x57, 0x57, 0x57, 0x58, + 0x57, 0x57, 0x58, 0x57, 0x57, 0x58, 0x57, 0x57, + 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 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0x41, 0x44, + 0xCB, 0x60, 0x52, 0xA9, 0xA9, 0xA9, 0xA7, 0xA6, + 0xA6, 0xA4, 0xA4, 0xA2, 0xA2, 0x9D, 0x95, 0x89, + 0x9C, 0x8A, 0x9E, 0x9C, 0x8A, 0x9E, 0xA0, 0xA8, + 0xC0, 0xE9, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, + 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, + 0xFC, 0xFC, 0xFC, 0xE9, 0xAA, 0xA6, 0xA0, 0x99, + 0x9C, 0x8B, 0x9A, 0x84, 0x9B, 0x9B, 0x98, 0x98, + 0xA9, 0xB9, 0x49, 0x57, 0xCB, 0xD4, 0xD3, 0xF1, + 0xD8, 0xDA, 0xCE, 0x3F, 0x41, 0x4B, 0x5D, 0xCB, + 0x5E, 0xD6, 0xDB, 0xD6, 0x5D, 0x43, 0x3F, 0x49, + 0xD1, 0xCC, 0x4F, 0xDD, 0xC3, 0xBB, 0xBF, 0xAA, + 0xAA, 0xA9, 0xAA, 0xA8, 0xA8, 0xA6, 0xA6, 0xA2, + 0x9C, 0x9F, 0x9B, 0x9A, 0x9D, 0xA2, 0xA8, 0xAA, + 0xC1, 0xEA, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, + 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, + 0xFC, 0xFC, 0xFC, 0xEA, 0xC0, 0xAA, 0xA6, 0xA2, + 0xA2, 0x99, 0xA0, 0xA0, 0xA4, 0xA7, 0xA9, 0xC0, + 0x67, 0x49, 0x54, 0x60, 0xD0, 0xD4, 0xCC, 0xDF, + 0xD9, 0xD5, 0xD2, 0x3E, 0x47, 0x56, 0x60, 0xCD, + 0x5D, 0xD9, 0xD9, 0xD6, 0x61, 0x3F, 0x47, 0x52, + 0xD6, 0xD3, 0x62, 0x4D, 0x40, 0x4A, 0x57, 0xCA, + 0xC3, 0xC1, 0xC1, 0xC0, 0xBF, 0xBF, 0xAA, 0xAA, + 0xA6, 0xA4, 0xA4, 0xA4, 0xA6, 0xA8, 0xBE, 0xC1, + 0xC9, 0xEB, 0xFB, 0xFB, 0xFC, 0xFC, 0xFC, 0xFC, + 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xFC, + 0xFC, 0xFC, 0xFC, 0xEB, 0xC3, 0xC0, 0xAA, 0xA8, + 0xA6, 0xA6, 0xA6, 0xA9, 0xAA, 0xC0, 0xE8, 0xD0, + 0xD2, 0x4C, 0x5E, 0x64, 0xD0, 0xD1, 0x5F, 0xD9, + 0xD5, 0xD1, 0xD0, 0x48, 0x52, 0x5C, 0x64, 0xCD, + 0x5C, 0xDC, 0xD7, 0xD5, 0x62, 0x3F, 0x4C, 0x53, + 0xDA, 0xD7, 0xCE, 0x56, 0x40, 0x4B, 0x52, 0x56, + 0xCE, 0xDF, 0x6A, 0xEB, 0xE9, 0xC9, 0xC3, 0xC0, + 0xC0, 0xBF, 0xBE, 0xAA, 0xBF, 0xC0, 0xC3, 0xC9, + 0xEA, 0xF6, 0xEE, 0x58, 0x57, 0x5E, 0xD6, 0xD0, + 0xD2, 0x61, 0xCB, 0xD6, 0xD6, 0xD4, 0xDF, 0xF3, + 0xF2, 0xDD, 0xD7, 0xEB, 0xC9, 0xC1, 0xC0, 0xBF, + 0xAA, 0xAA, 0xAA, 0xBE, 0xC3, 0xF0, 0xD2, 0xD2, + 0xD2, 0x51, 0x62, 0xCC, 0xD0, 0xCC, 0x61, 0xD3, + 0xCF, 0xCE, 0xD2, 0x48, 0x5A, 0x61, 0xCC, 0xCE, + 0x5F, 0xD9, 0xD5, 0xD1, 0x63, 0x44, 0x56, 0x56, + 0xDC, 0xD9, 0xD4, 0x5E, 0x42, 0x4A, 0x4C, 0x57, + 0x5D, 0xD8, 0xE0, 0xD8, 0xDC, 0xCB, 0x66, 0xEC, + 0xE8, 0xC3, 0xC3, 0xC3, 0xC3, 0xC9, 0xE8, 0xEA, + 0xF6, 0x50, 0x3E, 0x58, 0x57, 0x5A, 0xD6, 0xD4, + 0xCC, 0x4B, 0x53, 0x5C, 0x64, 0xD1, 0xDF, 0xF3, + 0xF1, 0xDE, 0xD9, 0xF6, 0xEB, 0xC9, 0xC1, 0xC1, + 0xC0, 0xC0, 0xC1, 0xC9, 0xF0, 0xD6, 0xCD, 0xD6, + 0xD3, 0x53, 0xCB, 0xCF, 0xCD, 0x5F, 0x5F, 0xCE, + 0xCF, 0xCD, 0xD0, 0x47, 0x5F, 0xCB, 0xCE, 0xCD, + 0x63, 0xD6, 0xD3, 0xD1, 0x63, 0x3F, 0x58, 0x58, + 0xDB, 0xDC, 0xDA, 0x65, 0x3E, 0x49, 0x49, 0x4D, + 0x49, 0xDC, 0xDF, 0xE0, 0xDE, 0xD5, 0x47, 0x47, + 0x46, 0x6B, 0xEB, 0xEA, 0xE9, 0xEA, 0xEB, 0xF6, + 0xD0, 0x57, 0x57, 0x47, 0x47, 0x5B, 0xD4, 0xD4, + 0xCD, 0x44, 0x3E, 0x4B, 0x50, 0x4B, 0x51, 0xD5, + 0xDB, 0xD8, 0xDE, 0x4B, 0xF6, 0xF6, 0xEA, 0xE9, + 0xE8, 0xEA, 0xEB, 0x67, 0x5E, 0xCC, 0xD6, 0xDC, + 0xD5, 0x58, 0xCE, 0xCE, 0x62, 0x50, 0xCC, 0xD3, + 0xD2, 0xCD, 0xCD, 0x4B, 0x64, 0xCE, 0xCE, 0x64, + 0xCC, 0xD3, 0xD2, 0xD2, 0x61, 0x47, 0x5D, 0x5C, + 0xDD, 0xDD, 0xD9, 0xD1, 0x4C, 0x47, 0x49, 0x4A, + 0x4B, 0xD1, 0xD8, 0xE0, 0xDF, 0xDD, 0x5D, 0x4A, + 0x48, 0x52, 0x51, 0x3F, 0xF6, 0xEC, 0xE0, 0xE0, + 0xD3, 0x5E, 0x5F, 0x50, 0x4B, 0x50, 0xCB, 0xCE, + 0x64, 0x45, 0x4C, 0x57, 0x57, 0x58, 0x52, 0xD6, + 0xD3, 0xDE, 0xDF, 0xD1, 0x3E, 0x4B, 0xF6, 0xF6, + 0xEC, 0x66, 0x53, 0x43, 0x56, 0xD1, 0xD9, 0xDE, + 0xD4, 0x5E, 0xCE, 0xCC, 0x5B, 0x2C, 0xD4, 0xD5, + 0xD2, 0xD0, 0x63, 0x5D, 0xCD, 0xD0, 0xCD, 0x5E, + 0xD0, 0xCF, 0xCE, 0xD2, 0x5E, 0x50, 0x60, 0x5D, + 0xDE, 0xDD, 0xDC, 0xD7, 0x5D, 0x45, 0x47, 0x3E, + 0x4B, 0x5E, 0xDE, 0xDF, 0xE0, 0xD8, 0xCF, 0x3E, + 0x45, 0x51, 0x58, 0x42, 0xCB, 0xDA, 0xDE, 0xD8, + 0xD2, 0x61, 0xCC, 0xCF, 0xD6, 0xDA, 0xDA, 0xD5, + 0xD0, 0x50, 0x44, 0x57, 0x57, 0x58, 0x45, 0xD1, + 0xD1, 0xD7, 0xDF, 0xDF, 0xD7, 0xCF, 0x64, 0x60, + 0xCE, 0xCE, 0xCE, 0x63, 0xCF, 0xDA, 0xDE, 0xD9, + 0xCF, 0x63, 0xCD, 0x63, 0x4D, 0x4B, 0xD6, 0xD5, + 0xCE, 0xD3, 0x60, 0xCB, 0xD0, 0xD0, 0x65, 0x47, + 0xD0, 0xCC, 0xCC, 0xD1, 0x59, 0x5D, 0x63, 0x5E, + 0xDD, 0xDD, 0xDE, 0xDC, 0xCB, 0x40, 0x48, 0x45, + 0x3E, 0x3E, 0xD9, 0xDF, 0xE0, 0xDF, 0xDA, 0x51, + 0x4C, 0x48, 0x56, 0x4C, 0x5B, 0xD2, 0xDA, 0xDB, + 0xCB, 0x5F, 0xD0, 0xCC, 0xDC, 0xF0, 0xF3, 0xE0, + 0xDD, 0xCC, 0x41, 0x50, 0x57, 0x57, 0x4B, 0x5D, + 0xD3, 0xD1, 0xDE, 0xDF, 0xDE, 0xD7, 0xD0, 0xD0, + 0xD5, 0xD6, 0xD6, 0xCE, 0xD7, 0xDC, 0xDA, 0xD5, + 0x60, 0x63, 0x64, 0x5E, 0x47, 0x61, 0xD5, 0xD2, + 0xCF, 0xD0, 0x59, 0xCD, 0xD1, 0xCF, 0x61, 0x4D, + 0xCC, 0xCE, 0xCD, 0xD0, 0x52, 0x61, 0x64, 0x60, + 0xDA, 0xDE, 0xDE, 0xDD, 0xD1, 0x4B, 0x4A, 0x45, + 0x3E, 0x41, 0xCD, 0xDE, 0xE0, 0xF1, 0xDE, 0x63, + 0x4A, 0x4A, 0x4A, 0x4B, 0x50, 0xCB, 0xD4, 0xD7, + 0x5E, 0x54, 0x62, 0xD3, 0xD4, 0xF0, 0xF3, 0xF3, + 0xF2, 0xDE, 0x61, 0x40, 0x49, 0x56, 0x4D, 0x3E, + 0x4B, 0xCE, 0xD9, 0xD8, 0xD9, 0xD5, 0xCF, 0xD2, + 0xD6, 0xD6, 0xD1, 0xD1, 0xD7, 0xD5, 0xCF, 0xD0, + 0x54, 0x64, 0x63, 0x56, 0x2C, 0xCB, 0xD1, 0xCC, + 0xD3, 0xCD, 0x54, 0xCF, 0xD1, 0xCE, 0x5E, 0x5C, + 0xCE, 0xCE, 0xCE, 0xCB, 0x4B, 0x63, 0xCC, 0x61, + 0xD4, 0xDC, 0xDE, 0xDE, 0xDA, 0x5D, 0x45, 0x45, + 0x48, 0x3F, 0x52, 0xD9, 0xD8, 0xDF, 0xDF, 0xD2, + 0x52, 0x4B, 0x3E, 0x2E, 0x47, 0x60, 0xCF, 0xD3, + 0x59, 0x48, 0x50, 0x5E, 0xCC, 0xDE, 0xF2, 0xF2, + 0xF3, 0xF3, 0xDD, 0x5D, 0x3E, 0x48, 0x47, 0x47, + 0x58, 0xD1, 0xDA, 0xDA, 0xD5, 0xD1, 0xCD, 0xD2, + 0xD3, 0xCF, 0xD3, 0xD1, 0xCD, 0xD3, 0xD2, 0x5E, + 0x52, 0x64, 0x60, 0x4B, 0x45, 0x61, 0xCD, 0xD3, + 0xD3, 0x64, 0x61, 0xD0, 0xD0, 0x64, 0x45, 0x63, + 0xD0, 0xCE, 0xD0, 0x60, 0x56, 0xCB, 0xCC, 0x62, + 0xCE, 0xDA, 0xDE, 0xD8, 0xDD, 0xCC, 0x45, 0x49, + 0x3E, 0x47, 0x42, 0xD1, 0xDC, 0xD8, 0xD8, 0xD3, + 0x5D, 0x4C, 0x49, 0x3F, 0x47, 0x59, 0xCD, 0xCF, + 0x59, 0x2E, 0x48, 0x47, 0x52, 0x63, 0xF0, 0xF2, + 0xF3, 0xF3, 0xF2, 0xDA, 0x52, 0x4B, 0x52, 0x58, + 0x5E, 0x63, 0xD0, 0xD0, 0xD0, 0xCF, 0xCE, 0xCE, + 0xCF, 0x65, 0x61, 0xD6, 0xD6, 0xD6, 0xCB, 0x4B, + 0x61, 0x62, 0x5D, 0x43, 0x4B, 0x61, 0xD0, 0xD4, + 0xD1, 0x61, 0xCE, 0xD2, 0xCD, 0x5E, 0x4A, 0xCE, + 0xD0, 0xCC, 0xD0, 0x59, 0x61, 0xCC, 0xCC, 0x62, + 0xD1, 0xD5, 0xDE, 0xD8, 0xDD, 0xCF, 0x4B, 0x4A, + 0x45, 0x3E, 0x2D, 0xCB, 0xDC, 0xDE, 0xD8, 0xD5, + 0x60, 0x54, 0x51, 0x4C, 0x4D, 0x5C, 0xCC, 0xCE, + 0x5A, 0x2C, 0x50, 0x53, 0x3E, 0x59, 0xD8, 0xF3, + 0xF2, 0xF3, 0xF3, 0xE0, 0x5E, 0x4A, 0x4C, 0x53, + 0x5E, 0x63, 0xCC, 0xCC, 0xCC, 0xCD, 0xCF, 0xD3, + 0x62, 0x53, 0xD6, 0xD6, 0xD6, 0xD6, 0x5B, 0x48, + 0x64, 0x63, 0x59, 0x44, 0x57, 0x63, 0xD2, 0xD3, + 0xD0, 0x5E, 0xD0, 0xD1, 0xCB, 0x58, 0x4C, 0xCF, + 0xCF, 0xCE, 0xCE, 0x57, 0x63, 0xCC, 0xCD, 0x57, +}; + +unsigned char linux_logo_bw[] __initdata = { + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x80, 0x00, 0x3F, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x1F, + 0xFE, 0x1F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFE, 0x3F, 0xFF, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFE, 0x7F, 0xFF, 0xC7, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xFF, 0xFF, 0xC3, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xFF, + 0xFB, 0xE3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFD, 0xFF, 0xFF, 0xE1, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xFF, 0xFF, 0xF1, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xFF, 0xFF, 0xF1, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xFF, + 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xFF, 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xCF, 0xC3, 0xF8, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0x87, 0x81, 0xF9, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xA7, + 0x99, 0xF9, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xF3, 0xBC, 0xF9, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xE3, 0xBC, 0xF9, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xB0, 0x3C, 0xF9, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0xB0, + 0x19, 0xF0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xC0, 0x03, 0xF0, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0x80, 0x01, 0xF8, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0x80, 0x01, 0xF8, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9, 0x80, + 0x01, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xF9, 0xC0, 0x21, 0xD8, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xF9, 0xB1, 0x80, 0xEC, 0xC0, 0x1F, + 0xFF, 0xFF, 0xFF, 0xFF, 0xF1, 0x90, 0x00, 0xE4, + 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xF1, 0x8C, + 0xC0, 0x7C, 0x04, 0x81, 0xFF, 0xFF, 0xFF, 0xFF, + 0xE3, 0x80, 0x00, 0x7C, 0x40, 0x11, 0xFF, 0xFF, + 0xFF, 0xFF, 0xE3, 0x80, 0x00, 0x7F, 0xD2, 0x29, + 0xFF, 0xFF, 0xFF, 0xFF, 0x87, 0x00, 0x00, 0x3F, + 0x80, 0x19, 0xFF, 0xFF, 0xFF, 0xFF, 0x0E, 0x00, + 0x00, 0x3F, 0x80, 0x19, 0xFF, 0xFF, 0xFF, 0xFF, + 0x1E, 0x00, 0x00, 0x1F, 0x80, 0x19, 0xFF, 0xFF, + 0xFF, 0xFE, 0x1C, 0x00, 0x00, 0x1E, 0x80, 0x19, + 0xFF, 0xFF, 0xFF, 0xFE, 0x3C, 0x00, 0x00, 0x1E, + 0x80, 0x11, 0xFF, 0xFF, 0xFF, 0xFC, 0x7C, 0x00, + 0x00, 0x0F, 0x80, 0x11, 0xFF, 0xFF, 0xFF, 0xFC, + 0xF8, 0x00, 0x00, 0x0E, 0x80, 0x11, 0xFF, 0xFF, + 0xFF, 0xFC, 0xF8, 0x00, 0x00, 0x06, 0x00, 0x11, + 0xFF, 0xFF, 0xFF, 0xF8, 0xF8, 0x00, 0x00, 0x06, + 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xF9, 0xF0, 0x00, + 0x00, 0x02, 0x00, 0x09, 0xFF, 0xFF, 0xFF, 0xF1, + 0xF0, 0x00, 0x00, 0x02, 0x80, 0x10, 0xFF, 0xFF, + 0xFF, 0xF1, 0xE0, 0x00, 0x00, 0x00, 0x97, 0x10, + 0xFF, 0xFF, 0xFF, 0xE3, 0xE0, 0x00, 0x00, 0x00, + 0xDF, 0xF0, 0xFF, 0xFF, 0xFF, 0xE3, 0xC0, 0x00, + 0x00, 0x00, 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0xC7, + 0xC0, 0x00, 0x00, 0x01, 0xFF, 0xF8, 0xFF, 0xFF, + 0xFF, 0xC7, 0x80, 0x00, 0x00, 0x01, 0xFF, 0xF8, + 0xFF, 0xFF, 0xFF, 0x8F, 0x80, 0x00, 0x00, 0x01, + 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0x8F, 0x80, 0x00, + 0x00, 0x01, 0xFF, 0xF8, 0xFF, 0xFF, 0xFF, 0x9F, + 0x80, 0x00, 0x00, 0x01, 0xFF, 0xF8, 0xFF, 0xFF, + 0xFF, 0x9F, 0x80, 0x00, 0x00, 0x01, 0x80, 0x18, + 0xFF, 0xFF, 0xFF, 0x9E, 0x80, 0x00, 0x00, 0x03, + 0xA8, 0x11, 0xFF, 0xFF, 0xFF, 0x9F, 0x80, 0x00, + 0x00, 0x02, 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0x99, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x09, 0xFF, 0xFF, + 0xFF, 0x00, 0x80, 0x00, 0x00, 0x01, 0xC0, 0x01, + 0xFF, 0xFF, 0xFE, 0x20, 0x60, 0x00, 0x00, 0x00, + 0xFF, 0xC3, 0xFF, 0xFF, 0xF8, 0x00, 0x30, 0x00, + 0x00, 0x00, 0xFF, 0x0F, 0xFF, 0xFF, 0xC0, 0x40, + 0x38, 0x00, 0x00, 0x00, 0xFE, 0x47, 0xFF, 0xFF, + 0x81, 0x00, 0x1C, 0x00, 0x00, 0x00, 0xFC, 0x23, + 0xFF, 0xFF, 0x90, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x78, 0x11, 0xFF, 0xFF, 0x80, 0x00, 0x0F, 0x80, + 0x00, 0x00, 0x00, 0x01, 0xFF, 0xFF, 0x80, 0x00, + 0x07, 0xC0, 0x00, 0x00, 0x00, 0x08, 0xFF, 0xFF, + 0xC0, 0x00, 0x07, 0xC0, 0x00, 0x00, 0x00, 0x04, + 0x7F, 0xFF, 0x80, 0x00, 0x03, 0xC0, 0x00, 0x10, + 0x00, 0x00, 0x1F, 0xFF, 0x80, 0x00, 0x01, 0x80, + 0x00, 0x30, 0x00, 0x00, 0x0F, 0xFF, 0x80, 0x00, + 0x00, 0x00, 0x00, 0x70, 0x00, 0x01, 0x4F, 0xFF, + 0x80, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0x00, + 0x0F, 0xFF, 0xC0, 0x00, 0x00, 0x80, 0x03, 0xF0, + 0x00, 0x00, 0x8F, 0xFF, 0x80, 0x00, 0x00, 0x40, + 0x0F, 0xF0, 0x00, 0x04, 0x1F, 0xFF, 0x80, 0x00, + 0x00, 0x7F, 0xFF, 0xF0, 0x00, 0x10, 0x1F, 0xFF, + 0xC0, 0x00, 0x00, 0x7F, 0xFF, 0xF0, 0x00, 0x40, + 0xFF, 0xFF, 0x98, 0x00, 0x00, 0xFF, 0xFF, 0xF0, + 0x00, 0x83, 0xFF, 0xFF, 0x81, 0xE0, 0x01, 0xFF, + 0xFF, 0xF8, 0x02, 0x07, 0xFF, 0xFF, 0x80, 0x3F, + 0x07, 0xE0, 0x00, 0x1C, 0x0C, 0x1F, 0xFF, 0xFF, + 0xF8, 0x03, 0xFF, 0x80, 0x00, 0x1F, 0x78, 0x1F, + 0xFF, 0xFF, 0xFF, 0x80, 0x7F, 0x00, 0x07, 0x0F, + 0xF0, 0x7F, 0xFF, 0xFF, 0xFF, 0xFE, 0x0C, 0x07, + 0xFF, 0x83, 0xC0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x1F, 0xFF, 0xC0, 0x03, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF8, 0x07, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, +}; + +/* Painted by Johnny Stenback <jst@uwasa.fi> */ + +unsigned char *linux_serial_image __initdata = "\n" +" .u$e.\n" +" .$$$$$:S\n" +" $\"*$/\"*$$\n" +" $.`$ . ^F\n" +" 4k+#+T.$F\n" +" 4P+++\"$\"$\n" +" :R\"+ t$$B\n" +" ___# $$$\n" +" | | R$$k\n" +" dd. | Linux $!$\n" +" ddd | Sparc $9$F\n" +" '!!!!!$ !!#!`\n" +" !!!!!* .!!!!!`\n" +"'!!!!!!!W..e$$!!!!!!` %s\n" +" \"~^^~ ^~~^\n" +"\n"; diff --git a/include/asm-sparc/mmu_context.h b/include/asm-sparc/mmu_context.h index f9074dfae..d104a758c 100644 --- a/include/asm-sparc/mmu_context.h +++ b/include/asm-sparc/mmu_context.h @@ -9,6 +9,11 @@ /* Initialize the context related info for a new mm_struct * instance. */ -#define init_new_context(mm) ((mm)->context = NO_CONTEXT) +extern void (*init_new_context)(struct mm_struct *mm); + +/* Destroy context related info for an mm_struct that is about + * to be put to rest. + */ +extern void (*destroy_context)(struct mm_struct *mm); #endif /* !(__SPARC_MMU_CONTEXT_H) */ diff --git a/include/asm-sparc/mxcc.h b/include/asm-sparc/mxcc.h index 87947bc0f..efe4e8431 100644 --- a/include/asm-sparc/mxcc.h +++ b/include/asm-sparc/mxcc.h @@ -1,4 +1,4 @@ -/* $Id: mxcc.h,v 1.6 1996/08/29 09:48:27 davem Exp $ +/* $Id: mxcc.h,v 1.7 1997/04/20 14:11:46 ecd Exp $ * mxcc.h: Definitions of the Viking MXCC registers * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -83,6 +83,8 @@ * MID: The moduleID of the cpu your read this from. */ +#ifndef __ASSEMBLY__ + extern __inline__ void mxcc_set_stream_src(unsigned long *paddr) { unsigned long data0 = paddr[0]; @@ -130,4 +132,6 @@ extern __inline__ void mxcc_set_creg(unsigned long mxcc_control) "i" (ASI_M_MXCC)); } +#endif /* !__ASSEMBLY__ */ + #endif /* !(_SPARC_MXCC_H) */ diff --git a/include/asm-sparc/namei.h b/include/asm-sparc/namei.h new file mode 100644 index 000000000..b71537565 --- /dev/null +++ b/include/asm-sparc/namei.h @@ -0,0 +1,54 @@ +/* $Id: namei.h,v 1.3 1997/01/26 23:36:36 davem Exp $ + * linux/include/asm-sparc/namei.h + * + * Routines to handle famous /usr/gnemul/s*. + * Included from linux/fs/namei.c + */ + +#ifndef __SPARC_NAMEI_H +#define __SPARC_NAMEI_H + +#define SPARC_BSD_EMUL "usr/gnemul/sunos/" +#define SPARC_SOL_EMUL "usr/gnemul/solaris/" + +#define translate_namei(pathname, base, follow_links, res_inode) ({ \ + if ((current->personality & (PER_BSD|PER_SVR4)) && !base && *pathname == '/') { \ + struct inode *emul_ino; \ + int namelen; \ + const char *name; \ + \ + while (*pathname == '/') \ + pathname++; \ + current->fs->root->i_count++; \ + if (dir_namei (current->personality & PER_BSD ? SPARC_BSD_EMUL : SPARC_SOL_EMUL, \ + &namelen, &name, current->fs->root, &emul_ino) >= 0 && emul_ino) { \ + *res_inode = NULL; \ + if (_namei (pathname, emul_ino, follow_links, res_inode) >= 0 && *res_inode) \ + return 0; \ + } \ + base = current->fs->root; \ + base->i_count++; \ + } \ +}) + +#define translate_open_namei(pathname, flag, mode, res_inode, base) ({ \ + if ((current->personality & (PER_BSD|PER_SVR4)) && !base && *pathname == '/') { \ + struct inode *emul_ino; \ + int namelen; \ + const char *name; \ + \ + while (*pathname == '/') \ + pathname++; \ + current->fs->root->i_count++; \ + if (dir_namei (current->personality & PER_BSD ? SPARC_BSD_EMUL : SPARC_SOL_EMUL, \ + &namelen, &name, current->fs->root, &emul_ino) >= 0 && emul_ino) { \ + *res_inode = NULL; \ + if (open_namei (pathname, flag, mode, res_inode, emul_ino) >= 0 && *res_inode) \ + return 0; \ + } \ + base = current->fs->root; \ + base->i_count++; \ + } \ +}) + +#endif /* __SPARC_NAMEI_H */ diff --git a/include/asm-sparc/openprom.h b/include/asm-sparc/openprom.h index 34f5d3c33..91f5ffb68 100644 --- a/include/asm-sparc/openprom.h +++ b/include/asm-sparc/openprom.h @@ -1,4 +1,4 @@ -/* $Id: openprom.h,v 1.19 1996/09/25 03:51:08 davem Exp $ */ +/* $Id: openprom.h,v 1.20 1997/04/10 06:41:06 davem Exp $ */ #ifndef __SPARC_OPENPROM_H #define __SPARC_OPENPROM_H @@ -186,9 +186,9 @@ struct linux_nodeops { #define PROMINTR_MAX 15 struct linux_prom_registers { - int which_io; /* is this in OBIO space? */ - char *phys_addr; /* The physical address of this register */ - int reg_size; /* How many bytes does this register take up? */ + unsigned int which_io; /* is this in OBIO space? */ + unsigned int phys_addr; /* The physical address of this register */ + unsigned int reg_size; /* How many bytes does this register take up? */ }; struct linux_prom_irqs { diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h index 84248e0eb..40c6de10b 100644 --- a/include/asm-sparc/oplib.h +++ b/include/asm-sparc/oplib.h @@ -1,4 +1,4 @@ -/* $Id: oplib.h,v 1.12 1996/10/31 06:29:13 davem Exp $ +/* $Id: oplib.h,v 1.15 1997/03/18 18:00:18 jj Exp $ * oplib.h: Describes the interface and available routines in the * Linux Prom library. * @@ -31,6 +31,9 @@ extern unsigned int prom_rev, prom_prev; */ extern int prom_root_node; +/* PROM stdin and stdout */ +extern int prom_stdin, prom_stdout; + /* Pointer to prom structure containing the device tree traversal * and usage utility functions. Only prom-lib should use these, * users use the interface defined by the library only! @@ -108,7 +111,7 @@ extern void prom_cmdline(void); /* Enter the prom, with no chance of continuation for the stand-alone * which calls this. */ -extern void prom_halt(void); +extern void prom_halt(void) __attribute__ ((noreturn)); /* Set the PROM 'sync' callback function to the passed function pointer. * When the user gives the 'sync' command at the prom prompt while the @@ -208,8 +211,20 @@ extern void prom_free(char *virt_addr, unsigned int size); extern void prom_putsegment(int context, unsigned long virt_addr, int physical_segment); + /* PROM device tree traversal functions... */ +#ifdef PROMLIB_INTERNAL + +/* Internal version of prom_getchild. */ +extern int __prom_getchild(int parent_node); + +/* Internal version of prom_getsibling. */ +extern int __prom_getsibling(int node); + +#endif + + /* Get the child node of the given node, or zero if no child exists. */ extern int prom_getchild(int parent_node); diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h index 03c9c48fd..23d2aebc2 100644 --- a/include/asm-sparc/page.h +++ b/include/asm-sparc/page.h @@ -1,4 +1,4 @@ -/* $Id: page.h,v 1.30 1996/10/27 08:55:30 davem Exp $ +/* $Id: page.h,v 1.35 1996/12/19 08:08:22 davem Exp $ * page.h: Various defines and such for MMU operations on the Sparc for * the Linux kernel. * @@ -8,6 +8,7 @@ #ifndef _SPARC_PAGE_H #define _SPARC_PAGE_H +#include <linux/config.h> #include <asm/head.h> /* for KERNBASE */ #define PAGE_SHIFT 12 @@ -28,8 +29,8 @@ extern unsigned long page_offset; extern unsigned long (*mmu_v2p)(unsigned long); extern unsigned long (*mmu_p2v)(unsigned long); -#define __pa(x) mmu_v2p(x) -#define __va(x) mmu_p2v(x) +#define __pa(x) mmu_v2p((unsigned long)(x)) +#define __va(x) mmu_p2v((unsigned long)(x)) /* The following structure is used to hold the physical * memory configuration of the machine. This is filled in @@ -88,6 +89,132 @@ typedef struct { unsigned long iopgprot; } iopgprot_t; #define __pgprot(x) ((pgprot_t) { (x) } ) #define __iopgprot(x) ((iopgprot_t) { (x) } ) +#elif CONFIG_AP1000_DEBUG + +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long iopte; } iopte_t; +typedef struct { unsigned long pmd; } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; +typedef struct { unsigned long ctxd; } ctxd_t; +typedef struct { unsigned long pgprot; } pgprot_t; +typedef struct { unsigned long iopgprot; } iopgprot_t; + +static inline unsigned long __get_val(unsigned long x) +{ + if ((x & 0xF0000000) == (8<<28)) + return x & 0x0FFFFFFF; + return x; +} + +static inline unsigned long __set_val(unsigned long x) +{ + if ((x & 0xF0000000) == (0<<28)) + return x | 0x80000000; + return x; +} + +#define __pte_val(x) ((x).pte) +#define __iopte_val(x) ((x).iopte) +#define __pmd_val(x) ((x).pmd) +#define __pgd_val(x) ((x).pgd) +#define __ctxd_val(x) ((x).ctxd) +#define __pgprot_val(x) ((x).pgprot) +#define __iopgprot_val(x) ((x).iopgprot) + +#define ___pte(x) ((pte_t) { (x) } ) +#define ___iopte(x) ((iopte_t) { (x) } ) +#define ___pmd(x) ((pmd_t) { (x) } ) +#define ___pgd(x) ((pgd_t) { (x) } ) +#define ___ctxd(x) ((ctxd_t) { (x) } ) +#define ___pgprot(x) ((pgprot_t) { (x) } ) +#define ___iopgprot(x) ((iopgprot_t) { (x) } ) + + +#define pte_val(x) __get_val(__pte_val(x)) +#define iopte_val(x) __get_val(__iopte_val(x)) +#define pmd_val(x) __get_val(__pmd_val(x)) +#define pgd_val(x) __get_val(__pgd_val(x)) +#define ctxd_val(x) __get_val(__ctxd_val(x)) +#define pgprot_val(x) __get_val(__pgprot_val(x)) +#define iopgprot_val(x) __get_val(__iopgprot_val(x)) + +#define __pte(x) ___pte(__set_val(x)) +#define __iopte(x) ___iopte(__set_val(x)) +#define __pmd(x) ___pmd(__set_val(x)) +#define __pgd(x) ___pgd(__set_val(x)) +#define __ctxd(x) ___ctxd(__set_val(x)) +#define __pgprot(x) ___pgprot(x) +#define __iopgprot(x) ___iopgprot(__set_val(x)) + +#elif CONFIG_AP1000 + +typedef unsigned long pte_t; +typedef unsigned long iopte_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t; +typedef unsigned long ctxd_t; +typedef unsigned long pgprot_t; +typedef unsigned long iopgprot_t; + +static inline unsigned long __get_val(unsigned long x) +{ +#if 0 + extern void ap_panic(char *fmt,...); + if (x && (x & 0xF0000000) == 0) { + ap_panic("get_val got 0x%x\n",x); + } +#endif + if ((x & 0xF0000000) == (8<<28)) + return x & 0x0FFFFFFF; + return x; +} + +static inline unsigned long __set_val(unsigned long x) +{ +#if 0 + extern void ap_panic(char *fmt,...); + if ((x & 0xF0000000) == (8<<28)) { + ap_panic("set_val got 0x%x\n",x); + } +#endif + if ((x & 0xF0000000) == (0<<28)) + return x | 0x80000000; + return x; +} + +#define __pte_val(x) (x) +#define __iopte_val(x) (x) +#define __pmd_val(x) (x) +#define __pgd_val(x) (x) +#define __ctxd_val(x) (x) +#define __pgprot_val(x) (x) +#define __iopgprot_val(x) (x) + +#define ___pte(x) ((pte_t) { (x) } ) +#define ___iopte(x) ((iopte_t) { (x) } ) +#define ___pmd(x) ((pmd_t) { (x) } ) +#define ___pgd(x) ((pgd_t) { (x) } ) +#define ___ctxd(x) ((ctxd_t) { (x) } ) +#define ___pgprot(x) ((pgprot_t) { (x) } ) +#define ___iopgprot(x) ((iopgprot_t) { (x) } ) + + +#define pte_val(x) __get_val(__pte_val(x)) +#define iopte_val(x) __get_val(__iopte_val(x)) +#define pmd_val(x) __get_val(__pmd_val(x)) +#define pgd_val(x) __get_val(__pgd_val(x)) +#define ctxd_val(x) __get_val(__ctxd_val(x)) +#define pgprot_val(x) __get_val(__pgprot_val(x)) +#define iopgprot_val(x) __get_val(__iopgprot_val(x)) + +#define __pte(x) ___pte(__set_val(x)) +#define __iopte(x) ___iopte(__set_val(x)) +#define __pmd(x) ___pmd(__set_val(x)) +#define __pgd(x) ___pgd(__set_val(x)) +#define __ctxd(x) ___ctxd(__set_val(x)) +#define __pgprot(x) ___pgprot(x) +#define __iopgprot(x) ___iopgprot(__set_val(x)) + #else /* * .. while these make it easier on the compiler @@ -130,6 +257,10 @@ extern unsigned long sparc_unmapped_base; */ #define MAP_NR(addr) ((((unsigned long) (addr)) - PAGE_OFFSET) >> PAGE_SHIFT) +#else /* !(__ASSEMBLY__) */ + +#define __pgprot(x) (x) + #endif /* !(__ASSEMBLY__) */ #endif /* __KERNEL__ */ diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h index 02435d788..8b84e1dce 100644 --- a/include/asm-sparc/pgtable.h +++ b/include/asm-sparc/pgtable.h @@ -1,4 +1,4 @@ -/* $Id: pgtable.h,v 1.51 1996/10/27 08:55:32 davem Exp $ */ +/* $Id: pgtable.h,v 1.60 1997/04/14 17:05:16 jj Exp $ */ #ifndef _SPARC_PGTABLE_H #define _SPARC_PGTABLE_H @@ -26,10 +26,6 @@ extern void (*quick_kernel_fault)(unsigned long); This procedure can be used until the call to mem_init(). */ extern void *sparc_init_alloc(unsigned long *kbrk, unsigned long size); -/* mmu-specific process creation/cloning/etc hooks. */ -extern void (*mmu_exit_hook)(void); -extern void (*mmu_flush_hook)(void); - /* translate between physical and virtual addresses */ extern unsigned long (*mmu_v2p)(unsigned long); extern unsigned long (*mmu_p2v)(unsigned long); @@ -43,11 +39,11 @@ struct mmu_sglist { char *addr; char *__dont_touch; unsigned int len; - char *dvma_addr; + __u32 dvma_addr; }; -extern char *(*mmu_get_scsi_one)(char *, unsigned long, struct linux_sbus *sbus); +extern __u32 (*mmu_get_scsi_one)(char *, unsigned long, struct linux_sbus *sbus); extern void (*mmu_get_scsi_sgl)(struct mmu_sglist *, int, struct linux_sbus *sbus); -extern void (*mmu_release_scsi_one)(char *, unsigned long, struct linux_sbus *sbus); +extern void (*mmu_release_scsi_one)(__u32, unsigned long, struct linux_sbus *sbus); extern void (*mmu_release_scsi_sgl)(struct mmu_sglist *, int, struct linux_sbus *sbus); extern void (*mmu_map_dma_area)(unsigned long addr, int len); @@ -105,6 +101,9 @@ extern pgd_t swapper_pg_dir[1024]; * holds the same as on the i386. */ extern pte_t pg0[1024]; +extern pte_t pg1[1024]; +extern pte_t pg2[1024]; +extern pte_t pg3[1024]; extern unsigned long ptr_in_current_pgd; @@ -213,6 +212,9 @@ extern void (*pgd_set)(pgd_t *, pmd_t *); extern pte_t (*pte_modify)(pte_t, pgprot_t); +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + /* to find an entry in a page-table-directory */ extern pgd_t * (*pgd_offset)(struct mm_struct *, unsigned long); @@ -272,6 +274,8 @@ extern void (*local_flush_tlb_page)(struct vm_area_struct *, unsigned long addre extern void (*local_flush_page_to_ram)(unsigned long address); +extern void (*local_flush_sig_insns)(struct mm_struct *mm, unsigned long insn_addr); + extern void smp_flush_cache_all(void); extern void smp_flush_cache_mm(struct mm_struct *mm); extern void smp_flush_cache_range(struct mm_struct *mm, @@ -286,6 +290,7 @@ extern void smp_flush_tlb_range(struct mm_struct *mm, unsigned long end); extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page); extern void smp_flush_page_to_ram(unsigned long page); +extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); #endif extern void (*flush_cache_all)(void); @@ -301,6 +306,8 @@ extern void (*flush_tlb_page)(struct vm_area_struct *, unsigned long address); extern void (*flush_page_to_ram)(unsigned long page); +extern void (*flush_sig_insns)(struct mm_struct *mm, unsigned long insn_addr); + /* The permissions for pgprot_val to make a page mapped on the obio space */ extern unsigned int pg_iobits; @@ -329,9 +336,9 @@ extern void (*update_mmu_cache)(struct vm_area_struct *vma, unsigned long addres extern int invalid_segment; -#define SWP_TYPE(entry) (((entry)>>2) & 0x7f) -#define SWP_OFFSET(entry) (((entry) >> 9) & 0x7ffff) -#define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << 9)) +#define SWP_TYPE(entry) (((entry) >> 2) & 0x7f) +#define SWP_OFFSET(entry) (((entry) >> 9) & 0x3ffff) +#define SWP_ENTRY(type,offset) ((((type) & 0x7f) << 2) | (((offset) & 0x3ffff) << 9)) struct ctx_list { struct ctx_list *next; @@ -361,4 +368,30 @@ extern __inline__ void add_to_ctx_list(struct ctx_list *head, struct ctx_list *e #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) +extern __inline__ unsigned int +__get_phys (unsigned long addr) +{ + switch (sparc_cpu_model){ + case sun4c: + return sun4c_get_pte (addr) << PAGE_SHIFT; + case sun4m: + return ((srmmu_get_pte (addr) & 0xffffff00) << 4); + default: + return 0; + } +} + +extern __inline__ int +__get_iospace (unsigned long addr) +{ + switch (sparc_cpu_model){ + case sun4c: + return -1; /* Don't check iospace on sun4c */ + case sun4m: + return (srmmu_get_pte (addr) >> 28); + default: + return -1; + } +} + #endif /* !(_SPARC_PGTABLE_H) */ diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h index f8ca14944..fac1df5ed 100644 --- a/include/asm-sparc/pgtsrmmu.h +++ b/include/asm-sparc/pgtsrmmu.h @@ -1,4 +1,4 @@ -/* $Id: pgtsrmmu.h,v 1.24 1996/10/07 03:03:06 davem Exp $ +/* $Id: pgtsrmmu.h,v 1.28 1997/03/15 07:47:52 davem Exp $ * pgtsrmmu.h: SRMMU page table defines and code. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -7,13 +7,8 @@ #ifndef _SPARC_PGTSRMMU_H #define _SPARC_PGTSRMMU_H -#include <linux/config.h> #include <asm/page.h> -#if CONFIG_AP1000 -#include <asm/ap1000/apreg.h> -#endif - /* PMD_SHIFT determines the size of the area a second-level page table can map */ #define SRMMU_PMD_SHIFT 18 #define SRMMU_PMD_SIZE (1UL << SRMMU_PMD_SHIFT) @@ -92,19 +87,7 @@ #define SRMMU_FAULT_STATUS 0x00000300 #define SRMMU_FAULT_ADDR 0x00000400 -/* - * "normal" sun systems have their memory on bus 0. This means the top - * 4 bits of 36 bit physical addresses are 0. We use this define to - * determine if a piece of memory might be normal memory, or if its - * definately some sort of device memory. - * - * On the AP+ normal memory is on bus 8. Why? Ask Fujitsu :-) -*/ -#if CONFIG_AP1000 -#define MEM_BUS_SPACE 8 -#else -#define MEM_BUS_SPACE 0 -#endif +#ifndef __ASSEMBLY__ /* Accessing the MMU control register. */ extern __inline__ unsigned int srmmu_get_mmureg(void) @@ -126,9 +109,6 @@ extern __inline__ void srmmu_set_mmureg(unsigned long regval) extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr) { paddr = ((paddr >> 4) & SRMMU_CTX_PMASK); -#if MEM_BUS_SPACE - paddr |= (MEM_BUS_SPACE<<28); -#endif __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r" (paddr), "r" (SRMMU_CTXTBL_PTR), "i" (ASI_M_MMUREGS) : @@ -151,11 +131,6 @@ extern __inline__ void srmmu_set_context(int context) __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r" (context), "r" (SRMMU_CTX_REG), "i" (ASI_M_MMUREGS) : "memory"); -#if CONFIG_AP1000 - /* The AP1000+ message controller also needs to know - the current task's context. */ - MSC_OUT(MSC_PID, context); -#endif } extern __inline__ int srmmu_get_context(void) @@ -191,10 +166,6 @@ extern __inline__ unsigned int srmmu_get_faddr(void) /* This is guaranteed on all SRMMU's. */ extern __inline__ void srmmu_flush_whole_tlb(void) { -#if CONFIG_AP1000 - extern void mc_tlb_flush_all(void); - mc_tlb_flush_all(); -#endif __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (0x400), /* Flush entire TLB!! */ "i" (ASI_M_FLUSH_PROBE) : "memory"); @@ -204,9 +175,6 @@ extern __inline__ void srmmu_flush_whole_tlb(void) /* These flush types are not available on all chips... */ extern __inline__ void srmmu_flush_tlb_ctx(void) { -#if CONFIG_AP1000 - mc_tlb_flush_ctx(); -#endif __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (0x300), /* Flush TLB ctx.. */ "i" (ASI_M_FLUSH_PROBE) : "memory"); @@ -215,9 +183,6 @@ extern __inline__ void srmmu_flush_tlb_ctx(void) extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) { -#if CONFIG_AP1000 - mc_tlb_flush_region(); -#endif addr &= SRMMU_PGDIR_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (addr | 0x200), /* Flush TLB region.. */ @@ -228,9 +193,6 @@ extern __inline__ void srmmu_flush_tlb_region(unsigned long addr) extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) { -#if CONFIG_AP1000 - mc_tlb_flush_segment(); -#endif addr &= SRMMU_PMD_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (addr | 0x100), /* Flush TLB segment.. */ @@ -240,9 +202,6 @@ extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr) extern __inline__ void srmmu_flush_tlb_page(unsigned long page) { -#if CONFIG_AP1000 - mc_tlb_flush_page(page); -#endif page &= PAGE_MASK; __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : "r" (page), /* Flush TLB page.. */ @@ -262,7 +221,20 @@ extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr) return retval; } +extern __inline__ int +srmmu_get_pte (unsigned long addr) +{ + register unsigned long entry; + + __asm__ __volatile__("\n\tlda [%1] %2,%0\n\t" : + "=r" (entry): + "r" ((addr & 0xfffff000) | 0x400), "i" (ASI_M_FLUSH_PROBE)); + return entry; +} + extern unsigned long (*srmmu_read_physical)(unsigned long paddr); extern void (*srmmu_write_physical)(unsigned long paddr, unsigned long word); +#endif /* !(__ASSEMBLY__) */ + #endif /* !(_SPARC_PGTSRMMU_H) */ diff --git a/include/asm-sparc/pgtsun4c.h b/include/asm-sparc/pgtsun4c.h index c54a6079d..93b00ce72 100644 --- a/include/asm-sparc/pgtsun4c.h +++ b/include/asm-sparc/pgtsun4c.h @@ -1,4 +1,4 @@ -/* $Id: pgtsun4c.h,v 1.27 1996/10/30 06:01:32 davem Exp $ +/* $Id: pgtsun4c.h,v 1.34 1997/03/23 03:47:08 davem Exp $ * pgtsun4c.h: Sun4c specific pgtable.h defines and code. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -44,29 +44,35 @@ /* * Sparc SUN4C pte fields. */ -#define _SUN4C_PAGE_VALID 0x80000000 /* valid page */ -#define _SUN4C_PAGE_WRITE 0x40000000 /* can be written to */ -#define _SUN4C_PAGE_PRIV 0x20000000 /* bit to signify privileged page */ -#define _SUN4C_PAGE_USER 0x00000000 /* User page */ -#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ -#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ -#define _SUN4C_PAGE_REF 0x02000000 /* Page has been accessed/referenced */ -#define _SUN4C_PAGE_DIRTY 0x01000000 /* Page has been modified, is dirty */ -#define _SUN4C_PAGE_PRESENT 0x00400000 /* present (known) page */ - -#define _SUN4C_PAGE_CHG_MASK (0xffff | _SUN4C_PAGE_REF | _SUN4C_PAGE_DIRTY) - -#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_PRIV | \ - _SUN4C_PAGE_REF) -#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_WRITE | \ - _SUN4C_PAGE_USER | _SUN4C_PAGE_REF) -#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_USER | \ - _SUN4C_PAGE_REF) -#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_USER | \ - _SUN4C_PAGE_REF) -#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_WRITE | \ - _SUN4C_PAGE_PRIV | _SUN4C_PAGE_DIRTY | \ - _SUN4C_PAGE_REF | _SUN4C_PAGE_NOCACHE) +#define _SUN4C_PAGE_VALID 0x80000000 +#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ +#define _SUN4C_PAGE_DIRTY 0x40000000 +#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ +#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ +#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ +#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ +#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ +#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ +#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ +#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ +#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ + +#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ + _SUN4C_PAGE_ACCESSED) +#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ + _SUN4C_PAGE_MODIFIED) + +#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) + +#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) +#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ + _SUN4C_PAGE_WRITE) +#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) +#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) +#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ + _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) + +#ifndef __ASSEMBLY__ extern __inline__ unsigned long sun4c_get_synchronous_error(void) { @@ -103,11 +109,9 @@ extern __inline__ unsigned long sun4c_get_segmap(unsigned long addr) extern __inline__ void sun4c_put_segmap(unsigned long addr, unsigned long entry) { - __asm__ __volatile__("\n\tstba %1, [%0] %2\n\t" : : + __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : : "r" (addr), "r" (entry), "i" (ASI_SEGMAP)); - - return; } extern __inline__ unsigned long sun4c_get_pte(unsigned long addr) @@ -122,11 +126,9 @@ extern __inline__ unsigned long sun4c_get_pte(unsigned long addr) extern __inline__ void sun4c_put_pte(unsigned long addr, unsigned long entry) { - __asm__ __volatile__("\n\tsta %1, [%0] %2\n\t" : : + __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : "r" (addr), - "r" (entry), "i" (ASI_PTE)); - - return; + "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)); } extern __inline__ int sun4c_get_context(void) @@ -142,10 +144,12 @@ extern __inline__ int sun4c_get_context(void) extern __inline__ int sun4c_set_context(int ctx) { - __asm__ __volatile__("\n\tstba %0, [%1] %2\n\t" : : + __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)); return ctx; } +#endif /* !(__ASSEMBLY__) */ + #endif /* !(_SPARC_PGTSUN4C_H) */ diff --git a/include/asm-sparc/poll.h b/include/asm-sparc/poll.h new file mode 100644 index 000000000..4a7cbe6fb --- /dev/null +++ b/include/asm-sparc/poll.h @@ -0,0 +1,21 @@ +#ifndef __SPARC_POLL_H +#define __SPARC_POLL_H + +#define POLLIN 1 +#define POLLPRI 2 +#define POLLOUT 4 +#define POLLERR 8 +#define POLLHUP 16 +#define POLLNVAL 32 +#define POLLRDNORM 64 +#define POLLWRNORM POLLOUT +#define POLLRDBAND 128 +#define POLLWRBAND 256 + +struct pollfd { + int fd; + short events; + short revents; +}; + +#endif diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h index dd5a0dfcf..a6efa8c2c 100644 --- a/include/asm-sparc/processor.h +++ b/include/asm-sparc/processor.h @@ -1,4 +1,4 @@ -/* $Id: processor.h,v 1.48 1996/10/27 08:55:36 davem Exp $ +/* $Id: processor.h,v 1.57 1997/03/04 16:27:22 jj Exp $ * include/asm-sparc/processor.h * * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) @@ -29,15 +29,15 @@ #define wp_works_ok 1 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ -/* Whee, this is STACK_TOP and the lowest kernel address too... */ +/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... + * That one page is used to protect kernel from intruders, so that + * we can make our access_ok test faster + */ #define TASK_SIZE (page_offset) -/* Ok this is hot. Sparc exception save area. */ -struct exception_struct { - unsigned long count; /* Exception count */ - unsigned long pc; /* Callers PC for copy/clear user */ - unsigned long expc; /* Where to jump when exception signaled */ - unsigned long address; /* Saved user base address for transfer */ +struct fpq { + unsigned long *insn_addr; + unsigned long insn; }; /* The Sparc processor specific thread struct. */ @@ -68,18 +68,15 @@ struct thread_struct { unsigned long w_saved; /* Floating point regs */ - unsigned long float_regs[64] __attribute__ ((aligned (8))); + unsigned long float_regs[32] __attribute__ ((aligned (8))); unsigned long fsr; unsigned long fpqdepth; - struct fpq { - unsigned long *insn_addr; - unsigned long insn; - } fpqueue[16]; + struct fpq fpqueue[16]; struct sigstack sstk_info; unsigned long flags; - struct exception_struct ex __attribute__ ((aligned (8))); int current_ds; struct exec core_exec; /* just what it says. */ + int new_signal; }; #define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ @@ -100,17 +97,17 @@ struct thread_struct { /* w_saved */ \ 0, \ /* FPU regs */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, \ /* FPU status, FPU qdepth, FPU queue */ \ 0, 0, { { 0, 0, }, }, \ /* sstk_info */ \ { 0, 0, }, \ -/* flags, ex, current_ds, */ \ - SPARC_FLAG_KTHREAD, { 0, }, USER_DS, \ +/* flags, current_ds, */ \ + SPARC_FLAG_KTHREAD, USER_DS, \ /* core_exec */ \ { 0, }, \ +/* new_signal */ \ + 0, \ } /* Return saved PC of a blocked thread. */ @@ -143,9 +140,11 @@ extern __inline__ void start_thread(struct pt_regs * regs, unsigned long pc, "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); } +/* Free all resources held by a thread. */ #define release_thread(tsk) do { } while(0) #ifdef __KERNEL__ +/* Allocation and freeing of basic task resources. */ extern unsigned long (*alloc_kernel_stack)(struct task_struct *tsk); extern void (*free_kernel_stack)(unsigned long stack); extern struct task_struct *(*alloc_task_struct)(void); diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h index 829ca47b6..bbec3d969 100644 --- a/include/asm-sparc/psr.h +++ b/include/asm-sparc/psr.h @@ -1,4 +1,4 @@ -/* $Id: psr.h,v 1.12 1996/09/30 02:23:19 davem Exp $ +/* $Id: psr.h,v 1.14 1997/04/11 00:42:19 davem Exp $ * psr.h: This file holds the macros for masking off various parts of * the processor status register on the Sparc. This is valid * for Version 8. On the V9 this is renamed to the PSTATE @@ -41,16 +41,28 @@ extern __inline__ unsigned int get_psr(void) { unsigned int psr; - __asm__ __volatile__("rd\t%%psr, %0" : - "=r" (psr)); + __asm__ __volatile__(" + rd %%psr, %0 + nop + nop + nop +" : "=r" (psr) + : /* no inputs */ + : "memory"); + return psr; } extern __inline__ void put_psr(unsigned int new_psr) { - __asm__ __volatile__("wr\t%0, 0x0, %%psr\n\t" - "nop; nop; nop;" : : - "r" (new_psr)); + __asm__ __volatile__(" + wr %0, 0x0, %%psr + nop + nop + nop +" : /* no outputs */ + : "r" (new_psr) + : "memory", "cc"); } /* Get the %fsr register. Be careful, make sure the floating point @@ -64,10 +76,12 @@ extern __inline__ unsigned int get_fsr(void) { unsigned int fsr = 0; - __asm__ __volatile__("st\t%%fsr, %1\n\t" - "ld\t%1, %0" : - "=r" (fsr) : - "m" (fsr_storage)); + __asm__ __volatile__(" + st %%fsr, %1 + ld %1, %0 +" : "=r" (fsr) + : "m" (fsr_storage)); + return fsr; } diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h index d357ab034..ff3bd04a3 100644 --- a/include/asm-sparc/ptrace.h +++ b/include/asm-sparc/ptrace.h @@ -1,4 +1,4 @@ -/* $Id: ptrace.h,v 1.22 1996/10/27 08:55:38 davem Exp $ */ +/* $Id: ptrace.h,v 1.25 1997/03/04 16:27:25 jj Exp $ */ #ifndef _SPARC_PTRACE_H #define _SPARC_PTRACE_H @@ -73,39 +73,7 @@ extern void show_regs(struct pt_regs *); #define REGWIN_SZ 0x40 #endif -/* First generic task_struct offsets. sizeof(task_struct)=1616 */ -#define TASK_STATE 0x000 -#define TASK_PRIORITY 0x008 -#define TASK_SIGNAL 0x00c -#define TASK_BLOCKED 0x010 -#define TASK_FLAGS 0x014 -#define TASK_SAVED_KSTACK 0x054 -#define TASK_KSTACK_PG 0x058 - -/* Thread stuff. */ -#define THREAD_UMASK 0x210 -#define THREAD_SADDR 0x218 -#define THREAD_SDESC 0x21c -#define THREAD_KSP 0x220 -#define THREAD_KPC 0x224 -#define THREAD_KPSR 0x228 -#define THREAD_KWIM 0x22c -#define THREAD_FORK_KPSR 0x230 -#define THREAD_FORK_KWIM 0x234 -#define THREAD_REG_WINDOW 0x238 -#define THREAD_STACK_PTRS 0x438 -#define THREAD_W_SAVED 0x458 -#define THREAD_FLOAT_REGS 0x460 -#define THREAD_FSR 0x560 -#define THREAD_SIGSTK 0x5e8 -#define THREAD_FLAGS 0x5f0 -#define THREAD_EX_COUNT 0x5f8 -#define THREAD_EX_PC 0x5fc -#define THREAD_EX_EXPC 0x600 -#define THREAD_EX_ADDR 0x604 -#define THREAD_DS 0x608 -#define THREAD_MM 0x638 -#define THREAD_MM_CTX 0x008 +#include <asm/asm_offsets.h> /* These are for pt_regs. */ #define PT_PSR 0x0 diff --git a/include/asm-sparc/resource.h b/include/asm-sparc/resource.h index 61a137b48..bcfa8c06a 100644 --- a/include/asm-sparc/resource.h +++ b/include/asm-sparc/resource.h @@ -1,4 +1,4 @@ -/* $Id: resource.h,v 1.5 1995/11/25 02:32:35 davem Exp $ +/* $Id: resource.h,v 1.6 1996/11/25 03:30:25 ecd Exp $ * resource.h: Resource definitions. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -20,7 +20,9 @@ #define RLIMIT_NOFILE 6 /* max number of open files */ #define RLIMIT_NPROC 7 /* max number of processes */ #define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space */ -#define RLIM_NLIMITS 9 +#define RLIMIT_AS 9 /* address space limit */ + +#define RLIM_NLIMITS 10 #ifdef __KERNEL__ @@ -29,8 +31,8 @@ {LONG_MAX, LONG_MAX}, {LONG_MAX, LONG_MAX}, \ {LONG_MAX, LONG_MAX}, {_STK_LIM, _STK_LIM}, \ { 0, LONG_MAX}, {LONG_MAX, LONG_MAX}, \ - {MAX_TASKS_PER_USER, MAX_TASKS_PER_USER}, {NR_OPEN, NR_OPEN}, \ - {LONG_MAX, LONG_MAX}, \ + {NR_OPEN, NR_OPEN}, {MAX_TASKS_PER_USER, MAX_TASKS_PER_USER}, \ + {LONG_MAX, LONG_MAX}, {LONG_MAX, LONG_MAX} \ } #endif /* __KERNEL__ */ diff --git a/include/asm-sparc/ross.h b/include/asm-sparc/ross.h index e6b0ddc26..7b270883f 100644 --- a/include/asm-sparc/ross.h +++ b/include/asm-sparc/ross.h @@ -1,4 +1,4 @@ -/* $Id: ross.h,v 1.11 1996/08/29 09:48:40 davem Exp $ +/* $Id: ross.h,v 1.12 1997/03/10 09:16:57 davem Exp $ * ross.h: Ross module specific definitions and defines. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -93,6 +93,8 @@ #define HYPERSPARC_ICCR_FTD 0x00000002 #define HYPERSPARC_ICCR_ICE 0x00000001 +#ifndef __ASSEMBLY__ + extern __inline__ unsigned int get_ross_icr(void) { unsigned int icreg; @@ -171,4 +173,6 @@ extern __inline__ void hyper_flush_cache_page(unsigned long page) } } +#endif /* !(__ASSEMBLY__) */ + #endif /* !(_SPARC_ROSS_H) */ diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h index cc9e75ae6..2750e7600 100644 --- a/include/asm-sparc/sbus.h +++ b/include/asm-sparc/sbus.h @@ -1,4 +1,4 @@ -/* $Id: sbus.h,v 1.11 1996/10/31 06:29:12 davem Exp $ +/* $Id: sbus.h,v 1.12 1997/02/04 07:29:21 davem Exp $ * sbus.h: Defines for the Sun SBus. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -51,7 +51,7 @@ struct linux_sbus_device { char linux_name[64]; /* Name used internally by Linux */ struct linux_prom_registers reg_addrs[PROMREG_MAX]; - int num_registers; + int num_registers, ranges_applied; struct linux_prom_irqs irqs[PROMINTR_MAX]; int num_irqs; @@ -96,6 +96,7 @@ sbus_is_slave(struct linux_sbus_device *dev) /* Apply promlib probed SBUS ranges to registers. */ extern void prom_apply_sbus_ranges(struct linux_sbus *sbus, - struct linux_prom_registers *sbusregs, int nregs); + struct linux_prom_registers *sbusregs, + int nregs, struct linux_sbus_device *sdev); #endif /* !(_SPARC_SBUS_H) */ diff --git a/include/asm-sparc/scatterlist.h b/include/asm-sparc/scatterlist.h new file mode 100644 index 000000000..222d99d24 --- /dev/null +++ b/include/asm-sparc/scatterlist.h @@ -0,0 +1,16 @@ +/* $Id: scatterlist.h,v 1.2 1997/04/10 05:13:24 davem Exp $ */ +#ifndef _SPARC_SCATTERLIST_H +#define _SPARC_SCATTERLIST_H + +struct scatterlist { + char * address; /* Location data is to be transferred to */ + char * alt_address; /* Location of actual if address is a + * dma indirect buffer. NULL otherwise */ + unsigned int length; + + __u32 dvma_address; /* A place to hang host-specific addresses at. */ +}; + +#define ISA_DMA_THRESHOLD (~0UL) + +#endif /* !(_SPARC_SCATTERLIST_H) */ diff --git a/include/asm-sparc/semaphore.h b/include/asm-sparc/semaphore.h index 4892ccb26..48da860e4 100644 --- a/include/asm-sparc/semaphore.h +++ b/include/asm-sparc/semaphore.h @@ -1,36 +1,63 @@ #ifndef _SPARC_SEMAPHORE_H #define _SPARC_SEMAPHORE_H -/* Dinky, good for nothing, just barely irq safe, Sparc semaphores. - * - * I'll write better ones later. - */ +/* Dinky, good for nothing, just barely irq safe, Sparc semaphores. */ + +#ifdef __KERNEL__ #include <asm/atomic.h> struct semaphore { atomic_t count; - atomic_t waiting; + atomic_t waking; struct wait_queue * wait; }; -#define MUTEX ((struct semaphore) { 1, 0, NULL }) -#define MUTEX_LOCKED ((struct semaphore) { 0, 0, NULL }) +#define MUTEX ((struct semaphore) { ATOMIC_INIT(1), ATOMIC_INIT(0), NULL }) +#define MUTEX_LOCKED ((struct semaphore) { ATOMIC_INIT(0), ATOMIC_INIT(0), NULL }) extern void __down(struct semaphore * sem); +extern int __down_interruptible(struct semaphore * sem); extern void __up(struct semaphore * sem); -/* - * This isn't quite as clever as the x86 side, but the gp register - * makes things a bit more complicated on the alpha.. +#define sema_init(sem, val) atomic_set(&((sem)->count), val) + +#define wake_one_more(sem) atomic_inc(&sem->waking); + +/* XXX Put this in raw assembler for SMP case so that the atomic_t + * XXX spinlock can allow this to be done without grabbing the IRQ + * XXX global lock. + */ +static inline int waking_non_zero(struct semaphore *sem) +{ + unsigned long flags; + int ret = 0; + + save_flags(flags); + cli(); + if (atomic_read(&sem->waking) > 0) { + atomic_dec(&sem->waking); + ret = 1; + } + restore_flags(flags); + return ret; +} + +/* This isn't quite as clever as the x86 side, I'll be fixing this + * soon enough. */ extern inline void down(struct semaphore * sem) { - for (;;) { - if (atomic_dec_return(&sem->count) >= 0) - break; + if (atomic_dec_return(&sem->count) < 0) __down(sem); - } +} + +extern inline int down_interruptible(struct semaphore * sem) +{ + int ret = 0; + if(atomic_dec_return(&sem->count) < 0) + ret = __down_interruptible(sem); + return ret; } extern inline void up(struct semaphore * sem) @@ -39,4 +66,6 @@ extern inline void up(struct semaphore * sem) __up(sem); } +#endif /* __KERNEL__ */ + #endif /* !(_SPARC_SEMAPHORE_H) */ diff --git a/include/asm-sparc/sigcontext.h b/include/asm-sparc/sigcontext.h index c7a9993fe..ec6107408 100644 --- a/include/asm-sparc/sigcontext.h +++ b/include/asm-sparc/sigcontext.h @@ -1,6 +1,6 @@ -/* $Id: sigcontext.h,v 1.9 1996/10/27 08:55:42 davem Exp $ */ -#ifndef _ASMsparc_SIGCONTEXT_H -#define _ASMsparc_SIGCONTEXT_H +/* $Id: sigcontext.h,v 1.12 1997/03/03 16:51:52 jj Exp $ */ +#ifndef __SPARC_SIGCONTEXT_H +#define __SPARC_SIGCONTEXT_H #include <asm/ptrace.h> @@ -36,7 +36,22 @@ struct sigcontext { /* Windows to restore after signal */ struct reg_window sigc_wbuf[SUNOS_MAXWIN]; }; -#endif /* !(__ASSEMBLY__) */ -#endif /* !(_ASMsparc_SIGCONTEXT_H) */ +typedef struct { + struct pt_regs si_regs; + int si_mask; +} __siginfo_t; + +typedef struct { + unsigned long si_float_regs [32]; + unsigned long si_fsr; + unsigned long si_fpqdepth; + struct { + unsigned long *insn_addr; + unsigned long insn; + } si_fpqueue [16]; +} __siginfo_fpu_t; + +#endif /* !(__ASSEMBLY__) */ +#endif /* !(__SPARC_SIGCONTEXT_H) */ diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h index 2cc321d13..d2e4e7eab 100644 --- a/include/asm-sparc/signal.h +++ b/include/asm-sparc/signal.h @@ -1,4 +1,4 @@ -/* $Id: signal.h,v 1.29 1996/10/27 08:55:45 davem Exp $ */ +/* $Id: signal.h,v 1.30 1996/12/24 08:59:36 davem Exp $ */ #ifndef _ASMSPARC_SIGNAL_H #define _ASMSPARC_SIGNAL_H @@ -161,17 +161,6 @@ struct sigaction { void (*sa_restorer) (void); /* not used by Linux/SPARC yet */ }; -#ifdef __KERNEL__ - -/* use the following macro to get the size of a sigaction struct - when copying to/from userland */ -#define SIGACTION_SIZE(personality) (((personality) & PER_BSD)?\ - sizeof(struct sigaction)-sizeof(void *):\ - sizeof(struct sigaction)) - -#endif /* __KERNEL__ */ - - #endif /* !(__ASSEMBLY__) */ #endif /* !(_ASMSPARC_SIGNAL_H) */ diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h index 0d1cab1eb..7d4106b03 100644 --- a/include/asm-sparc/smp.h +++ b/include/asm-sparc/smp.h @@ -15,6 +15,8 @@ struct prom_cpuinfo { int prom_node; int mid; }; +extern int linux_num_cpus; /* number of CPUs probed */ + #endif /* !(__ASSEMBLY__) */ #ifdef __SMP__ @@ -27,12 +29,18 @@ extern struct prom_cpuinfo linux_cpus[NCPUS]; struct cpuinfo_sparc { unsigned long udelay_val; /* that's it */ + unsigned short next; + unsigned short mid; }; extern struct cpuinfo_sparc cpu_data[NR_CPUS]; -typedef __volatile__ unsigned char klock_t; -extern klock_t kernel_flag; +struct klock_info { + unsigned char kernel_flag; + unsigned char akp; +}; + +extern struct klock_info klock_info; #define KLOCK_HELD 0xff #define KLOCK_CLEAR 0x00 @@ -44,15 +52,6 @@ extern klock_t kernel_flag; extern int smp_found_cpus; extern unsigned char boot_cpu_id; extern unsigned long cpu_present_map; -extern __volatile__ unsigned long smp_invalidate_needed[NR_CPUS]; -extern __volatile__ unsigned long kernel_counter; -extern __volatile__ unsigned char active_kernel_processor; -extern void smp_message_irq(void); -extern unsigned long ipi_count; -extern __volatile__ unsigned long kernel_counter; -extern __volatile__ unsigned long syscall_count; - -extern void print_lock_state(void); typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); @@ -66,8 +65,6 @@ extern void smp_boot_cpus(void); extern void smp_store_cpu_info(int id); extern void smp_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5); -extern void smp_capture(void); -extern void smp_release(void); extern __inline__ void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } extern __inline__ void xc1(smpfunc_t func, unsigned long arg1) @@ -86,6 +83,7 @@ extern __inline__ void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg extern __volatile__ int cpu_number_map[NR_CPUS]; extern __volatile__ int cpu_logical_map[NR_CPUS]; +extern unsigned long smp_proc_in_lock[NR_CPUS]; extern __inline__ int smp_processor_id(void) { @@ -98,54 +96,9 @@ extern __inline__ int smp_processor_id(void) return cpuid; } - -extern __volatile__ unsigned long smp_proc_in_lock[NR_CPUS]; /* for computing process time */ -extern __volatile__ int smp_process_available; - -extern __inline__ int smp_swap(volatile int *addr, int value) -{ - __asm__ __volatile__("swap [%2], %0\n\t" : - "=&r" (value) : - "0" (value), "r" (addr)); - return value; -} - -extern __inline__ __volatile__ void inc_smp_counter(volatile int *ctr) -{ - int tmp; - - while((tmp = smp_swap(ctr, -1)) == -1) - while(*ctr == -1) - ; - - *ctr = (tmp + 1); -} - -extern __inline__ __volatile__ void dec_smp_counter(volatile int *ctr) -{ - int tmp; - - while((tmp = smp_swap(ctr, -1)) == -1) - while(*ctr == -1) - ; - - *ctr = (tmp - 1); -} - -extern __inline__ __volatile__ int read_smp_counter(volatile int *ctr) -{ - int value; - - while((value = *ctr) == -1) - ; - - return value; -} - #endif /* !(__ASSEMBLY__) */ /* Sparc specific messages. */ -#define MSG_CAPTURE 0x0004 /* Park a processor. */ #define MSG_CROSS_CALL 0x0005 /* run func on cpus */ /* Empirical PROM processor mailbox constants. If the per-cpu mailbox @@ -159,9 +112,6 @@ extern __inline__ __volatile__ int read_smp_counter(volatile int *ctr) #define MBOX_IDLECPU2 0xFD #define MBOX_STOPCPU2 0xFE - -#define NO_PROC_ID 0xFF - #define PROC_CHANGE_PENALTY 20 #define SMP_FROM_INT 1 @@ -169,4 +119,6 @@ extern __inline__ __volatile__ int read_smp_counter(volatile int *ctr) #endif /* !(__SMP__) */ +#define NO_PROC_ID 0xFF + #endif /* !(_SPARC_SMP_H) */ diff --git a/include/asm-sparc/smp_lock.h b/include/asm-sparc/smp_lock.h index 7ce71d8ff..4f0a8e5f4 100644 --- a/include/asm-sparc/smp_lock.h +++ b/include/asm-sparc/smp_lock.h @@ -1,58 +1,87 @@ -/* smp_lock.h: Locking and unlocking the kernel on the Sparc. +/* smp_lock.h: 32-bit Sparc SMP master lock primitives. * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997 David S. Miller (davem@caip.rutgers.edu) */ #ifndef __SPARC_SMPLOCK_H #define __SPARC_SMPLOCK_H #include <asm/smp.h> -#include <asm/bitops.h> -#include <asm/atops.h> -#include <asm/pgtable.h> +#include <asm/ptrace.h> -#ifdef __SMP__ +#ifndef __SMP__ -/* - * Locking the kernel +#define lock_kernel() do { } while(0) +#define unlock_kernel() do { } while(0) +#define release_kernel_lock(task, cpu, depth) ((depth) = 1) +#define reacquire_kernel_lock(task, cpu, depth) do { } while(0) + +#else + +#include <asm/hardirq.h> + +/* Release global kernel lock and global interrupt lock */ +#define release_kernel_lock(task, cpu, depth) \ +do { \ + if((depth = (task)->lock_depth) != 0) { \ + __cli(); \ + (task)->lock_depth = 0; \ + klock_info.akp = NO_PROC_ID; \ + klock_info.kernel_flag = 0; \ + } \ + release_irqlock(cpu); \ + __sti(); \ +} while(0) + +/* Do not fuck with this without consulting arch/sparc/lib/locks.S first! */ +#define reacquire_kernel_lock(task, cpu, depth) \ +do { \ + if(depth) { \ + register struct klock_info *klip asm("g1"); \ + register int proc asm("g5"); \ + klip = &klock_info; \ + proc = cpu; \ + __asm__ __volatile__("mov %%o7, %%g4\n\t" \ + "call ___lock_reacquire_kernel\n\t" \ + " mov %2, %%g2" \ + : /* No outputs. */ \ + : "r" (klip), "r" (proc), "r" (depth) \ + : "g2", "g3", "g4", "g7", "memory", "cc"); \ + } \ +} while(0) + +/* The following acquire and release the master kernel global lock, + * the idea is that the usage of this mechanmism becomes less and less + * as time goes on, to the point where they are no longer needed at all + * and can thus disappear. */ -/* Knock knock... */ +/* Do not fuck with this without consulting arch/sparc/lib/locks.S first! */ extern __inline__ void lock_kernel(void) { - unsigned long flags; - int proc = smp_processor_id(); - - save_flags(flags); cli(); /* need this on sparc? */ - while(ldstub(&kernel_flag)) { - if(proc == active_kernel_processor) - break; - do { -#ifdef __SMP_PROF__ - smp_spins[smp_processor_id()]++; -#endif - barrier(); - } while(kernel_flag); /* Don't lock the bus more than we have to. */ - } - active_kernel_processor = proc; - kernel_counter++; - restore_flags(flags); + register struct klock_info *klip asm("g1"); + register int proc asm("g5"); + klip = &klock_info; + proc = smp_processor_id(); + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___lock_kernel + ld [%%g6 + %0], %%g2 +" : : "i" (AOFF_task_lock_depth), "r" (klip), "r" (proc) + : "g2", "g3", "g4", "g7", "memory", "cc"); } -/* I want out... */ +/* Release kernel global lock. */ extern __inline__ void unlock_kernel(void) { - unsigned long flags; - - save_flags(flags); cli(); /* need this on sparc? */ - if(kernel_counter == 0) - panic("Bogus kernel counter.\n"); - - if(!--kernel_counter) { - active_kernel_processor = NO_PROC_ID; - kernel_flag = KLOCK_CLEAR; - } - restore_flags(flags); + register struct klock_info *klip asm("g1"); + klip = &klock_info; + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___unlock_kernel + ld [%%g6 + %0], %%g2 +" : : "i" (AOFF_task_lock_depth), "r" (klip) + : "g2", "g3", "g4", "memory", "cc"); } #endif /* !(__SPARC_SMPLOCK_H) */ diff --git a/include/asm-sparc/socket.h b/include/asm-sparc/socket.h index 1c5348030..f5205550d 100644 --- a/include/asm-sparc/socket.h +++ b/include/asm-sparc/socket.h @@ -1,4 +1,4 @@ -/* $Id: socket.h,v 1.6 1996/04/04 12:51:26 davem Exp $ */ +/* $Id: socket.h,v 1.9 1997/03/17 04:50:50 davem Exp $ */ #ifndef _ASM_SOCKET_H #define _ASM_SOCKET_H @@ -8,14 +8,20 @@ #define SOL_SOCKET 0xffff #define SO_DEBUG 0x0001 +#define SO_PASSCRED 0x0002 #define SO_REUSEADDR 0x0004 #define SO_KEEPALIVE 0x0008 #define SO_DONTROUTE 0x0010 #define SO_BROADCAST 0x0020 +#define SO_PEERCRED 0x0040 #define SO_LINGER 0x0080 #define SO_OOBINLINE 0x0100 /* To add :#define SO_REUSEPORT 0x0200 */ #define SO_BSDCOMPAT 0x0400 +#define SO_RCVLOWAT 0x0800 +#define SO_SNDLOWAT 0x1000 +#define SO_RCVTIMEO 0x2000 +#define SO_SNDTIMEO 0x4000 /* wha!??? */ #define SO_DONTLINGER (~SO_LINGER) /* Older SunOS compat. hack */ @@ -29,4 +35,9 @@ #define SO_NO_CHECK 0x000b #define SO_PRIORITY 0x000c +/* Security levels - as per NRL IPv6 - don't actually do anything */ +#define SO_SECURITY_AUTHENTICATION 0x000d +#define SO_SECURITY_ENCRYPTION_TRANSPORT 0x000e +#define SO_SECURITY_ENCRYPTION_NETWORK 0x000f + #endif /* _ASM_SOCKET_H */ diff --git a/include/asm-sparc/softirq.h b/include/asm-sparc/softirq.h new file mode 100644 index 000000000..41b72b40a --- /dev/null +++ b/include/asm-sparc/softirq.h @@ -0,0 +1,132 @@ +/* softirq.h: 32-bit Sparc soft IRQ support. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC_SOFTIRQ_H +#define __SPARC_SOFTIRQ_H + +#include <asm/atomic.h> +#include <asm/hardirq.h> + +/* The locking mechanism for base handlers, to prevent re-entrancy, + * is entirely private to an implementation, it should not be + * referenced at all outside of this file. + */ +#define get_active_bhs() (bh_mask & bh_active) + +#ifdef __SMP__ + +extern atomic_t __sparc_bh_counter; + +#define start_bh_atomic() \ + do { atomic_inc(&__sparc_bh_counter); synchronize_irq(); } while(0) + +#define end_bh_atomic() atomic_dec(&__sparc_bh_counter) + +#include <asm/spinlock.h> + +extern spinlock_t global_bh_lock; + +#define init_bh(nr, routine) \ +do { unsigned long flags; \ + int ent = nr; \ + spin_lock_irqsave(&global_bh_lock, flags); \ + bh_base[ent] = routine; \ + bh_mask_count[ent] = 0; \ + bh_mask |= 1 << ent; \ + spin_unlock_irqrestore(&global_bh_lock, flags); \ +} while(0) + +#define remove_bh(nr) \ +do { unsigned long flags; \ + int ent = nr; \ + spin_lock_irqsave(&global_bh_lock, flags); \ + bh_base[ent] = NULL; \ + bh_mask &= ~(1 << ent); \ + spin_unlock_irqrestore(&global_bh_lock, flags); \ +} while(0) + +#define mark_bh(nr) \ +do { unsigned long flags; \ + spin_lock_irqsave(&global_bh_lock, flags); \ + bh_active |= (1 << nr); \ + spin_unlock_irqrestore(&global_bh_lock, flags); \ +} while(0) + +#define disable_bh(nr) \ +do { unsigned long flags; \ + int ent = nr; \ + spin_lock_irqsave(&global_bh_lock, flags); \ + bh_mask &= ~(1 << ent); \ + bh_mask_count[ent]++; \ + spin_unlock_irqrestore(&global_bh_lock, flags); \ +} while(0) + +#define enable_bh(nr) \ +do { unsigned long flags; \ + int ent = nr; \ + spin_lock_irqsave(&global_bh_lock, flags); \ + if (!--bh_mask_count[ent]) \ + bh_mask |= 1 << ent; \ + spin_unlock_irqrestore(&global_bh_lock, flags); \ +} while(0) + +#define softirq_trylock() \ +({ \ + int ret = 1; \ + if(atomic_add_return(1, &__sparc_bh_counter) != 1) { \ + atomic_dec(&__sparc_bh_counter); \ + ret = 0; \ + } \ + ret; \ +}) +#define softirq_endlock() atomic_dec(&__sparc_bh_counter) +#define clear_active_bhs(mask) \ +do { unsigned long flags; \ + spin_lock_irqsave(&global_bh_lock, flags); \ + bh_active &= ~(mask); \ + spin_unlock_irqrestore(&global_bh_lock, flags); \ +} while(0) + +#else /* !(__SMP__) */ + +extern int __sparc_bh_counter; + +#define start_bh_atomic() do { __sparc_bh_counter++; barrier(); } while(0) +#define end_bh_atomic() do { barrier(); __sparc_bh_counter--; } while(0) + +#define softirq_trylock() (__sparc_bh_counter ? 0 : (__sparc_bh_counter=1)) +#define softirq_endlock() (__sparc_bh_counter = 0) +#define clear_active_bhs(x) (bh_active &= ~(x)) + +#define init_bh(nr, routine) \ +do { int ent = nr; \ + bh_base[ent] = routine; \ + bh_mask_count[ent] = 0; \ + bh_mask |= 1 << ent; \ +} while(0) + +#define remove_bh(nr) \ +do { int ent = nr; \ + bh_base[ent] = NULL; \ + bh_mask &= ~(1 << ent); \ +} while(0) + +#define mark_bh(nr) (bh_active |= (1 << (nr))) + +#define disable_bh(nr) \ +do { int ent = nr; \ + bh_mask &= ~(1 << ent); \ + bh_mask_count[ent]++; \ +} while(0) + +#define enable_bh(nr) \ +do { int ent = nr; \ + if (!--bh_mask_count[ent]) \ + bh_mask |= 1 << ent; \ +} while(0) + +#endif /* __SMP__ */ + +#endif /* __SPARC_SOFTIRQ_H */ diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h new file mode 100644 index 000000000..877b7416a --- /dev/null +++ b/include/asm-sparc/spinlock.h @@ -0,0 +1,259 @@ +/* spinlock.h: 32-bit Sparc spinlock support. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC_SPINLOCK_H +#define __SPARC_SPINLOCK_H + +#ifndef __ASSEMBLY__ + +#ifndef __SMP__ + +typedef struct { } spinlock_t; +#define SPIN_LOCK_UNLOCKED { } + +#define spin_lock_init(lock) do { } while(0) +#define spin_lock(lock) do { } while(0) +#define spin_trylock(lock) do { } while(0) +#define spin_unlock_wait(lock) do { } while(0) +#define spin_unlock(lock) do { } while(0) +#define spin_lock_irq(lock) cli() +#define spin_unlock_irq(lock) sti() + +#define spin_lock_irqsave(lock, flags) save_and_cli(flags) +#define spin_unlock_irqrestore(lock, flags) restore_flags(flags) + +/* + * Read-write spinlocks, allowing multiple readers + * but only one writer. + * + * NOTE! it is quite common to have readers in interrupts + * but no interrupt writers. For those circumstances we + * can "mix" irq-safe locks - any writer needs to get a + * irq-safe write-lock, but readers can get non-irqsafe + * read-locks. + */ +typedef struct { } rwlock_t; +#define RW_LOCK_UNLOCKED { } + +#define read_lock(lock) do { } while(0) +#define read_unlock(lock) do { } while(0) +#define write_lock(lock) do { } while(0) +#define write_unlock(lock) do { } while(0) +#define read_lock_irq(lock) cli() +#define read_unlock_irq(lock) sti() +#define write_lock_irq(lock) cli() +#define write_unlock_irq(lock) sti() + +#define read_lock_irqsave(lock, flags) save_and_cli(flags) +#define read_unlock_irqrestore(lock, flags) restore_flags(flags) +#define write_lock_irqsave(lock, flags) save_and_cli(flags) +#define write_unlock_irqrestore(lock, flags) restore_flags(flags) + +#else /* !(__SMP__) */ + +#include <asm/psr.h> + +typedef unsigned char spinlock_t; +#define SPIN_LOCK_UNLOCKED 0 + +#define spin_lock_init(lock) (*(lock) = 0) +#define spin_unlock_wait(lock) do { barrier(); } while(*(volatile spinlock_t *)lock) + +extern __inline__ void spin_lock(spinlock_t *lock) +{ + __asm__ __volatile__(" +1: ldstub [%0], %%g2 + orcc %%g2, 0x0, %%g0 + bne,a 2f + ldub [%0], %%g2 + .text 2 +2: orcc %%g2, 0x0, %%g0 + bne,a 2b + ldub [%0], %%g2 + b,a 1b + .previous +" : /* no outputs */ + : "r" (lock) + : "g2", "memory", "cc"); +} + +extern __inline__ int spin_trylock(spinlock_t *lock) +{ + unsigned int result; + __asm__ __volatile__("ldstub [%1], %0" + : "=r" (result) + : "r" (lock) + : "memory"); + return (result == 0); +} + +extern __inline__ void spin_unlock(spinlock_t *lock) +{ + __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); +} + +extern __inline__ void spin_lock_irq(spinlock_t *lock) +{ + __asm__ __volatile__(" + rd %%psr, %%g2 + or %%g2, %0, %%g2 + wr %%g2, 0x0, %%psr + nop; nop; nop; +1: ldstub [%1], %%g2 + orcc %%g2, 0x0, %%g0 + bne,a 2f + ldub [%1], %%g2 + .text 2 +2: orcc %%g2, 0x0, %%g0 + bne,a 2b + ldub [%1], %%g2 + b,a 1b + .previous +" : /* No outputs */ + : "i" (PSR_PIL), "r" (lock) + : "g2", "memory", "cc"); +} + +extern __inline__ void spin_unlock_irq(spinlock_t *lock) +{ + __asm__ __volatile__(" + rd %%psr, %%g2 + andn %%g2, %1, %%g2 + stb %%g0, [%0] + wr %%g2, 0x0, %%psr + nop; nop; nop; +" : /* No outputs. */ + : "r" (lock), "i" (PSR_PIL) + : "g2", "memory"); +} + +#define spin_lock_irqsave(lock, flags) \ +do { \ + register spinlock_t *lp asm("g1"); \ + lp = lock; \ + __asm__ __volatile__( \ + "rd %%psr, %0\n\t" \ + "or %0, %1, %%g2\n\t" \ + "wr %%g2, 0x0, %%psr\n\t" \ + "nop; nop; nop;\n" \ + "1:\n\t" \ + "ldstub [%2], %%g2\n\t" \ + "orcc %%g2, 0x0, %%g0\n\t" \ + "bne,a 2f\n\t" \ + " ldub [%2], %%g2\n\t" \ + ".text 2\n" \ + "2:\n\t" \ + "orcc %%g2, 0x0, %%g0\n\t" \ + "bne,a 2b\n\t" \ + " ldub [%2], %%g2\n\t" \ + "b,a 1b\n\t" \ + ".previous\n" \ + : "=r" (flags) \ + : "i" (PSR_PIL), "r" (lock) \ + : "g2", "memory", "cc"); \ +} while(0) + +extern __inline__ void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags) +{ + __asm__ __volatile__(" + stb %%g0, [%0] + wr %1, 0x0, %%psr + nop; nop; nop; +" : /* No outputs. */ + : "r" (lock), "r" (flags) + : "memory", "cc"); +} + +/* Read-write spinlocks, allowing multiple readers + * but only one writer. + * + * NOTE! it is quite common to have readers in interrupts + * but no interrupt writers. For those circumstances we + * can "mix" irq-safe locks - any writer needs to get a + * irq-safe write-lock, but readers can get non-irqsafe + * read-locks. + * + * XXX This might create some problems with my dual spinlock + * XXX scheme, deadlocks etc. -DaveM + */ +typedef struct { volatile unsigned int lock; } rwlock_t; + +#define RW_LOCK_UNLOCKED { 0 } + +/* Sort of like atomic_t's on Sparc, but even more clever. + * + * ------------------------------------ + * | 16-bit counter | clock | wlock | rwlock_t + * ------------------------------------ + * 31 16 15 8 7 0 + * + * wlock signifies the one writer is in, the clock protects + * counter bumping, however a reader must acquire wlock + * before he can bump the counter on a read_lock(). + * Similarly a writer, once he has the wlock, must await + * for the top 24 bits to all clear before he can finish + * going in (this includes the clock of course). + * + * Unfortunately this scheme limits us to ~65,000 cpus. + */ +extern __inline__ void read_lock(rwlock_t *rw) +{ + register rwlock_t *lp asm("g1"); + lp = rw; + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___rw_read_enter + ldstub [%%g1 + 3], %%g2 +" : /* no outputs */ + : "r" (lp) + : "g2", "g4", "g7", "memory", "cc"); +} + +extern __inline__ void read_unlock(rwlock_t *rw) +{ + register rwlock_t *lp asm("g1"); + lp = rw; + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___rw_read_exit + ldstub [%%g1 + 2], %%g2 +" : /* no outputs */ + : "r" (lp) + : "g2", "g4", "g7", "memory", "cc"); +} + +extern __inline__ void write_lock(rwlock_t *rw) +{ + register rwlock_t *lp asm("g1"); + lp = rw; + __asm__ __volatile__(" + mov %%o7, %%g4 + call ___rw_write_enter + ldstub [%%g1 + 3], %%g2 +" : /* no outputs */ + : "r" (lp) + : "g2", "g4", "g7", "memory", "cc"); +} + +#define write_unlock(rw) do { (rw)->lock = 0; } while(0) +#define read_lock_irq(lock) do { __cli(); read_lock(lock); } while (0) +#define read_unlock_irq(lock) do { read_unlock(lock); __sti(); } while (0) +#define write_lock_irq(lock) do { __cli(); write_lock(lock); } while (0) +#define write_unlock_irq(lock) do { write_unlock(lock); __sti(); } while (0) + +#define read_lock_irqsave(lock, flags) \ + do { __save_and_cli(flags); read_lock(lock); } while (0) +#define read_unlock_irqrestore(lock, flags) \ + do { read_unlock(lock); __restore_flags(flags); } while (0) +#define write_lock_irqsave(lock, flags) \ + do { __save_and_cli(flags); write_lock(lock); } while (0) +#define write_unlock_irqrestore(lock, flags) \ + do { write_unlock(lock); __restore_flags(flags); } while (0) + +#endif /* __SMP__ */ + +#endif /* !(__ASSEMBLY__) */ + +#endif /* __SPARC_SPINLOCK_H */ diff --git a/include/asm-sparc/string.h b/include/asm-sparc/string.h index 856e96f6d..ca5dc4003 100644 --- a/include/asm-sparc/string.h +++ b/include/asm-sparc/string.h @@ -1,8 +1,9 @@ -/* $Id: string.h,v 1.27 1996/10/27 08:55:50 davem Exp $ +/* $Id: string.h,v 1.30 1997/03/03 17:11:12 jj Exp $ * string.h: External definitions for optimized assembly string * routines for the Linux Kernel. * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ #ifndef __SPARC_STRING_H__ @@ -10,13 +11,26 @@ /* Really, userland/ksyms should not see any of this stuff. */ -#if defined(__KERNEL__) && !defined(EXPORT_SYMTAB) +#ifdef __KERNEL__ + +extern void __memmove(void *,const void *,__kernel_size_t); +extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t); +extern __kernel_size_t __memset(void *,int,__kernel_size_t); + +#ifndef EXPORT_SYMTAB /* First the mem*() things. */ #define __HAVE_ARCH_BCOPY #define __HAVE_ARCH_MEMMOVE +#undef memmove +#define memmove(_to, _from, _n) \ +({ \ + void *_t = (_to); \ + __memmove(_t, (_from), (_n)); \ + _t; \ +}) + #define __HAVE_ARCH_MEMCPY -extern void *__memcpy(void *,const void *,__kernel_size_t); extern inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n) { @@ -50,12 +64,11 @@ extern inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_si __nonconstant_memcpy((t),(f),(n))) #define __HAVE_ARCH_MEMSET -extern void *__memset(void *,int,__kernel_size_t); -extern inline void *__constant_c_and_count_memset(void *s, char c, size_t count) +extern inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count) { extern void *bzero_1page(void *); - extern void *__bzero(void *, size_t); + extern __kernel_size_t __bzero(void *, __kernel_size_t); if(!c) { if(count == 4096) @@ -68,9 +81,9 @@ extern inline void *__constant_c_and_count_memset(void *s, char c, size_t count) return s; } -extern inline void *__constant_c_memset(void *s, char c, size_t count) +extern inline void *__constant_c_memset(void *s, char c, __kernel_size_t count) { - extern void *__bzero(void *, size_t); + extern __kernel_size_t __bzero(void *, __kernel_size_t); if(!c) __bzero(s, count); @@ -79,12 +92,18 @@ extern inline void *__constant_c_memset(void *s, char c, size_t count) return s; } +extern inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count) +{ + __memset(s, c, count); + return s; +} + #undef memset #define memset(s, c, count) \ (__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \ __constant_c_and_count_memset((s), (c), (count)) : \ __constant_c_memset((s), (c), (count))) \ - : __memset((s), (c), (count))) + : __nonconstant_memset((s), (c), (count))) #define __HAVE_ARCH_MEMSCAN @@ -172,7 +191,9 @@ extern inline int __constant_strncmp(const char *src, const char *dest, __kernel (__builtin_constant_p(__arg2) ? \ __constant_strncmp(__arg0, __arg1, __arg2) : \ __strncmp(__arg0, __arg1, __arg2)) + +#endif /* EXPORT_SYMTAB */ -#endif /* (__KERNEL__) && !(_KSYMS_INTERNEL) */ +#endif /* __KERNEL__ */ #endif /* !(__SPARC_STRING_H__) */ diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h index 1ec202c8e..e1d33e436 100644 --- a/include/asm-sparc/system.h +++ b/include/asm-sparc/system.h @@ -1,4 +1,4 @@ -/* $Id: system.h,v 1.42 1996/09/30 02:23:21 davem Exp $ */ +/* $Id: system.h,v 1.58 1997/04/18 05:44:54 davem Exp $ */ #ifndef __SPARC_SYSTEM_H #define __SPARC_SYSTEM_H @@ -10,10 +10,11 @@ #include <asm/page.h> #include <asm/oplib.h> #include <asm/psr.h> -#endif +#include <asm/ptrace.h> #define EMPTY_PGT (&empty_bad_page) #define EMPTY_PGE (&empty_bad_page_table) +#endif /* __KERNEL__ */ #ifndef __ASSEMBLY__ @@ -28,8 +29,12 @@ enum sparc_cpu { sun4e = 0x04, sun4u = 0x05, /* V8 ploos ploos */ sun_unknown = 0x06, + ap1000 = 0x07, /* almost a sun4m */ }; +/* Really, userland should not be looking at any of this... */ +#ifdef __KERNEL__ + extern enum sparc_cpu sparc_cpu_model; extern unsigned long empty_bad_page; @@ -45,28 +50,24 @@ extern struct linux_romvec *romvec; * frames are up to date. */ extern void flush_user_windows(void); +extern void kill_user_windows(void); extern void synchronize_user_stack(void); extern void fpsave(unsigned long *fpregs, unsigned long *fsr, void *fpqueue, unsigned long *fpqdepth); #ifdef __SMP__ #define SWITCH_ENTER \ - cli(); \ if(prev->flags & PF_USEDFPU) { \ + put_psr(get_psr() | PSR_EF); \ fpsave(&prev->tss.float_regs[0], &prev->tss.fsr, \ &prev->tss.fpqueue[0], &prev->tss.fpqdepth); \ prev->flags &= ~PF_USEDFPU; \ prev->tss.kregs->psr &= ~PSR_EF; \ - } \ - prev->lock_depth = syscall_count; \ - kernel_counter += (next->lock_depth - prev->lock_depth); \ - syscall_count = next->lock_depth; + } -#define SWITCH_EXIT sti(); #define SWITCH_DO_LAZY_FPU #else #define SWITCH_ENTER -#define SWITCH_EXIT #define SWITCH_DO_LAZY_FPU if(last_task_used_math != next) next->tss.kregs->psr&=~PSR_EF; #endif @@ -87,76 +88,81 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr, switch_to_context(next); \ task_pc = ((unsigned long) &&here) - 0x8; \ __asm__ __volatile__( \ - "rd\t%%psr, %%g4\n\t" \ - "std\t%%sp, [%%g6 + %3]\n\t" \ - "rd\t%%wim, %%g5\n\t" \ - "wr\t%%g4, 0x20, %%psr\n\t" \ - "std\t%%g4, [%%g6 + %2]\n\t" \ - "mov\t%1, %%g6\n\t" \ - "ldd\t[%%g6 + %2], %%g4\n\t" \ - "st\t%1, [%0]\n\t" \ - "wr\t%%g4, 0x20, %%psr\n\t" \ - "ldd\t[%%g6 + %3], %%sp\n\t" \ - "wr\t%%g5, 0x0, %%wim\n\t" \ - "ldd\t[%%sp + 0x00], %%l0\n\t" \ - "ldd\t[%%sp + 0x08], %%l2\n\t" \ - "ldd\t[%%sp + 0x10], %%l4\n\t" \ - "ldd\t[%%sp + 0x18], %%l6\n\t" \ - "ldd\t[%%sp + 0x20], %%i0\n\t" \ - "ldd\t[%%sp + 0x28], %%i2\n\t" \ - "ldd\t[%%sp + 0x30], %%i4\n\t" \ - "ldd\t[%%sp + 0x38], %%i6\n\t" \ - "wr\t%%g4, 0x0, %%psr\n\t" \ + "rd %%psr, %%g4\n\t" \ + "std %%sp, [%%g6 + %3]\n\t" \ + "rd %%wim, %%g5\n\t" \ + "wr %%g4, 0x20, %%psr\n\t" \ + "nop\n\t" \ + "std %%g4, [%%g6 + %2]\n\t" \ + "ldd [%1 + %2], %%g4\n\t" \ + "mov %1, %%g6\n\t" \ + "st %1, [%0]\n\t" \ + "wr %%g4, 0x20, %%psr\n\t" \ + "nop\n\t" \ + "nop\n\t" \ + "ldd [%%g6 + %3], %%sp\n\t" \ + "wr %%g5, 0x0, %%wim\n\t" \ + "ldd [%%sp + 0x00], %%l0\n\t" \ + "ldd [%%sp + 0x38], %%i6\n\t" \ + "wr %%g4, 0x0, %%psr\n\t" \ + "nop\n\t" \ "nop\n\t" \ - "jmpl\t%%o7 + 0x8, %%g0\n\t" \ + "jmpl %%o7 + 0x8, %%g0\n\t" \ " nop\n\t" : : "r" (&(current_set[smp_processor_id()])), "r" (next), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.kpsr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ksp)), \ - "r" (task_pc) : "g4", "g5"); \ -here: SWITCH_EXIT } while(0) + "i" ((const unsigned long)(&((struct task_struct *)0)->tss.kpsr)), \ + "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ksp)), \ + "r" (task_pc) \ + : "g1", "g2", "g3", "g4", "g5", "g7", "l2", "l3", \ + "l4", "l5", "l6", "l7", "i0", "i1", "i2", "i3", "i4", "i5", "o0", "o1", "o2", \ + "o3"); \ +here: } while(0) /* Changing the IRQ level on the Sparc. We now avoid writing the psr * whenever possible. */ extern __inline__ void setipl(unsigned long __orig_psr) { - __asm__ __volatile__("wr\t%0, 0x0, %%psr\n\t" - "nop; nop; nop;" : : "r" (__orig_psr) : "memory"); + __asm__ __volatile__(" + wr %0, 0x0, %%psr + nop; nop; nop +" : /* no outputs */ + : "r" (__orig_psr) + : "memory", "cc"); } -extern __inline__ void cli(void) +extern __inline__ void __cli(void) { unsigned long tmp; - __asm__ __volatile__("rd\t%%psr, %0\n\t" - "andcc\t%0, %1, %%g0\n\t" - "be,a\t1f\n\t" - " wr\t%0, %1, %%psr\n" - "1:\tnop; nop" - : "=r" (tmp) - : "i" (PSR_PIL) - : "memory"); + __asm__ __volatile__(" + rd %%psr, %0 + or %0, %1, %0 + wr %0, 0x0, %%psr + nop; nop; nop +" : "=r" (tmp) + : "i" (PSR_PIL) + : "memory"); } -extern __inline__ void sti(void) +extern __inline__ void __sti(void) { unsigned long tmp; - __asm__ __volatile__("rd\t%%psr, %0\n\t" - "andcc\t%0, %1, %%g0\n\t" - "bne,a\t1f\n\t" - " wr\t%0, %1, %%psr\n" - "1:\tnop; nop" - : "=r" (tmp) - : "i" (PSR_PIL) - : "memory"); + __asm__ __volatile__(" + rd %%psr, %0 + andn %0, %1, %0 + wr %0, 0x0, %%psr + nop; nop; nop +" : "=r" (tmp) + : "i" (PSR_PIL) + : "memory"); } extern __inline__ unsigned long getipl(void) { unsigned long retval; - __asm__ __volatile__("rd\t%%psr, %0" : "=r" (retval)); + __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); return retval; } @@ -164,16 +170,22 @@ extern __inline__ unsigned long swap_pil(unsigned long __new_psr) { unsigned long retval, tmp1, tmp2; - __asm__ __volatile__("rd\t%%psr, %0\n\t" - "and\t%0, %4, %1\n\t" - "and\t%3, %4, %2\n\t" - "xorcc\t%1, %2, %%g0\n\t" - "bne,a\t1f\n\t" - " wr %0, %4, %%psr\n" - "1:\tnop; nop" - : "=r" (retval), "=r" (tmp1), "=r" (tmp2) - : "r" (__new_psr), "i" (PSR_PIL) - : "memory"); + __asm__ __volatile__(" + rd %%psr, %0 + and %0, %4, %1 + and %3, %4, %2 + xorcc %1, %2, %%g0 + be 1f + nop + wr %0, %4, %%psr + nop + nop + nop +1: +" : "=r" (retval), "=r" (tmp1), "=r" (tmp2) + : "r" (__new_psr), "i" (PSR_PIL) + : "memory", "cc"); + return retval; } @@ -181,22 +193,76 @@ extern __inline__ unsigned long read_psr_and_cli(void) { unsigned long retval; - __asm__ __volatile__("rd\t%%psr, %0\n\t" - "andcc\t%0, %1, %%g0\n\t" - "be,a\t1f\n\t" - " wr\t%0, %1, %%psr\n" - "1:\tnop; nop" - : "=r" (retval) - : "i" (PSR_PIL) - : "memory"); + __asm__ __volatile__(" + rd %%psr, %0 + or %0, %1, %%g1 + wr %%g1, 0x0, %%psr + nop; nop; nop +" : "=r" (retval) + : "i" (PSR_PIL) + : "g1", "memory"); + return retval; } -extern char spdeb_buf[256]; +#define __save_flags(flags) ((flags) = getipl()) +#define __save_and_cli(flags) ((flags) = read_psr_and_cli()) +#define __restore_flags(flags) setipl((flags)) + +#ifdef __SMP__ + +/* Visit arch/sparc/lib/irqlock.S for all the fun details... */ +#define cli() __asm__ __volatile__("mov %%o7, %%g4\n\t" \ + "call ___global_cli\n\t" \ + " rd %%tbr, %%g7" : : \ + : "g1", "g2", "g3", "g4", "g5", "g7", \ + "memory", "cc") + +#define sti() \ +do { register unsigned long bits asm("g7"); \ + bits = 0; \ + __asm__ __volatile__("mov %%o7, %%g4\n\t" \ + "call ___global_sti\n\t" \ + " rd %%tbr, %%g2" \ + : /* no outputs */ \ + : "r" (bits) \ + : "g1", "g2", "g3", "g4", "g5", \ + "memory", "cc"); \ +} while(0) + +extern unsigned char global_irq_holder; + +#define save_flags(x) \ +do { int cpuid; \ + __asm__ __volatile__("rd %%tbr, %0; srl %0, 12, %0; and %0, 3, %0" \ + : "=r" (cpuid)); \ + ((x) = ((global_irq_holder == (unsigned char) cpuid) ? 1 : \ + ((getipl() & PSR_PIL) ? 2 : 0))); \ +} while(0) + +#define restore_flags(flags) \ +do { register unsigned long bits asm("g7"); \ + bits = flags; \ + __asm__ __volatile__("mov %%o7, %%g4\n\t" \ + "call ___global_restore_flags\n\t" \ + " andcc %%g7, 0x1, %%g0" \ + : "=&r" (bits) \ + : "0" (bits) \ + : "g1", "g2", "g3", "g4", "g5", \ + "memory", "cc"); \ +} while(0) + +#define save_and_cli(flags) do { save_flags(flags); cli(); } while(0) + +#else + +#define cli() __cli() +#define sti() __sti() +#define save_flags(x) __save_flags(x) +#define restore_flags(x) __restore_flags(x) +#define save_and_cli(x) __save_and_cli(x) -#define save_flags(flags) ((flags) = getipl()) -#define save_and_cli(flags) ((flags) = read_psr_and_cli()) -#define restore_flags(flags) setipl((flags)) +#endif /* XXX Change this if we ever use a PSO mode kernel. */ #define mb() __asm__ __volatile__ ("" : : : "memory") @@ -205,24 +271,21 @@ extern char spdeb_buf[256]; extern __inline__ unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) { + register unsigned long *ptr asm("g1"); + register unsigned long ret asm("g2"); + + ptr = (unsigned long *) m; + ret = val; + __asm__ __volatile__(" - rd %%psr, %%g3 - andcc %%g3, %3, %%g0 - be,a 1f - wr %%g3, %3, %%psr -1: ld [%1], %%g2 - andcc %%g3, %3, %%g0 - st %2, [%1] - be,a 1f - wr %%g3, 0x0, %%psr -1: nop - mov %%g2, %0 - " - : "=&r" (val) - : "r" (m), "0" (val), "i" (PSR_PIL) - : "g2", "g3"); - - return val; + mov %%o7, %%g4 + call ___xchg32 + add %%o7, 8, %%o7 +" : "=&r" (ret) + : "0" (ret), "r" (ptr) + : "g3", "g4", "g7", "memory", "cc"); + + return ret; } #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) @@ -240,6 +303,10 @@ static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr, return x; } +extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); + +#endif /* __KERNEL__ */ + #endif /* __ASSEMBLY__ */ #endif /* !(__SPARC_SYSTEM_H) */ diff --git a/include/asm-sparc/termbits.h b/include/asm-sparc/termbits.h index 9a078c619..7a6958340 100644 --- a/include/asm-sparc/termbits.h +++ b/include/asm-sparc/termbits.h @@ -115,43 +115,40 @@ struct termios { #define WRAP 0x00020000 /* SUNOS specific */ /* c_cflag bit meaning */ -#define CBAUD 0x0000000f -#define B0 0x00000000 /* hang up */ -#define B50 0x00000001 -#define B75 0x00000002 -#define B110 0x00000003 -#define B134 0x00000004 -#define B150 0x00000005 -#define B200 0x00000006 -#define B300 0x00000007 -#define B600 0x00000008 -#define B1200 0x00000009 -#define B1800 0x0000000a -#define B2400 0x0000000b -#define B4800 0x0000000c -#define B9600 0x0000000d -#define B19200 0x0000000e -#define B38400 0x0000000f -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0x00000030 -#define CS5 0x00000000 -#define CS6 0x00000010 -#define CS7 0x00000020 -#define CS8 0x00000030 -#define CSTOPB 0x00000040 -#define CREAD 0x00000080 -#define PARENB 0x00000100 -#define PARODD 0x00000200 -#define HUPCL 0x00000400 -#define CLOCAL 0x00000800 -/* We'll never see these speeds with the Zilogs' but for completeness... */ -#define CBAUDEX 0x00010000 -#define B57600 0x00010001 -#define B115200 0x00010002 -#define B230400 0x00010003 -#define B460800 0x00010004 -#define CIBAUD 0x000f0000 /* input baud rate (not used) */ +#define CBAUD 0x0000100f +#define B0 0x00000000 /* hang up */ +#define B50 0x00000001 +#define B75 0x00000002 +#define B110 0x00000003 +#define B134 0x00000004 +#define B150 0x00000005 +#define B200 0x00000006 +#define B300 0x00000007 +#define B600 0x00000008 +#define B1200 0x00000009 +#define B1800 0x0000000a +#define B2400 0x0000000b +#define B4800 0x0000000c +#define B9600 0x0000000d +#define B19200 0x0000000e +#define B38400 0x0000000f +#define EXTA B19200 +#define EXTB B38400 +#define CSIZE 0x00000030 +#define CS5 0x00000000 +#define CS6 0x00000010 +#define CS7 0x00000020 +#define CS8 0x00000030 +#define CSTOPB 0x00000040 +#define CREAD 0x00000080 +#define PARENB 0x00000100 +#define PARODD 0x00000200 +#define HUPCL 0x00000400 +#define CLOCAL 0x00000800 +#define CBAUDEX 0x00001000 +#define B76800 0x00001001 +#define CIBAUD 0x100f0000 /* input baud rate (not used) */ +#define CMSPAR 0x40000000 /* mark or space (stick) parity */ #define CRTSCTS 0x80000000 /* flow control */ /* c_lflag bits */ diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h index e2991ecf7..2ad2868ce 100644 --- a/include/asm-sparc/termios.h +++ b/include/asm-sparc/termios.h @@ -1,4 +1,4 @@ -/* $Id: termios.h,v 1.20 1996/10/31 00:59:54 davem Exp $ */ +/* $Id: termios.h,v 1.25 1997/03/04 19:36:18 davem Exp $ */ #ifndef _SPARC_TERMIOS_H #define _SPARC_TERMIOS_H @@ -59,6 +59,8 @@ struct winsize { #define N_SLIP 1 #define N_MOUSE 2 #define N_PPP 3 +#define N_STRIP 4 +#define N_AX25 5 #ifdef __KERNEL__ @@ -74,8 +76,6 @@ struct winsize { #define _VTIME 5 -#include <linux/string.h> - /* intr=^C quit=^\ erase=del kill=^U eof=^D eol=\0 eol2=\0 sxtc=\0 start=^Q stop=^S susp=^Z dsusp=^Y @@ -87,81 +87,76 @@ struct winsize { /* * Translate a "termio" structure into a "termios". Ugh. */ -extern __inline__ void trans_from_termio(struct termio * termio, - struct termios * termios) -{ -#define SET_LOW_BITS(x,y) ((x) = (0xffff0000 & (x)) | (y)) - SET_LOW_BITS(termios->c_iflag, termio->c_iflag); - SET_LOW_BITS(termios->c_oflag, termio->c_oflag); - SET_LOW_BITS(termios->c_cflag, termio->c_cflag); - SET_LOW_BITS(termios->c_lflag, termio->c_lflag); -#undef SET_LOW_BITS - memcpy (termios->c_cc, termio->c_cc, NCC); -} +#define user_termio_to_kernel_termios(termios, termio) \ +({ \ + unsigned short tmp; \ + get_user(tmp, &(termio)->c_iflag); \ + (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ + get_user(tmp, &(termio)->c_oflag); \ + (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ + get_user(tmp, &(termio)->c_cflag); \ + (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ + get_user(tmp, &(termio)->c_lflag); \ + (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ + copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ + 0; \ +}) /* * Translate a "termios" structure into a "termio". Ugh. * * Note the "fun" _VMIN overloading. */ -extern __inline__ void trans_to_termio(struct termios * termios, - struct termio * termio) -{ - termio->c_iflag = termios->c_iflag; - termio->c_oflag = termios->c_oflag; - termio->c_cflag = termios->c_cflag; - termio->c_lflag = termios->c_lflag; - termio->c_line = termios->c_line; - memcpy(termio->c_cc, termios->c_cc, NCC); - if (!(termios->c_lflag & ICANON)) { - termio->c_cc[_VMIN] = termios->c_cc[VMIN]; - termio->c_cc[_VTIME] = termios->c_cc[VTIME]; - } -} - -/* Note that in this case DEST is a user buffer and thus the checking - * and this ugly macro to avoid header file problems. - */ -#define termios_to_userland(d, s) \ -do { \ - struct termios *dest = (d); \ - struct termios *source = (s); \ - put_user(source->c_iflag, &dest->c_iflag); \ - put_user(source->c_oflag, &dest->c_oflag); \ - put_user(source->c_cflag, &dest->c_cflag); \ - put_user(source->c_lflag, &dest->c_lflag); \ - put_user(source->c_line, &dest->c_line); \ - copy_to_user(dest->c_cc, source->c_cc, NCCS); \ - if (!(source->c_lflag & ICANON)){ \ - put_user(source->c_cc[VMIN], &dest->c_cc[_VMIN]); \ - put_user(source->c_cc[VTIME], &dest->c_cc[_VTIME]); \ +#define kernel_termios_to_user_termio(termio, termios) \ +({ \ + put_user((termios)->c_iflag, &(termio)->c_iflag); \ + put_user((termios)->c_oflag, &(termio)->c_oflag); \ + put_user((termios)->c_cflag, &(termio)->c_cflag); \ + put_user((termios)->c_lflag, &(termio)->c_lflag); \ + put_user((termios)->c_line, &(termio)->c_line); \ + copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ + if (!((termios)->c_lflag & ICANON)) { \ + put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \ + put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \ + } \ + 0; \ +}) + +#define user_termios_to_kernel_termios(k, u) \ +({ \ + get_user((k)->c_iflag, &(u)->c_iflag); \ + get_user((k)->c_oflag, &(u)->c_oflag); \ + get_user((k)->c_cflag, &(u)->c_cflag); \ + get_user((k)->c_lflag, &(u)->c_lflag); \ + get_user((k)->c_line, &(u)->c_line); \ + copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ + if((k)->c_lflag & ICANON) { \ + get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ + get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ } else { \ - put_user(source->c_cc[VEOF], &dest->c_cc[VEOF]); \ - put_user(source->c_cc[VEOL], &dest->c_cc[VEOL]); \ + get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ + get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ } \ -} while(0) - -/* termios to termios handling SunOS overloading of eof,eol/vmin,vtime - * In this case we are only working with kernel buffers so direct - * accesses are ok. - */ -extern __inline__ void termios_from_userland(struct termios * source, - struct termios * dest) -{ - dest->c_iflag = source->c_iflag; - dest->c_oflag = source->c_oflag; - dest->c_cflag = source->c_cflag; - dest->c_lflag = source->c_lflag; - dest->c_line = source->c_line; - memcpy(dest->c_cc, source->c_cc, NCCS); - if (dest->c_lflag & ICANON){ - dest->c_cc [VEOF] = source->c_cc [VEOF]; - dest->c_cc [VEOL] = source->c_cc [VEOL]; - } else { - dest->c_cc[VMIN] = source->c_cc[_VMIN]; - dest->c_cc[VTIME] = source->c_cc[_VTIME]; - } -} + 0; \ +}) + +#define kernel_termios_to_user_termios(u, k) \ +({ \ + put_user((k)->c_iflag, &(u)->c_iflag); \ + put_user((k)->c_oflag, &(u)->c_oflag); \ + put_user((k)->c_cflag, &(u)->c_cflag); \ + put_user((k)->c_lflag, &(u)->c_lflag); \ + put_user((k)->c_line, &(u)->c_line); \ + copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ + if(!((k)->c_lflag & ICANON)) { \ + put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ + put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ + } else { \ + put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ + put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ + } \ + 0; \ +}) #endif /* __KERNEL__ */ diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h index 53eb75cae..4ffc23657 100644 --- a/include/asm-sparc/uaccess.h +++ b/include/asm-sparc/uaccess.h @@ -1,15 +1,17 @@ -/* $Id: uaccess.h,v 1.2 1996/10/31 00:59:56 davem Exp $ */ +/* $Id: uaccess.h,v 1.13 1997/04/11 00:42:22 davem Exp $ + * uaccess.h: User space memore access functions. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ #ifndef _ASM_UACCESS_H #define _ASM_UACCESS_H -/* - * User space memory access functions - */ - #ifdef __KERNEL__ #include <linux/sched.h> #include <linux/string.h> #include <asm/vac-ops.h> +#include <asm/a.out.h> #endif #ifndef __ASSEMBLY__ @@ -20,7 +22,7 @@ * "For historical reasons, these macros are grossly misnamed." -Linus */ #define KERNEL_DS 0 -#define USER_DS 1 +#define USER_DS -1 #define VERIFY_READ 0 #define VERIFY_WRITE 1 @@ -29,9 +31,14 @@ #define get_ds() (KERNEL_DS) #define set_fs(val) ((current->tss.current_ds) = (val)) -#define __user_ok(addr,size) (((size) <= page_offset)&&((addr) <= page_offset-(size))) +/* We have there a nice not-mapped page at page_offset - PAGE_SIZE, so that this test + * can be fairly lightweight. + * No one can read/write anything from userland in the kernel space by setting + * large size and address near to page_offset - a fault will break his intentions. + */ +#define __user_ok(addr,size) ((addr) < stack_top) #define __kernel_ok (get_fs() == KERNEL_DS) -#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size))) +#define __access_ok(addr,size) (__user_ok((addr) & get_fs(),(size))) #define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size)) extern inline int verify_area(int type, const void * addr, unsigned long size) @@ -39,6 +46,38 @@ extern inline int verify_area(int type, const void * addr, unsigned long size) return access_ok(type,addr,size)?0:-EFAULT; } +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + * + * There is a special way how to put a range of potentially faulting + * insns (like twenty ldd/std's with now intervening other instructions) + * You specify address of first in insn and 0 in fixup and in the next + * exception_table_entry you specify last potentially faulting insn + 1 + * and in fixup the routine which should handle the fault. + * That fixup code will get + * (faulting_insn_address - first_insn_in_the_range_address)/4 + * in %g2 (ie. index of the faulting instruction in the range). + */ + +struct exception_table_entry +{ + unsigned long insn, fixup; +}; + +/* Returns 0 if exception not found and fixup otherwise. */ +extern unsigned long search_exception_table(unsigned long, unsigned long *); + +extern void __ret_efault(void); + /* Uh, these should become the main single-value transfer routines.. * They automatically use the right size if we just have the right * pointer type.. @@ -52,200 +91,285 @@ extern inline int verify_area(int type, const void * addr, unsigned long size) unsigned long __pu_addr = (unsigned long)(ptr); \ __put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) +#define put_user_ret(x,ptr,retval) ({ \ +unsigned long __pu_addr = (unsigned long)(ptr); \ +__put_user_check_ret((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr)),retval); }) + #define get_user(x,ptr) ({ \ unsigned long __gu_addr = (unsigned long)(ptr); \ __get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) +#define get_user_ret(x,ptr,retval) ({ \ +unsigned long __gu_addr = (unsigned long)(ptr); \ +__get_user_check_ret((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr)),retval); }) + /* * The "__xxx" versions do not do address space checking, useful when * doing multiple accesses to the same area (the user has to do the * checks by hand with "access_ok()") */ #define __put_user(x,ptr) __put_user_nocheck((x),(ptr),sizeof(*(ptr))) +#define __put_user_ret(x,ptr,retval) __put_user_nocheck_ret((x),(ptr),sizeof(*(ptr)),retval) #define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr))) +#define __get_user_ret(x,ptr,retval) __get_user_nocheck_ret((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr)),retval) struct __large_struct { unsigned long buf[100]; }; #define __m(x) ((struct __large_struct *)(x)) #define __put_user_check(x,addr,size) ({ \ -register int __pu_ret asm("g1"); \ -__pu_ret = -EFAULT; \ +register int __pu_ret; \ if (__access_ok(addr,size)) { \ switch (size) { \ -case 1: __put_user_8(x,addr,__pu_ret); break; \ -case 2: __put_user_16(x,addr,__pu_ret); break; \ -case 4: __put_user_32(x,addr,__pu_ret); break; \ +case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ +case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ +case 4: __put_user_asm(x,,addr,__pu_ret); break; \ default: __pu_ret = __put_user_bad(); break; \ -} } __pu_ret; }) +} } else { __pu_ret = -EFAULT; } __pu_ret; }) + +#define __put_user_check_ret(x,addr,size,retval) ({ \ +register int __foo __asm__ ("l1"); \ +if (__access_ok(addr,size)) { \ +switch (size) { \ +case 1: __put_user_asm_ret(x,b,addr,retval,__foo); break; \ +case 2: __put_user_asm_ret(x,h,addr,retval,__foo); break; \ +case 4: __put_user_asm_ret(x,,addr,retval,__foo); break; \ +default: if (__put_user_bad()) return retval; break; \ +} } else return retval; }) #define __put_user_nocheck(x,addr,size) ({ \ -register int __pu_ret asm("g1"); \ -__pu_ret = -EFAULT; \ +register int __pu_ret; \ switch (size) { \ -case 1: __put_user_8(x,addr,__pu_ret); break; \ -case 2: __put_user_16(x,addr,__pu_ret); break; \ -case 4: __put_user_32(x,addr,__pu_ret); break; \ +case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ +case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ +case 4: __put_user_asm(x,,addr,__pu_ret); break; \ default: __pu_ret = __put_user_bad(); break; \ } __pu_ret; }) -#define __put_user_8(x,addr,ret) \ -__asm__ __volatile( \ - "/* Put user 8, inline. */\n\t" \ - "ld [%%g6 + %3], %%g2\n\t" \ - "set 1f, %0\n\t" \ - "add %%g2, 1, %%g3\n\t" \ - "st %0, [%%g6 + %4]\n\t" \ - "st %%g3, [%%g6 + %3]\n\t" \ - "stb %1, [%2]\n\t" \ - "mov 0, %0\n\t" \ - "st %%g2, [%%g6 + %3]\n" \ -"1:\n" : "=&r" (ret) : "r" (x), "r" (__m(addr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.count)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.expc)) \ - : "g2", "g3") - -#define __put_user_16(x,addr,ret) \ -__asm__ __volatile( \ - "/* Put user 16, inline. */\n\t" \ - "ld [%%g6 + %3], %%g2\n\t" \ - "set 1f, %0\n\t" \ - "add %%g2, 1, %%g3\n\t" \ - "st %0, [%%g6 + %4]\n\t" \ - "st %%g3, [%%g6 + %3]\n\t" \ - "sth %1, [%2]\n\t" \ - "mov 0, %0\n\t" \ - "st %%g2, [%%g6 + %3]\n" \ -"1:\n" : "=&r" (ret) : "r" (x), "r" (__m(addr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.count)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.expc)) \ - : "g2", "g3") - -#define __put_user_32(x,addr,ret) \ -__asm__ __volatile( \ - "/* Put user 32, inline. */\n\t" \ - "ld [%%g6 + %3], %%g2\n\t" \ - "set 1f, %0\n\t" \ - "add %%g2, 1, %%g3\n\t" \ - "st %0, [%%g6 + %4]\n\t" \ - "st %%g3, [%%g6 + %3]\n\t" \ - "st %1, [%2]\n\t" \ - "mov 0, %0\n\t" \ - "st %%g2, [%%g6 + %3]\n" \ -"1:\n" : "=&r" (ret) : "r" (x), "r" (__m(addr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.count)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.expc)) \ - : "g2", "g3") +#define __put_user_nocheck_ret(x,addr,size,retval) ({ \ +register int __foo __asm__ ("l1"); \ +switch (size) { \ +case 1: __put_user_asm_ret(x,b,addr,retval,__foo); break; \ +case 2: __put_user_asm_ret(x,h,addr,retval,__foo); break; \ +case 4: __put_user_asm_ret(x,,addr,retval,__foo); break; \ +default: if (__put_user_bad()) return retval; break; \ +} }) + +#define __put_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Put user asm, inline. */\n" \ +"1:\t" "st"#size " %1, %2\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "b 2b\n\t" \ + " mov %3, %0\n\t" \ + ".previous\n\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\t" \ + ".previous\n\n\t" \ + : "=&r" (ret) : "r" (x), "m" (*__m(addr)), \ + "i" (-EFAULT)) + +#define __put_user_asm_ret(x,size,addr,ret,foo) \ +if (__builtin_constant_p(ret) && ret == -EFAULT) \ +__asm__ __volatile__( \ + "/* Put user asm ret, inline. */\n" \ +"1:\t" "st"#size " %1, %2\n\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, __ret_efault\n\n\t" \ + ".previous\n\n\t" \ + : "=r" (foo) : "r" (x), "m" (*__m(addr))); \ +else \ +__asm__ __volatile( \ + "/* Put user asm ret, inline. */\n" \ +"1:\t" "st"#size " %1, %2\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "ret\n\t" \ + " restore %%g0, %3, %%o0\n\t" \ + ".previous\n\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\n\t" \ + : "=r" (foo) : "r" (x), "m" (*__m(addr)), "i" (ret)) extern int __put_user_bad(void); #define __get_user_check(x,addr,size,type) ({ \ -register int __gu_ret asm("g1"); \ -register unsigned long __gu_val = 0; \ -__gu_ret = -EFAULT; \ +register int __gu_ret; \ +register unsigned long __gu_val; \ +if (__access_ok(addr,size)) { \ +switch (size) { \ +case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ +case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ +case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ +default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ +} } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; }) + +#define __get_user_check_ret(x,addr,size,type,retval) ({ \ +register unsigned long __gu_val __asm__ ("l1"); \ if (__access_ok(addr,size)) { \ switch (size) { \ -case 1: __get_user_8(__gu_val,addr,__gu_ret); break; \ -case 2: __get_user_16(__gu_val,addr,__gu_ret); break; \ -case 4: __get_user_32(__gu_val,addr,__gu_ret); break; \ -default: __gu_ret = __get_user_bad(); break; \ -} } x = (type) __gu_val; __gu_ret; }) +case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ +case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ +case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ +default: if (__get_user_bad()) return retval; \ +} x = (type) __gu_val; } else return retval; }) #define __get_user_nocheck(x,addr,size,type) ({ \ -register int __gu_ret asm("g1"); \ -register unsigned long __gu_val = 0; \ -__gu_ret = -EFAULT; \ +register int __gu_ret; \ +register unsigned long __gu_val; \ switch (size) { \ -case 1: __get_user_8(__gu_val,addr,__gu_ret); break; \ -case 2: __get_user_16(__gu_val,addr,__gu_ret); break; \ -case 4: __get_user_32(__gu_val,addr,__gu_ret); break; \ -default: __gu_ret = __get_user_bad(); break; \ +case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ +case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ +case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ +default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ } x = (type) __gu_val; __gu_ret; }) -#define __get_user_8(x,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user 8, inline. */\n\t" \ - "ld [%%g6 + %3], %%g2\n\t" \ - "set 1f, %0\n\t" \ - "add %%g2, 1, %%g3\n\t" \ - "st %0, [%%g6 + %4]\n\t" \ - "st %%g3, [%%g6 + %3]\n\t" \ - "ldub [%2], %1\n\t" \ - "mov 0, %0\n\t" \ - "st %%g2, [%%g6 + %3]\n" \ -"1:\n" : "=&r" (ret), "=&r" (x) : "r" (__m(addr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.count)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.expc)) \ - : "g2", "g3") - -#define __get_user_16(x,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user 16, inline. */\n\t" \ - "ld [%%g6 + %3], %%g2\n\t" \ - "set 1f, %0\n\t" \ - "add %%g2, 1, %%g3\n\t" \ - "st %0, [%%g6 + %4]\n\t" \ - "st %%g3, [%%g6 + %3]\n\t" \ - "lduh [%2], %1\n\t" \ - "mov 0, %0\n\t" \ - "st %%g2, [%%g6 + %3]\n" \ -"1:\n" : "=&r" (ret), "=&r" (x) : "r" (__m(addr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.count)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.expc)) \ - : "g2", "g3") - -#define __get_user_32(x,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user 32, inline. */\n\t" \ - "ld [%%g6 + %3], %%g2\n\t" \ - "set 1f, %0\n\t" \ - "add %%g2, 1, %%g3\n\t" \ - "st %0, [%%g6 + %4]\n\t" \ - "st %%g3, [%%g6 + %3]\n\t" \ - "ld [%2], %1\n\t" \ - "mov 0, %0\n\t" \ - "st %%g2, [%%g6 + %3]\n" \ -"1:\n" : "=&r" (ret), "=&r" (x) : "r" (__m(addr)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.count)), \ - "i" ((const unsigned long)(&((struct task_struct *)0)->tss.ex.expc)) \ - : "g2", "g3") +#define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \ +register unsigned long __gu_val __asm__ ("l1"); \ +switch (size) { \ +case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ +case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ +case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ +default: if (__get_user_bad()) return retval; \ +} x = (type) __gu_val; }) + +#define __get_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Get user asm, inline. */\n" \ +"1:\t" "ld"#size " %2, %1\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "clr %1\n\t" \ + "b 2b\n\t" \ + " mov %3, %0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)), \ + "i" (-EFAULT)) + +#define __get_user_asm_ret(x,size,addr,retval) \ +if (__builtin_constant_p(retval) && retval == -EFAULT) \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size " %1, %0\n\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b,__ret_efault\n\n\t" \ + ".previous\n\t" \ + : "=&r" (x) : "m" (*__m(addr))); \ +else \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size " %1, %0\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "ret\n\t" \ + " restore %%g0, %2, %%o0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=&r" (x) : "m" (*__m(addr)), "i" (retval)) extern int __get_user_bad(void); -extern int __copy_to_user(unsigned long to, unsigned long from, int size); -extern int __copy_from_user(unsigned long to, unsigned long from, int size); +extern __kernel_size_t __copy_user(void *to, void *from, __kernel_size_t size); #define copy_to_user(to,from,n) ({ \ -unsigned long __copy_to = (unsigned long) (to); \ -unsigned long __copy_size = (unsigned long) (n); \ -unsigned long __copy_res; \ -if(__copy_size && __access_ok(__copy_to, __copy_size)) { \ -__copy_res = __copy_to_user(__copy_to, (unsigned long) (from), __copy_size); \ -if(__copy_res) __copy_res = __copy_size - __copy_res; \ +void *__copy_to = (void *) (to); \ +__kernel_size_t __copy_size = (__kernel_size_t) (n); \ +__kernel_size_t __copy_res; \ +if(__copy_size && __access_ok((unsigned long)__copy_to, __copy_size)) { \ +__copy_res = __copy_user(__copy_to, (void *) (from), __copy_size); \ } else __copy_res = __copy_size; \ __copy_res; }) +#define copy_to_user_ret(to,from,n,retval) ({ \ +if (copy_to_user(to,from,n)) \ + return retval; \ +}) + +#define __copy_to_user(to,from,n) \ + __copy_user((void *)(to), \ + (void *)(from), n) + +#define __copy_to_user_ret(to,from,n,retval) ({ \ +if (__copy_to_user(to,from,n)) \ + return retval; \ +}) + #define copy_from_user(to,from,n) ({ \ -unsigned long __copy_from = (unsigned long) (from); \ -unsigned long __copy_size = (unsigned long) (n); \ -unsigned long __copy_res; \ -if(__copy_size && __access_ok(__copy_from, __copy_size)) { \ -__copy_res = __copy_from_user((unsigned long) (to), __copy_from, __copy_size); \ -if(__copy_res) __copy_res = __copy_size - __copy_res; \ +void *__copy_from = (void *) (from); \ +__kernel_size_t __copy_size = (__kernel_size_t) (n); \ +__kernel_size_t __copy_res; \ +if(__copy_size && __access_ok((unsigned long)__copy_from, __copy_size)) { \ +__copy_res = __copy_user((void *) (to), __copy_from, __copy_size); \ } else __copy_res = __copy_size; \ __copy_res; }) -extern int __clear_user(unsigned long addr, int size); +#define copy_from_user_ret(to,from,n,retval) ({ \ +if (copy_from_user(to,from,n)) \ + return retval; \ +}) + +#define __copy_from_user(to,from,n) \ + __copy_user((void *)(to), \ + (void *)(from), n) + +#define __copy_from_user_ret(to,from,n,retval) ({ \ +if (__copy_from_user(to,from,n)) \ + return retval; \ +}) + +extern __inline__ __kernel_size_t __clear_user(void *addr, __kernel_size_t size) +{ + __kernel_size_t ret; + __asm__ __volatile__ (" + .section __ex_table,#alloc + .align 4 + .word 1f,3 + .previous +1: + mov %2, %%o1 + call __bzero + mov %1, %%o0 + mov %%o0, %0 + " : "=r" (ret) : "r" (addr), "r" (size) : + "o0", "o1", "o2", "o3", "o4", "o5", "o7", + "g1", "g2", "g3", "g4", "g5", "g7", "cc"); + return ret; +} #define clear_user(addr,n) ({ \ -unsigned long __clear_addr = (unsigned long) (addr); \ -int __clear_size = (int) (n); \ -int __clear_res; \ -if(__clear_size && __access_ok(__clear_addr, __clear_size)) { \ +void *__clear_addr = (void *) (addr); \ +__kernel_size_t __clear_size = (__kernel_size_t) (n); \ +__kernel_size_t __clear_res; \ +if(__clear_size && __access_ok((unsigned long)__clear_addr, __clear_size)) { \ __clear_res = __clear_user(__clear_addr, __clear_size); \ -if(__clear_res) __clear_res = __clear_size - __clear_res; \ } else __clear_res = __clear_size; \ __clear_res; }) +#define clear_user_ret(addr,size,retval) ({ \ +if (clear_user(addr,size)) \ + return retval; \ +}) + extern int __strncpy_from_user(unsigned long dest, unsigned long src, int count); #define strncpy_from_user(dest,src,count) ({ \ @@ -256,6 +380,16 @@ if(__access_ok(__sfu_src, __sfu_count)) { \ __sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \ } __sfu_res; }) +extern int __strlen_user(const char *); + +extern __inline__ int strlen_user(const char *str) +{ + if(!access_ok(VERIFY_READ, str, 0)) + return 0; + else + return __strlen_user(str); +} + #endif /* __ASSEMBLY__ */ #endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h index 468097d6f..cf33b2a51 100644 --- a/include/asm-sparc/unistd.h +++ b/include/asm-sparc/unistd.h @@ -1,4 +1,4 @@ -/* $Id: unistd.h,v 1.24 1996/08/29 09:49:06 davem Exp $ */ +/* $Id: unistd.h,v 1.32 1997/04/11 00:42:23 davem Exp $ */ #ifndef _SPARC_UNISTD_H #define _SPARC_UNISTD_H @@ -113,35 +113,35 @@ #define __NR_setdopt 94 /* SunOS Specific */ #define __NR_fsync 95 /* Common */ #define __NR_setpriority 96 /* Common */ -#define __NR_socket 97 /* SunOS Specific */ -#define __NR_connect 98 /* SunOS Specific */ -#define __NR_accept 99 /* SunOS Specific */ +#define __NR_socket 97 /* Common */ +#define __NR_connect 98 /* Common */ +#define __NR_accept 99 /* Common */ #define __NR_getpriority 100 /* Common */ -#define __NR_send 101 /* SunOS Specific */ -#define __NR_recv 102 /* SunOS Specific */ +#define __NR_send 101 /* Common */ +#define __NR_recv 102 /* Common */ /* #define __NR_ni_syscall 103 ENOSYS under SunOS */ -#define __NR_bind 104 /* SunOS Specific */ -#define __NR_setsockopt 105 /* SunOS Specific */ -#define __NR_listen 106 /* SunOS Specific */ +#define __NR_bind 104 /* Common */ +#define __NR_setsockopt 105 /* Common */ +#define __NR_listen 106 /* Common */ /* #define __NR_ni_syscall 107 ENOSYS under SunOS */ #define __NR_sigvec 108 /* SunOS Specific */ #define __NR_sigblock 109 /* SunOS Specific */ #define __NR_sigsetmask 110 /* SunOS Specific */ #define __NR_sigpause 111 /* SunOS Specific */ #define __NR_sigstack 112 /* SunOS Specific */ -#define __NR_recvmsg 113 /* SunOS Specific */ -#define __NR_sendmsg 114 /* SunOS Specific */ +#define __NR_recvmsg 113 /* Common */ +#define __NR_sendmsg 114 /* Common */ #define __NR_vtrace 115 /* SunOS Specific */ #define __NR_gettimeofday 116 /* Common */ #define __NR_getrusage 117 /* Common */ -#define __NR_getsockopt 118 /* SunOS Specific */ +#define __NR_getsockopt 118 /* Common */ /* #define __NR_ni_syscall 119 ENOSYS under SunOS */ #define __NR_readv 120 /* Common */ #define __NR_writev 121 /* Common */ #define __NR_settimeofday 122 /* Common */ #define __NR_fchown 123 /* Common */ #define __NR_fchmod 124 /* Common */ -#define __NR_recvfrom 125 /* SunOS Specific */ +#define __NR_recvfrom 125 /* Common */ #define __NR_setreuid 126 /* Common */ #define __NR_setregid 127 /* Common */ #define __NR_rename 128 /* Common */ @@ -149,15 +149,15 @@ #define __NR_ftruncate 130 /* Common */ #define __NR_flock 131 /* Common */ /* #define __NR_ni_syscall 132 ENOSYS under SunOS */ -#define __NR_sendto 133 /* SunOS Specific */ -#define __NR_shutdown 134 /* SunOS Specific */ -#define __NR_socketpair 135 /* SunOS Specific */ +#define __NR_sendto 133 /* Common */ +#define __NR_shutdown 134 /* Common */ +#define __NR_socketpair 135 /* Common */ #define __NR_mkdir 136 /* Common */ #define __NR_rmdir 137 /* Common */ #define __NR_utimes 138 /* SunOS Specific */ /* #define __NR_ni_syscall 139 ENOSYS under SunOS */ #define __NR_adjtime 140 /* SunOS Specific */ -#define __NR_getpeername 141 /* SunOS Specific */ +#define __NR_getpeername 141 /* Common */ #define __NR_gethostid 142 /* SunOS Specific */ /* #define __NR_ni_syscall 143 ENOSYS under SunOS */ #define __NR_getrlimit 144 /* Common */ @@ -166,10 +166,10 @@ /* #define __NR_ni_syscall 147 ENOSYS under SunOS */ /* #define __NR_ni_syscall 148 ENOSYS under SunOS */ /* #define __NR_ni_syscall 149 ENOSYS under SunOS */ -#define __NR_getsockname 150 /* SunOS Specific */ +#define __NR_getsockname 150 /* Common */ #define __NR_getmsg 151 /* SunOS Specific */ #define __NR_putmsg 152 /* SunOS Specific */ -#define __NR_poll 153 /* SunOS Specific */ +#define __NR_poll 153 /* Common */ /* #define __NR_ni_syscall 154 ENOSYS under SunOS */ #define __NR_nfssvc 155 /* SunOS Specific */ #define __NR_getdirentries 156 /* SunOS Specific */ @@ -200,7 +200,7 @@ #define __NR_aiowait 181 /* SunOS Specific */ #define __NR_aiocancel 182 /* SunOS Specific */ #define __NR_sigpending 183 /* Common */ -/* #define __NR_ni_syscall 184 ENOSYS under SunOS */ +#define __NR_query_module 184 /* Linux Specific */ #define __NR_setpgid 185 /* Common */ #define __NR_pathconf 186 /* SunOS Specific */ #define __NR_fpathconf 187 /* SunOS Specific */ @@ -270,7 +270,8 @@ #define __NR__sysctl 251 #define __NR_getsid 252 #define __NR_fdatasync 253 -#define __NR_nfsctl 254 +#define __NR_nfsservctl 254 +#define __NR_aplib 255 #define _syscall0(type,name) \ type name(void) \ @@ -284,8 +285,8 @@ __asm__ __volatile__ ("or %%g0, %0, %%g1\n\t" \ "1:\n\t" \ : "=r" (__res)\ : "0" (__NR_##name) \ - : "g1", "o0"); \ -if (__res >= 0) \ + : "g1", "o0", "cc"); \ +if (__res < -255 || __res >= 0) \ return (type) __res; \ errno = -__res; \ return -1; \ @@ -304,8 +305,8 @@ __asm__ __volatile__ ("or %%g0, %0, %%g1\n\t" \ "1:\n\t" \ : "=r" (__res), "=r" ((long)(arg1)) \ : "0" (__NR_##name),"1" ((long)(arg1)) \ - : "g1", "o0"); \ -if (__res >= 0) \ + : "g1", "o0", "cc"); \ +if (__res < -255 || __res >= 0) \ return (type) __res; \ errno = -__res; \ return -1; \ @@ -325,8 +326,8 @@ __asm__ __volatile__ ("or %%g0, %0, %%g1\n\t" \ "1:\n\t" \ : "=r" (__res), "=r" ((long)(arg1)), "=r" ((long)(arg2)) \ : "0" (__NR_##name),"1" ((long)(arg1)),"2" ((long)(arg2)) \ - : "g1", "o0", "o1"); \ -if (__res >= 0) \ + : "g1", "o0", "o1", "cc"); \ +if (__res < -255 || __res >= 0) \ return (type) __res; \ errno = -__res; \ return -1; \ @@ -349,8 +350,8 @@ __asm__ __volatile__ ("or %%g0, %0, %%g1\n\t" \ "=r" ((long)(arg3)) \ : "0" (__NR_##name), "1" ((long)(arg1)), "2" ((long)(arg2)), \ "3" ((long)(arg3)) \ - : "g1", "o0", "o1", "o2"); \ -if (__res>=0) \ + : "g1", "o0", "o1", "o2", "cc"); \ +if (__res < -255 || __res>=0) \ return (type) __res; \ errno = -__res; \ return -1; \ @@ -374,8 +375,8 @@ __asm__ __volatile__ ("or %%g0, %0, %%g1\n\t" \ "=r" ((long)(arg3)), "=r" ((long)(arg4)) \ : "0" (__NR_##name),"1" ((long)(arg1)),"2" ((long)(arg2)), \ "3" ((long)(arg3)),"4" ((long)(arg4)) \ - : "g1", "o0", "o1", "o2", "o3"); \ -if (__res>=0) \ + : "g1", "o0", "o1", "o2", "o3", "cc"); \ +if (__res < -255 || __res>=0) \ return (type) __res; \ errno = -__res; \ return -1; \ @@ -402,8 +403,8 @@ __asm__ __volatile__ ("or %%g0, %1, %%o0\n\t" \ : "r" ((long)(arg1)),"r" ((long)(arg2)), \ "r" ((long)(arg3)),"r" ((long)(arg4)),"r" ((long)(arg5)), \ "i" (__NR_##name) \ - : "g1", "o0", "o1", "o2", "o3", "o4"); \ -if (__res>=0) \ + : "g1", "o0", "o1", "o2", "o3", "o4", "cc"); \ +if (__res < -255 || __res>=0) \ return (type) __res; \ errno = -__res; \ return -1; \ @@ -473,20 +474,10 @@ static __inline__ pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned lo "=r" (retval) : "i" (__NR_clone), "r" (flags | CLONE_VM), "i" (__NR_exit), "r" (fn), "r" (arg) : - "g1", "g2", "g3", "o0", "o1", "memory"); + "g1", "g2", "g3", "o0", "o1", "memory", "cc"); return retval; } #endif /* __KERNEL_SYSCALLS__ */ -/* sysconf options, for SunOS compatibility */ -#define _SC_ARG_MAX 1 -#define _SC_CHILD_MAX 2 -#define _SC_CLK_TCK 3 -#define _SC_NGROUPS_MAX 4 -#define _SC_OPEN_MAX 5 -#define _SC_JOB_CONTROL 6 -#define _SC_SAVED_IDS 7 -#define _SC_VERSION 8 - #endif /* _SPARC_UNISTD_H */ diff --git a/include/asm-sparc/vfc_ioctls.h b/include/asm-sparc/vfc_ioctls.h new file mode 100644 index 000000000..05205f80c --- /dev/null +++ b/include/asm-sparc/vfc_ioctls.h @@ -0,0 +1,58 @@ +/* Copyright (c) 1996 by Manish Vachharajani */ + +#ifndef _LINUX_VFC_IOCTLS_H_ +#define _LINUX_VFC_IOCTLS_H_ + + /* IOCTLs */ +#define VFC_IOCTL(a) (('j' << 8) | a) +#define VFCGCTRL (VFC_IOCTL (0)) /* get vfc attributes */ +#define VFCSCTRL (VFC_IOCTL (1)) /* set vfc attributes */ +#define VFCGVID (VFC_IOCTL (2)) /* get video decoder attributes */ +#define VFCSVID (VFC_IOCTL (3)) /* set video decoder attributes */ +#define VFCHUE (VFC_IOCTL (4)) /* set hue */ +#define VFCPORTCHG (VFC_IOCTL (5)) /* change port */ +#define VFCRDINFO (VFC_IOCTL (6)) /* read info */ + + /* Options for setting the vfc attributes and status */ +#define MEMPRST 0x1 /* reset FIFO ptr. */ +#define CAPTRCMD 0x2 /* start capture and wait */ +#define DIAGMODE 0x3 /* diag mode */ +#define NORMMODE 0x4 /* normal mode */ +#define CAPTRSTR 0x5 /* start capture */ +#define CAPTRWAIT 0x6 /* wait for capture to finish */ + + + /* Options for the decoder */ +#define STD_NTSC 0x1 /* NTSC mode */ +#define STD_PAL 0x2 /* PAL mode */ +#define COLOR_ON 0x3 /* force color ON */ +#define MONO 0x4 /* force color OFF */ + + /* Values returned by ioctl 2 */ + +#define NO_LOCK 1 +#define NTSC_COLOR 2 +#define NTSC_NOCOLOR 3 +#define PAL_COLOR 4 +#define PAL_NOCOLOR 5 + +/* Not too sure what this does yet */ + /* Options for setting Field number */ +#define ODD_FIELD 0x1 +#define EVEN_FIELD 0x0 +#define ACTIVE_ONLY 0x2 +#define NON_ACTIVE 0x0 + +/* Debug options */ +#define VFC_I2C_SEND 0 +#define VFC_I2C_RECV 1 + +struct vfc_debug_inout +{ + unsigned long addr; + unsigned long ret; + unsigned long len; + unsigned char *buffer; +}; + +#endif /* _LINUX_VFC_IOCTLS_H_ */ diff --git a/include/asm-sparc/viking.h b/include/asm-sparc/viking.h index dc4adc393..0312a2d55 100644 --- a/include/asm-sparc/viking.h +++ b/include/asm-sparc/viking.h @@ -1,4 +1,4 @@ -/* $Id: viking.h,v 1.16 1996/08/29 09:49:10 davem Exp $ +/* $Id: viking.h,v 1.19 1997/04/20 14:11:48 ecd Exp $ * viking.h: Defines specific to the GNU/Viking MBUS module. * This is SRMMU stuff. * @@ -9,6 +9,7 @@ #include <asm/asi.h> #include <asm/mxcc.h> +#include <asm/pgtsrmmu.h> /* Bits in the SRMMU control register for GNU/Viking modules. * @@ -107,6 +108,8 @@ #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */ #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */ +#ifndef __ASSEMBLY__ + extern __inline__ void viking_flush_icache(void) { __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : : @@ -190,9 +193,50 @@ extern __inline__ void viking_mxcc_turn_off_parity(unsigned long *mregp, "1:\n\t" : : "r" (mreg), "r" (mxcc_creg), "r" (MXCC_CREG), "i" (ASI_M_MMUREGS), - "i" (ASI_M_MXCC) : "g2"); + "i" (ASI_M_MXCC) : "g2", "cc"); *mregp = mreg; *mxcc_cregp = mxcc_creg; } +extern __inline__ unsigned long viking_hwprobe(unsigned long vaddr) +{ + unsigned long val; + + vaddr &= PAGE_MASK; + /* Probe all MMU entries. */ + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (val) : + "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); + if (!val) + return 0; + + /* Probe region. */ + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (val) : + "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE)); + if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { + vaddr &= ~SRMMU_PGDIR_MASK; + vaddr >>= PAGE_SHIFT; + return val | (vaddr << 8); + } + + /* Probe segment. */ + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (val) : + "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE)); + if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { + vaddr &= ~SRMMU_PMD_MASK; + vaddr >>= PAGE_SHIFT; + return val | (vaddr << 8); + } + + /* Probe page. */ + __asm__ __volatile__("lda [%1] %2, %0\n\t" : + "=r" (val) : + "r" (vaddr), "i" (ASI_M_FLUSH_PROBE)); + return val; +} + +#endif /* !__ASSEMBLY__ */ + #endif /* !(_SPARC_VIKING_H) */ diff --git a/include/asm-sparc/winmacro.h b/include/asm-sparc/winmacro.h index e0cc5d3c9..8ba88ec61 100644 --- a/include/asm-sparc/winmacro.h +++ b/include/asm-sparc/winmacro.h @@ -1,4 +1,4 @@ -/* $Id: winmacro.h,v 1.17 1996/09/19 20:27:44 davem Exp $ +/* $Id: winmacro.h,v 1.18 1997/03/04 16:27:27 jj Exp $ * winmacro.h: Window loading-unloading macros. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -98,18 +98,18 @@ STORE_PT_INS(base_reg) #define SAVE_BOLIXED_USER_STACK(cur_reg, scratch) \ - ld [%cur_reg + THREAD_W_SAVED], %scratch; \ + ld [%cur_reg + AOFF_task_tss + AOFF_thread_w_saved], %scratch; \ sll %scratch, 2, %scratch; \ add %scratch, %cur_reg, %scratch; \ - st %sp, [%scratch + THREAD_STACK_PTRS]; \ + st %sp, [%scratch + AOFF_task_tss + AOFF_thread_rwbuf_stkptrs]; \ sub %scratch, %cur_reg, %scratch; \ sll %scratch, 4, %scratch; \ add %scratch, %cur_reg, %scratch; \ - STORE_WINDOW(scratch + THREAD_REG_WINDOW); \ + STORE_WINDOW(scratch + AOFF_task_tss + AOFF_thread_reg_window); \ sub %scratch, %cur_reg, %scratch; \ srl %scratch, 6, %scratch; \ add %scratch, 1, %scratch; \ - st %scratch, [%cur_reg + THREAD_W_SAVED]; + st %scratch, [%cur_reg + AOFF_task_tss + AOFF_thread_w_saved]; #ifdef __SMP__ #define LOAD_CURRENT(dest_reg, idreg) \ |