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* Code reformatting and spelling fixes.Ralf Baechle2001-05-252-4/+4
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* Fix vmalloc for mips64.Ralf Baechle2001-05-231-7/+44
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* Merge with Linux 2.4.3.Ralf Baechle2001-04-053-124/+8
| | | | | | | Note that mingetty does no longer work with serial console, you have to switch to another getty like getty_ps. This commit also includes a fix for a setitimer bug which did prevent getty_ps from working on older kernels.
* Get Indy64 booting a little farther. This also fixes a generic 64-bitnessKeith M Wesolowski2001-03-261-16/+16
| | | | bug in some of the r4k cache routines.
* Lots of cleanup from Keith with additional tweaks by me. More toRalf Baechle2001-03-183-2/+173
| | | | come. Stay frightened :-)
* Fix typo which made r4k_copy_page_d16 corrupt data when copying.Ralf Baechle2001-03-181-2/+2
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* Compile fixes for CONFIG_SGI_NEWPORT_GFX.Ralf Baechle2001-03-112-3/+7
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* Merge with Linux 2.4.2.Ralf Baechle2001-03-092-7/+14
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* Kill debug code.Ralf Baechle2001-01-151-1/+0
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* Merge with Linux 2.4.0-prerelease. Big Makefile rewrite, test yourRalf Baechle2001-01-101-2/+0
| | | | Makefiles.
* Merge with Linux 2.4.0-test12.Ralf Baechle2001-01-101-23/+8
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* Use the same definition of flush_icache_page() that is used in stockKanoj Sarcar2000-11-291-1/+1
| | | | Linux 2.4.
* Merge with 2.4.0-test11.Ralf Baechle2000-11-281-0/+16
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* Merge with Linux 2.4.0-test10.Ralf Baechle2000-11-231-1/+1
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* Make user_mode mode an inline; it's the same on all 64-bit CPUs.Ralf Baechle2000-10-023-12/+2
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* Kill BARRIER macro; it's not needed on R10000.Ralf Baechle2000-08-091-25/+0
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* Merge with Linux 2.4.0-test6-pre8.Ralf Baechle2000-08-082-13/+14
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* Port the recent cache changes forward and backward between mips andRalf Baechle2000-08-081-211/+70
| | | | mips64.
* Shave of 50% of lat_mmap. Our cache routines were plain stupid.Ralf Baechle2000-07-311-1/+1
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* Optimized cache flushing on r10k/o200s, assuming processor handlesKanoj Sarcar2000-07-271-103/+20
| | | | | VCEs in hardwire, and system guarantees io coherency. Only need to do cache flushes for icache coherency.
* Optimize andes_clear_page() and andes_copy_page() with prefetchRalf Baechle2000-07-261-16/+23
| | | | | | | operations. While those routines are now 30% - 60% faster it turned out that their influence on realworld applications and benchmars is fairly low; I saw an improvment of ~ 3% for lmbench exec sh and even less for other benches.
* When a debugger faults in a page for a debugee, we do not need to updateKanoj Sarcar2000-07-252-0/+12
| | | | | | the mmu cache/tlbs, since the debugger will use a kernel address to access the page, and not the user address. This should fix the strace warning messages that Ralf and Ulf have seen. Fix should be backported into MIPS.
* Name change: the generic call flush_cache_all() does not do anythingKanoj Sarcar2000-07-244-20/+20
| | | | | anymore. All the flush_cache_all() calls in MIPS code is changed to call flush_cache_l1(), and ends up flushing the L1 i/d caches.
* Introduce a new cpu specific routine to flush the L2 cache. This helpsKanoj Sarcar2000-07-243-1/+33
| | | | | | the stability of DISCONTIGMEM kernels. The L2 flushing is needed during bootup. With this, the initialization hacks of scanning the node memories at boot up time is not needed any more.
* Merge with 2.4.0-test3-pre4.Ralf Baechle2000-07-081-2/+2
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* Truncate sign extension in oops.Ulf Carlsson2000-07-011-2/+3
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* Check in an unmistakable warning for now when tlb invalid faults happenKanoj Sarcar2000-06-301-0/+7
| | | | | on vmalloc range. When we hit it, it will be fairly easy to fix and test the fix works.
* Explain pgd/pmd allocation failure strategies. Create a global bad-pmd-table,Kanoj Sarcar2000-06-271-45/+17
| | | | | | | distinct from invalid-pmd-table for use during pmd allocation failure (so as to differentiate pgd_bad and pgd_none). The bad page table must have invalid pte entries to catch any user references to the range of virtual addresses it covers.
* Delete pmd_present/pgd_present. Explain pgd/pmd/pte allocation andKanoj Sarcar2000-06-261-4/+3
| | | | | initialization. Make sure to allocate only one page for the page table (prevent memory leaks), since only one page is freed up.
* Merge with 2.4.0-test1.Ralf Baechle2000-06-161-11/+16
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* The tlbwired register is now set up in the head.S code.Kanoj Sarcar2000-06-062-2/+0
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* Further cleanups to the ld script files not to do more than needed.Kanoj Sarcar2000-06-051-2/+2
| | | | Replace uses of _ftext with the more generic _stext.
* Merge with Linux 2.3.99-pre7 and various other bits.Ralf Baechle2000-05-121-6/+11
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* More low level debugging stuff that can be turned on with DEBUG_MIPS64.Kanoj Sarcar2000-05-031-0/+13
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* SMP debugging enhancements.Kanoj Sarcar2000-05-012-1/+1
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* Print out cpu number in debug statements for SMP debugging.Kanoj Sarcar2000-04-281-4/+4
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* Merge with 2.3.99-pre6.Ralf Baechle2000-04-281-1/+1
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* Make the sysentry debugging code a little more versatile.Kanoj Sarcar2000-04-251-0/+7
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* Fix the init_new_context code not to zap the percpu tlbpid array whenKanoj Sarcar2000-04-242-4/+4
| | | | | | doing a clone-vm operation. Also, the intercpu tlbflush code now properly does its job by flushing the tlbpid only on the current processor, and not on all.
* scall_64.S: Move to kernel mode and enable intrs properly.Kanoj Sarcar2000-04-232-15/+15
| | | | | | | | r4k_tlb_glue.S: The fast handlers must work with intrs disabled, since we can not risk changes in entryhi/lo/tlbregisters. do_page_fault() _must_ work with intrs enabled, to prevent deadlocks in the intercpu tlbflush code. andes.c/r4xx0.c: Make tlb register accesses conservatively safe from intrs coming in and changing register contents.
* First cut at intercpu tlb flushing.Kanoj Sarcar2000-04-222-2/+2
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* Per cpu tlbpid (asid) management for SMP. The asid cache is now perKanoj Sarcar2000-04-223-68/+85
| | | | cpu, and stays in cpu_data[].
* save_and_cli and restore_flags ... not save_and_cli and __restore_flags ...Kanoj Sarcar2000-03-311-1/+1
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* Put some kernel debugging output under DEBUG_MIPS64. Kernel folks, pleaseKanoj Sarcar2000-03-201-2/+2
| | | | turn this on when you are debugging.
* The fast tlb handlers [x]tlb_refill_debug blindly look at pgd/pmd/ptes.Kanoj Sarcar2000-03-161-1/+2
| | | | | | | So, _all_ page tables in the system _must_ be 2 pages, including empty_bad_page_table. And, the invalid page table _must_ be initialized to all invalid entries, so that even if the fast handler picks something up from an unallocated pmd/ptetable, the processor takes a mm fault.
* Misc mm type bug fixes.Kanoj Sarcar2000-03-161-3/+4
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* Simplify the get_new_mmu_context() interface that allocated TLB pids.Kanoj Sarcar2000-03-142-6/+6
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* TLB pid allocation fix. Still not sure about the complete algorithm.Kanoj Sarcar2000-03-132-5/+3
| | | | Turn on TLB pid checks.
* Merge with 2.3.47. Guys, this is buggy as shit. You've been warned.Ralf Baechle2000-02-245-281/+112
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* Merge with 2.3.43. I did ignore all modifications to the qlogicisp.cRalf Baechle2000-02-231-7/+2
| | | | driver due to the Origin A64 hacks.
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