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* Pick a name for the idle process on each cpu - easier for debugging.Kanoj Sarcar2000-04-241-0/+1
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* Fix the init_new_context code not to zap the percpu tlbpid array whenKanoj Sarcar2000-04-242-4/+4
| | | | | | doing a clone-vm operation. Also, the intercpu tlbflush code now properly does its job by flushing the tlbpid only on the current processor, and not on all.
* scall_64.S: Move to kernel mode and enable intrs properly.Kanoj Sarcar2000-04-235-23/+36
| | | | | | | | r4k_tlb_glue.S: The fast handlers must work with intrs disabled, since we can not risk changes in entryhi/lo/tlbregisters. do_page_fault() _must_ work with intrs enabled, to prevent deadlocks in the intercpu tlbflush code. andes.c/r4xx0.c: Make tlb register accesses conservatively safe from intrs coming in and changing register contents.
* Change all instances of __SMP__ to CONFIG_SMP and includeRalf Baechle2000-04-232-3/+5
| | | | <linux/config.h> where necessary.
* First cut at intercpu tlb flushing.Kanoj Sarcar2000-04-224-7/+66
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* Per cpu tlbpid (asid) management for SMP. The asid cache is now perKanoj Sarcar2000-04-225-69/+91
| | | | cpu, and stays in cpu_data[].
* Delete unused junk "current_pgd".Kanoj Sarcar2000-04-212-2/+0
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* Don't overwrite the cache exception handler.Ralf Baechle2000-04-211-3/+1
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* Merge with Linux 2.3.99-pre5.Ralf Baechle2000-04-194-462/+546
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* Merge with Linux 2.3.99-pre4.Ralf Baechle2000-04-19147-2302/+3886
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* Pause fix for mips64.Ralf Baechle2000-04-193-2/+9
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* Pause(2) fix for 2.3.Ralf Baechle2000-04-184-189/+36
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* Obligatory UP compile fixes after SMP code changes ...Kanoj Sarcar2000-04-171-4/+2
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* Intercpu interrupt changes: add in dedicated intr levels for rescheduleKanoj Sarcar2000-04-172-24/+106
| | | | and call function interrupts (tlbflush for later).
* More intercpu interrupt work: we now have a low level inter cpu intrKanoj Sarcar2000-04-172-26/+42
| | | | handler.
* Revert to the older irq - pendlevel mapping.Kanoj Sarcar2000-04-121-2/+2
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* Move the irq to swlevel mappings a little bit to make space for theKanoj Sarcar2000-04-121-3/+4
| | | | inter cpu intrs at the same level as IRIX.
* The state of the two interrupt mask registers for the 128 intr levelsKanoj Sarcar2000-04-121-4/+15
| | | | for each cpu in the hub is now stored in the per processor data area.
* Allow the low level ISR to be able to handle intrs on cpu A or B.Kanoj Sarcar2000-04-121-4/+6
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* Moved set_cp0_status(SRB_DEV0 | SRB_DEV1, SRB_DEV0 | SRB_DEV1)Leo Dagum2000-04-101-1/+1
| | | | outside is_slave conditional. All cpu's need to call this now.
* Fixed bridge_init() so it sets registers for theLeo Dagum2000-04-101-2/+5
| | | | | | | | calling process's bridge (not necessarily node 0), and removed call to set_cp0_status() (now in per_cpu_init()). b_wid_int_upper still points to node 0, I don't want to change this till I have a multinode system and kernel to test on.
* sgi_prom_console_init calling convention from the ancient daysFlorian Lohoff2000-04-081-2/+1
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* New code to install and enable interrupt handlers for intercpu intrs.Kanoj Sarcar2000-04-082-8/+70
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* For slave nodes, make sure not to touch the lower part of their localKanoj Sarcar2000-04-081-6/+1
| | | | | memory, which is used by the prom. Gets really hard to do things like launch processors on slave nodes otherwise.
* Fix this UP/MP microoptimization business with cpu_data[] andKanoj Sarcar2000-04-082-3/+3
| | | | | boot_cpu_data once and for all. Generic mips64/IP27 code wants to do cpu_data[cpuid] everywhere ...
* Take notes before I forget ...Kanoj Sarcar2000-04-081-0/+3
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* Make it so that clock interrupts can be received on all cpus on the node.Kanoj Sarcar2000-04-081-2/+3
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* Fix semaphores in modules.Ralf Baechle2000-04-072-0/+16
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* Minor cleanup - do not invent new synonyms. Use ST0_IE instead of new nameKanoj Sarcar2000-04-071-4/+2
| | | | SR_IE.
* Port paccess.h from mips64. mips32 paccess.h differs from the original one inGleb O. Raiko2000-04-071-1/+43
| | | | | | | | the following: o works in case a constant address is passed to get_dbe/put_dbe o uses faster binary search :-) o the kernel are linked successfully even if get_dbe/put_dbe aren't used
* Last tweak before enabling intrs on slave cpus ... set their intr maskKanoj Sarcar2000-04-071-0/+2
| | | | right.
* Clear the TS bit from the master's status register (don't know whyKanoj Sarcar2000-04-074-6/+22
| | | | | | | | PROM is getting the bit set before entry into kernel). Fix per cpu frequency reporting. Fix bug so that we do not clear information about mips4 availability. Have the slaves flush their cache/tlb and set status based on what the master processor did.
* Initial attempt at seperating out per-cpu and per-hub code that needs toKanoj Sarcar2000-04-074-26/+94
| | | | be executed in a multicpu, multinode environment.
* Beginning of a cleanupFlorian Lohoff2000-04-061-115/+134
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* Make the initial status register setting code for slaves similar to theKanoj Sarcar2000-04-061-16/+19
| | | | master.
* call rs_init to at least enable the serial ttys - Still no outputFlorian Lohoff2000-04-061-0/+1
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* Fix early crash on SGI_IP22 due to not reserving kernelFlorian Lohoff2000-04-061-1/+22
| | | | pages in the boomem setup
* First fixes for SGI_PROM_CONSOLE - first commit - be nice :)Florian Lohoff2000-04-061-5/+4
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* Create idle threads for the slave processors and put them in theirKanoj Sarcar2000-04-062-12/+78
| | | | resched loops.
* Fix UP compiles.Kanoj Sarcar2000-04-051-0/+7
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* Oops, I had overwritten head.S completely with another C file. Fixing.Kanoj Sarcar2000-04-051-127/+92
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* Try to launch all the slave cpus in the system. Currently, I _think_Kanoj Sarcar2000-04-053-82/+146
| | | | | | only the slave on the same node as the master gets launched, investigating why the slaves on the other nodes are not ... Slave processors use a static stack surrently while booting up.
* o 32-bit ioctls (some at least)Ulf Carlsson2000-04-055-23/+793
| | | | | o some syscalls o check that the syscall is withing range
* Record nasid/cnode/cpuslice in the per cpu data structure during boot up.Kanoj Sarcar2000-04-042-13/+32
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* Added a few klconfig functions from IRIX. This triggered some house cleaning,Kanoj Sarcar2000-04-044-68/+122
| | | | | ie, moving type declarations into sn/types.h and moving klconfig code from ip27-init.c into ip27-klconfig.c.
* Rudimentary code to launch slave processors by the master processor.Kanoj Sarcar2000-04-041-1/+123
| | | | Completely untested, never executed ...
* Rudimentary sendintr() routine to send intrs to other cpus. This needs toKanoj Sarcar2000-04-011-0/+37
| | | | | | pull in defines from intr.h/intr_public.h. Also, need to store percpu information regarding cpu slice # for cpu, hardware nasid and compact node id.
* save_and_cli and restore_flags ... not save_and_cli and __restore_flags ...Kanoj Sarcar2000-03-311-1/+1
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* More placeholder stuff. Added pci_fixup_isp2x00() routine to set upLeo Dagum2000-03-301-2/+68
| | | | | | the device's config space registers and turn on byte swizzling in the bridge for this device (needs to be done before the driver sees it). Again, hardwired to slot 5. Will generalize later.
* Added pcibr_setup() routine to initialize some bridge registers differentLeo Dagum2000-03-301-1/+24
| | | | from what the prom gives us.
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