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* no real solution for the offset.h-chicken-egg-problem, but this does all I wnatHarald Koerfgen2000-05-241-0/+0
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* HousekeepingHarald Koerfgen2000-05-232-99/+1
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* Update defconfig files.Ralf Baechle2000-05-231-0/+47
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* Implement a more dynamic method of associating IRQs with PCI devices.Kanoj Sarcar2000-05-191-2/+1
| | | | | Instead of encoding bus/slot numbers in the IRQ, have seperate arrays to store that information.
* irq.h: With the current scheme of encoding the bus number into theKanoj Sarcar2000-05-182-5/+5
| | | | | | | pci irq, we need to bump up NR_IRQs to handle more than 4 PCI busses. io.h: Port numbers are really "unsigned long", since they need to contain the nasids too. ip27-pci.c: Encode the nasid into the port number for isp1020 for pio.
* Some cleaning of the support for machines with HZ other than aRalf Baechle2000-05-161-0/+2
| | | | | architecture specific standard value. Not entirely at the point where we can send this to Linus.
* Fix SOCK_ constant definitions for all architectures. Patch sent toRalf Baechle2000-05-161-15/+14
| | | | | Linus. Our diffs relativ to Linus' latest and greatest is getting fairly small now.
* Remove references to dead flag ASYNC_IOC3.Ralf Baechle2000-05-161-1/+1
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* Move the intercpu intr irq numbers to the lowest possible. AssignKanoj Sarcar2000-05-151-8/+5
| | | | | | | all PCI irqs above that. Fix pci_map_irq to not just have 2 bits for slot number, else irq numbers will not be unique. Include the bus number as part of the irq for now, so that scsi controllers on various PCI busses get unique irq numbers.
* Fix copyright message. Linus flamed me on these messages so pleaseRalf Baechle2000-05-153-48/+31
| | | | | make sure for the future that the (C) notice is ok. ``unpublished proprietary information of Silicon Graphics'' isn't good ...
* Merge with Linux 2.3.99-pre7 and various other bits.Ralf Baechle2000-05-124-1/+6
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* Rudimentary nmi support to be able to do simple debugging on SMPKanoj Sarcar2000-05-121-0/+131
| | | | machines.
* SMP FPU management: similar to what sparc does, no lazy fpu contextKanoj Sarcar2000-05-112-0/+25
| | | | | | switching in SMP mode, use PF_USEDFPU to determine whether a program used the fpu in the last time quantum and so needs the fpu context to be saved during context switch.
* Some infrastructure for supporting multiple pci busses on origin200/2000.Leo Dagum2000-05-113-2/+14
| | | | | | | nasid and widget id get incoded in pci_dev->irq. pcibr_setup() now does some rudimentary probing for bridge widgets hanging off its xbow. We're not seeing interrupts from remote devices at the cpu, so mscsi card's are turned off for now.
* Fix the way we use the watchlo/watchhi registers to get to the taskKanoj Sarcar2000-05-041-1/+3
| | | | | struct of the currently executing thread: handle sign extension on the watchlo register.
* Fix NUMA compile problem.Kanoj Sarcar2000-05-031-2/+0
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* Merge with 2.3.99-pre6.Ralf Baechle2000-04-281-2/+2
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* sigprocmask needs to be 32-bitized.Kanoj Sarcar2000-04-271-0/+1
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* We use the ST0_CU0 bit to determine whether we are coming intoKanoj Sarcar2000-04-252-17/+14
| | | | | | | | | | kernel mode for the first time from user mode (on intr/exception/ syscall etc). If so, we need to set the sp to point to the kernel stack. On UP kernels, the kernel stack pointer is stored in the global variable "kernelsp". For SMP kernel, the physical address of the current task structure is stuffed into the watchlo/watchhi registers, so on first entry into the kernel, we need to munge this value properly to setup the sp register.
* Fix the init_new_context code not to zap the percpu tlbpid array whenKanoj Sarcar2000-04-241-19/+12
| | | | | | doing a clone-vm operation. Also, the intercpu tlbflush code now properly does its job by flushing the tlbpid only on the current processor, and not on all.
* Change all instances of __SMP__ to CONFIG_SMP and includeRalf Baechle2000-04-237-11/+21
| | | | <linux/config.h> where necessary.
* First cut at intercpu tlb flushing.Kanoj Sarcar2000-04-222-1/+15
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* Per cpu tlbpid (asid) management for SMP. The asid cache is now perKanoj Sarcar2000-04-222-11/+46
| | | | cpu, and stays in cpu_data[].
* Delete unused junk "current_pgd".Kanoj Sarcar2000-04-211-3/+0
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* Removing until needed ...Pat Gefre2000-04-216-259/+3
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* Removing until needed .....Pat Gefre2000-04-2128-17020/+0
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* Merge with Linux 2.3.99-pre4.Ralf Baechle2000-04-191-2/+1
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* Pause fix for mips64.Ralf Baechle2000-04-191-2/+2
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* Intercpu interrupt changes: add in dedicated intr levels for rescheduleKanoj Sarcar2000-04-171-2/+6
| | | | and call function interrupts (tlbflush for later).
* More intercpu interrupt work: we now have a low level inter cpu intrKanoj Sarcar2000-04-171-3/+3
| | | | handler.
* The state of the two interrupt mask registers for the 128 intr levelsKanoj Sarcar2000-04-121-0/+2
| | | | for each cpu in the hub is now stored in the per processor data area.
* Starting to merge in the SN1 (IP35) I/O changesPat Gefre2000-04-117-66/+495
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* Fixed endianness for inb/outb functions.Leo Dagum2000-04-101-18/+18
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* Include files for ip35/ip37 I/OPat Gefre2000-04-1024-0/+15963
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* *** empty log message ***Pat Gefre2000-04-104-0/+1057
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* New code to install and enable interrupt handlers for intercpu intrs.Kanoj Sarcar2000-04-081-0/+2
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* Fix this UP/MP microoptimization business with cpu_data[] andKanoj Sarcar2000-04-081-6/+4
| | | | | boot_cpu_data once and for all. Generic mips64/IP27 code wants to do cpu_data[cpuid] everywhere ...
* Clear the TS bit from the master's status register (don't know whyKanoj Sarcar2000-04-071-0/+1
| | | | | | | | PROM is getting the bit set before entry into kernel). Fix per cpu frequency reporting. Fix bug so that we do not clear information about mips4 availability. Have the slaves flush their cache/tlb and set status based on what the master processor did.
* Initial attempt at seperating out per-cpu and per-hub code that needs toKanoj Sarcar2000-04-072-0/+5
| | | | be executed in a multicpu, multinode environment.
* Minor cleanup to get rid of annoying compile time warning.Leo Dagum2000-04-071-6/+6
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* Added a few klconfig functions from IRIX. This triggered some house cleaning,Kanoj Sarcar2000-04-043-1/+16
| | | | | ie, moving type declarations into sn/types.h and moving klconfig code from ip27-init.c into ip27-klconfig.c.
* Rudimentary code to launch slave processors by the master processor.Kanoj Sarcar2000-04-042-0/+154
| | | | Completely untested, never executed ...
* Rudimentary sendintr() routine to send intrs to other cpus. This needs toKanoj Sarcar2000-04-014-3/+199
| | | | | | pull in defines from intr.h/intr_public.h. Also, need to store percpu information regarding cpu slice # for cpu, hardware nasid and compact node id.
* Fix the ext2 bitop routines to enable root disk bootups.Kanoj Sarcar2000-03-311-4/+4
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* spin_trylock acts on a word memory pointer, and can not use test_and_set_bitKanoj Sarcar2000-03-311-1/+18
| | | | | which works on a double-word memory pointer. Wrong results ensue otherwise due to in memory format of data (aka endianness).
* Put an instruction in the branch delay slot of the read_unlock()Kanoj Sarcar2000-03-311-0/+1
| | | | | block which is compiled .noreorder, to prevent the assembler from putting something destructive.
* Added QLOGICFC_SLOT5 definition to Origin 'hacks' section at bottom.Leo Dagum2000-03-301-0/+1
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* Set ST0_FR the right way.Ralf Baechle2000-03-281-6/+12
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* Merge with Linux 2.3.99-pre3.Ralf Baechle2000-03-271-3/+5
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* ip27-irq.c, system.h: implement SMP intr on/off primitives similar to i386.Kanoj Sarcar2000-03-261-6/+19
| | | | | process.c, smp.c: minor initialization code. SMP compiles still hang at the scsi probing stage, no improvements.
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