From f67e4ffc79905482c3b9b8c8dd65197bac7eb508 Mon Sep 17 00:00:00 2001
From: Harald Koerfgen <hkoerfg@web.de>
Date: Mon, 9 Aug 1999 19:43:13 +0000
Subject: My proposal for non-generic kernels:

o only code for the configured CPU is compiled
  and linked (saves ~100k for R3000 kernels!)
o removed a lot of indirect function calls
o removed Ralf's "cowboy patch"
o added sanity check for DECstations (print warning
  if the kernel is configured for the wrong CPU)
---
 arch/mips/dec/prom/init.c       |  20 +++++++
 arch/mips/kernel/Makefile       |  14 ++++-
 arch/mips/kernel/process.c      |   2 +-
 arch/mips/kernel/ptrace.c       |   2 +-
 arch/mips/kernel/r2300_fpu.S    |  10 ++--
 arch/mips/kernel/r2300_misc.S   |  16 +++---
 arch/mips/kernel/r2300_switch.S |  18 +++---
 arch/mips/kernel/r4k_fpu.S      |  10 ++--
 arch/mips/kernel/r4k_misc.S     |  14 ++---
 arch/mips/kernel/r4k_switch.S   |  18 +++---
 arch/mips/kernel/r6000_fpu.S    |  10 ++--
 arch/mips/kernel/signal.c       |   6 +-
 arch/mips/kernel/traps.c        | 118 ++++++++++------------------------------
 arch/mips/mm/Makefile           |  19 ++++++-
 arch/mips/mm/andes.c            |  36 +++---------
 arch/mips/mm/fault.c            |   4 +-
 arch/mips/mm/init.c             |  34 +-----------
 arch/mips/mm/loadmmu.c          |  44 +++++++--------
 arch/mips/mm/r2300.c            |  39 +++----------
 arch/mips/mm/r4xx0.c            |  41 ++++----------
 arch/mips/mm/r6000.c            |  41 ++++----------
 arch/mips/mm/tfp.c              |  34 +++---------
 include/asm-mips/mmu_context.h  |  90 ++++++++----------------------
 include/asm-mips/pgtable.h      |  16 +++---
 include/asm-mips/processor.h    |   3 +-
 include/asm-mips/ptrace.h       |   4 +-
 include/asm-mips/system.h       |   2 +-
 27 files changed, 234 insertions(+), 431 deletions(-)

diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index 2cb9da66c..b751e8515 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -7,6 +7,7 @@
  */
 #include <linux/init.h>
 #include <linux/config.h>
+#include <asm/bootinfo.h>
 #include "prom.h"
 
 /*
@@ -82,12 +83,31 @@ __initfunc(void which_prom(unsigned long magic, int *prom_vec))
 __initfunc(int prom_init(int argc, char **argv,
 	       unsigned long magic, int *prom_vec))
 {
+	extern void dec_machine_halt(void);
+
 	/* Determine which PROM's we have (and therefore which machine we're on!) */
 	which_prom(magic, prom_vec);
 
 	if (magic == REX_PROM_MAGIC)
 		rex_clear_cache();
 
+	/* Were we compiled with the right CPU option? */
+#if defined(CONFIG_CPU_R3000)
+	if ((mips_cputype == CPU_R4000SC) || (mips_cputype == CPU_R4400SC)) {
+		prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
+		prom_printf("Please recompile with \"CONFIG_CPU_R4x00 = y\"\n");
+		dec_machine_halt();
+	}
+#endif
+
+#if defined(CONFIG_CPU_R4x00)
+	if ((mips_cputype == CPU_R3000) || (mips_cputype == CPU_R3000A)) {
+		prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
+		prom_printf("Please recompile with \"CONFIG_CPU_R3000 = y\"\n");
+		dec_machine_halt();
+	}
+#endif
+
 	prom_meminit(magic);
 	prom_identify_arch(magic);
 	prom_init_cmdline(argc, argv, magic);
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 66306b16b..a1e6a6d29 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -14,10 +14,20 @@ EXTRA_ASFLAGS = -mips3 -mcpu=r4000
 O_TARGET := kernel.o
 O_OBJS	:= branch.o process.o signal.o entry.o traps.o ptrace.o vm86.o \
 	   ioport.o pci.o reset.o setup.o syscall.o sysmips.o ipc.o \
-	   r4k_switch.o r4k_misc.o r4k_fpu.o r2300_switch.o r2300_misc.o \
-	   r2300_fpu.o r6000_fpu.o scall_o32.o softfp.o unaligned.o
+	   scall_o32.o softfp.o unaligned.o
 OX_OBJS := mips_ksyms.o
 
+ifdef CONFIG_CPU_R3000
+O_OBJS	+= r2300_misc.o r2300_fpu.o r2300_switch.o
+else
+O_OBJS	+= r4k_misc.o r4k_switch.o 
+ifdef CONFIG_CPU_R6000
+O_OBJS	+= r6000_fpu.o
+else
+O_OBJS	+= r4k_fpu.o
+endif
+endif
+
 ifdef CONFIG_MIPS_FPE_MODULE
 M_OBJS += fpe.o
 endif
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 04e6dc191..a8c59ff78 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -75,7 +75,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
 {
 	struct pt_regs * childregs;
 	long childksp;
-	extern void (*save_fp)(struct sigcontext *);
+	extern void save_fp(void*);
 
 	childksp = (unsigned long)p + KERNEL_STACK_SIZE - 32;
 
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 77ea1a58c..9350a3be0 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -242,7 +242,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data)
 	struct task_struct *child;
 	unsigned int flags;
 	int res;
-	extern void (*save_fp)(struct sigcontext *);
+	extern void save_fp(void*);
 
 	lock_kernel();
 #if 0
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S
index 3b0336e6d..74671f58c 100644
--- a/arch/mips/kernel/r2300_fpu.S
+++ b/arch/mips/kernel/r2300_fpu.S
@@ -1,4 +1,4 @@
-/* $Id: r2300_fpu.S,v 1.4 1999/04/11 17:13:55 harald Exp $
+/* $Id: r2300_fpu.S,v 1.5 1999/05/01 22:40:36 ralf Exp $
  * r2300_fpu.S: Save/restore floating point context for signal handlers.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -28,7 +28,7 @@
 	.set	noreorder
 	.set	mips1
 	/* Save floating point context */
-LEAF(r2300_save_fp_context)
+LEAF(save_fp_context)
 
 	cfc1	t1,fcr31
 	EX(swc1	$f0,(SC_FPREGS+0)(a0))
@@ -69,7 +69,7 @@ LEAF(r2300_save_fp_context)
 	.set	nomacro
 	 EX(sw	t0,SC_FPC_EIR(a0))
 	.set	macro
-	END(r2300_save_fp_context)
+	END(save_fp_context)
 
 /*
  * Restore FPU state:
@@ -80,7 +80,7 @@ LEAF(r2300_save_fp_context)
  * frame on the current content of c0_status, not on the content of the
  * stack frame which might have been changed by the user.
  */
-LEAF(r2300_restore_fp_context)
+LEAF(restore_fp_context)
 	EX(lw t0,SC_FPC_CSR(a0))
 	EX(lwc1	$f0,(SC_FPREGS+0)(a0))
 	EX(lwc1	$f1,(SC_FPREGS+8)(a0))
@@ -116,4 +116,4 @@ LEAF(r2300_restore_fp_context)
 	EX(lwc1	$f31,(SC_FPREGS+248)(a0))
 	jr	ra
 	 ctc1	t0,fcr31
-	END(r2300_restore_fp_context)
+	END(restore_fp_context)
diff --git a/arch/mips/kernel/r2300_misc.S b/arch/mips/kernel/r2300_misc.S
index 31fed0b7d..23869af7d 100644
--- a/arch/mips/kernel/r2300_misc.S
+++ b/arch/mips/kernel/r2300_misc.S
@@ -1,5 +1,5 @@
-/* $Id: r2300_misc.S,v 1.2 1999/04/11 17:13:55 harald Exp $
- * r2300_misc.S: Misc. exception handling code for R3000/R2000.
+/* $Id: misc.S,v 1.3 1999/05/01 22:40:36 ralf Exp $
+ * misc.S: Misc. exception handling code for R3000/R2000.
  *
  * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
  *
@@ -120,7 +120,7 @@
 	.set	noreorder
 
 	.align	5
-NESTED(r2300_handle_tlbl, PT_SIZE, sp)
+NESTED(handle_tlbl, PT_SIZE, sp)
 	.set	noat
 
 #ifndef NOTLB_OPTIMIZE
@@ -141,9 +141,9 @@ nopage_tlbl:
 #endif
 
 	DO_FAULT(0)
-END(r2300_handle_tlbl)
+END(handle_tlbl)
 
-NESTED(r2300_handle_tlbs, PT_SIZE, sp)
+NESTED(handle_tlbs, PT_SIZE, sp)
 	.set	noat
 
 #ifndef NOTLB_OPTIMIZE
@@ -163,10 +163,10 @@ nopage_tlbs:
 #endif
 
 	DO_FAULT(1)
-END(r2300_handle_tlbs)
+END(handle_tlbs)
 
 	.align	5
-NESTED(r2300_handle_mod, PT_SIZE, sp)
+NESTED(handle_mod, PT_SIZE, sp)
 	.set	noat
 #ifndef NOTLB_OPTIMIZE
 	LOAD_PTE(k0, k1)
@@ -194,4 +194,4 @@ NESTED(r2300_handle_mod, PT_SIZE, sp)
 
 nowrite_mod:
 	DO_FAULT(1)
-END(r2300_handle_mod)
+END(handle_mod)
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index faac180d1..9341a31e0 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -1,4 +1,4 @@
-/* $Id: r2300_switch.S,v 1.5 1999/04/11 17:13:56 harald Exp $
+/* $Id: r2300_switch.S,v 1.6 1999/06/13 16:30:32 ralf Exp $
  *
  * r2300_switch.S: R2300 specific task switching code.
  *
@@ -34,7 +34,7 @@
  * task_struct *r4xx0_resume(task_struct *prev,
  *                           task_struct *next)
  */
-LEAF(r2300_resume)
+LEAF(resume)
 	.set	reorder
 	mfc0	t1, CP0_STATUS
 	.set	noreorder
@@ -64,7 +64,7 @@ LEAF(r2300_resume)
 	mtc0	a3, CP0_ENTRYHI
 	jr	ra
 	 move	v0, a0
-	END(r2300_resume)
+	END(resume)
 
 /*
  * Do lazy fpu context switch.  Saves FPU context to the process in a0
@@ -73,7 +73,7 @@ LEAF(r2300_resume)
 
 #define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
 
-LEAF(r2300_lazy_fpu_switch)
+LEAF(lazy_fpu_switch)
 	mfc0	t0, CP0_STATUS			# enable cp1
 	li	t3, 0x20000000
 	or	t0, t3
@@ -94,17 +94,17 @@ LEAF(r2300_lazy_fpu_switch)
 	.set	reorder
 	FPU_RESTORE($28, t0)		# clobbers t0
 	jr	ra
-	END(r2300_lazy_fpu_switch)
+	END(lazy_fpu_switch)
 
 /*
  * Save a thread's fp context.
  */
 	.set	noreorder
-LEAF(r2300_save_fp)
+LEAF(save_fp)
 	FPU_SAVE(a0, t1)			# clobbers t1
 	jr	ra
 	 swc1	$f0, (THREAD_FPU + 0x00)(a0)
-	END(r2300_save_fp)
+	END(save_fp)
 
 /*
  * Load the FPU with signalling NANS.  This bit pattern we're using has
@@ -116,7 +116,7 @@ LEAF(r2300_save_fp)
 
 #define FPU_DEFAULT  0x00000000
 
-LEAF(r2300_init_fpu)
+LEAF(init_fpu)
 	mfc0	t0, CP0_STATUS
 	li	t1, 0x20000000
 	or	t0, t1
@@ -160,4 +160,4 @@ LEAF(r2300_init_fpu)
 	mtc1	t0, $f30
 	jr	ra
 	 mtc1	t0, $f31
-	END(r2300_init_fpu)
+	END(init_fpu)
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index d07899bef..dbd2eba43 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -10,7 +10,7 @@
  * Multi-arch abstraction and asm macros for easier reading:
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  *
- * $Id: r4k_fpu.S,v 1.4 1998/04/05 11:23:52 ralf Exp $
+ * $Id: r4k_fpu.S,v 1.5 1999/05/01 22:40:36 ralf Exp $
  */
 #include <asm/asm.h>
 #include <asm/fpregdef.h>
@@ -27,7 +27,7 @@
 	.set	noreorder
 	.set	mips3
 	/* Save floating point context */
-LEAF(r4k_save_fp_context)
+LEAF(save_fp_context)
 	mfc0	t1,CP0_STATUS
 	 sll	t2,t1,5
 
@@ -76,7 +76,7 @@ LEAF(r4k_save_fp_context)
 	.set	nomacro
 	 EX(sw	t0,SC_FPC_EIR(a0))
 	.set	macro
-	END(r4k_save_fp_context)
+	END(save_fp_context)
 
 /*
  * Restore FPU state:
@@ -87,7 +87,7 @@ LEAF(r4k_save_fp_context)
  * frame on the current content of c0_status, not on the content of the
  * stack frame which might have been changed by the user.
  */
-LEAF(r4k_restore_fp_context)
+LEAF(restore_fp_context)
 	mfc0	t1, CP0_STATUS
 	sll	t0,t1,5
 	bgez	t0,1f
@@ -135,4 +135,4 @@ LEAF(r4k_restore_fp_context)
 	EX(ldc1	$f30,(SC_FPREGS+240)(a0))
 	jr	ra
 	 ctc1	t0,fcr31
-	END(r4k_restore_fp_context)
+	END(restore_fp_context)
diff --git a/arch/mips/kernel/r4k_misc.S b/arch/mips/kernel/r4k_misc.S
index 2e0223260..e4e2801a9 100644
--- a/arch/mips/kernel/r4k_misc.S
+++ b/arch/mips/kernel/r4k_misc.S
@@ -6,7 +6,7 @@
  * Multi-cpu abstraction and reworking:
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  *
- * $Id: r4k_misc.S,v 1.3 1997/09/07 04:51:07 ralf Exp $
+ * $Id: r4k_misc.S,v 1.4 1997/12/01 17:57:30 ralf Exp $
  */
 #include <asm/asm.h>
 #include <asm/current.h>
@@ -137,7 +137,7 @@
 	 * of the instruction cache else you get bogus results.
 	 */
 	.align	5
-	NESTED(r4k_handle_tlbl, PT_SIZE, sp)
+	NESTED(handle_tlbl, PT_SIZE, sp)
 	.set	noat
 	.set	nomacro
 invalid_tlbl:
@@ -159,10 +159,10 @@ invalid_tlbl:
 
 nopage_tlbl:
 	DO_FAULT(0)
-	END(r4k_handle_tlbl)
+	END(handle_tlbl)
 
 	.align	5
-	NESTED(r4k_handle_tlbs, PT_SIZE, sp)
+	NESTED(handle_tlbs, PT_SIZE, sp)
 	.set	noat
 #ifndef NOTLB_OPTIMIZE
 	LOAD_PTE(k0, k1)
@@ -181,10 +181,10 @@ nopage_tlbl:
 
 nopage_tlbs:
 	DO_FAULT(1)
-	END(r4k_handle_tlbs)
+	END(handle_tlbs)
 
 	.align	5
-	NESTED(r4k_handle_mod, PT_SIZE, sp)
+	NESTED(handle_mod, PT_SIZE, sp)
 	.set	noat
 #ifndef NOTLB_OPTIMIZE
 	LOAD_PTE(k0, k1)
@@ -213,4 +213,4 @@ nopage_tlbs:
 
 nowrite_mod:
 	DO_FAULT(1)
-	END(r4k_handle_mod)
+	END(handle_mod)
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 3ba84bb9a..842bc1c38 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -1,4 +1,4 @@
-/* $Id: r4k_switch.S,v 1.6 1999/05/01 22:40:37 ralf Exp $
+/* $Id: r4k_switch.S,v 1.7 1999/06/13 16:30:32 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -31,7 +31,7 @@
 	.set	noreorder
 	.set	mips3
 	.align	5
-	LEAF(r4xx0_resume)
+	LEAF(resume)
 	mfc0	t1, CP0_STATUS
 	sw	t1, THREAD_STATUS(a0)
 	CPU_SAVE_NONSCRATCH(a0)
@@ -59,7 +59,7 @@
 	mtc0	a3, CP0_ENTRYHI
 	jr	ra
 	 move	v0, a0
-	END(r4xx0_resume)
+	END(resume)
 
 /*
  * Do lazy fpu context switch.  Saves FPU context to the process in a0
@@ -68,7 +68,7 @@
 
 #define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
 
-LEAF(r4xx0_lazy_fpu_switch)
+LEAF(lazy_fpu_switch)
 	mfc0	t0, CP0_STATUS			# enable cp1
 	li	t3, 0x20000000
 	or	t0, t3
@@ -95,13 +95,13 @@ LEAF(r4xx0_lazy_fpu_switch)
 	.set	reorder
 	FPU_RESTORE_16EVEN($28, t0)		# clobbers t0
 	jr	ra
-	END(r4xx0_lazy_fpu_switch)
+	END(lazy_fpu_switch)
 
 /*
  * Save a thread's fp context.
  */
 	.set	noreorder
-LEAF(r4xx0_save_fp)
+LEAF(save_fp)
 	mfc0	t0, CP0_STATUS
 	sll	t1, t0, 5
 	bgez	t1, 1f				# 16 register mode?
@@ -111,7 +111,7 @@ LEAF(r4xx0_save_fp)
 	FPU_SAVE_16EVEN(a0, t1)			# clobbers t1
 	jr	ra
 	 sdc1	$f0, (THREAD_FPU + 0x00)(a0)
-	END(r4xx0_save_fp)
+	END(save_fp)
 
 /*
  * Load the FPU with signalling NANS.  This bit pattern we're using has
@@ -123,7 +123,7 @@ LEAF(r4xx0_save_fp)
 
 #define FPU_DEFAULT  0x00000000
 
-LEAF(r4xx0_init_fpu)
+LEAF(init_fpu)
 	mfc0	t0, CP0_STATUS
 	li	t1, 0x20000000
 	or	t0, t1
@@ -170,4 +170,4 @@ LEAF(r4xx0_init_fpu)
 	dmtc1	t0, $f28
 	jr	ra
 	 dmtc1	t0, $f30
-	END(r4xx0_init_fpu)
+	END(init_fpu)
diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
index 424bc8138..851b4dc48 100644
--- a/arch/mips/kernel/r6000_fpu.S
+++ b/arch/mips/kernel/r6000_fpu.S
@@ -10,7 +10,7 @@
  * Multi-arch abstraction and asm macros for easier reading:
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  *
- * $Id: r6000_fpu.S,v 1.4 1999/04/11 18:37:55 harald Exp $
+ * $Id: r6000_fpu.S,v 1.5 1999/05/01 22:40:37 ralf Exp $
  */
 #include <asm/asm.h>
 #include <asm/fpregdef.h>
@@ -21,7 +21,7 @@
 	.set	noreorder
 	.set	mips2
 	/* Save floating point context */
-	LEAF(r6000_save_fp_context)
+	LEAF(save_fp_context)
 	mfc0	t0,CP0_STATUS
 	sll	t0,t0,2
 	bgez	t0,1f
@@ -49,7 +49,7 @@
 	 sw	t0,SC_FPC_CSR(a0)
 1:	jr	ra
 	 nop
-	END(r6000_save_fp_context)
+	END(save_fp_context)
 
 /* Restore FPU state:
  *  - fp gp registers
@@ -59,7 +59,7 @@
  * frame on the current content of c0_status, not on the content of the
  * stack frame which might have been changed by the user.
  */
-	LEAF(r6000_restore_fp_context)
+	LEAF(restore_fp_context)
 	mfc0	t0,CP0_STATUS
 	sll	t0,t0,2
 
@@ -86,4 +86,4 @@
 	 ctc1	t0,fcr31
 1:	jr	ra
 	 nop
-	END(r6000_restore_fp_context)
+	END(restore_fp_context)
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 604320e01..2f4a5a2a1 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -1,4 +1,4 @@
-/* $Id: signal.c,v 1.18 1999/02/15 02:16:52 ralf Exp $
+/* $Id: signal.c,v 1.19 1999/06/17 13:25:47 ralf Exp $
  *
  *  linux/arch/mips/kernel/signal.c
  *
@@ -32,8 +32,8 @@
 asmlinkage int sys_wait4(pid_t pid, unsigned long *stat_addr,
                          int options, unsigned long *ru);
 asmlinkage int do_signal(sigset_t *oldset, struct pt_regs *regs);
-extern asmlinkage void (*save_fp_context)(struct sigcontext *sc);
-extern asmlinkage void (*restore_fp_context)(struct sigcontext *sc);
+extern asmlinkage void save_fp_context(struct sigcontext *sc);
+extern asmlinkage void restore_fp_context(struct sigcontext *sc);
 
 /*
  * Atomically swap in the new signal mask, and wait for a signal.
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 3cca8acb1..800bd1430 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -40,12 +40,9 @@ extern asmlinkage void deskstation_rpc44_handle_int(void);
 extern asmlinkage void deskstation_tyne_handle_int(void);
 extern asmlinkage void mips_magnum_4000_handle_int(void);
 
-extern asmlinkage void r4k_handle_mod(void);
-extern asmlinkage void r2300_handle_mod(void);
-extern asmlinkage void r4k_handle_tlbl(void);
-extern asmlinkage void r2300_handle_tlbl(void);
-extern asmlinkage void r4k_handle_tlbs(void);
-extern asmlinkage void r2300_handle_tlbs(void);
+extern asmlinkage void handle_mod(void);
+extern asmlinkage void handle_tlbl(void);
+extern asmlinkage void handle_tlbs(void);
 extern asmlinkage void handle_adel(void);
 extern asmlinkage void handle_ades(void);
 extern asmlinkage void handle_ibe(void);
@@ -60,15 +57,6 @@ extern asmlinkage void handle_fpe(void);
 extern asmlinkage void handle_watch(void);
 extern asmlinkage void handle_reserved(void);
 
-extern asmlinkage void r4xx0_lazy_fpu_switch(struct task_struct *);
-extern asmlinkage void r4xx0_init_fpu(void);
-extern asmlinkage void r4xx0_save_fp(struct sigcontext *);
-extern asmlinkage void r2300_lazy_fpu_switch(struct task_struct *);
-extern asmlinkage void r2300_init_fpu(void);
-extern asmlinkage void r2300_save_fp(struct sigcontext *);
-
-extern asmlinkage void simfp(unsigned int);
-
 static char *cpu_names[] = CPU_NAMES;
 
 char watch_available = 0;
@@ -78,10 +66,6 @@ char vce_available = 0;
 void (*ibe_board_handler)(struct pt_regs *regs);
 void (*dbe_board_handler)(struct pt_regs *regs);
 
-static void (*lazy_fpu_switch)(struct task_struct *);
-static void (*init_fpu)(void);
-void (*save_fp)(struct sigcontext *);
-
 int kstack_depth_to_print = 24;
 
 /*
@@ -281,6 +265,7 @@ void do_fpe(struct pt_regs *regs, unsigned long fcr31)
 {
 	unsigned long pc;
 	unsigned int insn;
+	extern void simfp(void*);
 
 #ifdef CONFIG_MIPS_FPE_MODULE
 	if (fpe_handler != NULL) {
@@ -497,6 +482,8 @@ void do_ri(struct pt_regs *regs)
 void do_cpu(struct pt_regs *regs)
 {
 	unsigned int cpid;
+	extern void lazy_fpu_switch(void*);
+	extern void init_fpu(void);
 
 	cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
 	if (cpid != 1)
@@ -592,19 +579,6 @@ void set_except_vector(int n, void *addr)
 	}
 }
 
-asmlinkage void (*save_fp_context)(struct sigcontext *sc);
-extern asmlinkage void r4k_save_fp_context(struct sigcontext *sc);
-extern asmlinkage void r2300_save_fp_context(struct sigcontext *sc);
-extern asmlinkage void r6000_save_fp_context(struct sigcontext *sc);
-
-asmlinkage void (*restore_fp_context)(struct sigcontext *sc);
-extern asmlinkage void r4k_restore_fp_context(struct sigcontext *sc);
-extern asmlinkage void r2300_restore_fp_context(struct sigcontext *sc);
-extern asmlinkage void r6000_restore_fp_context(struct sigcontext *sc);
-
-extern asmlinkage void *r4xx0_resume(void *last, void *next);
-extern asmlinkage void *r2300_resume(void *last, void *next);
-
 __initfunc(void trap_init(void))
 {
 	extern char except_vec0_nevada, except_vec0_r4000;
@@ -635,6 +609,29 @@ __initfunc(void trap_init(void))
 	watch_init(mips_cputype);
 	setup_dedicated_int();
 
+	set_except_vector(1, handle_mod);
+	set_except_vector(2, handle_tlbl);
+	set_except_vector(3, handle_tlbs);
+	set_except_vector(4, handle_adel);
+	set_except_vector(5, handle_ades);
+	/*
+	 * The Data Bus Error/ Instruction Bus Errors are signaled
+	 * by external hardware.  Therefore these two expection have
+	 * board specific handlers.
+	 */
+	set_except_vector(6, handle_ibe);
+	set_except_vector(7, handle_dbe);
+	ibe_board_handler = default_be_board_handler;
+	dbe_board_handler = default_be_board_handler;
+
+	set_except_vector(8, handle_sys);
+	set_except_vector(9, handle_bp);
+	set_except_vector(10, handle_ri);
+	set_except_vector(11, handle_cpu);
+	set_except_vector(12, handle_ov);
+	set_except_vector(13, handle_tr);
+	set_except_vector(15, handle_fpe);
+
 	/*
 	 * Handling the following exceptions depends mostly of the cpu type
 	 */
@@ -684,39 +681,10 @@ __initfunc(void trap_init(void))
 			       0x100);
 		}
 
-		save_fp_context = r4k_save_fp_context;
-		restore_fp_context = r4k_restore_fp_context;
-		lazy_fpu_switch = r4xx0_lazy_fpu_switch;
-		init_fpu = r4xx0_init_fpu;
-		save_fp = r4xx0_save_fp;
-		resume = r4xx0_resume;
-		set_except_vector(1, r4k_handle_mod);
-		set_except_vector(2, r4k_handle_tlbl);
-		set_except_vector(3, r4k_handle_tlbs);
-		set_except_vector(4, handle_adel);
-		set_except_vector(5, handle_ades);
-
-		/*
-		 * The following two are signaled by onboard hardware and
-		 * should get board specific handlers to get maximum
-		 * available information.
-		 */
-		set_except_vector(6, handle_ibe);
-		set_except_vector(7, handle_dbe);
-
-		set_except_vector(8, handle_sys);
-		set_except_vector(9, handle_bp);
-		set_except_vector(10, handle_ri);
-		set_except_vector(11, handle_cpu);
-		set_except_vector(12, handle_ov);
-		set_except_vector(13, handle_tr);
-		set_except_vector(15, handle_fpe);
 		break;
 
 	case CPU_R6000:
 	case CPU_R6000A:
-		save_fp_context = r6000_save_fp_context;
-		restore_fp_context = r6000_restore_fp_context;
 #if 0
 		/*
 		 * The R6000 is the only R-series CPU that features a machine
@@ -734,34 +702,6 @@ __initfunc(void trap_init(void))
 	case CPU_R3000A:
 		memcpy((void *)KSEG0, &except_vec0_r2300, 0x80);
 		memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
-		save_fp_context = r2300_save_fp_context;
-		restore_fp_context = r2300_restore_fp_context;
-		lazy_fpu_switch = r2300_lazy_fpu_switch;
-		init_fpu = r2300_init_fpu;
-		save_fp = r2300_save_fp;
-		resume = r2300_resume;
-		set_except_vector(1, r2300_handle_mod);
-		set_except_vector(2, r2300_handle_tlbl);
-		set_except_vector(3, r2300_handle_tlbs);
-		set_except_vector(4, handle_adel);
-		set_except_vector(5, handle_ades);
-		/*
-		 * The Data Bus Error/ Instruction Bus Errors are signaled
-		 * by external hardware.  Therefore these two expection have
-		 * board specific handlers.
-		 */
-		set_except_vector(6, handle_ibe);
-		set_except_vector(7, handle_dbe);
-		ibe_board_handler = default_be_board_handler;
-		dbe_board_handler = default_be_board_handler;
-
-		set_except_vector(8, handle_sys);
-		set_except_vector(9, handle_bp);
-		set_except_vector(10, handle_ri);
-		set_except_vector(11, handle_cpu);
-		set_except_vector(12, handle_ov);
-		set_except_vector(13, handle_tr);
-		set_except_vector(15, handle_fpe);
 		break;
 	case CPU_R3041:
 	case CPU_R3051:
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 8f0b902a6..5ae85bd0a 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -8,8 +8,23 @@
 # Note 2! The CFLAGS definition is now in the main makefile...
 
 O_TARGET := mm.o
-O_OBJS	 := extable.o init.o fault.o r4xx0.o r2300.o r6000.o tfp.o \
-            andes.o loadmmu.o
+O_OBJS	 := extable.o init.o fault.o loadmmu.o
+
+ifdef CONFIG_CPU_R3000
+O_OBJS   += r2300.o
+endif
+
+ifdef CONFIG_CPU_R4300
+O_OBJS   += r4xx0.o
+endif
+
+ifdef CONFIG_CPU_R4X00
+O_OBJS   += r4xx0.o
+endif
+
+ifdef CONFIG_CPU_R6000
+O_OBJS   += r6000.o
+endif
 
 ifdef CONFIG_SGI
 O_OBJS   += umap.o
diff --git a/arch/mips/mm/andes.c b/arch/mips/mm/andes.c
index c0653eb64..4663ad657 100644
--- a/arch/mips/mm/andes.c
+++ b/arch/mips/mm/andes.c
@@ -1,4 +1,4 @@
-/* $Id: andes.c,v 1.5 1998/05/04 09:12:55 ralf Exp $
+/* $Id: andes.c,v 1.6 1999/01/04 16:03:52 ralf Exp $
  *
  * andes.c: MMU and cache operations for the R10000 (ANDES).
  *
@@ -14,8 +14,6 @@
 #include <asm/sgialib.h>
 #include <asm/mmu_context.h>
 
-extern unsigned long mips_tlb_entries;
-
 /* Cache operations. XXX Write these dave... */
 static inline void andes_flush_cache_all(void)
 {
@@ -51,46 +49,41 @@ static void andes_flush_cache_sigtramp(unsigned long page)
 }
 
 /* TLB operations. XXX Write these dave... */
-static inline void andes_flush_tlb_all(void)
+inline void flush_tlb_all(void)
 {
 	/* XXX */
 }
 
-static void andes_flush_tlb_mm(struct mm_struct *mm)
+void flush_tlb_mm(struct mm_struct *mm)
 {
 	/* XXX */
 }
 
-static void andes_flush_tlb_range(struct mm_struct *mm, unsigned long start,
+void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 				  unsigned long end)
 {
 	/* XXX */
 }
 
-static void andes_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
 	/* XXX */
 }
 
-static void andes_load_pgd(unsigned long pg_dir)
+void load_pgd(unsigned long pg_dir)
 {
 }
 
-static void andes_pgd_init(unsigned long page)
+void pgd_init(unsigned long page)
 {
 }
 
-static void andes_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 				  unsigned long entryhi, unsigned long pagemask)
 {
         /* XXX */
 }
 
-static int andes_user_mode(struct pt_regs *regs)
-{
-	return (regs->cp0_status & ST0_KSU) == KSU_USER;
-}
-
 __initfunc(void ld_mmu_andes(void))
 {
 	flush_cache_all = andes_flush_cache_all;
@@ -100,19 +93,6 @@ __initfunc(void ld_mmu_andes(void))
 	flush_cache_sigtramp = andes_flush_cache_sigtramp;
 	flush_page_to_ram = andes_flush_page_to_ram;
 
-	flush_tlb_all = andes_flush_tlb_all;
-	flush_tlb_mm = andes_flush_tlb_mm;
-	flush_tlb_range = andes_flush_tlb_range;
-	flush_tlb_page = andes_flush_tlb_page;
-	andes_asid_setup();
-    
-        add_wired_entry = andes_add_wired_entry;
-
-	user_mode = andes_user_mode;
-
-	load_pgd = andes_load_pgd;
-	pgd_init = andes_pgd_init;
-
 	flush_cache_all();
 	flush_tlb_all();
 }
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 18bfbf80e..fbcea015d 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -1,4 +1,4 @@
-/* $Id: fault.c,v 1.8 1998/09/19 19:16:18 ralf Exp $
+/* $Id: fault.c,v 1.9 1999/01/04 16:03:53 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -31,7 +31,7 @@
 
 extern void die(char *, struct pt_regs *, unsigned long write);
 
-unsigned long asid_cache;
+unsigned long asid_cache = ASID_FIRST_VERSION;
 
 /*
  * Macro for exception fixup code to access integer registers.
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 29a6d787d..90342db23 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -1,4 +1,4 @@
-/* $Id: init.c,v 1.14 1999/06/22 23:06:28 ralf Exp $
+/* $Id: init.c,v 1.15 1999/07/05 23:09:46 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -381,35 +381,3 @@ void si_meminfo(struct sysinfo *val)
 	val->sharedram <<= PAGE_SHIFT;
 	return;
 }
-
-/* Fixup an immediate instruction  */
-__initfunc(static void __i_insn_fixup(unsigned int **start, unsigned int **stop,
-                         unsigned int i_const))
-{
-	unsigned int **p, *ip;
-
-	for (p = start;p < stop; p++) {
-		ip = *p;
-		*ip = (*ip & 0xffff0000) | i_const;
-	}
-}
-
-#define i_insn_fixup(section, const)					  \
-do {									  \
-	extern unsigned int *__start_ ## section;			  \
-	extern unsigned int *__stop_ ## section;			  \
-	__i_insn_fixup(&__start_ ## section, &__stop_ ## section, const); \
-} while(0)
-
-/* Caller is assumed to flush the caches before the first context switch.  */
-__initfunc(void __asid_setup(unsigned int inc, unsigned int mask,
-                             unsigned int version_mask,
-                             unsigned int first_version))
-{
-	i_insn_fixup(__asid_inc, inc);
-	i_insn_fixup(__asid_mask, mask);
-	i_insn_fixup(__asid_version_mask, version_mask);
-	i_insn_fixup(__asid_first_version, first_version);
-
-	asid_cache = first_version;
-}
diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c
index 8538ff2dc..cd6a884c7 100644
--- a/arch/mips/mm/loadmmu.c
+++ b/arch/mips/mm/loadmmu.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  *
- * $Id: loadmmu.c,v 1.9 1999/06/13 16:30:35 ralf Exp $
+ * $Id: loadmmu.c,v 1.10 1999/06/17 13:25:51 ralf Exp $
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -34,44 +34,35 @@ void (*dma_cache_wback_inv)(unsigned long start, unsigned long size);
 void (*dma_cache_wback)(unsigned long start, unsigned long size);
 void (*dma_cache_inv)(unsigned long start, unsigned long size);
 
-/* TLB operations. */
-void (*flush_tlb_all)(void);
-void (*flush_tlb_mm)(struct mm_struct *mm);
-void (*flush_tlb_range)(struct mm_struct *mm, unsigned long start,
-			unsigned long end);
-void (*flush_tlb_page)(struct vm_area_struct *vma, unsigned long page);
-
-/* Miscellaneous. */
-void (*load_pgd)(unsigned long pg_dir);
-void (*pgd_init)(unsigned long page);
-void (*update_mmu_cache)(struct vm_area_struct * vma,
-			 unsigned long address, pte_t pte);
-
-void (*show_regs)(struct pt_regs *);
-
-void (*add_wired_entry)(unsigned long entrylo0, unsigned long entrylo1,
-			unsigned long entryhi, unsigned long pagemask);
-
-int (*user_mode)(struct pt_regs *);
-
-asmlinkage void *(*resume)(void *last, void *next);
-
+#ifdef CONFIG_CPU_R3000
 extern void ld_mmu_r2300(void);
+#endif
+#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_R4300)
 extern void ld_mmu_r4xx0(void);
+#endif
+#ifdef CONFIG_CPU_R6000
 extern void ld_mmu_r6000(void);
+#endif
+#ifdef CONFIG_CPU_R8000
 extern void ld_mmu_tfp(void);
+#endif
+#ifdef CONFIG_CPU_R10000
 extern void ld_mmu_andes(void);
+#endif
 
 __initfunc(void loadmmu(void))
 {
 	switch(mips_cputype) {
+#ifdef CONFIG_CPU_R3000
 	case CPU_R2000:
 	case CPU_R3000:
 	case CPU_R3000A:
 		printk("Loading R[23]00 MMU routines.\n");
 		ld_mmu_r2300();
 		break;
+#endif
 
+#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_R4300)
 	case CPU_R4000PC:
 	case CPU_R4000SC:
 	case CPU_R4000MC:
@@ -90,22 +81,29 @@ __initfunc(void loadmmu(void))
 		printk("Loading R4000 MMU routines.\n");
 		ld_mmu_r4xx0();
 		break;
+#endif
 
+#ifdef CONFIG_CPU_R6000
 	case CPU_R6000:
 	case CPU_R6000A:
 		printk("Loading R6000 MMU routines.\n");
 		ld_mmu_r6000();
 		break;
+#endif
 
+#ifdef CONFIG_CPU_R8000
 	case CPU_R8000:
 		printk("Loading TFP MMU routines.\n");
 		ld_mmu_tfp();
 		break;
+#endif
 
+#ifdef CONFIG_CPU_R10000
 	case CPU_R10000:
 		printk("Loading R10000 MMU routines.\n");
 		ld_mmu_andes();
 		break;
+#endif
 
 	default:
 		/* XXX We need an generic routine in the MIPS port
diff --git a/arch/mips/mm/r2300.c b/arch/mips/mm/r2300.c
index 6e4127e7e..656e7797f 100644
--- a/arch/mips/mm/r2300.c
+++ b/arch/mips/mm/r2300.c
@@ -42,8 +42,6 @@ static struct cache_space {
 #undef DEBUG_TLB
 #undef DEBUG_CACHE
 
-extern unsigned long mips_tlb_entries;
-
 #define NTLB_ENTRIES       64  /* Fixed on all R23000 variants... */
 
 /* page functions */
@@ -427,7 +425,7 @@ static void r2300_flush_cache_sigtramp(unsigned long page)
 }
 
 /* TLB operations. */
-static inline void r2300_flush_tlb_all(void)
+inline void flush_tlb_all(void)
 {
 	unsigned long flags;
 	unsigned long old_ctx;
@@ -449,7 +447,7 @@ static inline void r2300_flush_tlb_all(void)
 	restore_flags(flags);
 }
 
-static void r2300_flush_tlb_mm(struct mm_struct *mm)
+void flush_tlb_mm(struct mm_struct *mm)
 {
 	if(mm->context != 0) {
 		unsigned long flags;
@@ -465,7 +463,7 @@ static void r2300_flush_tlb_mm(struct mm_struct *mm)
 	}
 }
 
-static void r2300_flush_tlb_range(struct mm_struct *mm, unsigned long start,
+void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 				  unsigned long end)
 {
 	if(mm->context != 0) {
@@ -508,7 +506,7 @@ static void r2300_flush_tlb_range(struct mm_struct *mm, unsigned long start,
 	}
 }
 
-static void r2300_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
 	if(vma->vm_mm->context != 0) {
 		unsigned long flags;
@@ -544,7 +542,7 @@ static void r2300_load_pgd(unsigned long pg_dir)
 /*
  * Initialize new page directory with pointers to invalid ptes
  */
-static void r2300_pgd_init(unsigned long page)
+void pgd_init(unsigned long page)
 {
 	unsigned long dummy1, dummy2;
 
@@ -573,7 +571,7 @@ static void r2300_pgd_init(unsigned long page)
 		 "1" (PAGE_SIZE/(sizeof(pmd_t)*8)));
 }
 
-static void r2300_update_mmu_cache(struct vm_area_struct * vma,
+void update_mmu_cache(struct vm_area_struct * vma,
 				   unsigned long address, pte_t pte)
 {
 	unsigned long flags;
@@ -629,7 +627,7 @@ static void r2300_update_mmu_cache(struct vm_area_struct * vma,
 	restore_flags(flags);
 }
 
-static void r2300_show_regs(struct pt_regs * regs)
+void show_regs(struct pt_regs * regs)
 {
 	/*
 	 * Saved main processor registers
@@ -662,7 +660,7 @@ static void r2300_show_regs(struct pt_regs * regs)
 	       (unsigned int) regs->cp0_cause);
 }
 
-static void r2300_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 				  unsigned long entryhi, unsigned long pagemask)
 {
 printk("r2300_add_wired_entry");
@@ -671,11 +669,6 @@ printk("r2300_add_wired_entry");
 	 */
 }
 
-static int r2300_user_mode(struct pt_regs *regs)
-{
-	return !(regs->cp0_status & KU_USER);
-}
-
 __initfunc(void ld_mmu_r2300(void))
 {
 	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
@@ -693,23 +686,7 @@ __initfunc(void ld_mmu_r2300(void))
 	flush_cache_sigtramp = r2300_flush_cache_sigtramp;
 	flush_page_to_ram = r2300_flush_page_to_ram;
 
-	flush_tlb_all = r2300_flush_tlb_all;
-	flush_tlb_mm = r2300_flush_tlb_mm;
-	flush_tlb_range = r2300_flush_tlb_range;
-	flush_tlb_page = r2300_flush_tlb_page;
-
         dma_cache_wback_inv = r3k_dma_cache_wback_inv;
 
-	load_pgd = r2300_load_pgd;
-	pgd_init = r2300_pgd_init;
-	update_mmu_cache = r2300_update_mmu_cache;
-	r3000_asid_setup();
-
-	show_regs = r2300_show_regs;
-    
-        add_wired_entry = r2300_add_wired_entry;
-
-	user_mode = r2300_user_mode;
-
 	flush_tlb_all();
 }
diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c
index 31e76cead..be843351e 100644
--- a/arch/mips/mm/r4xx0.c
+++ b/arch/mips/mm/r4xx0.c
@@ -1,4 +1,4 @@
-/* $Id: r4xx0.c,v 1.21 1999/01/04 16:03:54 ralf Exp $
+/* $Id: r4xx0.c,v 1.22 1999/06/17 13:25:51 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -2222,7 +2222,7 @@ static void r4600v20k_flush_cache_sigtramp(unsigned long addr)
 
 #define NTLB_ENTRIES_HALF  24  /* Fixed on all R4XX0 variants... */
 
-static inline void r4k_flush_tlb_all(void)
+inline void flush_tlb_all(void)
 {
 	unsigned long flags;
 	unsigned long old_ctx;
@@ -2255,7 +2255,7 @@ static inline void r4k_flush_tlb_all(void)
 	restore_flags(flags);
 }
 
-static void r4k_flush_tlb_mm(struct mm_struct *mm)
+void flush_tlb_mm(struct mm_struct *mm)
 {
 	if(mm->context != 0) {
 		unsigned long flags;
@@ -2271,7 +2271,7 @@ static void r4k_flush_tlb_mm(struct mm_struct *mm)
 	}
 }
 
-static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start,
+void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 				unsigned long end)
 {
 	if(mm->context != 0) {
@@ -2320,7 +2320,7 @@ static void r4k_flush_tlb_range(struct mm_struct *mm, unsigned long start,
 	}
 }
 
-static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
 	if(vma->vm_mm->context != 0) {
 		unsigned long flags;
@@ -2354,11 +2354,11 @@ static void r4k_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 }
 
 /* Load a new root pointer into the TLB. */
-static void r4k_load_pgd(unsigned long pg_dir)
+void load_pgd(unsigned long pg_dir)
 {
 }
 
-static void r4k_pgd_init(unsigned long page)
+void pgd_init(unsigned long page)
 {
 	unsigned long *p = (unsigned long *) page;
 	int i;
@@ -2385,7 +2385,7 @@ static unsigned long el1_debug[NTLB_ENTRIES];
  * updates the TLB with the new pte(s), and another which also checks
  * for the R4k "end of page" hardware bug and does the needy.
  */
-static void r4k_update_mmu_cache(struct vm_area_struct * vma,
+void update_mmu_cache(struct vm_area_struct * vma,
 				 unsigned long address, pte_t pte)
 {
 	unsigned long flags;
@@ -2459,7 +2459,7 @@ static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma,
 }
 #endif
 
-static void r4k_show_regs(struct pt_regs * regs)
+void show_regs(struct pt_regs * regs)
 {
 	/* Saved main processor registers. */
 	printk("$0 : %08lx %08lx %08lx %08lx\n",
@@ -2484,7 +2484,7 @@ static void r4k_show_regs(struct pt_regs * regs)
 	       regs->cp0_epc, regs->cp0_status, regs->cp0_cause);
 }
 			
-static void r4k_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 				      unsigned long entryhi, unsigned long pagemask)
 {
         unsigned long flags;
@@ -2765,11 +2765,6 @@ __initfunc(static inline void setup_scache(unsigned int config))
 	setup_noscache_funcs();
 }
 
-static int r4k_user_mode(struct pt_regs *regs)
-{
-	return (regs->cp0_status & ST0_KSU) == KSU_USER;
-}
-
 __initfunc(void ld_mmu_r4xx0(void))
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
@@ -2795,22 +2790,6 @@ __initfunc(void ld_mmu_r4xx0(void))
 		flush_cache_sigtramp = r4600v20k_flush_cache_sigtramp;
 	}
 
-	flush_tlb_all = r4k_flush_tlb_all;
-	flush_tlb_mm = r4k_flush_tlb_mm;
-	flush_tlb_range = r4k_flush_tlb_range;
-	flush_tlb_page = r4k_flush_tlb_page;
-	r4xx0_asid_setup();
-
-	load_pgd = r4k_load_pgd;
-	pgd_init = r4k_pgd_init;
-	update_mmu_cache = r4k_update_mmu_cache;
-
-	show_regs = r4k_show_regs;
-    
-        add_wired_entry = r4k_add_wired_entry;
-
-	user_mode = r4k_user_mode;
-
 	flush_cache_all();
 	write_32bit_cp0_register(CP0_WIRED, 0);
 
diff --git a/arch/mips/mm/r6000.c b/arch/mips/mm/r6000.c
index b8b442728..7f2919db8 100644
--- a/arch/mips/mm/r6000.c
+++ b/arch/mips/mm/r6000.c
@@ -1,4 +1,4 @@
-/* $Id: r6000.c,v 1.5 1998/08/25 09:14:47 ralf Exp $
+/* $Id: r6000.c,v 1.6 1999/01/04 16:03:54 ralf Exp $
  *
  * r6000.c: MMU and cache routines for the R6000 processors.
  *
@@ -53,32 +53,32 @@ static void r6000_flush_cache_sigtramp(unsigned long page)
 }
 
 /* TLB operations. XXX Write these dave... */
-static inline void r6000_flush_tlb_all(void)
+inline void flush_tlb_all(void)
 {
 	/* XXX */
 }
 
-static void r6000_flush_tlb_mm(struct mm_struct *mm)
+void flush_tlb_mm(struct mm_struct *mm)
 {
 	/* XXX */
 }
 
-static void r6000_flush_tlb_range(struct mm_struct *mm, unsigned long start,
+void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 				  unsigned long end)
 {
 	/* XXX */
 }
 
-static void r6000_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
 	/* XXX */
 }
 
-static void r6000_load_pgd(unsigned long pg_dir)
+void load_pgd(unsigned long pg_dir)
 {
 }
 
-static void r6000_pgd_init(unsigned long page)
+void pgd_init(unsigned long page)
 {
 	unsigned long dummy1, dummy2;
 
@@ -115,7 +115,7 @@ static void r6000_pgd_init(unsigned long page)
 		 "i" (Create_Dirty_Excl_D));
 }
 
-static void r6000_update_mmu_cache(struct vm_area_struct * vma,
+void update_mmu_cache(struct vm_area_struct * vma,
 				   unsigned long address, pte_t pte)
 {
 	r6000_flush_tlb_page(vma, address);
@@ -125,7 +125,7 @@ static void r6000_update_mmu_cache(struct vm_area_struct * vma,
 	 */
 }
 
-static void r6000_show_regs(struct pt_regs * regs)
+void show_regs(struct pt_regs * regs)
 {
 	/*
 	 * Saved main processor registers
@@ -158,17 +158,12 @@ static void r6000_show_regs(struct pt_regs * regs)
 	       (unsigned int) regs->cp0_cause);
 }
 
-static void r6000_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 				  unsigned long entryhi, unsigned long pagemask)
 {
         /* XXX */
 }
 
-static int r6000_user_mode(struct pt_regs *regs)
-{
-	return !(regs->cp0_status & 0x4);
-}
-
 __initfunc(void ld_mmu_r6000(void))
 {
 	flush_cache_all = r6000_flush_cache_all;
@@ -178,22 +173,6 @@ __initfunc(void ld_mmu_r6000(void))
 	flush_cache_sigtramp = r6000_flush_cache_sigtramp;
 	flush_page_to_ram = r6000_flush_page_to_ram;
 
-	flush_tlb_all = r6000_flush_tlb_all;
-	flush_tlb_mm = r6000_flush_tlb_mm;
-	flush_tlb_range = r6000_flush_tlb_range;
-	flush_tlb_page = r6000_flush_tlb_page;
-	r6000_asid_setup();
-
-	load_pgd = r6000_load_pgd;
-	pgd_init = r6000_pgd_init;
-	update_mmu_cache = r6000_update_mmu_cache;
-
-	show_regs = r6000_show_regs;
-    
-        add_wired_entry = r6000_add_wired_entry;
-
-	user_mode = r6000_user_mode;
-
 	flush_cache_all();
 	flush_tlb_all();
 }
diff --git a/arch/mips/mm/tfp.c b/arch/mips/mm/tfp.c
index 0d8ab7c86..bf520e247 100644
--- a/arch/mips/mm/tfp.c
+++ b/arch/mips/mm/tfp.c
@@ -1,4 +1,4 @@
-/* $Id: tfp.c,v 1.6 1998/10/16 19:22:44 ralf Exp $
+/* $Id: tfp.c,v 1.6 1999/01/04 16:03:55 ralf Exp $
  *
  * tfp.c: MMU and cache routines specific to the r8000 (TFP).
  *
@@ -53,46 +53,41 @@ static void tfp_flush_cache_sigtramp(unsigned long page)
 }
 
 /* TLB operations. XXX Write these dave... */
-static inline void tfp_flush_tlb_all(void)
+inline void flush_tlb_all(void)
 {
 	/* XXX */
 }
 
-static void tfp_flush_tlb_mm(struct mm_struct *mm)
+void flush_tlb_mm(struct mm_struct *mm)
 {
 	/* XXX */
 }
 
-static void tfp_flush_tlb_range(struct mm_struct *mm, unsigned long start,
+void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 				unsigned long end)
 {
 	/* XXX */
 }
 
-static void tfp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 {
 	/* XXX */
 }
 
-static void tfp_load_pgd(unsigned long pg_dir)
+void load_pgd(unsigned long pg_dir)
 {
 }
 
-static void tfp_pgd_init(unsigned long page)
+void pgd_init(unsigned long page)
 {
 }
 
-static void tfp_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 				unsigned long entryhi, unsigned long pagemask)
 {
         /* XXX */
 }
 
-static int tfp_user_mode(struct pt_regs *regs)
-{
-	return (regs->cp0_status & ST0_KSU) == KSU_USER;
-}
-
 __initfunc(void ld_mmu_tfp(void))
 {
 	flush_cache_all = tfp_flush_cache_all;
@@ -102,19 +97,6 @@ __initfunc(void ld_mmu_tfp(void))
 	flush_cache_sigtramp = tfp_flush_cache_sigtramp;
 	flush_page_to_ram = tfp_flush_page_to_ram;
 
-	flush_tlb_all = tfp_flush_tlb_all;
-	flush_tlb_mm = tfp_flush_tlb_mm;
-	flush_tlb_range = tfp_flush_tlb_range;
-	flush_tlb_page = tfp_flush_tlb_page;
-	tfp_asid_setup();
-
-        add_wired_entry = tfp_add_wired_entry;
-
-	user_mode = tfp_user_mode;
-
-	load_pgd = tfp_load_pgd;
-	pgd_init = tfp_pgd_init;
-    
 	flush_cache_all();
 	flush_tlb_all();
 }
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index b7c4c90cd..473e9e2a3 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -1,4 +1,4 @@
-/* $Id: mmu_context.h,v 1.2 1998/05/07 03:02:50 ralf Exp $
+/* $Id: mmu_context.h,v 1.3 1999/01/04 16:09:23 ralf Exp $
  *
  * Switch a MMU context.
  *
@@ -11,52 +11,34 @@
 #ifndef __ASM_MIPS_MMU_CONTEXT_H
 #define __ASM_MIPS_MMU_CONTEXT_H
 
+#include <linux/config.h>
+
 /* Fuck.  The f-word is here so you can grep for it :-)  */
 extern unsigned long asid_cache;
 
-/* I patch, therefore I am ...  */
-#define ASID_INC(asid)						\
- ({ unsigned long __asid = asid;				\
-   __asm__("1:\taddiu\t%0,0\t\t\t\t# patched\n\t"		\
-           ".section\t__asid_inc,\"a\"\n\t"			\
-           ".word\t1b\n\t"					\
-           ".previous"						\
-           :"=r" (__asid)					\
-           :"0" (__asid));					\
-   __asid; })
-#define ASID_MASK(asid)						\
- ({ unsigned long __asid = asid;				\
-   __asm__("1:\tandi\t%0,%1,0\t\t\t# patched\n\t"			\
-           ".section\t__asid_mask,\"a\"\n\t"			\
-           ".word\t1b\n\t"					\
-           ".previous"						\
-           :"=r" (__asid)					\
-           :"r" (__asid));					\
-   __asid; })
-#define ASID_VERSION_MASK					\
- ({ unsigned long __asid;					\
-   __asm__("1:\tli\t%0,0\t\t\t\t# patched\n\t"			\
-           ".section\t__asid_version_mask,\"a\"\n\t"		\
-           ".word\t1b\n\t"					\
-           ".previous"						\
-           :"=r" (__asid));					\
-   __asid; })
-#define ASID_FIRST_VERSION					\
- ({ unsigned long __asid = asid;				\
-   __asm__("1:\tli\t%0,0\t\t\t\t# patched\n\t"			\
-           ".section\t__asid_first_version,\"a\"\n\t"		\
-           ".word\t1b\n\t"					\
-           ".previous"						\
-           :"=r" (__asid));					\
-   __asid; })
+#if defined(CONFIG_CPU_R3000)
 
-#define ASID_FIRST_VERSION_R3000 0x1000
-#define ASID_FIRST_VERSION_R4000 0x100
+#define ASID_INC	0x40
+#define ASID_MASK	0xfc0
 
-extern inline void
-get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
+#else /* FIXME: not correct for R6000, R8000 */
+
+#define ASID_INC	0x1
+#define ASID_MASK	0xff
+
+#endif
+
+/* 
+ *  All unused by hardware upper bits will be considered 
+ *  as a software asid extension.
+ */
+#define ASID_VERSION_MASK  ((unsigned long)~(ASID_MASK|(ASID_MASK-1))) 
+#define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
+
+extern inline void get_new_mmu_context(struct mm_struct *mm, unsigned
+long asid)
 {
-	if (!ASID_MASK((asid = ASID_INC(asid)))) {
+        if (! ((asid += ASID_INC) & ASID_MASK) ) {
 		flush_tlb_all(); /* start new asid cycle */
 		if (!asid)      /* fix version if needed */
 			asid = ASID_FIRST_VERSION;
@@ -105,30 +87,4 @@ extern inline void activate_context(struct task_struct *tsk)
 	set_entryhi(tsk->mm->context);
 }
 
-extern void __asid_setup(unsigned int inc, unsigned int mask,
-                         unsigned int version_mask, unsigned int first_version);
-
-extern inline void r3000_asid_setup(void)
-{
-	__asid_setup(0x40, 0xfc0, 0xf000, ASID_FIRST_VERSION_R3000);
-}
-
-extern inline void r6000_asid_setup(void)
-{
-	panic("r6000_asid_setup: implement me");	/* No idea ...  */
-}
-
-extern inline void tfp_asid_setup(void)
-{
-	panic("tfp_asid_setup: implement me");	/* No idea ...  */
-}
-
-extern inline void r4xx0_asid_setup(void)
-{
-	__asid_setup(1, 0xff, 0xff00, ASID_FIRST_VERSION_R4000);
-}
-
-/* R10000 has the same ASID mechanism as the R4000.  */
-#define andes_asid_setup r4xx0_asid_setup
-
 #endif /* __ASM_MIPS_MMU_CONTEXT_H */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index d74a241c9..4413ea45d 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -41,16 +41,16 @@ extern void (*flush_page_to_ram)(unsigned long page);
  *  - flush_tlb_page(mm, vmaddr) flushes a single page
  *  - flush_tlb_range(mm, start, end) flushes a range of pages
  */
-extern void (*flush_tlb_all)(void);
-extern void (*flush_tlb_mm)(struct mm_struct *mm);
-extern void (*flush_tlb_range)(struct mm_struct *mm, unsigned long start,
+extern void flush_tlb_all(void);
+extern void flush_tlb_mm(struct mm_struct *mm);
+extern void flush_tlb_range(struct mm_struct *mm, unsigned long start,
 			       unsigned long end);
-extern void (*flush_tlb_page)(struct vm_area_struct *vma, unsigned long page);
+extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
 
 /*
  * - add_wired_entry() add a fixed TLB entry, and move wired register
  */
-extern void (*add_wired_entry)(unsigned long entrylo0, unsigned long entrylo1,
+extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 			       unsigned long entryhi, unsigned long pagemask);
 
 
@@ -219,7 +219,7 @@ extern unsigned long zero_page_mask;
 #define PAGE_PTR(address) \
 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
 
-extern void (*load_pgd)(unsigned long pg_dir);
+extern void load_pgd(unsigned long pg_dir);
 
 /* to set the page-dir */
 #define SET_PAGE_DIR(tsk,pgdir) (tsk)->tss.pg_dir = ((unsigned long) (pgdir))
@@ -405,7 +405,7 @@ extern inline pte_t *pte_offset(pmd_t * dir, unsigned long address)
 /*
  * Initialize new page directory with pointers to invalid ptes
  */
-extern void (*pgd_init)(unsigned long page);
+extern void pgd_init(unsigned long page);
 
 /*
  * Allocate and free page tables. The xxx_kernel() versions are
@@ -590,7 +590,7 @@ extern inline void set_pgdir(unsigned long address, pgd_t entry)
 
 extern pgd_t swapper_pg_dir[1024];
 
-extern void (*update_mmu_cache)(struct vm_area_struct *vma,
+extern void update_mmu_cache(struct vm_area_struct *vma,
 				unsigned long address, pte_t pte);
 
 /*
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 8c587afa5..3075f66c4 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -1,4 +1,4 @@
-/* $Id: processor.h,v 1.15 1999/02/15 02:22:12 ralf Exp $
+/* $Id: processor.h,v 1.16 1999/06/17 13:30:37 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -202,7 +202,6 @@ extern inline unsigned long thread_saved_pc(struct thread_struct *t)
 }
 
 struct pt_regs;
-extern int (*user_mode)(struct pt_regs *);
 
 /*
  * Do necessary setup to start up a newly executed thread.
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index e7db7a022..2531fb863 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -60,11 +60,11 @@ struct pt_regs {
 /*
  * Does the process account for user or for system time?
  */
-#define user_mode(regs) ((regs)->cp0_status & KU_USER)
+#define user_mode(regs) (((regs)->cp0_status & KU_MASK) == KU_USER)
 
 #define instruction_pointer(regs) ((regs)->cp0_epc)
 
-extern void (*show_regs)(struct pt_regs *);
+extern void show_regs(struct pt_regs *);
 #endif /* !(__ASSEMBLY__) */
 
 #endif
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index a397989a0..ee2ebc438 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -145,7 +145,7 @@ __asm__ __volatile__(					\
  * switch_to(n) should switch tasks to task nr n, first
  * checking that n isn't the current task, in which case it does nothing.
  */
-extern asmlinkage void *(*resume)(void *last, void *next);
+extern asmlinkage void *resume(void *last, void *next);
 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
 
 #define switch_to(prev,next,last) \
-- 
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