From b62a3d8e8a9d02ff6f9103358b7a9c2c3d56c653 Mon Sep 17 00:00:00 2001 From: Harald Koerfgen Date: Tue, 8 Aug 2000 17:04:35 +0000 Subject: let it compile again --- arch/mips/arc/console.c | 9 ++++----- arch/mips/arc/misc.c | 10 +++++----- arch/mips/config.in | 2 ++ arch/mips/ddb5074/setup.c | 1 - arch/mips/mm/r4xx0.c | 16 +++------------- arch/mips/sgi/kernel/setup.c | 1 - arch/mips/sni/pcimt_scache.c | 9 +++++++++ arch/mips/sni/setup.c | 1 - 8 files changed, 23 insertions(+), 26 deletions(-) (limited to 'arch/mips') diff --git a/arch/mips/arc/console.c b/arch/mips/arc/console.c index cf367a3c1..456f75c15 100644 --- a/arch/mips/arc/console.c +++ b/arch/mips/arc/console.c @@ -19,7 +19,6 @@ * The romvec write and read functions seem to interfere with the serial lines * in some way. You should be careful with them. */ -extern struct bcache_ops *bcops; #ifdef CONFIG_ARC_CONSOLE void prom_putchar(char c) @@ -30,9 +29,9 @@ void __init prom_putchar(char c) long cnt; char it = c; - bcops->bc_disable(); + bc_disable(); romvec->write(1, &it, 1, &cnt); - bcops->bc_enable(); + bc_enable(); } #ifdef CONFIG_ARC_CONSOLE @@ -44,9 +43,9 @@ char __init prom_getchar(void) long cnt; char c; - bcops->bc_disable(); + bc_disable(); romvec->read(0, &c, 1, &cnt); - bcops->bc_enable(); + bc_enable(); return c; } diff --git a/arch/mips/arc/misc.c b/arch/mips/arc/misc.c index 4c056be43..77969edaa 100644 --- a/arch/mips/arc/misc.c +++ b/arch/mips/arc/misc.c @@ -19,7 +19,7 @@ extern void reset_wd33c93(void *instance); void prom_halt(void) { - bcops->bc_disable(); + bc_disable(); cli(); #if CONFIG_SCSI_SGIWD93 reset_wd33c93(sgiwd93_host); @@ -29,7 +29,7 @@ void prom_halt(void) void prom_powerdown(void) { - bcops->bc_disable(); + bc_disable(); cli(); #if CONFIG_SCSI_SGIWD93 reset_wd33c93(sgiwd93_host); @@ -40,7 +40,7 @@ void prom_powerdown(void) /* XXX is this a soft reset basically? XXX */ void prom_restart(void) { - bcops->bc_disable(); + bc_disable(); cli(); #if CONFIG_SCSI_SGIWD93 reset_wd33c93(sgiwd93_host); @@ -50,7 +50,7 @@ void prom_restart(void) void prom_reboot(void) { - bcops->bc_disable(); + bc_disable(); cli(); #if CONFIG_SCSI_SGIWD93 reset_wd33c93(sgiwd93_host); @@ -60,7 +60,7 @@ void prom_reboot(void) void prom_imode(void) { - bcops->bc_disable(); + bc_disable(); cli(); #if CONFIG_SCSI_SGIWD93 reset_wd33c93(sgiwd93_host); diff --git a/arch/mips/config.in b/arch/mips/config.in index 3d2bfc141..abe6fc881 100644 --- a/arch/mips/config.in +++ b/arch/mips/config.in @@ -71,12 +71,14 @@ if [ "$CONFIG_SGI_IP22" = "y" ]; then define_bool CONFIG_ARC32 y define_bool CONFIG_PC_KEYB y define_bool CONFIG_SGI y + define_bool CONFIG_BOARD_SCACHE y fi if [ "$CONFIG_SNI_RM200_PCI" = "y" ]; then define_bool CONFIG_ARC32 y define_bool CONFIG_PCI y define_bool CONFIG_ISA y define_bool CONFIG_PC_KEYB y + define_bool CONFIG_BOARD_SCACHE y fi if [ "$CONFIG_DDB5074" = "y" ]; then define_bool CONFIG_ISA y diff --git a/arch/mips/ddb5074/setup.c b/arch/mips/ddb5074/setup.c index 151234512..9e1b6f224 100644 --- a/arch/mips/ddb5074/setup.c +++ b/arch/mips/ddb5074/setup.c @@ -21,7 +21,6 @@ #include #include -#include #include #include #include diff --git a/arch/mips/mm/r4xx0.c b/arch/mips/mm/r4xx0.c index fe51ac981..e829a2044 100644 --- a/arch/mips/mm/r4xx0.c +++ b/arch/mips/mm/r4xx0.c @@ -44,17 +44,7 @@ static unsigned int scache_size, sc_lsize; /* Again, in bytes */ #undef DEBUG_CACHE -/* - * Dummy cache handling routines for machines without boardcaches - */ -static void no_sc_noop(void) {} - -static struct bcache_ops no_sc_ops = { - (void *)no_sc_noop, (void *)no_sc_noop, - (void *)no_sc_noop, (void *)no_sc_noop -}; - -struct bcache_ops *bcops = &no_sc_ops; +DECLARE_BCOPS; /* * On processors with QED R4600 style two set assosicative cache @@ -2008,7 +1998,7 @@ r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size) } __restore_flags(flags); } - bcops->bc_wback_inv(addr, size); + bc_wback_inv(addr, size); } static void @@ -2053,7 +2043,7 @@ r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size) __restore_flags(flags); } - bcops->bc_inv(addr, size); + bc_inv(addr, size); } static void diff --git a/arch/mips/sgi/kernel/setup.c b/arch/mips/sgi/kernel/setup.c index a1d4ca08e..051364fe3 100644 --- a/arch/mips/sgi/kernel/setup.c +++ b/arch/mips/sgi/kernel/setup.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include diff --git a/arch/mips/sni/pcimt_scache.c b/arch/mips/sni/pcimt_scache.c index ce9366a20..f0dd3fff4 100644 --- a/arch/mips/sni/pcimt_scache.c +++ b/arch/mips/sni/pcimt_scache.c @@ -16,6 +16,13 @@ #define cacheconf (*(volatile unsigned int *)PCIMT_CACHECONF) #define invspace (*(volatile unsigned int *)PCIMT_INVSPACE) +static void no_sc_noop(void) {} + +static struct bcache_ops sni_pcimt_sc_ops = { + (void *)no_sc_noop, (void *)no_sc_noop, + (void *)no_sc_noop, (void *)no_sc_noop +}; + void __init sni_pcimt_sc_init(void) { unsigned int scsiz, sc_size; @@ -35,4 +42,6 @@ void __init sni_pcimt_sc_init(void) sc_size = 128 << scsiz; printk("%dkb second level cache detected, deactivating.\n", sc_size); cacheconf = 0; + + bcops = &sni_pcimt_sc_ops; } diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c index f174c7efd..bcfc3efd8 100644 --- a/arch/mips/sni/setup.c +++ b/arch/mips/sni/setup.c @@ -22,7 +22,6 @@ #include #include -#include #include #include #include -- cgit v1.2.3