From 27cfca1ec98e91261b1a5355d10a8996464b63af Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 17 Mar 1998 22:05:47 +0000 Subject: Look Ma' what I found on my harddisk ... o New faster syscalls for 2.1.x, too o Upgrade to 2.1.89. Don't try to run this. It's flaky as hell. But feel free to debug ... --- include/asm-arm/proc-armo/assembler.h | 88 +++++++ include/asm-arm/proc-armo/mm-init-flat.h | 82 +++++++ include/asm-arm/proc-armo/mm-init.h | 130 ++++++++++ include/asm-arm/proc-armo/page.h | 69 ++++++ include/asm-arm/proc-armo/param.h | 27 +++ include/asm-arm/proc-armo/pgtable-flat.h | 307 +++++++++++++++++++++++ include/asm-arm/proc-armo/pgtable.h | 403 +++++++++++++++++++++++++++++++ include/asm-arm/proc-armo/processor.h | 118 +++++++++ include/asm-arm/proc-armo/ptrace.h | 65 +++++ include/asm-arm/proc-armo/semaphore.h | 83 +++++++ include/asm-arm/proc-armo/shmparam.h | 18 ++ include/asm-arm/proc-armo/system.h | 124 ++++++++++ include/asm-arm/proc-armo/uaccess.h | 140 +++++++++++ include/asm-arm/proc-armo/uncompress.h | 7 + 14 files changed, 1661 insertions(+) create mode 100644 include/asm-arm/proc-armo/assembler.h create mode 100644 include/asm-arm/proc-armo/mm-init-flat.h create mode 100644 include/asm-arm/proc-armo/mm-init.h create mode 100644 include/asm-arm/proc-armo/page.h create mode 100644 include/asm-arm/proc-armo/param.h create mode 100644 include/asm-arm/proc-armo/pgtable-flat.h create mode 100644 include/asm-arm/proc-armo/pgtable.h create mode 100644 include/asm-arm/proc-armo/processor.h create mode 100644 include/asm-arm/proc-armo/ptrace.h create mode 100644 include/asm-arm/proc-armo/semaphore.h create mode 100644 include/asm-arm/proc-armo/shmparam.h create mode 100644 include/asm-arm/proc-armo/system.h create mode 100644 include/asm-arm/proc-armo/uaccess.h create mode 100644 include/asm-arm/proc-armo/uncompress.h (limited to 'include/asm-arm/proc-armo') diff --git a/include/asm-arm/proc-armo/assembler.h b/include/asm-arm/proc-armo/assembler.h new file mode 100644 index 000000000..5b9e7c058 --- /dev/null +++ b/include/asm-arm/proc-armo/assembler.h @@ -0,0 +1,88 @@ +/* + * linux/asm-arm/proc-armo/assembler.h + * + * Copyright (C) 1996 Russell King + * + * This file contains arm architecture specific defines + * for the different processors + */ + +/* + * LOADREGS: multiple register load (ldm) with pc in register list + * (takes account of ARM6 not using ^) + * + * RETINSTR: return instruction: adds the 's' in at the end of the + * instruction if this is not an ARM6 + * + * SAVEIRQS: save IRQ state (not required on ARM2/ARM3 - done + * implicitly + * + * RESTOREIRQS: restore IRQ state (not required on ARM2/ARM3 - done + * implicitly with ldm ... ^ or movs. + * + * These next two need thinking about - can't easily use stack... (see system.S) + * DISABLEIRQS: disable IRQS in SVC mode + * + * ENABLEIRQS: enable IRQS in SVC mode + * + * USERMODE: switch to USER mode + * + * SVCMODE: switch to SVC mode + */ + +#define N_BIT (1 << 31) +#define Z_BIT (1 << 30) +#define C_BIT (1 << 29) +#define V_BIT (1 << 28) + +#define PCMASK 0xfc000003 + +#ifdef __ASSEMBLER__ + +#define I_BIT (1 << 27) +#define F_BIT (1 << 26) + +#define MODE_USR 0 +#define MODE_FIQ 1 +#define MODE_IRQ 2 +#define MODE_SVC 3 + +#define DEFAULT_FIQ MODE_FIQ + +#define LOADREGS(cond, base, reglist...)\ + ldm##cond base,reglist^ + +#define RETINSTR(instr, regs...)\ + instr##s regs + +#define MODENOP\ + mov r0, r0 + +#define MODE(savereg,tmpreg,mode) \ + mov savereg, pc; \ + bic tmpreg, savereg, $0x0c000003; \ + orr tmpreg, tmpreg, $mode; \ + teqp tmpreg, $0 + +#define RESTOREMODE(savereg) \ + teqp savereg, $0 + +#define SAVEIRQS(tmpreg) + +#define RESTOREIRQS(tmpreg) + +#define DISABLEIRQS(tmpreg)\ + teqp pc, $0x08000003 + +#define ENABLEIRQS(tmpreg)\ + teqp pc, $0x00000003 + +#define USERMODE(tmpreg)\ + teqp pc, $0x00000000;\ + mov r0, r0 + +#define SVCMODE(tmpreg)\ + teqp pc, $0x00000003;\ + mov r0, r0 + +#endif diff --git a/include/asm-arm/proc-armo/mm-init-flat.h b/include/asm-arm/proc-armo/mm-init-flat.h new file mode 100644 index 000000000..919ef59a4 --- /dev/null +++ b/include/asm-arm/proc-armo/mm-init-flat.h @@ -0,0 +1,82 @@ +/* + * linux/include/asm-arm/proc-armo/mmap.h + * + * Copyright (C) 1996 Russell King + * + * This contains the code to setup the memory map on an ARM2/ARM250/ARM3 + * machine. This is both processor & architecture specific, and requires + * some more work to get it to fit into our separate processor and + * architecture structure. + */ + +static unsigned long phys_screen_end; +int page_nr; + +#define setup_processor_functions() + +/* + * This routine needs more work to make it dynamically release/allocate mem! + */ +unsigned long map_screen_mem(unsigned long log_start, unsigned long kmem, int update) +{ + static int updated = 0; + unsigned long address = SCREEN_START, i; + pgd_t *pg_dir; + pmd_t *pm_dir; + pte_t *pt_entry; + + if (updated) + return 0; + updated = update; + + pg_dir = swapper_pg_dir + (SCREEN1_BASE >> PGDIR_SHIFT); + pm_dir = pmd_offset(pg_dir, SCREEN1_BASE); + pt_entry = pte_offset(pm_dir, SCREEN1_BASE); + + for (i = SCREEN1_BASE; i < SCREEN1_END; i += PAGE_SIZE) { + if (i >= log_start) { + *pt_entry = mk_pte(address, __pgprot(_PAGE_PRESENT)); + address += PAGE_SIZE; + } else + *pt_entry = mk_pte(0, __pgprot(0)); + pt_entry++; + } + phys_screen_end = address; + if (update) + flush_tlb_all (); + return kmem; +} + +static inline unsigned long setup_pagetables(unsigned long start_mem, unsigned long end_mem) +{ + unsigned long address; + unsigned int spi; + + page_nr = MAP_NR(end_mem); + + /* Allocate zero page */ + address = PAGE_OFFSET + 480*1024; + for (spi = 0; spi < 32768 >> PAGE_SHIFT; spi++) { + pgd_val(swapper_pg_dir[spi]) = pte_val(mk_pte(address, PAGE_READONLY)); + address += PAGE_SIZE; + } + + while (spi < (PAGE_OFFSET >> PGDIR_SHIFT)) + pgd_val(swapper_pg_dir[spi++]) = 0; + + map_screen_mem (SCREEN1_END - 480*1024, 0, 0); + return start_mem; +} + +static inline void mark_usable_memory_areas(unsigned long *start_mem, unsigned long end_mem) +{ + unsigned long smem = PAGE_ALIGN(*start_mem); + + while (smem < end_mem) { + clear_bit(PG_reserved, &mem_map[MAP_NR(smem)].flags); + smem += PAGE_SIZE; + } + + for (smem = phys_screen_end; smem < SCREEN2_END; smem += PAGE_SIZE) + clear_bit(PG_reserved, &mem_map[MAP_NR(smem)].flags); +} diff --git a/include/asm-arm/proc-armo/mm-init.h b/include/asm-arm/proc-armo/mm-init.h new file mode 100644 index 000000000..2cf40e9da --- /dev/null +++ b/include/asm-arm/proc-armo/mm-init.h @@ -0,0 +1,130 @@ +/* + * linux/include/asm-arm/proc-armo/mm-init.h + * + * Copyright (C) 1996 Russell King + * + * This contains the code to setup the memory map on an ARM2/ARM250/ARM3 + * machine. This is both processor & architecture specific, and requires + * some more work to get it to fit into our separate processor and + * architecture structure. + */ + +static unsigned long phys_screen_end; +int page_nr; + +#define setup_processor_functions() +#define PTE_SIZE (PTRS_PER_PTE * BYTES_PER_PTR) + +static inline void setup_swapper_dir (int index, pte_t *ptep) +{ + set_pmd (pmd_offset (swapper_pg_dir + index, 0), mk_pmd (ptep)); +} + +/* + * This routine needs more work to make it dynamically release/allocate mem! + */ +unsigned long map_screen_mem(unsigned long log_start, unsigned long kmem, int update) +{ + static int updated = 0; + + if (updated) + return 0; + + updated = update; + + if (update) { + unsigned long address = log_start, offset; + pgd_t *pgdp; + + kmem = (kmem + 3) & ~3; + + pgdp = pgd_offset (&init_mm, address); /* +31 */ + offset = SCREEN_START; + while (address < SCREEN1_END) { + unsigned long addr_pmd, end_pmd; + pmd_t *pmdp; + + /* if (pgd_none (*pgdp)) alloc pmd */ + pmdp = pmd_offset (pgdp, address); /* +0 */ + addr_pmd = address & ~PGDIR_MASK; /* 088000 */ + end_pmd = addr_pmd + SCREEN1_END - address; /* 100000 */ + if (end_pmd > PGDIR_SIZE) + end_pmd = PGDIR_SIZE; + + do { + unsigned long addr_pte, end_pte; + pte_t *ptep; + + if (pmd_none (*pmdp)) { + pte_t *new_pte = (pte_t *)kmem; + kmem += PTRS_PER_PTE * BYTES_PER_PTR; + memzero (new_pte, PTRS_PER_PTE * BYTES_PER_PTR); + set_pmd (pmdp, mk_pmd(new_pte)); + } + + ptep = pte_offset (pmdp, addr_pmd); /* +11 */ + addr_pte = addr_pmd & ~PMD_MASK; /* 088000 */ + end_pte = addr_pte + end_pmd - addr_pmd; /* 100000 */ + if (end_pte > PMD_SIZE) + end_pte = PMD_SIZE; + + do { + set_pte (ptep, mk_pte(offset, PAGE_KERNEL)); + addr_pte += PAGE_SIZE; + offset += PAGE_SIZE; + ptep++; + } while (addr_pte < end_pte); + + pmdp++; + addr_pmd = (addr_pmd + PMD_SIZE) & PMD_MASK; + } while (addr_pmd < end_pmd); + + address = (address + PGDIR_SIZE) & PGDIR_MASK; + pgdp ++; + } + + phys_screen_end = offset; + flush_tlb_all (); + update_mm_cache_all (); + } + return kmem; +} + +static inline unsigned long setup_pagetables(unsigned long start_mem, unsigned long end_mem) +{ + unsigned int i; + union {unsigned long l; pte_t *pte; } u; + + page_nr = MAP_NR(end_mem); + + /* map in pages for (0x0000 - 0x8000) */ + u.l = ((start_mem + (PTE_SIZE-1)) & ~(PTE_SIZE-1)); + start_mem = u.l + PTE_SIZE; + memzero (u.pte, PTE_SIZE); + u.pte[0] = mk_pte(PAGE_OFFSET + 491520, PAGE_READONLY); + setup_swapper_dir (0, u.pte); + + for (i = 1; i < PTRS_PER_PGD; i++) + pgd_val(swapper_pg_dir[i]) = 0; + + /* now map screen mem in */ + phys_screen_end = SCREEN2_END; + map_screen_mem (SCREEN1_END - 480*1024, 0, 0); + + return start_mem; +} + +static inline void mark_usable_memory_areas(unsigned long *start_mem, unsigned long end_mem) +{ + unsigned long smem; + + *start_mem = smem = PAGE_ALIGN(*start_mem); + + while (smem < end_mem) { + clear_bit(PG_reserved, &mem_map[MAP_NR(smem)].flags); + smem += PAGE_SIZE; + } + + for (smem = phys_screen_end; smem < SCREEN2_END; smem += PAGE_SIZE) + clear_bit(PG_reserved, &mem_map[MAP_NR(smem)].flags); +} diff --git a/include/asm-arm/proc-armo/page.h b/include/asm-arm/proc-armo/page.h new file mode 100644 index 000000000..058d7e9bd --- /dev/null +++ b/include/asm-arm/proc-armo/page.h @@ -0,0 +1,69 @@ +/* + * linux/include/asm-arm/proc-armo/page.h + * + * Copyright (C) 1995, 1996 Russell King + */ + +#ifndef __ASM_PROC_PAGE_H +#define __ASM_PROC_PAGE_H + +/* PAGE_SHIFT determines the page size */ +#define PAGE_SHIFT 15 +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +#ifdef __KERNEL__ + +#define STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* + * These are used to make use of C type-checking.. + */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long pmd; } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgd(x) ((pgd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef unsigned long pte_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#endif + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + +/* This handles the memory map.. */ +#define PAGE_OFFSET 0x02000000 +#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT) + +#endif /* __KERNEL__ */ + +#endif /* __ASM_PROC_PAGE_H */ + diff --git a/include/asm-arm/proc-armo/param.h b/include/asm-arm/proc-armo/param.h new file mode 100644 index 000000000..230511003 --- /dev/null +++ b/include/asm-arm/proc-armo/param.h @@ -0,0 +1,27 @@ +/* + * linux/include/asm-arm/proc-armo/param.h + * + * Copyright (C) 1995, 1996 Russell King + */ + +#ifndef __ASM_PROC_PARAM_H +#define __ASM_PROC_PARAM_H + +#ifndef HZ +#define HZ 100 +#endif + +#define EXEC_PAGESIZE 32768 + +#ifndef NGROUPS +#define NGROUPS 32 +#endif + +#ifndef NOGROUP +#define NOGROUP (-1) +#endif + +#define MAXHOSTNAMELEN 64 /* max length of hostname */ + +#endif + diff --git a/include/asm-arm/proc-armo/pgtable-flat.h b/include/asm-arm/proc-armo/pgtable-flat.h new file mode 100644 index 000000000..994fa9f21 --- /dev/null +++ b/include/asm-arm/proc-armo/pgtable-flat.h @@ -0,0 +1,307 @@ +/* + * linux/include/asm-arm/proc-armo/pgtable.h + * + * Copyright (C) 1995, 1996 Russell King + */ +#ifndef __ASM_PROC_PGTABLE_H +#define __ASM_PROC_PGTABLE_H + +#include + +#define LIBRARY_TEXT_START 0x0c000000 + +/* + * Cache flushing... + */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_range(mm,start,end) do { } while (0) +#define flush_cache_page(vma,vmaddr) do { } while (0) +#define flush_page_to_ram(page) do { } while (0) + +/* + * TLB flushing: + * + * - flush_tlb() flushes the current mm struct TLBs + * - flush_tlb_all() flushes all processes TLBs + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_range(mm, start, end) flushes a range of pages + */ + +#define flush_tlb() flush_tlb_mm(current->mm) + +extern __inline__ void flush_tlb_all(void) +{ + struct task_struct *p; + + p = &init_task; + do { + processor.u.armv2._update_map(p); + p = p->next_task; + } while (p != &init_task); + + processor.u.armv2._remap_memc (current); +} + +extern __inline__ void flush_tlb_mm(struct mm_struct *mm) +{ + struct task_struct *p; + + p = &init_task; + do { + if (p->mm == mm) + processor.u.armv2._update_map(p); + p = p->next_task; + } while (p != &init_task); + + if (current->mm == mm) + processor.u.armv2._remap_memc (current); +} + +#define flush_tlb_range(mm, start, end) flush_tlb_mm(mm) +#define flush_tlb_page(vma, vmaddr) flush_tlb_mm(vma->vm_mm) + +#define __flush_entry_to_ram(entry) + +/* Certain architectures need to do special things when pte's + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) + +/* PMD_SHIFT determines the size of the area a second-level page table can map */ +#define PMD_SHIFT PAGE_SHIFT +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define PGDIR_SHIFT PAGE_SHIFT +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* + * entries per page directory level: the arm3 is one-level, so + * we don't really have any PMD or PTE directory physically. + */ +#define PTRS_PER_PTE 1 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 1024 + +/* Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_START 0x01a00000 +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) + +#define _PAGE_PRESENT 0x001 +#define _PAGE_RW 0x002 +#define _PAGE_USER 0x004 +#define _PAGE_PCD 0x010 +#define _PAGE_ACCESSED 0x020 +#define _PAGE_DIRTY 0x040 + +#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) +#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) + +#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED) +#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED) +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED) +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED) + +/* + * The arm can't do page protection for execute, and considers that the same are read. + * Also, write permissions imply read permissions. This is the closest we can get.. + */ +#define __P000 PAGE_NONE +#define __P001 PAGE_READONLY +#define __P010 PAGE_COPY +#define __P011 PAGE_COPY +#define __P100 PAGE_READONLY +#define __P101 PAGE_READONLY +#define __P110 PAGE_COPY +#define __P111 PAGE_COPY + +#define __S000 PAGE_NONE +#define __S001 PAGE_READONLY +#define __S010 PAGE_SHARED +#define __S011 PAGE_SHARED +#define __S100 PAGE_READONLY +#define __S101 PAGE_READONLY +#define __S110 PAGE_SHARED +#define __S111 PAGE_SHARED + +#undef TEST_VERIFY_AREA + +/* + * BAD_PAGE is used for a bogus page. + * + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern pte_t __bad_page(void); +extern unsigned long *empty_zero_page; + +#define BAD_PAGE __bad_page() +#define ZERO_PAGE ((unsigned long) empty_zero_page) + +/* number of bits that fit into a memory pointer */ +#define BYTES_PER_PTR (sizeof(unsigned long)) +#define BITS_PER_PTR (8*BYTES_PER_PTR) + +/* to align the pointer to a pointer address */ +#define PTR_MASK (~(sizeof(void*)-1)) + +/* sizeof(void*)==1<>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) + +/* to set the page-dir */ +#define SET_PAGE_DIR(tsk,pgdir) \ +do { \ + tsk->tss.memmap = (unsigned long)pgdir; \ + processor.u.armv2._update_map(tsk); \ + if ((tsk) == current) \ + processor.u.armv2._remap_memc (current); \ +} while (0) + +extern unsigned long physical_start; +extern unsigned long physical_end; + +extern inline int pte_none(pte_t pte) { return !pte_val(pte); } +extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } +extern inline void pte_clear(pte_t *ptep) { pte_val(*ptep) = 0; } + +extern inline int pmd_none(pmd_t pmd) { return 0; } +extern inline int pmd_bad(pmd_t pmd) { return 0; } +extern inline int pmd_present(pmd_t pmd) { return 1; } +extern inline void pmd_clear(pmd_t * pmdp) { } + +/* + * The "pgd_xxx()" functions here are trivial for a folded two-level + * setup: the pgd is never bad, and a pmd always exists (as it's folded + * into the pgd entry) + */ +extern inline int pgd_none(pgd_t pgd) { return 0; } +extern inline int pgd_bad(pgd_t pgd) { return 0; } +extern inline int pgd_present(pgd_t pgd) { return 1; } +extern inline void pgd_clear(pgd_t * pgdp) { } + +/* + * The following only work if pte_present() is true. + * Undefined behaviour if not.. + */ +extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } +extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } +extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; } +extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } +extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } +#define pte_cacheable(pte) 1 + +extern inline pte_t pte_nocache(pte_t pte) { return pte; } +extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_RW; return pte; } +extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_USER; return pte; } +extern inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_USER; return pte; } +extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; } +extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } +extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pte; } +extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_USER; return pte; } +extern inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) |= _PAGE_USER; return pte; } +extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; } +extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; } + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot) +{ pte_t pte; pte_val(pte) = virt_to_phys(page) | pgprot_val(pgprot); return pte; } + +extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } + +extern inline unsigned long pte_page(pte_t pte) +{ return phys_to_virt(pte_val(pte) & PAGE_MASK); } + +extern inline unsigned long pmd_page(pmd_t pmd) +{ return phys_to_virt(pmd_val(pmd) & PAGE_MASK); } + +/* to find an entry in a page-table-directory */ +extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) +{ + return mm->pgd + (address >> PGDIR_SHIFT); +} + +/* Find an entry in the second-level page table.. */ +#define pmd_offset(dir, address) ((pmd_t *)(dir)) + +/* Find an entry in the third-level page table.. */ +#define pte_offset(dir, address) ((pte_t *)(dir)) + +/* + * Allocate and free page tables. The xxx_kernel() versions are + * used to allocate a kernel page table - this turns on ASN bits + * if any. + */ +extern inline void pte_free_kernel(pte_t * pte) +{ + pte_val(*pte) = 0; +} + +extern inline pte_t * pte_alloc_kernel(pmd_t *pmd, unsigned long address) +{ + return (pte_t *) pmd; +} + +/* + * allocating and freeing a pmd is trivial: the 1-entry pmd is + * inside the pgd, so has no extra memory associated with it. + */ +#define pmd_free_kernel(pmdp) +#define pmd_alloc_kernel(pgd,address) ((pmd_t *)(pgd)) + +#define pte_free(ptep) +#define pte_alloc(pmd,address) ((pte_t *)(pmd)) + +/* + * allocating and freeing a pmd is trivial: the 1-entry pmd is + * inside the pgd, so has no extra memory associated with it. + */ +#define pmd_free(pmd) +#define pmd_alloc(pgd,address) ((pmd_t *)(pgd)) + +extern inline void pgd_free(pgd_t * pgd) +{ + extern void kfree(void *); + kfree((void *)pgd); +} + +extern inline pgd_t * pgd_alloc(void) +{ + pgd_t *pgd; + extern void *kmalloc(unsigned int, int); + + pgd = (pgd_t *) kmalloc(PTRS_PER_PGD * BYTES_PER_PTR, GFP_KERNEL); + if (pgd) + memset(pgd, 0, PTRS_PER_PGD * BYTES_PER_PTR); + return pgd; +} + +extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; + +#define update_mmu_cache(vma,address,pte) processor.u.armv2._update_mmu_cache(vma,address,pte) + +#define SWP_TYPE(entry) (((entry) >> 1) & 0x7f) +#define SWP_OFFSET(entry) ((entry) >> 8) +#define SWP_ENTRY(type,offset) (((type) << 1) | ((offset) << 8)) + +#endif /* __ASM_PROC_PAGE_H */ + diff --git a/include/asm-arm/proc-armo/pgtable.h b/include/asm-arm/proc-armo/pgtable.h new file mode 100644 index 000000000..3fdb824e7 --- /dev/null +++ b/include/asm-arm/proc-armo/pgtable.h @@ -0,0 +1,403 @@ +/* + * linux/include/asm-arm/proc-armo/pgtable.h + * + * Copyright (C) 1995, 1996 Russell King + * Modified 18/19-Oct-1997 for two-level page table + */ +#ifndef __ASM_PROC_PGTABLE_H +#define __ASM_PROC_PGTABLE_H + +#include +#include + +#define LIBRARY_TEXT_START 0x0c000000 + +/* + * Cache flushing... + */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_range(mm,start,end) do { } while (0) +#define flush_cache_page(vma,vmaddr) do { } while (0) +#define flush_page_to_ram(page) do { } while (0) +#define flush_icache_range(start,end) do { } while (0) + +/* + * TLB flushing: + * + * - flush_tlb() flushes the current mm struct TLBs + * - flush_tlb_all() flushes all processes TLBs + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_range(mm, start, end) flushes a range of pages + */ +#define flush_tlb() do { } while (0) +#define flush_tlb_all() do { } while (0) +#define flush_tlb_mm(mm) do { } while (0) +#define flush_tlb_range(mm, start, end) do { } while (0) +#define flush_tlb_page(vma, vmaddr) do { } while (0) + +/* + * We have a mem map cache... + */ +extern __inline__ void update_mm_cache_all(void) +{ + struct task_struct *p; + + p = &init_task; + do { + processor.u.armv2._update_map(p); + p = p->next_task; + } while (p != &init_task); + + processor.u.armv2._remap_memc (current); +} + +extern __inline__ void update_mm_cache_task(struct task_struct *tsk) +{ + processor.u.armv2._update_map(tsk); + + if (tsk == current) + processor.u.armv2._remap_memc (tsk); +} + +extern __inline__ void update_mm_cache_mm(struct mm_struct *mm) +{ + struct task_struct *p; + + p = &init_task; + do { + if (p->mm == mm) + processor.u.armv2._update_map(p); + p = p->next_task; + } while (p != &init_task); + + if (current->mm == mm) + processor.u.armv2._remap_memc (current); +} + +extern __inline__ void update_mm_cache_mm_addr(struct mm_struct *mm, unsigned long addr, pte_t pte) +{ + struct task_struct *p; + + p = &init_task; + do { + if (p->mm == mm) + processor.u.armv2._update_mmu_cache(p, addr, pte); + p = p->next_task; + } while (p != &init_task); + + if (current->mm == mm) + processor.u.armv2._remap_memc (current); +} + +#define __flush_entry_to_ram(entry) + +/* Certain architectures need to do special things when pte's + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +/* PMD_SHIFT determines the size of the area a second-level page table can map */ +#define PMD_SHIFT 20 +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define PGDIR_SHIFT 20 +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* + * entries per page directory level: the arm3 is one-level, so + * we don't really have any PMD or PTE directory physically. + * + * 18-Oct-1997 RMK Now two-level (32x32) + */ +#define PTRS_PER_PTE 32 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 32 + +/* Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_START 0x01a00000 +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) + +#define _PAGE_PRESENT 0x01 +#define _PAGE_READONLY 0x02 +#define _PAGE_NOT_USER 0x04 +#define _PAGE_OLD 0x08 +#define _PAGE_CLEAN 0x10 + +#define _PAGE_TABLE (_PAGE_PRESENT) +#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN) + +/* -- present -- -- !dirty -- --- !write --- ---- !user --- */ +#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY | _PAGE_NOT_USER) +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_CLEAN ) +#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY ) +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY ) +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_NOT_USER) + +/* + * The arm can't do page protection for execute, and considers that the same are read. + * Also, write permissions imply read permissions. This is the closest we can get.. + */ +#define __P000 PAGE_NONE +#define __P001 PAGE_READONLY +#define __P010 PAGE_COPY +#define __P011 PAGE_COPY +#define __P100 PAGE_READONLY +#define __P101 PAGE_READONLY +#define __P110 PAGE_COPY +#define __P111 PAGE_COPY + +#define __S000 PAGE_NONE +#define __S001 PAGE_READONLY +#define __S010 PAGE_SHARED +#define __S011 PAGE_SHARED +#define __S100 PAGE_READONLY +#define __S101 PAGE_READONLY +#define __S110 PAGE_SHARED +#define __S111 PAGE_SHARED + +#undef TEST_VERIFY_AREA + +extern unsigned long *empty_zero_page; + +/* + * BAD_PAGETABLE is used when we need a bogus page-table, while + * BAD_PAGE is used for a bogus page. + * + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern pte_t __bad_page(void); +extern pte_t *__bad_pagetable(void); + +#define BAD_PAGETABLE __bad_pagetable() +#define BAD_PAGE __bad_page() +#define ZERO_PAGE ((unsigned long) empty_zero_page) + +/* number of bits that fit into a memory pointer */ +#define BYTES_PER_PTR (sizeof(unsigned long)) +#define BITS_PER_PTR (8*BYTES_PER_PTR) + +/* to align the pointer to a pointer address */ +#define PTR_MASK (~(sizeof(void*)-1)) + +/* sizeof(void*)==1<>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK) + +/* to set the page-dir */ +#define SET_PAGE_DIR(tsk,pgdir) \ +do { \ + tsk->tss.memmap = (unsigned long)pgdir; \ + processor.u.armv2._update_map(tsk); \ + if ((tsk) == current) \ + processor.u.armv2._remap_memc (current); \ +} while (0) + +extern unsigned long physical_start; +extern unsigned long physical_end; + +#define pte_none(pte) (!pte_val(pte)) +#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) +#define pte_clear(ptep) set_pte((ptep), __pte(0)) + +#define pmd_none(pmd) (!pmd_val(pmd)) +#define pmd_bad(pmd) ((pmd_val(pmd) & 0xfc000002)) +#define pmd_present(pmd) (pmd_val(pmd) & _PAGE_PRESENT) +#define pmd_clear(pmdp) set_pmd(pmdp, __pmd(0)) + +/* + * The "pgd_xxx()" functions here are trivial for a folded two-level + * setup: the pgd is never bad, and a pmd always exists (as it's folded + * into the pgd entry) + */ +#define pgd_none(pgd) (0) +#define pgd_bad(pgd) (0) +#define pgd_present(pgd) (1) +#define pgd_clear(pgdp) + +/* + * The following only work if pte_present() is true. + * Undefined behaviour if not.. + */ +extern inline int pte_read(pte_t pte) { return !(pte_val(pte) & _PAGE_NOT_USER); } +extern inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_READONLY); } +extern inline int pte_exec(pte_t pte) { return !(pte_val(pte) & _PAGE_NOT_USER); } +extern inline int pte_dirty(pte_t pte) { return !(pte_val(pte) & _PAGE_CLEAN); } +extern inline int pte_young(pte_t pte) { return !(pte_val(pte) & _PAGE_OLD); } +#define pte_cacheable(pte) 1 + +extern inline pte_t pte_nocache(pte_t pte) { return pte; } +extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_READONLY; return pte; } +extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) |= _PAGE_NOT_USER; return pte; } +extern inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) |= _PAGE_NOT_USER; return pte; } +extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) |= _PAGE_CLEAN; return pte; } +extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) |= _PAGE_OLD; return pte; } + +extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_READONLY; return pte; } +extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; } +extern inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; } +extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) &= ~_PAGE_CLEAN; return pte; } +extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) &= ~_PAGE_OLD; return pte; } + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +extern __inline__ pte_t mk_pte(unsigned long page, pgprot_t pgprot) +{ + pte_t pte; + pte_val(pte) = __virt_to_phys(page) | pgprot_val(pgprot); + return pte; +} + +/* This takes a physical page address that is used by the remapping functions */ +extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) +{ + pte_t pte; + pte_val(pte) = physpage + pgprot_val(pgprot); + return pte; +} + +extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); + return pte; +} + +#define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) + +extern __inline__ unsigned long pte_page(pte_t pte) +{ + return __phys_to_virt(pte_val(pte) & PAGE_MASK); +} + +extern __inline__ pmd_t mk_pmd (pte_t *ptep) +{ + pmd_t pmd; + pmd_val(pmd) = __virt_to_phys((unsigned long)ptep) | _PAGE_TABLE; + return pmd; +} + +#define set_pmd(pmdp,pmd) ((*(pmdp)) = (pmd)) + +extern __inline__ unsigned long pmd_page(pmd_t pmd) +{ + return __phys_to_virt(pmd_val(pmd) & ~_PAGE_TABLE); +} + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* to find an entry in a page-table-directory */ +extern __inline__ pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address) +{ + return mm->pgd + (address >> PGDIR_SHIFT); +} + +/* Find an entry in the second-level page table.. */ +#define pmd_offset(dir, address) ((pmd_t *)(dir)) + +/* Find an entry in the third-level page table.. */ +extern __inline__ pte_t * pte_offset(pmd_t *dir, unsigned long address) +{ + return (pte_t *)pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); +} + +/* + * Allocate and free page tables. The xxx_kernel() versions are + * used to allocate a kernel page table - this turns on ASN bits + * if any. + */ +#define pte_free_kernel(pte) pte_free((pte)) +#define pte_alloc_kernel(pmd,address) pte_alloc((pmd),(address)) + +/* + * allocating and freeing a pmd is trivial: the 1-entry pmd is + * inside the pgd, so has no extra memory associated with it. + */ +#define pmd_free_kernel(pmdp) +#define pmd_alloc_kernel(pgd,address) ((pmd_t *)(pgd)) + +extern __inline__ void pte_free(pte_t * pte) +{ + kfree (pte); +} + +extern const char bad_pmd_string[]; + +extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address) +{ + address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); + + if (pmd_none (*pmd)) { + pte_t *page = (pte_t *) kmalloc (PTRS_PER_PTE * BYTES_PER_PTR, GFP_KERNEL); + if (pmd_none (*pmd)) { + if (page) { + memzero (page, PTRS_PER_PTE * BYTES_PER_PTR); + set_pmd(pmd, mk_pmd(page)); + return page + address; + } + set_pmd (pmd, mk_pmd (BAD_PAGETABLE)); + return NULL; + } + kfree (page); + } + if (pmd_bad (*pmd)) { + printk(bad_pmd_string, pmd_val(*pmd)); + set_pmd (pmd, mk_pmd (BAD_PAGETABLE)); + return NULL; + } + return (pte_t *) pmd_page(*pmd) + address; +} + +/* + * allocating and freeing a pmd is trivial: the 1-entry pmd is + * inside the pgd, so has no extra memory associated with it. + */ +#define pmd_free(pmd) +#define pmd_alloc(pgd,address) ((pmd_t *)(pgd)) + +/* + * Free a page directory. Takes the virtual address. + */ +extern __inline__ void pgd_free(pgd_t * pgd) +{ + kfree ((void *)pgd); +} + +/* + * Allocate a new page directory. Return the virtual address of it. + */ +extern __inline__ pgd_t * pgd_alloc(void) +{ + pgd_t *pgd; + + pgd = (pgd_t *) kmalloc(PTRS_PER_PGD * BYTES_PER_PTR, GFP_KERNEL); + if (pgd) + memzero (pgd, PTRS_PER_PGD * BYTES_PER_PTR); + return pgd; +} + +extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; + +#define update_mmu_cache(vma,address,pte) + +#define SWP_TYPE(entry) (((entry) >> 1) & 0x7f) +#define SWP_OFFSET(entry) ((entry) >> 8) +#define SWP_ENTRY(type,offset) (((type) << 1) | ((offset) << 8)) + +#endif /* __ASM_PROC_PAGE_H */ + diff --git a/include/asm-arm/proc-armo/processor.h b/include/asm-arm/proc-armo/processor.h new file mode 100644 index 000000000..0da437ff7 --- /dev/null +++ b/include/asm-arm/proc-armo/processor.h @@ -0,0 +1,118 @@ +/* + * linux/include/asm-arm/proc-armo/processor.h + * + * Copyright (c) 1996 Russell King. + * + * Changelog: + * 27-06-1996 RMK Created + * 10-10-1996 RMK Brought up to date with SA110 + * 26-09-1996 RMK Added 'EXTRA_THREAD_STRUCT*' + * 28-09-1996 RMK Moved start_thread into the processor dependencies + * 11-01-1998 RMK Added new uaccess_t + */ +#ifndef __ASM_PROC_PROCESSOR_H +#define __ASM_PROC_PROCESSOR_H + +#ifdef __KERNEL__ + +#include +#include + +#define KERNEL_STACK_SIZE 4096 + +/* + * on arm2,3 wp does not work + */ +#define wp_works_ok 0 +#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ + +struct context_save_struct { + unsigned long r4; + unsigned long r5; + unsigned long r6; + unsigned long r7; + unsigned long r8; + unsigned long r9; + unsigned long fp; + unsigned long pc; +}; + +typedef struct { + void (*put_byte)(void); /* Special calling convention */ + void (*get_byte)(void); /* Special calling convention */ + void (*put_half)(void); /* Special calling convention */ + void (*get_half)(void); /* Special calling convention */ + void (*put_word)(void); /* Special calling convention */ + void (*get_word)(void); /* Special calling convention */ + unsigned long (*copy_from_user)(void *to, const void *from, unsigned long sz); + unsigned long (*copy_to_user)(void *to, const void *from, unsigned long sz); + unsigned long (*clear_user)(void *addr, unsigned long sz); + unsigned long (*strncpy_from_user)(char *to, const char *from, unsigned long sz); + unsigned long (*strlen_user)(const char *s); +} uaccess_t; + +extern uaccess_t uaccess_user, uaccess_kernel; + +#define EXTRA_THREAD_STRUCT \ + uaccess_t *uaccess; /* User access functions*/ \ + struct context_save_struct *save; \ + unsigned long memmap; \ + unsigned long memcmap[256]; + +#define EXTRA_THREAD_STRUCT_INIT \ + &uaccess_kernel, \ + 0, \ + (unsigned long) swapper_pg_dir, \ + { 0, } + +DECLARE_THREAD_STRUCT; + +/* + * Return saved PC of a blocked thread. + */ +extern __inline__ unsigned long thread_saved_pc (struct thread_struct *t) +{ + if (t->save) + return t->save->pc & ~PCMASK; + else + return 0; +} + +extern __inline__ unsigned long get_css_fp (struct thread_struct *t) +{ + if (t->save) + return t->save->fp; + else + return 0; +} + +asmlinkage void ret_from_sys_call(void) __asm__("ret_from_sys_call"); + +extern __inline__ void copy_thread_css (struct context_save_struct *save) +{ + save->r4 = + save->r5 = + save->r6 = + save->r7 = + save->r8 = + save->r9 = + save->fp = 0; + save->pc = ((unsigned long)ret_from_sys_call) | SVC26_MODE; +} + +#define start_thread(regs,pc,sp) \ +({ \ + unsigned long *stack = (unsigned long *)sp; \ + set_fs(USER_DS); \ + memzero(regs->uregs, sizeof (regs->uregs)); \ + regs->ARM_pc = pc; /* pc */ \ + regs->ARM_sp = sp; /* sp */ \ + regs->ARM_r2 = stack[2]; /* r2 (envp) */ \ + regs->ARM_r1 = stack[1]; /* r1 (argv) */ \ + regs->ARM_r0 = stack[0]; /* r0 (argc) */ \ + flush_tlb_mm(current->mm); \ +}) + +#endif + +#endif diff --git a/include/asm-arm/proc-armo/ptrace.h b/include/asm-arm/proc-armo/ptrace.h new file mode 100644 index 000000000..6468fb549 --- /dev/null +++ b/include/asm-arm/proc-armo/ptrace.h @@ -0,0 +1,65 @@ +/* + * linux/include/asm-arm/proc-armo/ptrace.h + * + * Copyright (C) 1996 Russell King + */ + +#ifndef __ASM_PROC_PTRACE_H +#define __ASM_PROC_PTRACE_H + +/* this struct defines the way the registers are stored on the + stack during a system call. */ + +struct pt_regs { + long uregs[17]; +}; + +#define ARM_pc uregs[15] +#define ARM_lr uregs[14] +#define ARM_sp uregs[13] +#define ARM_ip uregs[12] +#define ARM_fp uregs[11] +#define ARM_r10 uregs[10] +#define ARM_r9 uregs[9] +#define ARM_r8 uregs[8] +#define ARM_r7 uregs[7] +#define ARM_r6 uregs[6] +#define ARM_r5 uregs[5] +#define ARM_r4 uregs[4] +#define ARM_r3 uregs[3] +#define ARM_r2 uregs[2] +#define ARM_r1 uregs[1] +#define ARM_r0 uregs[0] +#define ARM_ORIG_r0 uregs[16] /* -1 */ + +#define USR26_MODE 0x00 +#define FIQ26_MODE 0x01 +#define IRQ26_MODE 0x02 +#define SVC26_MODE 0x03 +#define MODE_MASK 0x03 +#define F_BIT (1 << 26) +#define I_BIT (1 << 27) +#define CC_V_BIT (1 << 28) +#define CC_C_BIT (1 << 29) +#define CC_Z_BIT (1 << 30) +#define CC_N_BIT (1 << 31) + +#define user_mode(regs) \ + (((regs)->ARM_pc & MODE_MASK) == USR26_MODE) + +#define processor_mode(regs) \ + ((regs)->ARM_pc & MODE_MASK) + +#define interrupts_enabled(regs) \ + (!((regs)->ARM_pc & I_BIT)) + +#define fast_interrupts_enabled(regs) \ + (!((regs)->ARM_pc & F_BIT)) + +#define condition_codes(regs) \ + ((regs)->ARM_pc & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT)) + +#define instruction_pointer(regs) ((regs)->ARM_pc & 0x03fffffc) +#define pc_pointer(v) ((v) & 0x03fffffc) +#endif + diff --git a/include/asm-arm/proc-armo/semaphore.h b/include/asm-arm/proc-armo/semaphore.h new file mode 100644 index 000000000..483803217 --- /dev/null +++ b/include/asm-arm/proc-armo/semaphore.h @@ -0,0 +1,83 @@ +/* + * linux/include/asm-arm/proc-armo/semaphore.h + */ +#ifndef __ASM_PROC_SEMAPHORE_H +#define __ASM_PROC_SEMAPHORE_H + +/* + * This is ugly, but we want the default case to fall through. + * "__down" is the actual routine that waits... + */ +extern inline void down(struct semaphore * sem) +{ + __asm__ __volatile__ (" + @ atomic down operation + mov r0, pc + orr r1, r0, #0x08000000 + and r0, r0, #0x0c000003 + teqp r1, #0 + ldr r1, [%0] + subs r1, r1, #1 + str r1, [%0] + mov r1, pc, lsr #28 + teqp r0, r1, lsl #28 + movmi r0, %0 + blmi " SYMBOL_NAME_STR(__down) + : : "r" (sem) : "r0", "r1", "r2", "r3", "ip", "lr", "cc"); +} + +/* + * This is ugly, but we want the default case to fall through. + * "__down_interruptible" is the actual routine that waits... + */ +extern inline int down_interruptible (struct semaphore * sem) +{ + int result; + __asm__ __volatile__ (" + @ atomic down operation + mov r0, pc + orr r1, r0, #0x08000000 + and r0, r0, #0x0c000003 + teqp r1, #0 + ldr r1, [%1] + subs r1, r1, #1 + str r1, [%1] + mov r1, pc, lsr #28 + orrmi r0, r0, #0x80000000 @ set N + teqp r0, r1, lsl #28 + movmi r0, %1 + movpl r0, #0 + blmi " SYMBOL_NAME_STR(__down_interruptible) " + mov %0, r0" + : "=r" (result) + : "r" (sem) + : "r0", "r1", "r2", "r3", "ip", "lr", "cc"); + return result; +} + +/* + * Note! This is subtle. We jump to wake people up only if + * the semaphore was negative (== somebody was waiting on it). + * The default case (no contention) will result in NO + * jumps for both down() and up(). + */ +extern inline void up(struct semaphore * sem) +{ + __asm__ __volatile__ (" + @ atomic up operation + mov r0, pc + orr r1, r0, #0x08000000 + and r0, r0, #0x0c000003 + teqp r1, #0 + ldr r1, [%0] + adds r1, r1, #1 + str r1, [%0] + mov r1, pc, lsr #28 + orrls r0, r0, #0x80000000 @ set N + teqp r0, r1, lsl #28 + movmi r0, %0 + blmi " SYMBOL_NAME_STR(__up) + : : "r" (sem) : "r0", "r1", "r2", "r3", "ip", "lr", "cc"); +} + +#endif diff --git a/include/asm-arm/proc-armo/shmparam.h b/include/asm-arm/proc-armo/shmparam.h new file mode 100644 index 000000000..e61096091 --- /dev/null +++ b/include/asm-arm/proc-armo/shmparam.h @@ -0,0 +1,18 @@ +/* + * linux/include/asm-arm/proc-armo/shmparam.h + * + * Copyright (C) 1996 Russell King + * + * definitions for the shared process memory on the ARM3 + */ + +#ifndef __ASM_PROC_SHMPARAM_H +#define __ASM_PROC_SHMPARAM_H + +#ifndef SHM_RANGE_START +#define SHM_RANGE_START 0x00a00000 +#define SHM_RANGE_END 0x00c00000 +#define SHMMAX 0x003fa000 +#endif + +#endif diff --git a/include/asm-arm/proc-armo/system.h b/include/asm-arm/proc-armo/system.h new file mode 100644 index 000000000..a1c2d01cb --- /dev/null +++ b/include/asm-arm/proc-armo/system.h @@ -0,0 +1,124 @@ +/* + * linux/include/asm-arm/proc-armo/system.h + * + * Copyright (C) 1995, 1996 Russell King + */ + +#ifndef __ASM_PROC_SYSTEM_H +#define __ASM_PROC_SYSTEM_H + +extern const char xchg_str[]; + +#include + +extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size) +{ + switch (size) { + case 1: return processor.u.armv2._xchg_1(x, ptr); + case 2: return processor.u.armv2._xchg_2(x, ptr); + case 4: return processor.u.armv2._xchg_4(x, ptr); + default: arm_invalidptr(xchg_str, size); + } +} + +/* + * We need to turn the caches off before calling the reset vector - RiscOS + * messes up if we don't + */ +#define proc_hard_reset() processor._proc_fin() + +/* + * This processor does not idle + */ +#define proc_idle() + +/* + * A couple of speedups for the ARM + */ + +/* + * Save the current interrupt enable state & disable IRQs + */ +#define __save_flags_cli(x) \ + do { \ + unsigned long temp; \ + __asm__ __volatile__( \ +" mov %0, pc\n" \ +" orr %1, %0, #0x08000000\n" \ +" and %0, %0, #0x0c000000\n" \ +" teqp %1, #0\n" \ + : "=r" (x), "=r" (temp) \ + : \ + : "memory"); \ + } while (0) + +/* + * Enable IRQs + */ +#define __sti() \ + do { \ + unsigned long temp; \ + __asm__ __volatile__( \ +" mov %0, pc\n" \ +" bic %0, %0, #0x08000000\n" \ +" teqp %0, #0\n" \ + : "=r" (temp) \ + : \ + : "memory"); \ + } while(0) + +/* + * Disable IRQs + */ +#define __cli() \ + do { \ + unsigned long temp; \ + __asm__ __volatile__( \ +" mov %0, pc\n" \ +" orr %0, %0, #0x08000000\n" \ +" teqp %0, #0\n" \ + : "=r" (temp) \ + : \ + : "memory"); \ + } while(0) + +/* + * save current IRQ & FIQ state + */ +#define __save_flags(x) \ + do { \ + __asm__ __volatile__( \ +" mov %0, pc\n" \ +" and %0, %0, #0x0c000000\n" \ + : "=r" (x)); \ + } while (0) + +/* + * restore saved IRQ & FIQ state + */ +#define __restore_flags(x) \ + do { \ + unsigned long temp; \ + __asm__ __volatile__( \ +" mov %0, pc\n" \ +" bic %0, %0, #0x0c000000\n" \ +" orr %0, %0, %1\n" \ +" teqp %0, #0\n" \ + : "=r" (temp) \ + : "r" (x) \ + : "memory"); \ + } while (0) + +#ifdef __SMP__ +#error SMP not supported +#else + +#define cli() __cli() +#define sti() __sti() +#define save_flags(x) __save_flags(x) +#define restore_flags(x) __restore_flags(x) +#define save_flags_cli(x) __save_flags_cli(x) + +#endif + +#endif diff --git a/include/asm-arm/proc-armo/uaccess.h b/include/asm-arm/proc-armo/uaccess.h new file mode 100644 index 000000000..8d5745aed --- /dev/null +++ b/include/asm-arm/proc-armo/uaccess.h @@ -0,0 +1,140 @@ +/* + * linux/include/asm-arm/proc-armo/segment.h + * + * Copyright (C) 1996 Russell King + */ + +/* + * The fs functions are implemented on the ARM2 and ARM3 architectures + * manually. + * Use *_user functions to access user memory with faulting behaving + * as though the user is accessing the memory. + * Use set_fs(get_ds()) and then the *_user functions to allow them to + * access kernel memory. + */ + +/* + * These are the values used to represent the user `fs' and the kernel `ds' + */ +#define KERNEL_DS 0x03000000 +#define USER_DS 0x02000000 + +#define get_ds() (KERNEL_DS) +#define get_fs() (current->addr_limit) +#define segment_eq(a,b) ((a) == (b)) + +extern uaccess_t uaccess_user, uaccess_kernel; + +extern __inline__ void set_fs (mm_segment_t fs) +{ + current->addr_limit = fs; + current->tss.uaccess = fs == USER_DS ? &uaccess_user : &uaccess_kernel; +} + +#define __range_ok(addr,size) ({ \ + unsigned long flag, sum; \ + __asm__ __volatile__("adds %1, %2, %3; cmpls %1, %0; movls %0, #0" \ + : "=&r" (flag), "=&r" (sum) \ + : "r" (addr), "Ir" (size), "0" (current->addr_limit) \ + : "cc"); \ + flag; }) + +#define __addr_ok(addr) ({ \ + unsigned long flag; \ + __asm__ __volatile__("cmp %2, %0; movlo %0, #0" \ + : "=&r" (flag) \ + : "0" (current->addr_limit), "r" (addr) \ + : "cc"); \ + (flag == 0); }) + +#define access_ok(type,addr,size) (__range_ok(addr,size) == 0) + +#define __put_user_asm_byte(x,addr,err) \ + __asm__ __volatile__( \ + " mov r0, %1\n" \ + " mov r1, %2\n" \ + " mov r2, %0\n" \ + " mov lr, pc\n" \ + " mov pc, %3\n" \ + " mov %0, r2\n" \ + : "=r" (err) \ + : "r" (x), "r" (addr), "r" (current->tss.uaccess->put_byte), \ + "0" (err) \ + : "r0", "r1", "r2", "lr") + +#define __put_user_asm_half(x,addr,err) \ + __asm__ __volatile__( \ + " mov r0, %1\n" \ + " mov r1, %2\n" \ + " mov r2, %0\n" \ + " mov lr, pc\n" \ + " mov pc, %3\n" \ + " mov %0, r2\n" \ + : "=r" (err) \ + : "r" (x), "r" (addr), "r" (current->tss.uaccess->put_half), \ + "0" (err) \ + : "r0", "r1", "r2", "lr") + +#define __put_user_asm_word(x,addr,err) \ + __asm__ __volatile__( \ + " mov r0, %1\n" \ + " mov r1, %2\n" \ + " mov r2, %0\n" \ + " mov lr, pc\n" \ + " mov pc, %3\n" \ + " mov %0, r2\n" \ + : "=r" (err) \ + : "r" (x), "r" (addr), "r" (current->tss.uaccess->put_word), \ + "0" (err) \ + : "r0", "r1", "r2", "lr") + +#define __get_user_asm_byte(x,addr,err) \ + __asm__ __volatile__( \ + " mov r0, %2\n" \ + " mov r1, %0\n" \ + " mov lr, pc\n" \ + " mov pc, %3\n" \ + " mov %0, r1\n" \ + " mov %1, r0\n" \ + : "=r" (err), "=r" (x) \ + : "r" (addr), "r" (current->tss.uaccess->get_byte), "0" (err) \ + : "r0", "r1", "r2", "lr") + +#define __get_user_asm_half(x,addr,err) \ + __asm__ __volatile__( \ + " mov r0, %2\n" \ + " mov r1, %0\n" \ + " mov lr, pc\n" \ + " mov pc, %3\n" \ + " mov %0, r1\n" \ + " mov %1, r0\n" \ + : "=r" (err), "=r" (x) \ + : "r" (addr), "r" (current->tss.uaccess->get_half), "0" (err) \ + : "r0", "r1", "r2", "lr") + +#define __get_user_asm_word(x,addr,err) \ + __asm__ __volatile__( \ + " mov r0, %2\n" \ + " mov r1, %0\n" \ + " mov lr, pc\n" \ + " mov pc, %3\n" \ + " mov %0, r1\n" \ + " mov %1, r0\n" \ + : "=r" (err), "=r" (x) \ + : "r" (addr), "r" (current->tss.uaccess->get_word), "0" (err) \ + : "r0", "r1", "r2", "lr") + +#define __do_copy_from_user(to,from,n) \ + (n) = current->tss.uaccess->copy_from_user((to),(from),(n)) + +#define __do_copy_to_user(to,from,n) \ + (n) = current->tss.uaccess->copy_to_user((to),(from),(n)) + +#define __do_clear_user(addr,sz) \ + (sz) = current->tss.uaccess->clear_user((addr),(sz)) + +#define __do_strncpy_from_user(dst,src,count,res) \ + (res) = current->tss.uaccess->strncpy_from_user(dst,src,count) + +#define __do_strlen_user(s,res) \ + (res) = current->tss.uaccess->strlen_user(s) diff --git a/include/asm-arm/proc-armo/uncompress.h b/include/asm-arm/proc-armo/uncompress.h new file mode 100644 index 000000000..b4edb06f7 --- /dev/null +++ b/include/asm-arm/proc-armo/uncompress.h @@ -0,0 +1,7 @@ +/* + * linux/include/asm-arm/proc-armo/uncompress.h + * + * (c) 1997 Russell King + */ + +#define proc_decomp_setup() -- cgit v1.2.3