From 546db14ee74118296f425f3b91634fb767d67290 Mon Sep 17 00:00:00 2001
From: Ralf Baechle <ralf@linux-mips.org>
Date: Thu, 27 Jan 2000 01:05:20 +0000
Subject: Merge with Linux 2.3.23.  The new bootmem stuff has broken various
 platforms.  At this time I've only verified that IP22 support compiles and
 IP27 actually works.

---
 include/asm-arm/proc-armv/cache.h | 93 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 93 insertions(+)
 create mode 100644 include/asm-arm/proc-armv/cache.h

(limited to 'include/asm-arm/proc-armv/cache.h')

diff --git a/include/asm-arm/proc-armv/cache.h b/include/asm-arm/proc-armv/cache.h
new file mode 100644
index 000000000..9b79c7747
--- /dev/null
+++ b/include/asm-arm/proc-armv/cache.h
@@ -0,0 +1,93 @@
+/*
+ * Cache flushing...
+ */
+#define flush_cache_all()						\
+	cpu_flush_cache_all()
+
+#define flush_cache_mm(_mm)						\
+	do {								\
+		if ((_mm) == current->mm)				\
+			cpu_flush_cache_all();				\
+	} while (0)
+
+#define flush_cache_range(_mm,_start,_end)				\
+	do {								\
+		if ((_mm) == current->mm)				\
+			cpu_flush_cache_area((_start), (_end), 1);	\
+	} while (0)
+
+#define flush_cache_page(_vma,_vmaddr)					\
+	do {								\
+		if ((_vma)->vm_mm == current->mm)			\
+			cpu_flush_cache_area((_vmaddr),			\
+				(_vmaddr) + PAGE_SIZE,			\
+				((_vma)->vm_flags & VM_EXEC));		\
+	} while (0)
+
+#define clean_cache_range(_start,_end)					\
+	do {								\
+		unsigned long _s, _sz;					\
+		_s = (unsigned long)_start;				\
+		_sz = (unsigned long)_end - _s;				\
+		cpu_clean_cache_area(_s, _sz);				\
+	} while (0)
+
+#define clean_cache_area(_start,_size)					\
+	do {								\
+		unsigned long _s;					\
+		_s = (unsigned long)_start;				\
+		cpu_clean_cache_area(_s, _size);			\
+	} while (0)
+
+#define flush_icache_range(_start,_end)					\
+	cpu_flush_icache_area((_start), (_end) - (_start))
+
+/*
+ * We don't have a MEMC chip...
+ */
+#define memc_update_all()		do { } while (0)
+#define memc_update_mm(mm)		do { } while (0)
+#define memc_update_addr(mm,pte,log)	do { } while (0)
+#define memc_clear(mm,physaddr)		do { } while (0)
+
+/*
+ * This flushes back any buffered write data.  We have to clean the entries
+ * in the cache for this page.  This does not invalidate either I or D caches.
+ */
+#define flush_page_to_ram(_page)					\
+	cpu_flush_ram_page((_page) & PAGE_MASK);
+
+/*
+ * TLB flushing:
+ *
+ *  - flush_tlb_all() flushes all processes TLBs
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(mm, start, end) flushes a range of pages
+ *
+ * We drain the write buffer in here to ensure that the page tables in ram
+ * are really up to date.  It is more efficient to do this here...
+ */
+#define flush_tlb_all()								\
+	cpu_flush_tlb_all()
+
+#define flush_tlb_mm(_mm)							\
+	do {									\
+		if ((_mm) == current->mm)					\
+			cpu_flush_tlb_all();					\
+	} while (0)
+
+#define flush_tlb_range(_mm,_start,_end)					\
+	do {									\
+		if ((_mm) == current->mm)					\
+			cpu_flush_tlb_area((_start), (_end), 1);		\
+	} while (0)
+
+#define flush_tlb_page(_vma,_vmaddr)						\
+	do {									\
+		if ((_vma)->vm_mm == current->mm)				\
+			cpu_flush_tlb_page((_vmaddr),				\
+				 ((_vma)->vm_flags & VM_EXEC));			\
+	} while (0)
+
+
-- 
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