From b4b4c1bb8d1207ae76e63d5c273a27b03cad3ca2 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 10 Oct 2000 23:49:14 +0000 Subject: SNI updates, the first in a century ... --- include/asm-mips/sni.h | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) (limited to 'include/asm-mips') diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index 1e2391ddb..fb961478e 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h @@ -30,6 +30,14 @@ #define PCIMT_ERRADDR 0xbfff0040 #define PCIMT_SYNDROME 0xbfff0048 #define PCIMT_ITPEND 0xbfff0050 +#define IT_INT2 0x01 +#define IT_INTD 0x02 +#define IT_INTC 0x04 +#define IT_INTB 0x08 +#define IT_INTA 0x10 +#define IT_EISA 0x20 +#define IT_SCSI 0x40 +#define IT_ETH 0x80 #define PCIMT_IRQSEL 0xbfff0058 #define PCIMT_TESTMEM 0xbfff0060 #define PCIMT_ECCREG 0xbfff0068 @@ -73,16 +81,18 @@ * to the other interrupts generated by ASIC PCI. */ #define PCIMT_KEYBOARD_IRQ 1 -#define PCIMT_IRQ_ETHERNET 16 -#define PCIMT_IRQ_TEMPERATURE 17 -#define PCIMT_IRQ_EISA_NMI 18 -#define PCIMT_IRQ_POWER_OFF 19 -#define PCIMT_IRQ_BUTTON 20 -#define PCIMT_IRQ_INTA 21 -#define PCIMT_IRQ_INTB 22 -#define PCIMT_IRQ_INTC 23 -#define PCIMT_IRQ_INTD 24 -#define PCIMT_IRQ_SCSI 25 +#define PCIMT_IRQ_INT2 16 /* What is that? */ +#define PCIMT_IRQ_INTD 17 +#define PCIMT_IRQ_INTC 18 +#define PCIMT_IRQ_INTB 19 +#define PCIMT_IRQ_INTA 20 +#define PCIMT_IRQ_EISA 21 +#define PCIMT_IRQ_SCSI 22 +#define PCIMT_IRQ_ETHERNET 23 +#define PCIMT_IRQ_TEMPERATURE 24 +#define PCIMT_IRQ_EISA_NMI 25 +#define PCIMT_IRQ_POWER_OFF 26 +#define PCIMT_IRQ_BUTTON 27 /* * Base address for the mapped 16mb EISA bus segment. -- cgit v1.2.3