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/*
 * include/asm-mips/cache.h
 */
#ifndef __ASM_MIPS_CACHE_H
#define __ASM_MIPS_CACHE_H

/* bytes per L1 cache line */
#define        L1_CACHE_BYTES  32      /* a guess */

#define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))

#define        SMP_CACHE_BYTES L1_CACHE_BYTES

#endif /* __ASM_MIPS_CACHE_H */