blob: d22ab4e24ea23ff87a8cb16caaafd870aeb09190 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
|
/*
* include/asm-sh/cache.h
* Copyright 1999 (C) Niibe Yutaka
*/
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
/* bytes per L1 cache line */
#define L1_CACHE_BYTES 16
#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
#define SMP_CACHE_BYTES L1_CACHE_BYTES
#ifdef MODULE
#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))
#else
#define __cacheline_aligned \
__attribute__((__aligned__(L1_CACHE_BYTES), \
__section__(".data.cacheline_aligned")))
#endif
#endif /* __ASM_SH_CACHE_H */
|