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authorGreg Howard <ghoward@sgi.com>2005-04-25 13:28:52 -0700
committerTony Luck <tony.luck@intel.com>2005-04-25 13:28:52 -0700
commit67639deb099c6085acc447c1b7d6a17792dedad0 (patch)
treeb9cdf0d92ff2c02e7ed182a93d7ea270ba752b10 /include/asm-ia64
parentb9e41d7fb62ae26adee84c18048037214ce5d866 (diff)
[IA64] Altix system controller event handling
The following is an update of the patch I sent yesterday (3/9/05) incorporating suggestions from Christoph Hellwig and Andreas Schwab. It allows Altix and Altix-like systems to handle environmental events generated by the system controllers, and should apply on top of Jack Steiner's patch of 3/1/05 ("New chipset support for SN platform") and Mark Goodwin's patch of 3/8/05 ("Altix SN topology support for new chipsets and pci topology"). Signed-off-by: Greg Howard <ghoward@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64')
-rw-r--r--include/asm-ia64/sn/sn_sal.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index 123c1a50a9dc..f914f6da077c 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -64,6 +64,7 @@
#define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
#define SN_SAL_IROUTER_OP 0x02000043
+#define SN_SAL_SYSCTL_EVENT 0x02000044
#define SN_SAL_IOIF_INTERRUPT 0x0200004a
#define SN_SAL_HWPERF_OP 0x02000050 // lock
#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
@@ -850,6 +851,19 @@ ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
return (int) rv.v0;
}
+/*
+ * Set up a node as the point of contact for system controller
+ * environmental event delivery.
+ */
+static inline int
+ia64_sn_sysctl_event_init(nasid_t nasid)
+{
+ struct ia64_sal_retval rv;
+ SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
+ 0, 0, 0, 0, 0, 0);
+ return (int) rv.v0;
+}
+
/**
* ia64_sn_get_fit_compt - read a FIT entry from the PROM header
* @nasid: NASID of node to read