diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2001-04-01 02:54:21 +0000 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2001-04-01 02:54:21 +0000 |
commit | 1eb1d8f4cf7668cf937ad74824c985b88aa62cf3 (patch) | |
tree | a058dba9a0943c3294ce7cefe116f715caf8c964 | |
parent | 5f858d94183211ab76f7f1a1e372433c6b8d5e36 (diff) |
Eleminate CONFIG_CPU_R3912; detect TX39 / R3000 at runtime.
-rw-r--r-- | arch/mips/Makefile | 8 | ||||
-rw-r--r-- | arch/mips/config.in | 9 | ||||
-rw-r--r-- | arch/mips/defconfig | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-atlas | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-ddb5476 | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-decstation | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-ev64120 | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-ev96100 | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-ip22 | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-it8172 | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-malta | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-nino | 306 | ||||
-rw-r--r-- | arch/mips/defconfig-ocelot | 1 | ||||
-rw-r--r-- | arch/mips/defconfig-rm200 | 1 | ||||
-rw-r--r-- | arch/mips/kernel/Makefile | 4 | ||||
-rw-r--r-- | arch/mips/kernel/proc.c | 4 | ||||
-rw-r--r-- | arch/mips/kernel/setup.c | 22 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 4 | ||||
-rw-r--r-- | arch/mips/lib/Makefile | 6 | ||||
-rw-r--r-- | arch/mips/mm/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/mm/loadmmu.c | 16 | ||||
-rw-r--r-- | arch/mips/mm/r2300.c | 237 |
22 files changed, 507 insertions, 121 deletions
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 52f136ef1..0038b0588 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -79,7 +79,7 @@ ifdef CONFIG_CPU_RM7000 GCCFLAGS += -mcpu=r5000 -mips2 -Wa,--trap endif ifdef CONFIG_CPU_SB1 -GCCFLAGS += -mcpu=sb1 -mips2 -Wa,--trap +GCCFLAGS += -mcpu=sb1 -mips2 -Wa,--trap endif ifdef CONFIG_MIPS_FPU_EMULATOR @@ -212,9 +212,8 @@ endif # Philips Nino # ifdef CONFIG_NINO -CORE_FILES += arch/mips/philips/nino/nino.o \ - arch/mips/philips/drivers/drivers.o -SUBDIRS += arch/mips/philips/nino arch/mips/philips/drivers +CORE_FILES += arch/mips/philips/nino/nino.o +SUBDIRS += arch/mips/philips/nino LOADADDR += 0x80000000 endif @@ -288,6 +287,7 @@ archclean: rm -f arch/$(ARCH)/ld.script $(MAKE) -C arch/$(ARCH)/tools clean $(MAKE) -C arch/mips/baget clean + $(MAKE) -C arch/mips/philips/nino clean archmrproper: @$(MAKEBOOT) mrproper diff --git a/arch/mips/config.in b/arch/mips/config.in index bffbad944..1c8b34e0f 100644 --- a/arch/mips/config.in +++ b/arch/mips/config.in @@ -160,6 +160,9 @@ fi if [ "$CONFIG_MIPS_IVR" = "y" ]; then define_bool CONFIG_PCI y fi +if [ "$CONFIG_NINO" = "y" ]; then + define_bool CONFIG_PC_KEYB y +fi if [ "$CONFIG_ISA" != "y" ]; then define_bool CONFIG_ISA n @@ -191,7 +194,6 @@ comment 'CPU selection' choice 'CPU type' \ "R3000 CONFIG_CPU_R3000 \ - R3912 CONFIG_CPU_R3912 \ R6000 CONFIG_CPU_R6000 \ R4300 CONFIG_CPU_R4300 \ R4x00 CONFIG_CPU_R4X00 \ @@ -218,13 +220,8 @@ else define_bool CONFIG_CPU_HAS_WB n fi else - if [ "$CONFIG_CPU_R3912" = "y" ]; then - define_bool CONFIG_CPU_HAS_LLSC n - define_bool CONFIG_CPU_HAS_WB n - else define_bool CONFIG_CPU_HAS_LLSC y define_bool CONFIG_CPU_HAS_WB n - fi fi fi endmenu diff --git a/arch/mips/defconfig b/arch/mips/defconfig index 161d9a0b3..7a46c4a4f 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig @@ -52,7 +52,6 @@ CONFIG_KMOD=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-atlas b/arch/mips/defconfig-atlas index 60615a416..1b8e77256 100644 --- a/arch/mips/defconfig-atlas +++ b/arch/mips/defconfig-atlas @@ -47,7 +47,6 @@ CONFIG_SWAP_IO_SPACE=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-ddb5476 b/arch/mips/defconfig-ddb5476 index 8be2e01a3..f4d7d359d 100644 --- a/arch/mips/defconfig-ddb5476 +++ b/arch/mips/defconfig-ddb5476 @@ -49,7 +49,6 @@ CONFIG_EISA=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-decstation b/arch/mips/defconfig-decstation index e1dc88291..f776e3a52 100644 --- a/arch/mips/defconfig-decstation +++ b/arch/mips/defconfig-decstation @@ -48,7 +48,6 @@ CONFIG_KMOD=y # CPU selection # CONFIG_CPU_R3000=y -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-ev64120 b/arch/mips/defconfig-ev64120 index 7168b6b28..5ec0f7466 100644 --- a/arch/mips/defconfig-ev64120 +++ b/arch/mips/defconfig-ev64120 @@ -54,7 +54,6 @@ CONFIG_MODULES=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-ev96100 b/arch/mips/defconfig-ev96100 index 46677f4a4..8d5f37587 100644 --- a/arch/mips/defconfig-ev96100 +++ b/arch/mips/defconfig-ev96100 @@ -50,7 +50,6 @@ CONFIG_MODULES=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-ip22 b/arch/mips/defconfig-ip22 index 161d9a0b3..7a46c4a4f 100644 --- a/arch/mips/defconfig-ip22 +++ b/arch/mips/defconfig-ip22 @@ -52,7 +52,6 @@ CONFIG_KMOD=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-it8172 b/arch/mips/defconfig-it8172 index e65529358..c976bd34e 100644 --- a/arch/mips/defconfig-it8172 +++ b/arch/mips/defconfig-it8172 @@ -55,7 +55,6 @@ CONFIG_MODULES=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-malta b/arch/mips/defconfig-malta index 04dcae7d8..45a408b61 100644 --- a/arch/mips/defconfig-malta +++ b/arch/mips/defconfig-malta @@ -48,7 +48,6 @@ CONFIG_SWAP_IO_SPACE=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-nino b/arch/mips/defconfig-nino new file mode 100644 index 000000000..8bbb7c010 --- /dev/null +++ b/arch/mips/defconfig-nino @@ -0,0 +1,306 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_MIPS=y +# CONFIG_SMP is not set + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y + +# +# Machine selection +# +# CONFIG_ACER_PICA_61 is not set +# CONFIG_ALGOR_P4032 is not set +# CONFIG_BAGET_MIPS is not set +# CONFIG_DECSTATION is not set +# CONFIG_DDB5074 is not set +# CONFIG_MIPS_EV96100 is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +CONFIG_NINO=y +# CONFIG_NINO_4MB is not set +CONFIG_NINO_8MB=y +# CONFIG_NINO_16MB is not set +# CONFIG_MIPS_MAGNUM_4000 is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_DDB5476 is not set +# CONFIG_OLIVETTI_M700 is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SNI_RM200_PCI is not set +# CONFIG_MIPS_ITE8172 is not set +# CONFIG_MIPS_IVR is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set +CONFIG_PC_KEYB=y +# CONFIG_ISA is not set +# CONFIG_EISA is not set +# CONFIG_PCI is not set +# CONFIG_I8259 is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODVERSIONS is not set +CONFIG_KMOD=y + +# +# CPU selection +# +CONFIG_CPU_R3000=y +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_SB1 is not set +# CONFIG_CPU_MIPS32 is not set +# CONFIG_CPU_ADVANCED is not set +# CONFIG_CPU_HAS_LLSC is not set +# CONFIG_CPU_HAS_WB is not set + +# +# General setup +# +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_MIPS_FPU_EMULATOR=y +CONFIG_KCORE_ELF=y +CONFIG_ELF_KERNEL=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +# CONFIG_NET is not set +# CONFIG_HOTPLUG is not set +# CONFIG_PCMCIA is not set +CONFIG_SYSVIPC=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_SYSCTL is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=2048 +CONFIG_BLK_DEV_INITRD=y + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set +# CONFIG_BLK_DEV_MD is not set +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID5 is not set +# CONFIG_BLK_DEV_LVM is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set +# CONFIG_PHONE_IXJ is not set + +# +# ATA/IDE/MFM/RLL support +# +# CONFIG_IDE is not set +# CONFIG_BLK_DEV_IDE_MODES is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI support +# +# CONFIG_SCSI is not set + +# +# I2O device support +# +# CONFIG_I2O is not set +# CONFIG_I2O_BLOCK is not set +# CONFIG_I2O_SCSI is not set +# CONFIG_I2O_PROC is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# ISDN subsystem +# + +# +# Old CD-ROM drivers (not SCSI, not IDE) +# +# CONFIG_CD_NO_IDESCSI is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +# CONFIG_SERIAL_EXTENDED is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_DIGI is not set +# CONFIG_ESPSERIAL is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINK is not set +# CONFIG_N_HDLC is not set +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +CONFIG_UNIX98_PTYS=y +CONFIG_UNIX98_PTY_COUNT=256 + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Mice +# +# CONFIG_BUSMOUSE is not set +# CONFIG_MOUSE is not set + +# +# Joysticks +# +# CONFIG_JOYSTICK is not set + +# +# Input core support is needed for joysticks +# +# CONFIG_QIC02_TAPE is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_INTEL_RNG is not set +# CONFIG_NVRAM is not set +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# File systems +# +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_REISERFS_CHECK is not set +# CONFIG_ADFS_FS is not set +# CONFIG_ADFS_FS_RW is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_FAT_FS is not set +# CONFIG_MSDOS_FS is not set +# CONFIG_UMSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_RAMFS is not set +# CONFIG_ISO9660_FS is not set +# CONFIG_JOLIET is not set +# CONFIG_MINIX_FS is not set +# CONFIG_NTFS_FS is not set +# CONFIG_NTFS_RW is not set +# CONFIG_HPFS_FS is not set +CONFIG_PROC_FS=y +# CONFIG_DEVFS_FS is not set +# CONFIG_DEVFS_MOUNT is not set +# CONFIG_DEVFS_DEBUG is not set +CONFIG_DEVPTS_FS=y +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX4FS_RW is not set +# CONFIG_ROMFS_FS is not set +CONFIG_EXT2_FS=y +# CONFIG_SYSV_FS is not set +# CONFIG_SYSV_FS_WRITE is not set +# CONFIG_UDF_FS is not set +# CONFIG_UDF_RW is not set +# CONFIG_UFS_FS is not set +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_NCPFS_NLS is not set +# CONFIG_SMB_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_SMB_NLS is not set +# CONFIG_NLS is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set + +# +# Input core support +# +# CONFIG_INPUT is not set + +# +# Kernel hacking +# +CONFIG_CROSSCOMPILE=y +# CONFIG_MIPS_FPE_MODULE is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_MIPS_UNCACHED is not set diff --git a/arch/mips/defconfig-ocelot b/arch/mips/defconfig-ocelot index e04cce8cc..849daa9a4 100644 --- a/arch/mips/defconfig-ocelot +++ b/arch/mips/defconfig-ocelot @@ -48,7 +48,6 @@ CONFIG_SWAP_IO_SPACE=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/defconfig-rm200 b/arch/mips/defconfig-rm200 index 6d77c4a3c..d5d46e8f6 100644 --- a/arch/mips/defconfig-rm200 +++ b/arch/mips/defconfig-rm200 @@ -51,7 +51,6 @@ CONFIG_KMOD=y # CPU selection # # CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R3912 is not set # CONFIG_CPU_R6000 is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 10b8240aa..97479b75f 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -26,9 +26,6 @@ obj-$(CONFIG_MODULES) += mips_ksyms.o ifdef CONFIG_CPU_R3000 obj-y += r2300_misc.o r2300_fpu.o r2300_switch.o else -ifdef CONFIG_CPU_R3912 -obj-y += r2300_misc.o r2300_fpu.o r2300_switch.o -else obj-y += r4k_misc.o r4k_switch.o ifdef CONFIG_CPU_R6000 obj-y += r6000_fpu.o @@ -36,7 +33,6 @@ else obj-y += r4k_fpu.o endif endif -endif obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_MIPS_FPE_MODULE) += fpe.o diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 2255f2008..008db22f4 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -40,13 +40,13 @@ int get_cpuinfo(char *buffer) const char *mach_galileo_names[] = GROUP_GALILEO_NAMES; const char *mach_momenco_names[] = GROUP_MOMENCO_NAMES; const char *mach_ite_names[] = GROUP_ITE_NAMES; - const char *mach_phillips_names[] = GROUP_PHILIPS_NAMES; + const char *mach_philips_names[] = GROUP_PHILIPS_NAMES; const char **mach_group_to_name[] = { mach_unknown_names, mach_jazz_names, mach_dec_names, mach_arc_names, mach_sni_rm_names, mach_acn_names, mach_sgi_names, mach_cobalt_names, mach_nec_ddb_names, mach_baget_names, mach_cosine_names, mach_galileo_names, mach_momenco_names, - mach_ite_names, mach_phillips_names}; + mach_ite_names, mach_philips_names}; unsigned int version = read_32bit_cp0_register(CP0_PRID); int len; diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index d9af83707..bffbd67cf 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -218,11 +218,27 @@ static inline void cpu_probe(void) mips_cpu.tlbsize = 48; break; */ - case PRID_IMP_R3912: - mips_cpu.cputype = CPU_R3912; + case PRID_IMP_TX39: mips_cpu.isa_level = MIPS_CPU_ISA_I; mips_cpu.options = MIPS_CPU_TLB; - mips_cpu.tlbsize = 32; + + switch (mips_cpu.processor_id & 0xff) { + case PRID_REV_TX3912: + mips_cpu.cputype = CPU_TX3912; + mips_cpu.tlbsize = 32; + break; + case PRID_REV_TX3922: + mips_cpu.cputype = CPU_TX3922; + mips_cpu.tlbsize = 64; + break; + case PRID_REV_TX3927: + mips_cpu.cputype = CPU_TX3927; + mips_cpu.tlbsize = 64; + break; + default: + mips_cpu.cputype = CPU_UNKNOWN; + break; + } break; case PRID_IMP_R4700: mips_cpu.cputype = CPU_R4700; diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 85767362e..c49755fe2 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -918,7 +918,9 @@ void __init trap_init(void) case CPU_R3052: case CPU_R3081: case CPU_R3081E: - case CPU_R3912: + case CPU_TX3912: + case CPU_TX3922: + case CPU_TX3927: save_fp_context = _save_fp_context; restore_fp_context = _restore_fp_context; memcpy((void *)KSEG0, &except_vec0_r2300, 0x80); diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index b51696301..8d2a45406 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -17,11 +17,7 @@ obj-y += csum_partial.o csum_partial_copy.o \ ifdef CONFIG_CPU_R3000 obj-y += r3k_dump_tlb.o else - ifdef CONFIG_CPU_R3912 - obj-y += r3k_dump_tlb.o - else - obj-y += dump_tlb.o - endif + obj-y += dump_tlb.o endif obj-$(CONFIG_BLK_DEV_FD) += floppy-no.o floppy-std.o diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 16ed11ac7..5976ee150 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -13,7 +13,6 @@ export-objs += umap.o obj-y += extable.o init.o fault.o loadmmu.o obj-$(CONFIG_CPU_R3000) += r2300.o -obj-$(CONFIG_CPU_R3912) += r2300.o obj-$(CONFIG_CPU_R4300) += r4xx0.o obj-$(CONFIG_CPU_R4X00) += r4xx0.o obj-$(CONFIG_CPU_R5000) += r4xx0.o diff --git a/arch/mips/mm/loadmmu.c b/arch/mips/mm/loadmmu.c index 69740ad78..d4d2dd5d4 100644 --- a/arch/mips/mm/loadmmu.c +++ b/arch/mips/mm/loadmmu.c @@ -38,7 +38,7 @@ void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size); void (*_dma_cache_wback)(unsigned long start, unsigned long size); void (*_dma_cache_inv)(unsigned long start, unsigned long size); -extern void ld_mmu_r2300(void); +extern void ld_mmu_r23000(void); extern void ld_mmu_r4xx0(void); extern void ld_mmu_r5432(void); extern void ld_mmu_r6000(void); @@ -75,18 +75,14 @@ void __init loadmmu(void) case CPU_R2000: case CPU_R3000: case CPU_R3000A: + case CPU_TX3912: + case CPU_TX3922: + case CPU_TX3927: case CPU_R3081E: - printk("Loading R[23]00 MMU routines.\n"); - ld_mmu_r2300(); + printk("Loading R[23]000 MMU routines.\n"); + ld_mmu_r23000(); break; #endif -#ifdef CONFIG_CPU_R3912 - case CPU_R3912: - printk("Loading R[23]00 MMU routines.\n"); - ld_mmu_r2300(); - break; -#endif - #ifdef CONFIG_CPU_R10000 case CPU_R10000: printk("Loading R10000 MMU routines.\n"); diff --git a/arch/mips/mm/r2300.c b/arch/mips/mm/r2300.c index 465b75175..37bcc0445 100644 --- a/arch/mips/mm/r2300.c +++ b/arch/mips/mm/r2300.c @@ -4,7 +4,8 @@ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) * * with a lot of changes to make this thing work for R3000s - * Copyright (C) 1998, 2000 Harald Koerfgen + * Tx39XX R4k style caches added. HK + * Copyright (C) 1998, 1999, 2000 Harald Koerfgen * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov */ #include <linux/init.h> @@ -19,16 +20,27 @@ #include <asm/isadep.h> #include <asm/io.h> #include <asm/wbflush.h> +#include <asm/bootinfo.h> +#include <asm/cpu.h> -/* Primary cache parameters. */ -static unsigned long icache_size, dcache_size; /* Size in bytes */ -/* the linesizes are usually fixed on R3000s */ +/* + * According to the paper written by D. Miller about Linux cache & TLB + * flush implementation, DMA/Driver coherence should be done at the + * driver layer. Thus, normally, we don't need flush dcache for R3000. + * Define this if driver does not handle cache consistency during DMA ops. + */ + +/* For R3000 cores with R4000 style caches */ +static unsigned long icache_size, dcache_size; /* Size in bytes */ +static unsigned long icache_lsize, dcache_lsize; /* Size in bytes */ +static unsigned long scache_size = 0; + +#include <asm/cacheops.h> +#include <asm/r4kcache.h> #undef DEBUG_TLB #undef DEBUG_CACHE -#define NTLB_ENTRIES 64 /* Fixed on all R23000 variants... */ - /* page functions */ void r3k_clear_page(void * page) { @@ -113,7 +125,7 @@ unsigned long __init r3k_cache_size(unsigned long ca_flags) p = (volatile unsigned long *) KSEG0; - flags = read_32bit_cp0_register(CP0_STATUS); + save_and_cli(flags); /* isolate cache space */ write_32bit_cp0_register(CP0_STATUS, (ca_flags|flags)&~ST0_IEC); @@ -135,24 +147,18 @@ unsigned long __init r3k_cache_size(unsigned long ca_flags) if (size > 0x40000) size = 0; } - - write_32bit_cp0_register(CP0_STATUS, flags); + restore_flags(flags); return size * sizeof(*p); } -static void __init probe_dcache(void) +static void __init r3k_probe_cache(void) { dcache_size = r3k_cache_size(ST0_ISC); - printk("Primary data cache %lukb, linesize 4 bytes\n", - dcache_size >> 10); -} + dcache_lsize = 4; -static void __init probe_icache(void) -{ icache_size = r3k_cache_size(ST0_ISC|ST0_SWC); - printk("Primary instruction cache %lukb, linesize 4 bytes\n", - icache_size >> 10); + icache_lsize = 4; } static void r3k_flush_icache_range(unsigned long start, unsigned long end) @@ -164,7 +170,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) if (size > icache_size) size = icache_size; - flags = read_32bit_cp0_register(CP0_STATUS); + save_and_cli(flags); /* isolate cache space */ write_32bit_cp0_register(CP0_STATUS, (ST0_ISC|ST0_SWC|flags)&~ST0_IEC); @@ -206,7 +212,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) p += 0x080; } - write_32bit_cp0_register(CP0_STATUS, flags); + restore_flags(flags); } static void r3k_flush_dcache_range(unsigned long start, unsigned long end) @@ -218,7 +224,7 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end) if (size > dcache_size) size = dcache_size; - flags = read_32bit_cp0_register(CP0_STATUS); + save_and_cli(flags); /* isolate cache space */ write_32bit_cp0_register(CP0_STATUS, (ST0_ISC|flags)&~ST0_IEC); @@ -260,7 +266,7 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end) p += 0x080; } - write_32bit_cp0_register(CP0_STATUS, flags); + restore_flags(flags); } static inline unsigned long get_phys_page (unsigned long addr, @@ -275,10 +281,10 @@ static inline unsigned long get_phys_page (unsigned long addr, pmd = pmd_offset(pgd, addr); pte = pte_offset(pmd, addr); - if((physpage = pte_val(*pte)) & _PAGE_VALID) + if ((physpage = pte_val(*pte)) & _PAGE_VALID) return KSEG0ADDR(physpage & PAGE_MASK); - else - return 0; + + return 0; } static inline void r3k_flush_cache_all(void) @@ -297,9 +303,8 @@ static void r3k_flush_cache_mm(struct mm_struct *mm) } } -static void r3k_flush_cache_range(struct mm_struct *mm, - unsigned long start, - unsigned long end) +static void r3k_flush_cache_range(struct mm_struct *mm, unsigned long start, + unsigned long end) { struct vm_area_struct *vma; @@ -356,8 +361,7 @@ static void r3k_flush_page_to_ram(struct page * page) */ } -static void r3k_flush_icache_page(struct vm_area_struct *vma, - struct page *page) +static void r3k_flush_icache_page(struct vm_area_struct *vma, struct page *page) { struct mm_struct *mm = vma->vm_mm; unsigned long physpage; @@ -385,7 +389,7 @@ static void r3k_flush_cache_sigtramp(unsigned long addr) printk("csigtramp[%08lx]", addr); #endif - flags = read_32bit_cp0_register(CP0_STATUS); + save_and_cli(flags); write_32bit_cp0_register(CP0_STATUS, (ST0_ISC|ST0_SWC|flags)&~ST0_IEC); @@ -394,7 +398,7 @@ static void r3k_flush_cache_sigtramp(unsigned long addr) "sb\t$0,0x008(%0)\n\t" : : "r" (addr) ); - write_32bit_cp0_register(CP0_STATUS, flags); + restore_flags(flags); } static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size) @@ -417,7 +421,7 @@ void flush_tlb_all(void) save_and_cli(flags); old_ctx = (get_entryhi() & 0xfc0); write_32bit_cp0_register(CP0_ENTRYLO0, 0); - for(entry = 0; entry < NTLB_ENTRIES; entry++) { + for (entry = 8; entry < mips_cpu.tlbsize; entry++) { write_32bit_cp0_register(CP0_INDEX, entry << 8); write_32bit_cp0_register(CP0_ENTRYHI, ((entry | 0x80000) << 12)); __asm__ __volatile__("tlbwi"); @@ -432,7 +436,7 @@ void flush_tlb_mm(struct mm_struct *mm) unsigned long flags; #ifdef DEBUG_TLB - printk("[tlbmm<%d>]", mm->context); + printk("[tlbmm<%lu>]", (unsigned long) mm->context); #endif save_and_cli(flags); get_new_mmu_context(mm, asid_cache); @@ -443,19 +447,19 @@ void flush_tlb_mm(struct mm_struct *mm) } void flush_tlb_range(struct mm_struct *mm, unsigned long start, - unsigned long end) + unsigned long end) { if (mm->context != 0) { unsigned long flags; int size; #ifdef DEBUG_TLB - printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & 0xfc0), - start, end); + printk("[tlbrange<%lu,0x%08lx,0x%08lx>]", + (mm->context & 0xfc0), start, end); #endif save_and_cli(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; - if(size <= NTLB_ENTRIES) { + if(size <= mips_cpu.tlbsize) { int oldpid = (get_entryhi() & 0xfc0); int newpid = (mm->context & 0xfc0); @@ -492,7 +496,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) int oldpid, newpid, idx; #ifdef DEBUG_TLB - printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page); + printk("[tlbpage<%lu,0x%08lx>]", vma->vm_mm->context, page); #endif newpid = (vma->vm_mm->context & 0xfc0); page &= PAGE_MASK; @@ -545,8 +549,8 @@ void pgd_init(unsigned long page) "1" (PAGE_SIZE/(sizeof(pmd_t)*8))); } -void update_mmu_cache(struct vm_area_struct * vma, - unsigned long address, pte_t pte) +void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, + pte_t pte) { unsigned long flags; pgd_t *pgdp; @@ -564,8 +568,8 @@ void update_mmu_cache(struct vm_area_struct * vma, #ifdef DEBUG_TLB if((pid != (vma->vm_mm->context & 0xfc0)) || (vma->vm_mm->context == 0)) { - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d tlbpid=%d\n", - (int) (vma->vm_mm->context & 0xfc0), pid); + printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%lu tlbpid=%d\n", + (vma->vm_mm->context & 0xfc0), pid); } #endif @@ -590,19 +594,6 @@ void update_mmu_cache(struct vm_area_struct * vma, printk("[HIT]"); #endif } -#if 0 - if(!strcmp(current->comm, "args")) { - printk("<"); - for(idx = 0; idx < NTLB_ENTRIES; idx++) { - set_index(idx); - tlb_read(); - address = get_entryhi(); - if((address & 0xfc0) != 0) - printk("[%08lx]", address); - } - printk(">\n"); - } -#endif set_entryhi(pid); restore_flags(flags); } @@ -640,36 +631,134 @@ void show_regs(struct pt_regs * regs) (unsigned int) regs->cp0_cause); } +/* Todo: handle r4k-style TX39 TLB */ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, - unsigned long entryhi, unsigned long pagemask) + unsigned long entryhi, unsigned long pagemask) { -printk("r3k_add_wired_entry"); - /* - * FIXME, to be done - */ + unsigned long flags; + unsigned long old_ctx; + static unsigned long wired = 0; + + if (wired < 8) { + save_and_cli(flags); + old_ctx = get_entryhi() & 0xfc0; + set_entrylo0(entrylo0); + set_entryhi(entryhi); + set_index(wired); + wired++; + tlb_write_indexed(); + set_entryhi(old_ctx); + flush_tlb_all(); + restore_flags(flags); + } +} + +static void tx39_flush_icache_all(void ) +{ + + unsigned long start = KSEG0; + unsigned long end = (start + icache_size); + unsigned long dummy = 0; + + /* disable icache and stop streaming */ + __asm__ __volatile__( + ".set\tnoreorder\n\t" + "mfc0\t%0,$3\n\t" + "xori\t%0,32\n\t" + "mtc0\t%0,$3\n\t" + "j\t1f\n\t" + "nop\n\t" + "1:\t.set\treorder\n\t" + : : "r"(dummy)); + + /* invalidate icache */ + while (start < end) { + cache16_unroll32(start,Index_Invalidate_I); + start += 0x200; + } + + /* enable icache */ + __asm__ __volatile__( + ".set\tnoreorder\n\t" + "mfc0\t%0,$3\n\t" + "xori\t%0,32\n\t" + "mtc0\t%0,$3\n\t" + ".set\treorder\n\t" + : : "r"(dummy)); +} + +static __init void tx39_probe_cache(void) +{ + unsigned long config; + + config = read_32bit_cp0_register(CP0_CONF); + + icache_size = 1 << (10 + ((config >> 19) & 3)); + icache_lsize = 16; + + dcache_size = 1 << (10 + ((config >> 16) & 3)); + dcache_lsize = 4; } -void __init ld_mmu_r2300(void) +void __init ld_mmu_r23000(void) { + unsigned long config; + printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID)); _clear_page = r3k_clear_page; _copy_page = r3k_copy_page; - probe_icache(); - probe_dcache(); - - _flush_cache_all = r3k_flush_cache_all; - ___flush_cache_all = r3k_flush_cache_all; - _flush_cache_mm = r3k_flush_cache_mm; - _flush_cache_range = r3k_flush_cache_range; - _flush_cache_page = r3k_flush_cache_page; - _flush_cache_sigtramp = r3k_flush_cache_sigtramp; - _flush_page_to_ram = r3k_flush_page_to_ram; - _flush_icache_page = r3k_flush_icache_page; - _flush_icache_range = r3k_flush_icache_range; + switch (mips_cpu.cputype) { + case CPU_R2000: + case CPU_R3000: + case CPU_R3000A: + case CPU_R3081: + + r3k_probe_cache(); + + _flush_cache_all = r3k_flush_cache_all; + ___flush_cache_all = r3k_flush_cache_all; + _flush_cache_mm = r3k_flush_cache_mm; + _flush_cache_range = r3k_flush_cache_range; + _flush_cache_page = r3k_flush_cache_page; + _flush_cache_sigtramp = r3k_flush_cache_sigtramp; + _flush_page_to_ram = r3k_flush_page_to_ram; + _flush_icache_page = r3k_flush_icache_page; + _flush_icache_range = r3k_flush_icache_range; + + _dma_cache_wback_inv = r3k_dma_cache_wback_inv; + break; + + case CPU_TX3912: + case CPU_TX3922: + case CPU_TX3927: + + config=read_32bit_cp0_register(CP0_CONF); + config &= (~TX39_CONF_WBON); + write_32bit_cp0_register(CP0_CONF, config); + + tx39_probe_cache(); + + _flush_cache_all = tx39_flush_icache_all; + ___flush_cache_all = tx39_flush_icache_all; + _flush_cache_mm = tx39_flush_icache_all; + _flush_cache_range = tx39_flush_icache_all; + _flush_cache_page = tx39_flush_icache_all; + _flush_cache_sigtramp = tx39_flush_icache_all; + _flush_page_to_ram = r3k_flush_page_to_ram; + _flush_icache_page = tx39_flush_icache_all; + _flush_icache_range = tx39_flush_icache_all; + + _dma_cache_wback_inv = r3k_dma_cache_wback_inv; + + break; + } - _dma_cache_wback_inv = r3k_dma_cache_wback_inv; + printk("Primary instruction cache %dkb, linesize %d bytes\n", + (int) (icache_size >> 10), (int) icache_lsize); + printk("Primary data cache %dkb, linesize %d bytes\n", + (int) (dcache_size >> 10), (int) dcache_lsize); flush_tlb_all(); } |