summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorKanoj Sarcar <kanoj@engr.sgi.com>2000-01-26 06:11:50 +0000
committerKanoj Sarcar <kanoj@engr.sgi.com>2000-01-26 06:11:50 +0000
commit2d489352c461e2ed9b1df1d5194cd2fe51cd5e29 (patch)
treec8023b1b9dcbbdc57c30a7b8a29303184eecfd7e
parent68fcd471fa054c6a2711d0db6906514d8c1ff168 (diff)
1. Minor changes to start the scsi intrs going (untested).
2. Fix the irq range checking in request_irq/free_irq.
-rw-r--r--arch/mips64/sgi-ip27/ip27-irq.c8
-rw-r--r--include/asm-mips64/sn/sn0/ip27.h2
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/mips64/sgi-ip27/ip27-irq.c b/arch/mips64/sgi-ip27/ip27-irq.c
index 8749652b6..977a6edb1 100644
--- a/arch/mips64/sgi-ip27/ip27-irq.c
+++ b/arch/mips64/sgi-ip27/ip27-irq.c
@@ -141,6 +141,8 @@ static unsigned int bridge_startup(unsigned int irq)
switch (irq) {
case IOC3_SERIAL_INT: pin = 3; break;
case IOC3_ETH_INT: pin = 2; break;
+ case SCSI1_INT: pin = 1; break;
+ case SCSI0_INT: pin = 0; break;
default: panic("bridge_startup: whoops?");
}
@@ -167,6 +169,8 @@ static unsigned int bridge_shutdown(unsigned int irq)
switch (irq) {
case IOC3_SERIAL_INT: pin = 3; break;
case IOC3_ETH_INT: pin = 2; break;
+ case SCSI1_INT: pin = 1; break;
+ case SCSI0_INT: pin = 0; break;
default: panic("bridge_startup: whoops?");
}
@@ -248,7 +252,7 @@ int request_irq(unsigned int irq,
int retval;
struct irqaction *action;
- if (irq < 8 > irq > 9)
+ if (irq > 9)
return -EINVAL;
if (!handler)
return -EINVAL;
@@ -276,7 +280,7 @@ void free_irq(unsigned int irq, void *dev_id)
struct irqaction * action, **p;
unsigned long flags;
- if (irq < 8 > irq > 9) {
+ if (irq > 9) {
printk("Trying to free IRQ%d\n", irq);
return;
}
diff --git a/include/asm-mips64/sn/sn0/ip27.h b/include/asm-mips64/sn/sn0/ip27.h
index 065683a2d..71203fefb 100644
--- a/include/asm-mips64/sn/sn0/ip27.h
+++ b/include/asm-mips64/sn/sn0/ip27.h
@@ -87,5 +87,7 @@
#define IOC3_SERIAL_INT 8
#define IOC3_ETH_INT 9
+#define SCSI1_INT 1
+#define SCSI0_INT 0
#endif /* _ASM_SN_SN0_IP27_H */