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authorKanoj Sarcar <kanoj@engr.sgi.com>2000-04-22 22:46:06 +0000
committerKanoj Sarcar <kanoj@engr.sgi.com>2000-04-22 22:46:06 +0000
commitc4ca763cc6ffd1ffef022766dde60487e42f17ae (patch)
tree7a0763cfa469e44e6f6b809bc2e67bf84a30c3e9
parentdc91613ed65a1549d9ca21bf489c3f55f34f2dd6 (diff)
First cut at intercpu tlb flushing.
-rw-r--r--arch/mips64/kernel/smp.c67
-rw-r--r--arch/mips64/mm/andes.c2
-rw-r--r--arch/mips64/mm/r4xx0.c2
-rw-r--r--arch/mips64/sgi-ip27/ip27-init.c2
-rw-r--r--include/asm-mips64/mmu_context.h2
-rw-r--r--include/asm-mips64/pgalloc.h14
6 files changed, 81 insertions, 8 deletions
diff --git a/arch/mips64/kernel/smp.c b/arch/mips64/kernel/smp.c
index 9507f2342..90511c561 100644
--- a/arch/mips64/kernel/smp.c
+++ b/arch/mips64/kernel/smp.c
@@ -76,7 +76,7 @@ void __init smp_boot_cpus(void)
current->processor = 0;
init_idle();
smp_tune_scheduling();
- smp_num_cpus = 1; /* maxcpus; */
+ smp_num_cpus = 1; /* maxcpus */
allowboot();
}
@@ -192,8 +192,67 @@ void smp_call_function_interrupt(void)
}
-void flush_tlb_others (unsigned long cpumask, struct mm_struct *mm,
- unsigned long va)
+static void flush_tlb_all_ipi(void *info)
{
- panic("flush_tlb_others\n");
+ _flush_tlb_all();
}
+
+void flush_tlb_all(void)
+{
+ smp_call_function(flush_tlb_all_ipi, 0, 1, 1);
+ _flush_tlb_all();
+}
+
+static void flush_tlb_mm_ipi(void *mm)
+{
+ _flush_tlb_mm((struct mm_struct *)mm);
+}
+
+void flush_tlb_mm(struct mm_struct *mm)
+{
+ smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
+ _flush_tlb_mm(mm);
+}
+
+struct flush_tlb_data {
+ struct mm_struct *mm;
+ struct vm_area_struct *vma;
+ unsigned long addr1;
+ unsigned long addr2;
+};
+
+static void flush_tlb_range_ipi(void *info)
+{
+ struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
+
+ _flush_tlb_range(fd->mm, fd->addr1, fd->addr2);
+}
+
+void flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end)
+{
+ struct flush_tlb_data fd;
+
+ fd.mm = mm;
+ fd.addr1 = start;
+ fd.addr2 = end;
+ smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
+ _flush_tlb_range(mm, start, end);
+}
+
+static void flush_tlb_page_ipi(void *info)
+{
+ struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
+
+ _flush_tlb_page(fd->vma, fd->addr1);
+}
+
+void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+{
+ struct flush_tlb_data fd;
+
+ fd.vma = vma;
+ fd.addr1 = page;
+ smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
+ _flush_tlb_page(vma, page);
+}
+
diff --git a/arch/mips64/mm/andes.c b/arch/mips64/mm/andes.c
index a4877a8c7..91244d64c 100644
--- a/arch/mips64/mm/andes.c
+++ b/arch/mips64/mm/andes.c
@@ -469,7 +469,7 @@ void __init ld_mmu_andes(void)
write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
/* From this point on the ARC firmware is dead. */
- flush_tlb_all();
+ _flush_tlb_all();
/* Did I tell you that ARC SUCKS? */
}
diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c
index aac70e9c6..059774231 100644
--- a/arch/mips64/mm/r4xx0.c
+++ b/arch/mips64/mm/r4xx0.c
@@ -2555,5 +2555,5 @@ void __init ld_mmu_r4xx0(void)
* be set for 4kb pages.
*/
write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
- flush_tlb_all();
+ _flush_tlb_all();
}
diff --git a/arch/mips64/sgi-ip27/ip27-init.c b/arch/mips64/sgi-ip27/ip27-init.c
index 1accb246a..07b084b0b 100644
--- a/arch/mips64/sgi-ip27/ip27-init.c
+++ b/arch/mips64/sgi-ip27/ip27-init.c
@@ -384,7 +384,7 @@ void cboot(void)
bte_lateinit();
init_mfhi_war();
#endif
- flush_tlb_all();
+ _flush_tlb_all();
flush_cache_all();
start_secondary();
}
diff --git a/include/asm-mips64/mmu_context.h b/include/asm-mips64/mmu_context.h
index 30ee6a9d4..578c782d6 100644
--- a/include/asm-mips64/mmu_context.h
+++ b/include/asm-mips64/mmu_context.h
@@ -44,7 +44,7 @@ get_new_cpu_mmu_context(struct mm_struct *mm, unsigned long cpu)
unsigned long asid = ASID_CACHE(cpu);
if (! ((asid += ASID_INC) & ASID_MASK) ) {
- flush_tlb_all(); /* start new asid cycle */
+ _flush_tlb_all(); /* start new asid cycle */
if (!asid) /* fix version if needed */
asid = ASID_FIRST_VERSION;
}
diff --git a/include/asm-mips64/pgalloc.h b/include/asm-mips64/pgalloc.h
index f619b0661..24f7c3a3f 100644
--- a/include/asm-mips64/pgalloc.h
+++ b/include/asm-mips64/pgalloc.h
@@ -10,12 +10,15 @@
#ifndef _ASM_PGALLOC_H
#define _ASM_PGALLOC_H
+#include <linux/config.h>
+
/* TLB flushing:
*
* - flush_tlb_all() flushes all processes TLB entries
* - flush_tlb_mm(mm) flushes the specified mm context TLB entries
* - flush_tlb_page(mm, vmaddr) flushes a single page
* - flush_tlb_range(mm, start, end) flushes a range of pages
+ * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
*/
extern void (*_flush_tlb_all)(void);
extern void (*_flush_tlb_mm)(struct mm_struct *mm);
@@ -23,11 +26,22 @@ extern void (*_flush_tlb_range)(struct mm_struct *mm, unsigned long start,
unsigned long end);
extern void (*_flush_tlb_page)(struct vm_area_struct *vma, unsigned long page);
+#ifndef CONFIG_SMP
+
#define flush_tlb_all() _flush_tlb_all()
#define flush_tlb_mm(mm) _flush_tlb_mm(mm)
#define flush_tlb_range(mm,vmaddr,end) _flush_tlb_range(mm, vmaddr, end)
#define flush_tlb_page(vma,page) _flush_tlb_page(vma, page)
+#else /* CONFIG_SMP */
+
+extern void flush_tlb_all(void);
+extern void flush_tlb_mm(struct mm_struct *);
+extern void flush_tlb_range(struct mm_struct *, unsigned long, unsigned long);
+extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
+
+#endif /* CONFIG_SMP */
+
extern inline void flush_tlb_pgtables(struct mm_struct *mm,
unsigned long start, unsigned long end)
{