diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1999-06-17 13:25:08 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 1999-06-17 13:25:08 +0000 |
| commit | 59223edaa18759982db0a8aced0e77457d10c68e (patch) | |
| tree | 89354903b01fa0a447bffeefe00df3044495db2e /Documentation/mtrr.txt | |
| parent | db7d4daea91e105e3859cf461d7e53b9b77454b2 (diff) | |
Merge with Linux 2.3.6. Sorry, this isn't tested on silicon, I don't
have a MIPS box at hand.
Diffstat (limited to 'Documentation/mtrr.txt')
| -rw-r--r-- | Documentation/mtrr.txt | 34 |
1 files changed, 24 insertions, 10 deletions
diff --git a/Documentation/mtrr.txt b/Documentation/mtrr.txt index af58d63d7..f047b7a28 100644 --- a/Documentation/mtrr.txt +++ b/Documentation/mtrr.txt @@ -1,15 +1,25 @@ MTRR (Memory Type Range Register) control -2 May 1998 +3 Jun 1999 Richard Gooch <rgooch@atnf.csiro.au> - On Intel Pentium Pro/Pentium II systems the Memory Type Range - Registers (MTRRs) may be used to control processor access to memory - ranges. This is most useful when you have a video (VGA) card on a - PCI or AGP bus. Enabling write-combining allows bus write transfers - to be combined into a larger transfer before bursting over the - PCI/AGP bus. This can increase performance of image write operations - 2.5 times or more. + On Intel P6 family processors (Pentium Pro, Pentium II and later) + the Memory Type Range Registers (MTRRs) may be used to control + processor access to memory ranges. This is most useful when you have + a video (VGA) card on a PCI or AGP bus. Enabling write-combining + allows bus write transfers to be combined into a larger transfer + before bursting over the PCI/AGP bus. This can increase performance + of image write operations 2.5 times or more. + + The Cyrix 6x86, 6x86MX and M II processors have Address Range + Registers (ARRs) which provide a similar functionality to MTRRs. For + these, the ARRs are used to emulate the MTRRs. + + The AMD K6-2 (stepping 8 and above) and K6-3 processors have two + MTRRs. These are supported. + + The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These + are supported. The CONFIG_MTRR option creates a /proc/mtrr file which may be used to manipulate your MTRRs. Typically the X server should use @@ -31,8 +41,10 @@ Reading MTRRs from the shell: reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1 reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1 =============================================================================== -Creating MTRRs from the shell: +Creating MTRRs from the C-shell: # echo "base=0xf8000000 size=0x400000 type=write-combining" >! /proc/mtrr +or if you use bash: +# echo "base=0xf8000000 size=0x400000 type=write-combining" >| /proc/mtrr And the result thereof: % cat /proc/mtrr @@ -79,8 +91,10 @@ registers. NOTE: You can only create type=uncachable region, if the first region that you created is type=write-combining. =============================================================================== -Removing MTRRs from the shell: +Removing MTRRs from the C-shell: % echo "disable=2" >! /proc/mtrr +or using bash: +% echo "disable=2" >| /proc/mtrr =============================================================================== Reading MTRRs from a C programme using ioctl()'s: |