Merge with Linux 2.3.40.

24 files changed, 908 insertions, 743 deletions

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 9a22fe08f..5046a3377 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -5,8 +5,14 @@
 #
 
 L_TARGET := lib.a
-L_OBJS   := backtrace.o bitops.o checksum.o delay.o \
-	    string.o system.o uaccess.o
+L_OBJS   := changebit.o csumipv6.o csumpartial.o csumpartialcopy.o \
+	    csumpartialcopyuser.o clearbit.o copy_page.o findbit.o \
+	    memchr.o memcpy.o memset.o memzero.o setbit.o strchr.o \
+	    strrchr.o testchangebit.o testclearbit.o testsetbit.o  \
+	    uaccess.o
+
+O_TARGET := lib.o
+O_OBJS   := backtrace.o delay.o
 
 ifeq ($(PROCESSOR),armo)
   L_OBJS += uaccess-armo.o
@@ -25,13 +31,21 @@ endif
 ifeq ($(MACHINE),ebsa110)
   L_OBJS += io-ebsa110.o
 else
-  LX_OBJS += io.o
+  OX_OBJS += io.o
 endif
 
 ifeq ($(MACHINE),footbridge)
   L_OBJS += io-footbridge.o
 endif
 
+#
+# SA1100 IO routines happen to be the
+# same as the footbridge routines
+#
+ifeq ($(MACHINE),sa1100)
+  L_OBJS += io-footbridge.o
+endif
+
 include $(TOPDIR)/Rules.make
 
 .S.o:
@@ -42,5 +56,3 @@ constants.h: getconsdata.o extractconstants.pl
 
 getconsdata.o: getconsdata.c
 	$(CC) $(CFLAGS) -c getconsdata.c
-
-checksum.o string.o: constants.h
diff --git a/arch/arm/lib/bitops.S b/arch/arm/lib/bitops.S
deleted file mode 100644
index 4c1f4b0aa..000000000
--- a/arch/arm/lib/bitops.S
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * linux/arch/arm/lib/bitops.S
- *
- * Copyright (C) 1995, 1996 Russell King
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-                .text
-
-@ Purpose  : Function to set a bit
-@ Prototype: int set_bit(int bit,int *addr)
-
-ENTRY(set_bit)
-                and     r2, r0, #7
-                mov     r3, #1
-                mov     r3, r3, lsl r2
-		SAVEIRQS(ip)
-		DISABLEIRQS(ip)
-		ldrb	r2, [r1, r0, lsr #3]
-		orr	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		RESTOREIRQS(ip)
-		RETINSTR(mov,pc,lr)
-
-ENTRY(test_and_set_bit)
-		add	r1, r1, r0, lsr #3	@ Get byte offset
-		and	r3, r0, #7		@ Get bit offset
-		mov	r0, #1
-		SAVEIRQS(ip)
-		DISABLEIRQS(ip)
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		orr	r2, r2, r0, lsl r3
-		moveq	r0, #0
-		strb	r2, [r1]
-		RESTOREIRQS(ip)
-		RETINSTR(mov,pc,lr)
-
-@ Purpose  : Function to clear a bit
-@ Prototype: int clear_bit(int bit,int *addr)
-
-ENTRY(clear_bit)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		SAVEIRQS(ip)
-		DISABLEIRQS(ip)
-		ldrb	r2, [r1, r0, lsr #3]
-		bic	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		RESTOREIRQS(ip)
-		RETINSTR(mov,pc,lr)
-
-ENTRY(test_and_clear_bit)
-		add	r1, r1, r0, lsr #3	@ Get byte offset
-		and	r3, r0, #7	@ Get bit offset
-		mov	r0, #1
-		SAVEIRQS(ip)
-		DISABLEIRQS(ip)
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		bic	r2, r2, r0, lsl r3
-		moveq	r0, #0
-		strb	r2, [r1]
-		RESTOREIRQS(ip)
-		RETINSTR(mov,pc,lr)
-
-/* Purpose  : Function to change a bit
- * Prototype: int change_bit(int bit,int *addr)
- */
-ENTRY(change_bit)
-                and     r2, r0, #7
-                mov     r3, #1
-                mov     r3, r3, lsl r2
-		SAVEIRQS(ip)
-		DISABLEIRQS(ip)
-		ldrb	r2, [r1, r0, lsr #3]
-		eor	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		RESTOREIRQS(ip)
-		RETINSTR(mov,pc,lr)
-
-ENTRY(test_and_change_bit)
-		add	r1, r1, r0, lsr #3
-		and	r3, r0, #7
-		mov	r0, #1
-		SAVEIRQS(ip)
-		DISABLEIRQS(ip)
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		eor	r2, r2, r0, lsl r3
-		moveq	r0, #0
-		strb	r2, [r1]
-		RESTOREIRQS(ip)
-		RETINSTR(mov,pc,lr)
-
-@ Purpose  : Find a 'zero' bit
-@ Prototype: int find_first_zero_bit(char *addr,int maxbit);
-
-ENTRY(find_first_zero_bit)
-		mov	r2, #0			@ Initialise bit position
-Lfindzbit1lp:	ldrb	r3, [r0, r2, lsr #3]	@ Check byte, if 0xFF, then all bits set
-		teq	r3, #0xFF
-		bne	Lfoundzbit
-		add	r2, r2, #8
-		cmp	r2, r1			@ Check to see if we have come to the end
-		bcc	Lfindzbit1lp
-		add	r0, r1, #1		@ Make sure that we flag an error
-		RETINSTR(mov,pc,lr)
-Lfoundzbit:	tst	r3, #1			@ Check individual bits
-		moveq	r0, r2
-		RETINSTR(moveq,pc,lr)
-		tst	r3, #2
-		addeq	r0, r2, #1
-		RETINSTR(moveq,pc,lr)
-		tst	r3, #4
-		addeq	r0, r2, #2
-		RETINSTR(moveq,pc,lr)
-		tst	r3, #8
-		addeq	r0, r2, #3
-		RETINSTR(moveq,pc,lr)
-		tst	r3, #16
-		addeq	r0, r2, #4
-		RETINSTR(moveq,pc,lr)
-		tst	r3, #32
-		addeq	r0, r2, #5
-		RETINSTR(moveq,pc,lr)
-		tst	r3, #64
-		addeq	r0, r2, #6
-		RETINSTR(moveq,pc,lr)
-		add	r0, r2, #7
-		RETINSTR(mov,pc,lr)
-
-@ Purpose  : Find next 'zero' bit
-@ Prototype: int find_next_zero_bit(char *addr,int maxbit,int offset)
-
-ENTRY(find_next_zero_bit)
-		tst	r2, #7
-		beq	Lfindzbit1lp		@ If new byte, goto old routine
-		ldrb	r3, [r0, r2, lsr#3]
-		orr	r3, r3, #0xFF00		@ Set top bits so we wont get confused
-		stmfd	sp!, {r4}
-		and	r4, r2, #7
-		mov	r3, r3, lsr r4		@ Shift right by no. of bits
-		ldmfd	sp!, {r4}
-		and	r3, r3, #0xFF
-		teq	r3, #0xFF
-		orreq	r2, r2, #7
-		addeq	r2, r2, #1
-		beq	Lfindzbit1lp		@ If all bits are set, goto old routine
-		b	Lfoundzbit
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
new file mode 100644
index 000000000..8005fd49a
--- /dev/null
+++ b/arch/arm/lib/changebit.S
@@ -0,0 +1,26 @@
+/*
+ * linux/arch/arm/lib/changebit.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+/* Purpose  : Function to change a bit
+ * Prototype: int change_bit(int bit,int *addr)
+ */
+ENTRY(change_bit)
+                and     r2, r0, #7
+                mov     r3, #1
+                mov     r3, r3, lsl r2
+		SAVEIRQS(ip)
+		DISABLEIRQS(ip)
+		ldrb	r2, [r1, r0, lsr #3]
+		eor	r2, r2, r3
+		strb	r2, [r1, r0, lsr #3]
+		RESTOREIRQS(ip)
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
new file mode 100644
index 000000000..d936ab549
--- /dev/null
+++ b/arch/arm/lib/clearbit.S
@@ -0,0 +1,26 @@
+/*
+ * linux/arch/arm/lib/clearbit.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+@ Purpose  : Function to clear a bit
+@ Prototype: int clear_bit(int bit,int *addr)
+
+ENTRY(clear_bit)
+		and	r2, r0, #7
+		mov	r3, #1
+		mov	r3, r3, lsl r2
+		SAVEIRQS(ip)
+		DISABLEIRQS(ip)
+		ldrb	r2, [r1, r0, lsr #3]
+		bic	r2, r2, r3
+		strb	r2, [r1, r0, lsr #3]
+		RESTOREIRQS(ip)
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S
new file mode 100644
index 000000000..16c43268a
--- /dev/null
+++ b/arch/arm/lib/copy_page.S
@@ -0,0 +1,35 @@
+/*
+ * linux/arch/arm/lib/copypage.S
+ *
+ * Copyright (C) 1995-1999 Russell King
+ *
+ * ASM optimised string functions
+ *
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include "constants.h"
+
+		.text 
+/*
+ * StrongARM optimised copy_page routine
+ * now 1.72bytes/cycle, was 1.60 bytes/cycle
+ * (50MHz bus -> 86MB/s)
+ */
+
+ENTRY(copy_page)
+		stmfd	sp!, {r4, lr}			@	2
+		mov	r2, #PAGE_SZ/64			@	1
+1:		ldmia	r1!, {r3, r4, ip, lr}		@	4
+		subs	r2, r2, #1			@	1
+		stmia	r0!, {r3, r4, ip, lr}		@	4
+		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
+		stmia	r0!, {r3, r4, ip, lr}		@	4
+		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
+		stmia	r0!, {r3, r4, ip, lr}		@	4
+		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
+		stmia	r0!, {r3, r4, ip, lr}		@	4
+		bne	1b				@	1
+		LOADREGS(fd, sp!, {r4, pc})		@	3
+
+
diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S
new file mode 100644
index 000000000..76e7d26d8
--- /dev/null
+++ b/arch/arm/lib/csumipv6.S
@@ -0,0 +1,28 @@
+/*
+ * linux/arch/arm/lib/csumipv6.S
+ *
+ * Copyright (C) 1995-1998 Russell King
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+		.text
+
+ENTRY(__csum_ipv6_magic)
+		str	lr, [sp, #-4]!
+		adds	ip, r2, r3
+		ldmia	r1, {r1 - r3, lr}
+		adcs	ip, ip, r1
+		adcs	ip, ip, r2
+		adcs	ip, ip, r3
+		adcs	ip, ip, lr
+		ldmia	r0, {r0 - r3}
+		adcs	r0, ip, r0
+		adcs	r0, r0, r1
+		adcs	r0, r0, r2
+		ldr	r2, [sp, #4]
+		adcs	r0, r0, r3
+		adcs	r0, r0, r2
+		adcs	r0, r0, #0
+		LOADREGS(fd, sp!, {pc})
+
diff --git a/arch/arm/lib/csumpartial.S b/arch/arm/lib/csumpartial.S
new file mode 100644
index 000000000..2406dfb38
--- /dev/null
+++ b/arch/arm/lib/csumpartial.S
@@ -0,0 +1,64 @@
+/*
+ * linux/arch/arm/lib/csumpartial.S
+ *
+ * Copyright (C) 1995-1998 Russell King
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+		.text
+
+/* Function: __u32 csum_partial(const char *src, int len, __u32)
+ * Params  : r0 = buffer, r1 = len, r2 = checksum
+ * Returns : r0 = new checksum
+ */
+
+ENTRY(csum_partial)
+		tst	r0, #2
+		beq	1f
+		subs	r1, r1, #2
+		addmi	r1, r1, #2
+		bmi	3f
+		bic	r0, r0, #3
+		ldr	r3, [r0], #4
+		adds	r2, r2, r3, lsr #16
+		adcs	r2, r2, #0
+1:		adds	r2, r2, #0
+		bics	ip, r1, #31
+		beq	3f
+		stmfd	sp!, {r4 - r6}
+2:		ldmia	r0!, {r3 - r6}
+		adcs	r2, r2, r3
+		adcs	r2, r2, r4
+		adcs	r2, r2, r5
+		adcs	r2, r2, r6
+		ldmia	r0!, {r3 - r6}
+		adcs	r2, r2, r3
+		adcs	r2, r2, r4
+		adcs	r2, r2, r5
+		adcs	r2, r2, r6
+		sub	ip, ip, #32
+		teq	ip, #0
+		bne	2b
+		adcs	r2, r2, #0
+		ldmfd	sp!, {r4 - r6}
+3:		ands	ip, r1, #0x1c
+		beq	5f
+4:		ldr	r3, [r0], #4
+		sub	ip, ip, #4
+		adcs	r2, r2, r3
+		teq	ip, #0
+		bne	4b
+		adcs	r2, r2, #0
+5:		ands	ip, r1, #3
+		moveq	r0, r2
+		RETINSTR(moveq,pc,lr)
+		mov	ip, ip, lsl #3
+		ldr	r3, [r0]
+		rsb	ip, ip, #32
+		mov	r3, r3, lsl ip
+		adds	r2, r2, r3, lsr ip
+		adc	r0, r2, #0
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/csumpartialcopy.S b/arch/arm/lib/csumpartialcopy.S
new file mode 100644
index 000000000..7289619da
--- /dev/null
+++ b/arch/arm/lib/csumpartialcopy.S
@@ -0,0 +1,257 @@
+/*
+ * linux/arch/arm/lib/csumpartialcopy.S
+ *
+ * Copyright (C) 1995-1998 Russell King
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+		.text
+
+/* Function: __u32 csum_partial_copy_nocheck(const char *src, char *dst, int len, __u32 sum)
+ * Params  : r0 = src, r1 = dst, r2 = len, r3 = checksum
+ * Returns : r0 = new checksum
+ */
+ENTRY(csum_partial_copy_nocheck)
+		mov	ip, sp
+		stmfd	sp!, {r4 - r8, fp, ip, lr, pc}
+		sub	fp, ip, #4
+		cmp	r2, #4
+		blt	Ltoo_small
+		tst	r1, #2			@ Test destination alignment
+		beq	Ldst_aligned
+		ldrb	ip, [r0], #1
+		ldrb	r8, [r0], #1
+		subs	r2, r2, #2		@ We do not know if SRC is aligned...
+		orr	ip, ip, r8, lsl #8
+		adds	r3, r3, ip
+		adcs	r3, r3, #0
+		strb	ip, [r1], #1
+		mov	ip, ip, lsr #8
+		strb	ip, [r1], #1		@ Destination now aligned
+Ldst_aligned:	tst	r0, #3
+		bne	Lsrc_not_aligned
+		adds	r3, r3, #0
+		bics	ip, r2, #15		@ Routine for src & dst aligned
+		beq	3f
+1:		ldmia	r0!, {r4, r5, r6, r7}
+		stmia	r1!, {r4, r5, r6, r7}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		adcs	r3, r3, r6
+		adcs	r3, r3, r7
+		sub	ip, ip, #16
+		teq	ip, #0
+		bne	1b
+3:		ands	ip, r2, #12
+		beq	5f
+		tst	ip, #8
+		beq	4f
+		ldmia	r0!, {r4, r5}
+		stmia	r1!, {r4, r5}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		tst	ip, #4
+		beq	5f
+4:		ldr	r4, [r0], #4
+		str	r4, [r1], #4
+		adcs	r3, r3, r4
+5:		ands	r2, r2, #3
+		adceq	r0, r3, #0
+		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
+		ldr	r4, [r0], #4
+		tst	r2, #2
+		beq	Lexit_r4
+		adcs	r3, r3, r4, lsl #16
+		strb	r4, [r1], #1
+		mov	r4, r4, lsr #8
+		strb	r4, [r1], #1
+		mov	r4, r4, lsr #8
+		b	Lexit_r4
+
+Ltoo_small:	teq	r2, #0
+		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
+		cmp	r2, #2
+		blt	Ltoo_small1
+		ldrb	ip, [r0], #1
+		ldrb	r8, [r0], #1
+		orr	ip, ip, r8, lsl #8
+		adds	r3, r3, ip
+		strb	ip, [r1], #1
+		strb	r8, [r1], #1
+		tst	r2, #1
+Ltoo_small1:	ldrneb	r4, [r0], #1
+Lexit_r4:	tst	r2, #1
+		strneb	r4, [r1], #1
+		andne	r4, r4, #255
+		adcnes	r3, r3, r4
+		adcs	r0, r3, #0
+		LOADREGS(ea,fp,{r4 - r8, fp, sp, pc})
+
+Lsrc_not_aligned:
+		cmp	r2, #4
+		blt	Ltoo_small
+		and	ip, r0, #3
+		bic	r0, r0, #3
+		ldr	r4, [r0], #4
+		cmp	ip, #2
+		beq	Lsrc2_aligned
+		bhi	Lsrc3_aligned
+		mov	r4, r4, lsr #8
+		adds	r3, r3, #0
+		bics	ip, r2, #15
+		beq	2f
+1:		ldmia	r0!, {r5, r6, r7, r8}
+		orr	r4, r4, r5, lsl #24
+		mov	r5, r5, lsr #8
+		orr	r5, r5, r6, lsl #24
+		mov	r6, r6, lsr #8
+		orr	r6, r6, r7, lsl #24
+		mov	r7, r7, lsr #8
+		orr	r7, r7, r8, lsl #24
+		stmia	r1!, {r4, r5, r6, r7}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		adcs	r3, r3, r6
+		adcs	r3, r3, r7
+		mov	r4, r8, lsr #8
+		sub	ip, ip, #16
+		teq	ip, #0
+		bne	1b
+2:		ands	ip, r2, #12
+		beq	4f
+		tst	ip, #8
+		beq	3f
+		ldmia	r0!, {r5, r6}
+		orr	r4, r4, r5, lsl #24
+		mov	r5, r5, lsr #8
+		orr	r5, r5, r6, lsl #24
+		stmia	r1!, {r4, r5}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		mov	r4, r6, lsr #8
+		tst	ip, #4
+		beq	4f
+3:		ldr	r5, [r0], #4
+		orr	r4, r4, r5, lsl #24
+		str	r4, [r1], #4
+		adcs	r3, r3, r4
+		mov	r4, r5, lsr #8
+4:		ands	r2, r2, #3
+		adceq	r0, r3, #0
+		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
+		tst	r2, #2
+		beq	Lexit_r4
+		adcs	r3, r3, r4, lsl #16
+		strb	r4, [r1], #1
+		mov	r4, r4, lsr #8
+		strb	r4, [r1], #1
+		mov	r4, r4, lsr #8
+		b	Lexit_r4
+
+Lsrc2_aligned:	mov	r4, r4, lsr #16
+		adds	r3, r3, #0
+		bics	ip, r2, #15
+		beq	2f
+1:		ldmia	r0!, {r5, r6, r7, r8}
+		orr	r4, r4, r5, lsl #16
+		mov	r5, r5, lsr #16
+		orr	r5, r5, r6, lsl #16
+		mov	r6, r6, lsr #16
+		orr	r6, r6, r7, lsl #16
+		mov	r7, r7, lsr #16
+		orr	r7, r7, r8, lsl #16
+		stmia	r1!, {r4, r5, r6, r7}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		adcs	r3, r3, r6
+		adcs	r3, r3, r7
+		mov	r4, r8, lsr #16
+		sub	ip, ip, #16
+		teq	ip, #0
+		bne	1b
+2:		ands	ip, r2, #12
+		beq	4f
+		tst	ip, #8
+		beq	3f
+		ldmia	r0!, {r5, r6}
+		orr	r4, r4, r5, lsl #16
+		mov	r5, r5, lsr #16
+		orr	r5, r5, r6, lsl #16
+		stmia	r1!, {r4, r5}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		mov	r4, r6, lsr #16
+		tst	ip, #4
+		beq	4f
+3:		ldr	r5, [r0], #4
+		orr	r4, r4, r5, lsl #16
+		str	r4, [r1], #4
+		adcs	r3, r3, r4
+		mov	r4, r5, lsr #16
+4:		ands	r2, r2, #3
+		adceq	r0, r3, #0
+		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
+		tst	r2, #2
+		beq	Lexit_r4
+		adcs	r3, r3, r4, lsl #16
+		strb	r4, [r1], #1
+		mov	r4, r4, lsr #8
+		strb	r4, [r1], #1
+		ldrb	r4, [r0], #1
+		b	Lexit_r4
+
+Lsrc3_aligned:	mov	r4, r4, lsr #24
+		adds	r3, r3, #0
+		bics	ip, r2, #15
+		beq	2f
+1:		ldmia	r0!, {r5, r6, r7, r8}
+		orr	r4, r4, r5, lsl #8
+		mov	r5, r5, lsr #24
+		orr	r5, r5, r6, lsl #8
+		mov	r6, r6, lsr #24
+		orr	r6, r6, r7, lsl #8
+		mov	r7, r7, lsr #24
+		orr	r7, r7, r8, lsl #8
+		stmia	r1!, {r4, r5, r6, r7}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		adcs	r3, r3, r6
+		adcs	r3, r3, r7
+		mov	r4, r8, lsr #24
+		sub	ip, ip, #16
+		teq	ip, #0
+		bne	1b
+2:		ands	ip, r2, #12
+		beq	4f
+		tst	ip, #8
+		beq	3f
+		ldmia	r0!, {r5, r6}
+		orr	r4, r4, r5, lsl #8
+		mov	r5, r5, lsr #24
+		orr	r5, r5, r6, lsl #8
+		stmia	r1!, {r4, r5}
+		adcs	r3, r3, r4
+		adcs	r3, r3, r5
+		mov	r4, r6, lsr #24
+		tst	ip, #4
+		beq	4f
+3:		ldr	r5, [r0], #4
+		orr	r4, r4, r5, lsl #8
+		str	r4, [r1], #4
+		adcs	r3, r3, r4
+		mov	r4, r5, lsr #24
+4:		ands	r2, r2, #3
+		adceq	r0, r3, #0
+		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
+		tst	r2, #2
+		beq	Lexit_r4
+		adcs	r3, r3, r4, lsl #16
+		strb	r4, [r1], #1
+		ldr	r4, [r0], #4
+		strb	r4, [r1], #1
+		adcs	r3, r3, r4, lsl #24
+		mov	r4, r4, lsr #8
+		b	Lexit_r4
+
+
diff --git a/arch/arm/lib/checksum.S b/arch/arm/lib/csumpartialcopyuser.S
index ae78b657a..f698c0d26 100644
--- a/arch/arm/lib/checksum.S
+++ b/arch/arm/lib/csumpartialcopyuser.S
@@ -1,7 +1,7 @@
 /*
- * linux/arch/arm/lib/checksum.S
+ * linux/arch/arm/lib/csumpartialcopyuser.S
  *
- * Copyright (C) 1995, 1996, 1997, 1998 Russell King
+ * Copyright (C) 1995-1998 Russell King
  */
 #include <linux/config.h>
 #include <linux/linkage.h>
@@ -11,59 +11,6 @@
 
 		.text
 
-/* Function: __u32 csum_partial(const char *src, int len, __u32)
- * Params  : r0 = buffer, r1 = len, r2 = checksum
- * Returns : r0 = new checksum
- */
-
-ENTRY(csum_partial)
-		tst	r0, #2
-		beq	1f
-		subs	r1, r1, #2
-		addmi	r1, r1, #2
-		bmi	3f
-		bic	r0, r0, #3
-		ldr	r3, [r0], #4
-		adds	r2, r2, r3, lsr #16
-		adcs	r2, r2, #0
-1:		adds	r2, r2, #0
-		bics	ip, r1, #31
-		beq	3f
-		stmfd	sp!, {r4 - r6}
-2:		ldmia	r0!, {r3 - r6}
-		adcs	r2, r2, r3
-		adcs	r2, r2, r4
-		adcs	r2, r2, r5
-		adcs	r2, r2, r6
-		ldmia	r0!, {r3 - r6}
-		adcs	r2, r2, r3
-		adcs	r2, r2, r4
-		adcs	r2, r2, r5
-		adcs	r2, r2, r6
-		sub	ip, ip, #32
-		teq	ip, #0
-		bne	2b
-		adcs	r2, r2, #0
-		ldmfd	sp!, {r4 - r6}
-3:		ands	ip, r1, #0x1c
-		beq	5f
-4:		ldr	r3, [r0], #4
-		adcs	r2, r2, r3
-		sub	ip, ip, #4
-		teq	ip, #0
-		bne	4b
-		adcs	r2, r2, #0
-5:		ands	ip, r1, #3
-		moveq	r0, r2
-		RETINSTR(moveq,pc,lr)
-		mov	ip, ip, lsl #3
-		rsb	ip, ip, #32
-		ldr	r3, [r0]
-		mov	r3, r3, lsl ip
-		adds	r2, r2, r3, lsr ip
-		adc	r0, r2, #0
-		RETINSTR(mov,pc,lr)
-
 /* Function: __u32 csum_partial_copy_from_user (const char *src, char *dst, int len, __u32 sum, int *err_ptr)
  * Params  : r0 = src, r1 = dst, r2 = len, r3 = sum, [sp, #0] = &err
  * Returns : r0 = checksum, [[sp, #0], #0] = 0 or -EFAULT
@@ -209,8 +156,8 @@ ENTRY(csum_partial_copy_from_user)
 		blt	.too_small_user
 		tst	r1, #2			@ Test destination alignment
 		beq	.dst_aligned_user
-		subs	r2, r2, #2		@ We do not know if SRC is aligned...
 		load2b	ip, r8
+		subs	r2, r2, #2		@ We do not know if SRC is aligned...
 		orr	ip, ip, r8, lsl #8
 		adds	r3, r3, ip
 		adcs	r3, r3, #0
@@ -393,6 +340,9 @@ ENTRY(csum_partial_copy_from_user)
 		strb	r4, [r1], #1
 		mov	r4, r4, lsr #8
 		strb	r4, [r1], #1
+		tst	r2, #1
+		adceq	r0, r3, #0
+		load_regs	eqea
 		load1b	r4
 		b	.exit
 
@@ -467,268 +417,3 @@ ENTRY(csum_partial_copy_from_user)
 #if defined(CONFIG_CPU_32)
 		.previous
 #endif
-
-/* Function: __u32 csum_partial_copy (const char *src, char *dst, int len, __u32 sum)
- * Params  : r0 = src, r1 = dst, r2 = len, r3 = checksum
- * Returns : r0 = new checksum
- */
-ENTRY(csum_partial_copy_nocheck)
-ENTRY(csum_partial_copy)
-		mov	ip, sp
-		stmfd	sp!, {r4 - r8, fp, ip, lr, pc}
-		sub	fp, ip, #4
-		cmp	r2, #4
-		blt	Ltoo_small
-		tst	r1, #2			@ Test destination alignment
-		beq	Ldst_aligned
-		subs	r2, r2, #2		@ We do not know if SRC is aligned...
-		ldrb	ip, [r0], #1
-		ldrb	r8, [r0], #1
-		orr	ip, ip, r8, lsl #8
-		adds	r3, r3, ip
-		adcs	r3, r3, #0
-		strb	ip, [r1], #1
-		mov	ip, ip, lsr #8
-		strb	ip, [r1], #1		@ Destination now aligned
-Ldst_aligned:	tst	r0, #3
-		bne	Lsrc_not_aligned
-		adds	r3, r3, #0
-		bics	ip, r2, #15		@ Routine for src & dst aligned
-		beq	3f
-1:		ldmia	r0!, {r4, r5, r6, r7}
-		stmia	r1!, {r4, r5, r6, r7}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		adcs	r3, r3, r6
-		adcs	r3, r3, r7
-		sub	ip, ip, #16
-		teq	ip, #0
-		bne	1b
-3:		ands	ip, r2, #12
-		beq	5f
-		tst	ip, #8
-		beq	4f
-		ldmia	r0!, {r4, r5}
-		stmia	r1!, {r4, r5}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		tst	ip, #4
-		beq	5f
-4:		ldr	r4, [r0], #4
-		str	r4, [r1], #4
-		adcs	r3, r3, r4
-5:		ands	r2, r2, #3
-		adceq	r0, r3, #0
-		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
-		ldr	r4, [r0], #4
-		tst	r2, #2
-		beq	Lexit_r4
-		adcs	r3, r3, r4, lsl #16
-		strb	r4, [r1], #1
-		mov	r4, r4, lsr #8
-		strb	r4, [r1], #1
-		mov	r4, r4, lsr #8
-		b	Lexit_r4
-
-Ltoo_small:	teq	r2, #0
-		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
-		cmp	r2, #2
-		blt	Ltoo_small1
-		ldrb	ip, [r0], #1
-		ldrb	r8, [r0], #1
-		orr	ip, ip, r8, lsl #8
-		adds	r3, r3, ip
-		strb	ip, [r1], #1
-		strb	r8, [r1], #1
-		tst	r2, #1
-Ltoo_small1:	ldrneb	r4, [r0], #1
-Lexit_r4:	tst	r2, #1
-		strneb	r4, [r1], #1
-		andne	r4, r4, #255
-		adcnes	r3, r3, r4
-		adcs	r0, r3, #0
-		LOADREGS(ea,fp,{r4 - r8, fp, sp, pc})
-
-Lsrc_not_aligned:
-		cmp	r2, #4
-		blt	Ltoo_small
-		and	ip, r0, #3
-		bic	r0, r0, #3
-		ldr	r4, [r0], #4
-		cmp	ip, #2
-		beq	Lsrc2_aligned
-		bhi	Lsrc3_aligned
-		mov	r4, r4, lsr #8
-		adds	r3, r3, #0
-		bics	ip, r2, #15
-		beq	2f
-1:		ldmia	r0!, {r5, r6, r7, r8}
-		orr	r4, r4, r5, lsl #24
-		mov	r5, r5, lsr #8
-		orr	r5, r5, r6, lsl #24
-		mov	r6, r6, lsr #8
-		orr	r6, r6, r7, lsl #24
-		mov	r7, r7, lsr #8
-		orr	r7, r7, r8, lsl #24
-		stmia	r1!, {r4, r5, r6, r7}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		adcs	r3, r3, r6
-		adcs	r3, r3, r7
-		mov	r4, r8, lsr #8
-		sub	ip, ip, #16
-		teq	ip, #0
-		bne	1b
-2:		ands	ip, r2, #12
-		beq	4f
-		tst	ip, #8
-		beq	3f
-		ldmia	r0!, {r5, r6}
-		orr	r4, r4, r5, lsl #24
-		mov	r5, r5, lsr #8
-		orr	r5, r5, r6, lsl #24
-		stmia	r1!, {r4, r5}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		mov	r4, r6, lsr #8
-		tst	ip, #4
-		beq	4f
-3:		ldr	r5, [r0], #4
-		orr	r4, r4, r5, lsl #24
-		str	r4, [r1], #4
-		adcs	r3, r3, r4
-		mov	r4, r5, lsr #8
-4:		ands	r2, r2, #3
-		adceq	r0, r3, #0
-		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
-		tst	r2, #2
-		beq	Lexit_r4
-		adcs	r3, r3, r4, lsl #16
-		strb	r4, [r1], #1
-		mov	r4, r4, lsr #8
-		strb	r4, [r1], #1
-		mov	r4, r4, lsr #8
-		b	Lexit_r4
-
-Lsrc2_aligned:	mov	r4, r4, lsr #16
-		adds	r3, r3, #0
-		bics	ip, r2, #15
-		beq	2f
-1:		ldmia	r0!, {r5, r6, r7, r8}
-		orr	r4, r4, r5, lsl #16
-		mov	r5, r5, lsr #16
-		orr	r5, r5, r6, lsl #16
-		mov	r6, r6, lsr #16
-		orr	r6, r6, r7, lsl #16
-		mov	r7, r7, lsr #16
-		orr	r7, r7, r8, lsl #16
-		stmia	r1!, {r4, r5, r6, r7}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		adcs	r3, r3, r6
-		adcs	r3, r3, r7
-		mov	r4, r8, lsr #16
-		sub	ip, ip, #16
-		teq	ip, #0
-		bne	1b
-2:		ands	ip, r2, #12
-		beq	4f
-		tst	ip, #8
-		beq	3f
-		ldmia	r0!, {r5, r6}
-		orr	r4, r4, r5, lsl #16
-		mov	r5, r5, lsr #16
-		orr	r5, r5, r6, lsl #16
-		stmia	r1!, {r4, r5}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		mov	r4, r6, lsr #16
-		tst	ip, #4
-		beq	4f
-3:		ldr	r5, [r0], #4
-		orr	r4, r4, r5, lsl #16
-		str	r4, [r1], #4
-		adcs	r3, r3, r4
-		mov	r4, r5, lsr #16
-4:		ands	r2, r2, #3
-		adceq	r0, r3, #0
-		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
-		tst	r2, #2
-		beq	Lexit_r4
-		adcs	r3, r3, r4, lsl #16
-		strb	r4, [r1], #1
-		mov	r4, r4, lsr #8
-		strb	r4, [r1], #1
-		ldrb	r4, [r0], #1
-		b	Lexit_r4
-
-Lsrc3_aligned:	mov	r4, r4, lsr #24
-		adds	r3, r3, #0
-		bics	ip, r2, #15
-		beq	2f
-1:		ldmia	r0!, {r5, r6, r7, r8}
-		orr	r4, r4, r5, lsl #8
-		mov	r5, r5, lsr #24
-		orr	r5, r5, r6, lsl #8
-		mov	r6, r6, lsr #24
-		orr	r6, r6, r7, lsl #8
-		mov	r7, r7, lsr #24
-		orr	r7, r7, r8, lsl #8
-		stmia	r1!, {r4, r5, r6, r7}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		adcs	r3, r3, r6
-		adcs	r3, r3, r7
-		mov	r4, r8, lsr #24
-		sub	ip, ip, #16
-		teq	ip, #0
-		bne	1b
-2:		ands	ip, r2, #12
-		beq	4f
-		tst	ip, #8
-		beq	3f
-		ldmia	r0!, {r5, r6}
-		orr	r4, r4, r5, lsl #8
-		mov	r5, r5, lsr #24
-		orr	r5, r5, r6, lsl #8
-		stmia	r1!, {r4, r5}
-		adcs	r3, r3, r4
-		adcs	r3, r3, r5
-		mov	r4, r6, lsr #24
-		tst	ip, #4
-		beq	4f
-3:		ldr	r5, [r0], #4
-		orr	r4, r4, r5, lsl #8
-		str	r4, [r1], #4
-		adcs	r3, r3, r4
-		mov	r4, r5, lsr #24
-4:		ands	r2, r2, #3
-		adceq	r0, r3, #0
-		LOADREGS(eqea,fp,{r4 - r8, fp, sp, pc})
-		tst	r2, #2
-		beq	Lexit_r4
-		adcs	r3, r3, r4, lsl #16
-		strb	r4, [r1], #1
-		ldr	r4, [r0], #4
-		strb	r4, [r1], #1
-		adcs	r3, r3, r4, lsl #24
-		mov	r4, r4, lsr #8
-		b	Lexit_r4
-
-ENTRY(__csum_ipv6_magic)
-		stmfd	sp!, {lr}
-		adds	ip, r2, r3
-		ldmia	r1, {r1 - r3, lr}
-		adcs	ip, ip, r1
-		adcs	ip, ip, r2
-		adcs	ip, ip, r3
-		adcs	ip, ip, lr
-		ldmia	r0, {r0 - r3}
-		adcs	r0, ip, r0
-		adcs	r0, r0, r1
-		adcs	r0, r0, r2
-		adcs	r0, r0, r3
-		ldr	r3, [sp, #4]
-		adcs	r0, r0, r3
-		adcs	r0, r0, #0
-		LOADREGS(fd, sp!, {pc})
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
new file mode 100644
index 000000000..e1651904f
--- /dev/null
+++ b/arch/arm/lib/findbit.S
@@ -0,0 +1,65 @@
+/*
+ * linux/arch/arm/lib/bitops.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+@ Purpose  : Find a 'zero' bit
+@ Prototype: int find_first_zero_bit(char *addr,int maxbit);
+
+ENTRY(find_first_zero_bit)
+		mov	r2, #0			@ Initialise bit position
+Lfindzbit1lp:	ldrb	r3, [r0, r2, lsr #3]	@ Check byte, if 0xFF, then all bits set
+		teq	r3, #0xFF
+		bne	Lfoundzbit
+		add	r2, r2, #8
+		cmp	r2, r1			@ Check to see if we have come to the end
+		bcc	Lfindzbit1lp
+		add	r0, r1, #1		@ Make sure that we flag an error
+		RETINSTR(mov,pc,lr)
+Lfoundzbit:	tst	r3, #1			@ Check individual bits
+		moveq	r0, r2
+		RETINSTR(moveq,pc,lr)
+		tst	r3, #2
+		addeq	r0, r2, #1
+		RETINSTR(moveq,pc,lr)
+		tst	r3, #4
+		addeq	r0, r2, #2
+		RETINSTR(moveq,pc,lr)
+		tst	r3, #8
+		addeq	r0, r2, #3
+		RETINSTR(moveq,pc,lr)
+		tst	r3, #16
+		addeq	r0, r2, #4
+		RETINSTR(moveq,pc,lr)
+		tst	r3, #32
+		addeq	r0, r2, #5
+		RETINSTR(moveq,pc,lr)
+		tst	r3, #64
+		addeq	r0, r2, #6
+		RETINSTR(moveq,pc,lr)
+		add	r0, r2, #7
+		RETINSTR(mov,pc,lr)
+
+@ Purpose  : Find next 'zero' bit
+@ Prototype: int find_next_zero_bit(char *addr,int maxbit,int offset)
+
+ENTRY(find_next_zero_bit)
+		tst	r2, #7
+		beq	Lfindzbit1lp		@ If new byte, goto old routine
+		ldrb	r3, [r0, r2, lsr#3]
+		orr	r3, r3, #0xFF00		@ Set top bits so we wont get confused
+		stmfd	sp!, {r4}
+		and	r4, r2, #7
+		mov	r3, r3, lsr r4		@ Shift right by no. of bits
+		ldmfd	sp!, {r4}
+		and	r3, r3, #0xFF
+		teq	r3, #0xFF
+		orreq	r2, r2, #7
+		addeq	r2, r2, #1
+		beq	Lfindzbit1lp		@ If all bits are set, goto old routine
+		b	Lfoundzbit
diff --git a/arch/arm/lib/getconsdata.c b/arch/arm/lib/getconsdata.c
index 5b46baad0..aaa7a7ad2 100644
--- a/arch/arm/lib/getconsdata.c
+++ b/arch/arm/lib/getconsdata.c
@@ -10,6 +10,16 @@
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
 
+/*
+ * Make sure that the compiler and target are compatible
+ */
+#if (defined(__APCS_32__) && defined(CONFIG_CPU_26))
+#error Your compiler targets APCS-32 but this kernel requires APCS-26.
+#endif
+#if (defined(__APCS_26__) && defined(CONFIG_CPU_32))
+#error Your compiler targets APCS-26 but this kernel requires APCS-32.
+#endif
+
 #undef PAGE_READONLY
 
 #define OFF_TSK(n) (unsigned long)&(((struct task_struct *)0)->n)
diff --git a/arch/arm/lib/io-footbridge.S b/arch/arm/lib/io-footbridge.S
index 0734c6042..98f751258 100644
--- a/arch/arm/lib/io-footbridge.S
+++ b/arch/arm/lib/io-footbridge.S
@@ -6,7 +6,9 @@
 
 		.macro	ioaddr, rd,rn
 		add	\rd, \rn, #pcio_high
+		.if	pcio_low
 		add	\rd, \rd, #pcio_low
+		.endif
 		.endm
 
 ENTRY(insl)
diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S
new file mode 100644
index 000000000..d52abe57f
--- /dev/null
+++ b/arch/arm/lib/memchr.S
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/lib/memchr.S
+ *
+ * Copyright (C) 1995-1999 Russell King
+ *
+ * ASM optimised string functions
+ *
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include "constants.h"
+
+		.text
+ENTRY(memchr)
+		str	lr, [sp, #-4]!
+1:		ldrb	r3, [r0], #1
+		teq	r3, r1
+		beq	2f
+		subs	r2, r2, #1
+		bpl	1b
+2:		movne	r0, #0
+		subeq	r0, r0, #1
+		LOADREGS(fd, sp!, {pc})
+
diff --git a/arch/arm/lib/string.S b/arch/arm/lib/memcpy.S
index ff809fd51..ae5307d4b 100644
--- a/arch/arm/lib/string.S
+++ b/arch/arm/lib/memcpy.S
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/lib/string.S
+ * linux/arch/arm/lib/memcpy.S
  *
  * Copyright (C) 1995-1999 Russell King
  *
@@ -12,207 +12,6 @@
 
 		.text
 
-/*
- * Prototype: void memzero(void *d, size_t n)
- */
-1:		@ 4 <= r1
-		cmp	ip, #2				@	1
-		strltb	r2, [r0], #1			@	1
-		strleb	r2, [r0], #1			@	1
-		strb	r2, [r0], #1			@	1
-		rsb	ip, ip, #4			@	1
-		sub	r1, r1, ip			@	1
-		cmp	r1, #3				@	1
-		bgt	2f				@	1	@ +8
-		b	4f				@	1	@ +9
-
-		.align	5
-
-ENTRY(__memzero)
-		mov	r2, #0				@	1
-		cmp	r1, #4				@	1
-		blt	4f				@	1	@ = 3
-
-		@ r1 >= 4
-
-		ands	ip, r0, #3			@	1
-		bne	1b				@	1	@ = 5
-
-2:		@ r1 >= 4 && (r0 & 3) = 0				@ = 5 or 11
-
-		str	lr, [sp, #-4]!			@	1
-		mov	r3, #0				@	1
-		mov	ip, #0				@	1
-		mov	lr, #0				@	1
-
-		@ 4 <= r1 <= 32						@ = 9 or 15
-
-3:		subs	r1, r1, #32			@	1
-		stmgeia	r0!, {r2, r3, ip, lr}		@	4
-		stmgeia	r0!, {r2, r3, ip, lr}		@	4
-		bgt	3b				@	1
-		LOADREGS(eqfd, sp!, {pc})		@	1/2
-
-		@ -28 <= r1 <= -1
-
-		cmp	r1, #-16			@	1
-		stmgeia	r0!, {r2, r3, ip, lr}		@	4
-		ldr	lr, [sp], #4			@	1
-		addlts	r1, r1, #16			@	1
-		RETINSTR(moveq,pc,lr)			@	1
-
-		@ -12 <= r1 <= -1
-
-		cmp	r1, #-8				@	1
-		stmgeia	r0!, {r2, r3}			@	2
-		addlts	r1, r1, #8			@	1
-		RETINSTR(moveq,pc,lr)			@	1
-
-		@ -4 <= r1 <= -1
-
-		cmp	r1, #-4				@	1
-		strge	r2, [r0], #4			@	1
-		adds	r1, r1, #4			@	1
-		RETINSTR(moveq,pc,lr)			@	1
-
-4:		@ 1 <= r1 <= 3
-		cmp	r1, #2				@	1
-		strgtb	r2, [r0], #1			@	1
-		strgeb	r2, [r0], #1			@	1
-		strb	r2, [r0], #1			@	1
-		RETINSTR(mov,pc,lr)			@	1
-
-/*
- * StrongARM optimised copy_page routine
- * now 1.72bytes/cycle, was 1.60 bytes/cycle
- * (50MHz bus -> 86MB/s)
- */
-
-ENTRY(copy_page)
-		stmfd	sp!, {r4, lr}			@	2
-		mov	r2, #PAGE_SZ/64			@	1
-1:		ldmia	r1!, {r3, r4, ip, lr}		@	4
-		subs	r2, r2, #1			@	1
-		stmia	r0!, {r3, r4, ip, lr}		@	4
-		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
-		stmia	r0!, {r3, r4, ip, lr}		@	4
-		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
-		stmia	r0!, {r3, r4, ip, lr}		@	4
-		ldmia	r1!, {r3, r4, ip, lr}		@	4+1
-		stmia	r0!, {r3, r4, ip, lr}		@	4
-		bne	1b				@	1
-		LOADREGS(fd, sp!, {r4, pc})		@	3
-
-		.align	5
-ENTRY(memset)		/* needed for some versions of gcc */
-ENTRY(__memset)
-		mov	r3, r0
-		cmp	r2, #16
-		blt	6f
-		ands	ip, r3, #3
-		beq	1f
-		cmp	ip, #2
-		strltb	r1, [r3], #1			@ Align destination
-		strleb	r1, [r3], #1
-		strb	r1, [r3], #1
-		rsb	ip, ip, #4
-		sub	r2, r2, ip
-1:		orr	r1, r1, r1, lsl #8
-		orr	r1, r1, r1, lsl #16
-		cmp	r2, #256
-		blt	4f
-		stmfd	sp!, {r4, r5, lr}
-		mov	r4, r1
-		mov	r5, r1
-		mov	lr, r1
-		mov	ip, r2, lsr #6
-		sub	r2, r2, ip, lsl #6
-2:		stmia	r3!, {r1, r4, r5, lr}		@ 64 bytes at a time.
-		stmia	r3!, {r1, r4, r5, lr}
-		stmia	r3!, {r1, r4, r5, lr}
-		stmia	r3!, {r1, r4, r5, lr}
-		subs	ip, ip, #1
-		bne	2b
-		teq	r2, #0
-		LOADREGS(eqfd, sp!, {r4, r5, pc})	@ Now <64 bytes to go.
-		tst	r2, #32
-		stmneia	r3!, {r1, r4, r5, lr}
-		stmneia	r3!, {r1, r4, r5, lr}
-		tst	r2, #16
-		stmneia	r3!, {r1, r4, r5, lr}
-		ldmia	sp!, {r4, r5}
-3:		tst	r2, #8
-		stmneia	r3!, {r1, lr}
-		tst	r2, #4
-		strne	r1, [r3], #4
-		tst	r2, #2
-		strneb	r1, [r3], #1
-		strneb	r1, [r3], #1
-		tst	r2, #1
-		strneb	r1, [r3], #1
-		LOADREGS(fd, sp!, {pc})
-
-4:		movs	ip, r2, lsr #3
-		beq	3b
-		sub	r2, r2, ip, lsl #3
-		stmfd	sp!, {lr}
-		mov	lr, r1
-		subs	ip, ip, #4
-5:		stmgeia	r3!, {r1, lr}
-		stmgeia	r3!, {r1, lr}
-		stmgeia	r3!, {r1, lr}
-		stmgeia	r3!, {r1, lr}
-		subges	ip, ip, #4
-		bge	5b
-		tst	ip, #2
-		stmneia	r3!, {r1, lr}
-		stmneia	r3!, {r1, lr}
-		tst	ip, #1
-		stmneia	r3!, {r1, lr}
-		teq	r2, #0
-		LOADREGS(eqfd, sp!, {pc})
-		b	3b
-
-6:		subs	r2, r2, #1
-		strgeb	r1, [r3], #1
-		bgt	6b
-		RETINSTR(mov, pc, lr)
-
-ENTRY(strrchr)
-		stmfd	sp!, {lr}
-		mov	r3, #0
-1:		ldrb	r2, [r0], #1
-		teq	r2, r1
-		moveq	r3, r0
-		teq	r2, #0
-		bne	1b
-		mov	r0, r3
-		LOADREGS(fd, sp!, {pc})
-
-ENTRY(strchr)
-		stmfd	sp!,{lr}
-		mov	r3, #0
-1:		ldrb	r2, [r0], #1
-		teq	r2, r1
-		teqne	r2, #0
-		bne	1b
-		teq	r2, #0
-		moveq	r0, #0
-		subne	r0, r0, #1
-		LOADREGS(fd, sp!, {pc})
-
-ENTRY(memchr)
-		stmfd	sp!, {lr}
-1:		ldrb	r3, [r0], #1
-		teq	r3, r1
-		beq	2f
-		subs	r2, r2, #1
-		bpl	1b
-2:		movne	r0, #0
-		subeq	r0, r0, #1
-		LOADREGS(fd, sp!, {pc})
-
-
 #define ENTER	\
 		mov	ip,sp	;\
 		stmfd	sp!,{r4-r9,fp,ip,lr,pc}	;\
@@ -261,30 +60,30 @@ ENTRY(memmove)
 		blt	6f
 		subs	r2, r2, #4
 		ldrlt	r3, [r1], #4
+		ldmgeia	r1!, {r4, r5}
 		strlt	r3, [r0], #4
-		ldmgeia	r1!, {r3, r4}
-		stmgeia	r0!, {r3, r4}
+		stmgeia	r0!, {r4, r5}
 		subge	r2, r2, #4
 
 6:		adds	r2, r2, #4
 		EXITEQ
 		cmp	r2, #2
 		ldrb	r3, [r1], #1
+		ldrgeb	r4, [r1], #1
+		ldrgtb	r5, [r1], #1
 		strb	r3, [r0], #1
-		ldrgeb	r3, [r1], #1
-		strgeb	r3, [r0], #1
-		ldrgtb	r3, [r1], #1
-		strgtb	r3, [r0], #1
+		strgeb	r4, [r0], #1
+		strgtb	r5, [r0], #1
 		EXIT
 
 7:		rsb	ip, ip, #4
 		cmp	ip, #2
 		ldrb	r3, [r1], #1
+		ldrgeb	r4, [r1], #1
+		ldrgtb	r5, [r1], #1
 		strb	r3, [r0], #1
-		ldrgeb	r3, [r1], #1
-		strgeb	r3, [r0], #1
-		ldrgtb	r3, [r1], #1
-		strgtb	r3, [r0], #1
+		strgeb	r4, [r0], #1
+		strgtb	r5, [r0], #1
 		subs	r2, r2, ip
 		blt	6b
 		ands	ip, r1, #3
@@ -314,9 +113,9 @@ ENTRY(memmove)
 		blt	100f
 10:		mov	r3, r7, lsr #8
 		ldr	r7, [r1], #4
+		subs	r2, r2, #4
 		orr	r3, r3, r7, lsl #24
 		str	r3, [r0], #4
-		subs	r2, r2, #4
 		bge	10b
 100:		sub	r1, r1, #3
 		b	6b
@@ -340,9 +139,9 @@ ENTRY(memmove)
 		blt	14f
 13:		mov	r3, r7, lsr #16
 		ldr	r7, [r1], #4
+		subs	r2, r2, #4
 		orr	r3, r3, r7, lsl #16
 		str	r3, [r0], #4
-		subs	r2, r2, #4
 		bge	13b
 14:		sub	r1, r1, #2
 		b	6b
@@ -366,9 +165,9 @@ ENTRY(memmove)
 		blt	18f
 17:		mov	r3, r7, lsr #24
 		ldr	r7, [r1], #4
+		subs	r2, r2, #4
 		orr	r3, r3, r7, lsl#8
 		str	r3, [r0], #4
-		subs	r2, r2, #4
 		bge	17b
 18:		sub	r1, r1, #1
 		b	6b
@@ -403,29 +202,29 @@ ENTRY(memmove)
 		blt	24f
 		subs	r2, r2, #4
 		ldrlt	r3, [r1, #-4]!
+		ldmgedb	r1!, {r4, r5}
 		strlt	r3, [r0, #-4]!
-		ldmgedb	r1!, {r3, r4}
-		stmgedb	r0!, {r3, r4}
+		stmgedb	r0!, {r4, r5}
 		subge	r2, r2, #4
 
 24:		adds	r2, r2, #4
 		EXITEQ
 		cmp	r2, #2
 		ldrb	r3, [r1, #-1]!
+		ldrgeb	r4, [r1, #-1]!
+		ldrgtb	r5, [r1, #-1]!
 		strb	r3, [r0, #-1]!
-		ldrgeb	r3, [r1, #-1]!
-		strgeb	r3, [r0, #-1]!
-		ldrgtb	r3, [r1, #-1]!
-		strgtb	r3, [r0, #-1]!
+		strgeb	r4, [r0, #-1]!
+		strgtb	r5, [r0, #-1]!
 		EXIT
 
 25:		cmp	ip, #2
 		ldrb	r3, [r1, #-1]!
+		ldrgeb	r4, [r1, #-1]!
+		ldrgtb	r5, [r1, #-1]!
 		strb	r3, [r0, #-1]!
-		ldrgeb	r3, [r1, #-1]!
-		strgeb	r3, [r0, #-1]!
-		ldrgtb	r3, [r1, #-1]!
-		strgtb	r3, [r0, #-1]!
+		strgeb	r4, [r0, #-1]!
+		strgtb	r5, [r0, #-1]!
 		subs	r2, r2, ip
 		blt	24b
 		ands	ip, r1, #3
@@ -455,9 +254,9 @@ ENTRY(memmove)
 		blt	29f
 28:		mov	ip, r3, lsl #8
 		ldr	r3, [r1, #-4]!
+		subs	r2, r2, #4
 		orr	ip, ip, r3, lsr #24
 		str	ip, [r0, #-4]!
-		subs	r2, r2, #4
 		bge	28b
 29:		add	r1, r1, #3
 		b	24b
@@ -481,9 +280,9 @@ ENTRY(memmove)
 		blt	33f
 32:		mov	ip, r3, lsl #16
 		ldr	r3, [r1, #-4]!
+		subs	r2, r2, #4
 		orr	ip, ip, r3, lsr #16
 		str	ip, [r0, #-4]!
-		subs	r2, r2, #4
 		bge	32b
 33:		add	r1, r1, #2
 		b	24b
@@ -507,9 +306,9 @@ ENTRY(memmove)
 		blt	37f
 36:		mov	ip, r3, lsl #24
 		ldr	r3, [r1, #-4]!
+		subs	r2, r2, #4
 		orr	ip, ip, r3, lsr #8
 		str	ip, [r0, #-4]!
-		subs	r2, r2, #4
 		bge	36b
 37:		add	r1, r1, #1
 		b	24b
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
new file mode 100644
index 000000000..b7202e867
--- /dev/null
+++ b/arch/arm/lib/memset.S
@@ -0,0 +1,88 @@
+/*
+ * linux/arch/arm/lib/memset.S
+ *
+ * Copyright (C) 1995-1999 Russell King
+ *
+ * ASM optimised string functions
+ *
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include "constants.h"
+
+		.text
+		.align	5
+ENTRY(memset)
+		mov	r3, r0
+		cmp	r2, #16
+		blt	6f
+		ands	ip, r3, #3
+		beq	1f
+		cmp	ip, #2
+		strltb	r1, [r3], #1			@ Align destination
+		strleb	r1, [r3], #1
+		strb	r1, [r3], #1
+		rsb	ip, ip, #4
+		sub	r2, r2, ip
+1:		orr	r1, r1, r1, lsl #8
+		orr	r1, r1, r1, lsl #16
+		cmp	r2, #256
+		blt	4f
+		stmfd	sp!, {r4, r5, lr}
+		mov	r4, r1
+		mov	r5, r1
+		mov	lr, r1
+		mov	ip, r2, lsr #6
+		sub	r2, r2, ip, lsl #6
+2:		stmia	r3!, {r1, r4, r5, lr}		@ 64 bytes at a time.
+		stmia	r3!, {r1, r4, r5, lr}
+		stmia	r3!, {r1, r4, r5, lr}
+		stmia	r3!, {r1, r4, r5, lr}
+		subs	ip, ip, #1
+		bne	2b
+		teq	r2, #0
+		LOADREGS(eqfd, sp!, {r4, r5, pc})	@ Now <64 bytes to go.
+		tst	r2, #32
+		stmneia	r3!, {r1, r4, r5, lr}
+		stmneia	r3!, {r1, r4, r5, lr}
+		tst	r2, #16
+		stmneia	r3!, {r1, r4, r5, lr}
+		ldmia	sp!, {r4, r5}
+3:		tst	r2, #8
+		stmneia	r3!, {r1, lr}
+		tst	r2, #4
+		strne	r1, [r3], #4
+		tst	r2, #2
+		strneb	r1, [r3], #1
+		strneb	r1, [r3], #1
+		tst	r2, #1
+		strneb	r1, [r3], #1
+		LOADREGS(fd, sp!, {pc})
+
+4:		movs	ip, r2, lsr #3
+		beq	3b
+		sub	r2, r2, ip, lsl #3
+		str	lr, [sp, #-4]!		
+		mov	lr, r1
+		subs	ip, ip, #4
+5:		stmgeia	r3!, {r1, lr}
+		stmgeia	r3!, {r1, lr}
+		stmgeia	r3!, {r1, lr}
+		stmgeia	r3!, {r1, lr}
+		subges	ip, ip, #4
+		bge	5b
+		tst	ip, #2
+		stmneia	r3!, {r1, lr}
+		stmneia	r3!, {r1, lr}
+		tst	ip, #1
+		stmneia	r3!, {r1, lr}
+		teq	r2, #0
+		LOADREGS(eqfd, sp!, {pc})
+		b	3b
+
+6:		subs	r2, r2, #1
+		strgeb	r1, [r3], #1
+		bgt	6b
+		RETINSTR(mov, pc, lr)
+
+
diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S
new file mode 100644
index 000000000..59ec36574
--- /dev/null
+++ b/arch/arm/lib/memzero.S
@@ -0,0 +1,80 @@
+/*
+ * linux/arch/arm/lib/memzero.S
+ *
+ * Copyright (C) 1995-1999 Russell King
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include "constants.h"
+
+		.text
+
+/*
+ * Prototype: void memzero(void *d, size_t n)
+ */
+1:		@ 4 <= r1
+		cmp	ip, #2				@	1
+		strltb	r2, [r0], #1			@	1
+		strleb	r2, [r0], #1			@	1
+		strb	r2, [r0], #1			@	1
+		rsb	ip, ip, #4			@	1
+		sub	r1, r1, ip			@	1
+		cmp	r1, #3				@	1
+		bgt	2f				@	1	@ +8
+		b	4f				@	1	@ +9
+
+		.align	5
+
+ENTRY(__memzero)
+		mov	r2, #0				@	1
+		cmp	r1, #4				@	1
+		blt	4f				@	1	@ = 3
+
+		@ r1 >= 4
+
+		ands	ip, r0, #3			@	1
+		bne	1b				@	1	@ = 5
+
+2:		@ r1 >= 4 && (r0 & 3) = 0				@ = 5 or 11
+
+		str	lr, [sp, #-4]!			@	1
+		mov	r3, #0				@	1
+		mov	ip, #0				@	1
+		mov	lr, #0				@	1
+
+		@ 4 <= r1 <= 32						@ = 9 or 15
+
+3:		subs	r1, r1, #32			@	1
+		stmgeia	r0!, {r2, r3, ip, lr}		@	4
+		stmgeia	r0!, {r2, r3, ip, lr}		@	4
+		bgt	3b				@	1
+		LOADREGS(eqfd, sp!, {pc})		@	1/2
+
+		@ -28 <= r1 <= -1
+
+		cmp	r1, #-16			@	1
+		stmgeia	r0!, {r2, r3, ip, lr}		@	4
+		ldr	lr, [sp], #4			@	1
+		addlts	r1, r1, #16			@	1
+		RETINSTR(moveq,pc,lr)			@	1
+
+		@ -12 <= r1 <= -1
+
+		cmp	r1, #-8				@	1
+		stmgeia	r0!, {r2, r3}			@	2
+		addlts	r1, r1, #8			@	1
+		RETINSTR(moveq,pc,lr)			@	1
+
+		@ -4 <= r1 <= -1
+
+		cmp	r1, #-4				@	1
+		strge	r2, [r0], #4			@	1
+		adds	r1, r1, #4			@	1
+		RETINSTR(moveq,pc,lr)			@	1
+
+4:		@ 1 <= r1 <= 3
+		cmp	r1, #2				@	1
+		strgtb	r2, [r0], #1			@	1
+		strgeb	r2, [r0], #1			@	1
+		strb	r2, [r0], #1			@	1
+		RETINSTR(mov,pc,lr)			@	1
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
new file mode 100644
index 000000000..b4319b4c3
--- /dev/null
+++ b/arch/arm/lib/setbit.S
@@ -0,0 +1,26 @@
+/*
+ * linux/arch/arm/lib/setbit.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+@ Purpose  : Function to set a bit
+@ Prototype: int set_bit(int bit,int *addr)
+
+ENTRY(set_bit)
+                and     r2, r0, #7
+                mov     r3, #1
+                mov     r3, r3, lsl r2
+		SAVEIRQS(ip)
+		DISABLEIRQS(ip)
+		ldrb	r2, [r1, r0, lsr #3]
+		orr	r2, r2, r3
+		strb	r2, [r1, r0, lsr #3]
+		RESTOREIRQS(ip)
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S
new file mode 100644
index 000000000..fbde2483f
--- /dev/null
+++ b/arch/arm/lib/strchr.S
@@ -0,0 +1,26 @@
+/*
+ * linux/arch/arm/lib/strchr.S
+ *
+ * Copyright (C) 1995-1999 Russell King
+ *
+ * ASM optimised string functions
+ *
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include "constants.h"
+
+		.text
+ENTRY(strchr)
+		str	lr, [sp, #-4]!
+		mov	r3, #0
+1:		ldrb	r2, [r0], #1
+		teq	r2, r1
+		teqne	r2, #0
+		bne	1b
+		teq	r2, #0
+		moveq	r0, #0
+		subne	r0, r0, #1
+		LOADREGS(fd, sp!, {pc})
+
+
diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S
new file mode 100644
index 000000000..ad5a46089
--- /dev/null
+++ b/arch/arm/lib/strrchr.S
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/arm/lib/strrchr.S
+ *
+ * Copyright (C) 1995-1999 Russell King
+ *
+ * ASM optimised string functions
+ *
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include "constants.h"
+
+		.text
+ENTRY(strrchr)
+		stmfd	sp!, {lr}
+		mov	r3, #0
+1:		ldrb	r2, [r0], #1
+		teq	r2, r1
+		moveq	r3, r0
+		teq	r2, #0
+		bne	1b
+		mov	r0, r3
+		LOADREGS(fd, sp!, {pc})
+
+
diff --git a/arch/arm/lib/system.c b/arch/arm/lib/system.c
deleted file mode 100644
index f3b32cd82..000000000
--- a/arch/arm/lib/system.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * linux/arch/arm/lib/system.c
- *
- * Copyright (C) 1999 Russell King
- *
- * Converted from ASM version 04/09/1999
- */
-#include <linux/kernel.h>
-
-extern void abort(void)
-{
-	void *lr = __builtin_return_address(0);
-
-	printk(KERN_CRIT "kernel abort from %p!  (Please report to rmk@arm.linux.org.uk)\n",
-		lr);
-
-	/* force an oops */
-	*(int *)0 = 0;
-
-	/* if that doesn't kill us, halt */
-	panic("Oops failed to kill thread");
-}
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
new file mode 100644
index 000000000..d3dd48216
--- /dev/null
+++ b/arch/arm/lib/testchangebit.S
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/arm/lib/testchangebit.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+ENTRY(test_and_change_bit)
+		add	r1, r1, r0, lsr #3
+		and	r3, r0, #7
+		mov	r0, #1
+		SAVEIRQS(ip)
+		DISABLEIRQS(ip)
+		ldrb	r2, [r1]
+		tst	r2, r0, lsl r3
+		eor	r2, r2, r0, lsl r3
+		moveq	r0, #0
+		strb	r2, [r1]
+		RESTOREIRQS(ip)
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
new file mode 100644
index 000000000..431865302
--- /dev/null
+++ b/arch/arm/lib/testclearbit.S
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/arm/lib/testclearbit.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+ENTRY(test_and_clear_bit)
+		add	r1, r1, r0, lsr #3	@ Get byte offset
+		and	r3, r0, #7	@ Get bit offset
+		mov	r0, #1
+		SAVEIRQS(ip)
+		DISABLEIRQS(ip)
+		ldrb	r2, [r1]
+		tst	r2, r0, lsl r3
+		bic	r2, r2, r0, lsl r3
+		moveq	r0, #0
+		strb	r2, [r1]
+		RESTOREIRQS(ip)
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
new file mode 100644
index 000000000..760b6649d
--- /dev/null
+++ b/arch/arm/lib/testsetbit.S
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/arm/lib/testsetbit.S
+ *
+ * Copyright (C) 1995-1996 Russell King
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+                .text
+
+ENTRY(test_and_set_bit)
+		add	r1, r1, r0, lsr #3	@ Get byte offset
+		and	r3, r0, #7		@ Get bit offset
+		mov	r0, #1
+		SAVEIRQS(ip)
+		DISABLEIRQS(ip)
+		ldrb	r2, [r1]
+		tst	r2, r0, lsl r3
+		orr	r2, r2, r0, lsl r3
+		moveq	r0, #0
+		strb	r2, [r1]
+		RESTOREIRQS(ip)
+		RETINSTR(mov,pc,lr)
+
+
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index 898d2ef77..00f987b5f 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -12,21 +12,13 @@
 #include <asm/errno.h>
 
 		.text
-#ifdef ENTRY
+
 #define USER(x...)					\
 9999:		x;					\
 		.section __ex_table,"a";		\
 		.align	3;				\
 		.long	9999b,9001f;			\
 		.previous
-#else
-#define USER(x...)					\
-		x
-#define ENTRY(x...)					\
-		.globl	_##x;				\
-_##x:
-#define TESTING
-#endif
 
 #define PAGE_SHIFT 12
 
@@ -285,12 +277,10 @@ USER(		strgebt	r3, [r0], #1)			@ May fault
 USER(		strgtbt	r3, [r0], #1)			@ May fault
 		b	.c2u_finished
 
-#ifndef TESTING
 		.section .fixup,"ax"
 		.align	0
 9001:		LOADREGS(fd,sp!, {r0, r4 - r7, pc})
 		.previous
-#endif
 
 /* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n);
  * Purpose  : copy a block from user memory to kernel memory
@@ -546,7 +536,6 @@ USER(		ldrget	r3, [r1], #0)			@ May fault
 		strgtb	r3, [r0], #1
 		b	.cfu_finished
 
-#ifndef TESTING
 		.section .fixup,"ax"
 		.align	0
 		/* We took an exception.  Zero out the buffer and pretend no
@@ -557,7 +546,6 @@ USER(		ldrget	r3, [r1], #0)			@ May fault
 		blne	SYMBOL_NAME(__memzero)
 		LOADREGS(fd,sp!, {r0, r4 - r7, pc})
 		.previous
-#endif
 
 /* Prototype: int __arch_clear_user(void *addr, size_t sz)
  * Purpose  : clear some user memory
@@ -592,7 +580,6 @@ USER(		strnebt	r2, [r0], #1)
 		mov	r0, #0
 		LOADREGS(fd,sp!, {r1, pc})
 
-#ifndef TESTING
 		.section .fixup,"ax"
 		.align	0
 9001:		LOADREGS(fd,sp!, {r0, pc})
@@ -656,5 +643,4 @@ USER(		ldrbt	r3, [r1], #1)
 		.previous
 
 		.align
-#endif