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authorRalf Baechle <ralf@linux-mips.org>2000-11-28 03:58:46 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-11-28 03:58:46 +0000
commitb63ad0882a16a5d28003e57f2b0b81dee3fb322b (patch)
tree0a343ce219e2b8b38a5d702d66032c57b83d9720 /arch/i386/kernel/i8259.c
parenta9d7bff9a84dba79609a0002e5321b74c4d64c64 (diff)
Merge with 2.4.0-test11.
Diffstat (limited to 'arch/i386/kernel/i8259.c')
-rw-r--r--arch/i386/kernel/i8259.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c
index df377c5b4..570614282 100644
--- a/arch/i386/kernel/i8259.c
+++ b/arch/i386/kernel/i8259.c
@@ -374,7 +374,6 @@ void __init init_8259A(int auto_eoi)
spin_unlock_irqrestore(&i8259A_lock, flags);
}
-#ifndef CONFIG_VISWS
/*
* Note that on a 486, we don't want to do a SIGFPE on an irq13
* as the irq is unreliable, and exception 16 works correctly
@@ -400,12 +399,13 @@ static void math_error_irq(int cpl, void *dev_id, struct pt_regs *regs)
* New motherboards sometimes make IRQ 13 be a PCI interrupt,
* so allow interrupt sharing.
*/
-static struct irqaction irq13 = { math_error_irq, SA_SHIRQ, 0, "fpu", NULL, NULL };
+static struct irqaction irq13 = { math_error_irq, 0, 0, "fpu", NULL, NULL };
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
+#ifndef CONFIG_VISWS
static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL};
#endif
@@ -494,6 +494,12 @@ void __init init_IRQ(void)
#ifndef CONFIG_VISWS
setup_irq(2, &irq2);
- setup_irq(13, &irq13);
#endif
+
+ /*
+ * External FPU? Set up irq13 if so, for
+ * original braindamaged IBM FERR coupling.
+ */
+ if (boot_cpu_data.hard_math && !cpu_has_fpu)
+ setup_irq(13, &irq13);
}