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authorRalf Baechle <ralf@linux-mips.org>1998-08-25 09:12:35 +0000
committerRalf Baechle <ralf@linux-mips.org>1998-08-25 09:12:35 +0000
commitc7fc24dc4420057f103afe8fc64524ebc25c5d37 (patch)
tree3682407a599b8f9f03fc096298134cafba1c9b2f /arch/i386/math-emu/README
parent1d793fade8b063fde3cf275bf1a5c2d381292cd9 (diff)
o Merge with Linux 2.1.116.
o New Newport console code. o New G364 console code.
Diffstat (limited to 'arch/i386/math-emu/README')
-rw-r--r--arch/i386/math-emu/README4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/i386/math-emu/README b/arch/i386/math-emu/README
index c6c774092..04434b618 100644
--- a/arch/i386/math-emu/README
+++ b/arch/i386/math-emu/README
@@ -131,7 +131,7 @@ code is:
movl %esp,[%ebx]
fld1
The FPU instruction may be (usually will be) loaded into the pre-fetch
-queue of the cpu before the mov instruction is executed. If the
+queue of the CPU before the mov instruction is executed. If the
destination of the 'movl' overlaps the FPU instruction then the bytes
in the prefetch queue and memory will be inconsistent when the FPU
instruction is executed. The emulator will be invoked but will not be
@@ -163,7 +163,7 @@ Speed.
The speed of floating point computation with the emulator will depend
upon instruction mix. Relative performance is best for the instructions
which require most computation. The simple instructions are adversely
-affected by the fpu instruction trap overhead.
+affected by the FPU instruction trap overhead.
Timing: Some simple timing tests have been made on the emulator functions.