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authorRalf Baechle <ralf@linux-mips.org>2000-11-02 04:21:22 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-11-02 04:21:22 +0000
commit19b79797b8f66344f77b8b4098acf7ea548da662 (patch)
tree32f97cc06317cb38aa0e926e6d48c4db4c81d2f1 /arch/mips/kernel/gdb-stub.c
parentd4932790ac5b36c0859780f0aab39c73c75b3df6 (diff)
The kernel has a emulation for unaligned accesses, so don't send SIGBUS
on address errors.
Diffstat (limited to 'arch/mips/kernel/gdb-stub.c')
-rw-r--r--arch/mips/kernel/gdb-stub.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index e0986a61a..ceb678bb3 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -315,13 +315,10 @@ static char *hex2mem(char *buf, char *mem, int count, int may_fault)
* signals, which are primarily what GDB understands. It also indicates
* which hardware traps we need to commandeer when initializing the stub.
*/
-static struct hard_trap_info
-{
+static struct hard_trap_info {
unsigned char tt; /* Trap type code for MIPS R3xxx and R4xxx */
unsigned char signo; /* Signal that we map this trap into */
} hard_trap_info[] = {
- { 4, SIGBUS }, /* address error (load) */
- { 5, SIGBUS }, /* address error (store) */
{ 6, SIGBUS }, /* instruction bus error */
{ 7, SIGBUS }, /* data bus error */
{ 9, SIGTRAP }, /* break */
@@ -373,7 +370,7 @@ void set_debug_traps(void)
*/
extern void fltr_set_mem_err(void)
{
- /* FIXME: Needs to be written... */
+ /* FIXME: Needs to be written... */
}
/*
@@ -401,8 +398,7 @@ static int hexToInt(char **ptr, int *intValue)
*intValue = 0;
- while (**ptr)
- {
+ while (**ptr) {
hexValue = hex(**ptr);
if (hexValue < 0)
break;