diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 1998-03-23 08:00:03 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 1998-03-23 08:00:03 +0000 |
| commit | cc858f6e51f21ecda51f60b595eae308f032566c (patch) | |
| tree | def4de98a50fc06cc5a2c36dba8c5824c9717fab /arch/mips/kernel/r2300_switch.S | |
| parent | 6dd778f9528c1acc17dbfca685f51bd5c3750d45 (diff) | |
Store current in $28.
Diffstat (limited to 'arch/mips/kernel/r2300_switch.S')
| -rw-r--r-- | arch/mips/kernel/r2300_switch.S | 34 |
1 files changed, 15 insertions, 19 deletions
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S index 901871a31..7efd61927 100644 --- a/arch/mips/kernel/r2300_switch.S +++ b/arch/mips/kernel/r2300_switch.S @@ -1,4 +1,4 @@ -/* $Id: r2300_switch.S,v 1.3 1996/06/29 07:06:42 dm Exp $ +/* $Id: r2300_switch.S,v 1.1.1.1 1997/06/01 03:16:43 ralf Exp $ * r2300_switch.S: R3000/R2000 specific task switching code. * * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse @@ -32,33 +32,31 @@ MODE_ALIAS = 0x00e0 # uncachable, dirty, valid */ .align 5 LEAF(r2300_resume) - GET_CURRENT(t0) mfc0 t1,CP0_STATUS # Save status register - addu t0,a1 # Add tss offset - sw t1,THREAD_STATUS(t0) + sw t1,THREAD_STATUS($28) ori t2,t1,0x1f # Disable interrupts xori t2,0x1e mtc0 t2,CP0_STATUS - CPU_SAVE_NONSCRATCH(t0) + CPU_SAVE_NONSCRATCH($28) sll t2,t1,2 # Save floating point state bgez t2,2f - sw ra,THREAD_REG31(t0) + sw ra,THREAD_REG31($28) sll t2,t1,5 bgez t2,1f - swc1 $f0, (THREAD_FPU + 0x00)(t0) - FPU_SAVE_16ODD(t0) + swc1 $f0, (THREAD_FPU + 0x00)($28) + FPU_SAVE_16ODD($28) 1: - FPU_SAVE_16EVEN(t0, t1) + FPU_SAVE_16EVEN($28, t1) 2: - addu a0,a1 # Add tss offset - lw t0,THREAD_PGDIR(a0) # Switch the root pointer + move $28, a0 + lw t0,THREAD_PGDIR($28) # Switch the root pointer li t1,TLB_ROOT # get PFN mtc0 t1,CP0_ENTRYHI mtc0 zero,CP0_INDEX srl t0,12 # PFN is 12 bits west ori t0,MODE_ALIAS # want uncachable, dirty, valid mtc0 t0,CP0_ENTRYLO0 - lw a2,THREAD_STATUS(a0) + lw a2,THREAD_STATUS($28) tlbwi /* Flush TLB. */ @@ -85,16 +83,14 @@ MODE_ALIAS = 0x00e0 # uncachable, dirty, valid bgez t0,2f sll t0,a2,5 bgez t0,1f - lwc1 $f0, (THREAD_FPU + 0x00)(a0) - FPU_RESTORE_16ODD(a0) + lwc1 $f0, (THREAD_FPU + 0x00)($28) + FPU_RESTORE_16ODD($28) 1: - FPU_RESTORE_16EVEN(a0, t0) + FPU_RESTORE_16EVEN($28, t0) 2: - CPU_RESTORE_NONSCRATCH(a0) - lw t0,THREAD_KSP(a0) # Restore status register + CPU_RESTORE_NONSCRATCH($28) + lw t0,THREAD_KSP($28) # Restore status register sw t0,kernelsp jr ra mtc0 a2,CP0_STATUS END(r2300_resume) - - |