diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-03-25 22:41:20 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-03-25 22:41:20 +0000 |
| commit | cd259ccdaec7c6702aa71196a0dad8968c34e9bf (patch) | |
| tree | 4f79348d1201a9b59d1157a75142187a11158608 /arch/mips/kernel/r4k_fpu.S | |
| parent | fbf7f8d08f48f03db03963cb15eceef6e6ae88bd (diff) | |
Cleanup a large number of random junk, nothing of importance.
Diffstat (limited to 'arch/mips/kernel/r4k_fpu.S')
| -rw-r--r-- | arch/mips/kernel/r4k_fpu.S | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 4624416e7..c5649bd03 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S @@ -1,4 +1,4 @@ -/* $Id: r4k_fpu.S,v 1.7 1999/08/18 23:37:44 ralf Exp $ +/* $Id: r4k_fpu.S,v 1.8 1999/09/28 22:25:47 ralf Exp $ * * r4k_fpu.S: Save/restore floating point context for signal handlers. * @@ -32,7 +32,6 @@ LEAF(save_fp_context) cfc1 t1,fcr31 /* Store the 16 even double precision registers */ -1: EX(sdc1 $f0,(SC_FPREGS+0)(a0)) EX(sdc1 $f2,(SC_FPREGS+16)(a0)) EX(sdc1 $f4,(SC_FPREGS+32)(a0)) @@ -75,7 +74,7 @@ LEAF(restore_fp_context) * Restore the 16 even double precision registers * when cp1 was enabled in the cp0 status register. */ -1: EX(ldc1 $f0,(SC_FPREGS+0)(a0)) + EX(ldc1 $f0,(SC_FPREGS+0)(a0)) EX(ldc1 $f2,(SC_FPREGS+16)(a0)) EX(ldc1 $f4,(SC_FPREGS+32)(a0)) EX(ldc1 $f6,(SC_FPREGS+48)(a0)) |