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authorFlorian Lohoff <flo@rfc822.org>2001-03-25 19:46:21 +0000
committerFlorian Lohoff <flo@rfc822.org>2001-03-25 19:46:21 +0000
commita463c73c1b32cfac06dfea05e39c2dcc65551d71 (patch)
treeb6cd2eaf48081fbb39f2c6e1131895ee22b77ad1 /arch/mips/kernel/setup.c
parent93f107ba6cceee2c35d207349976936da48393bc (diff)
Remove leftovers from the "cyclecounter_available"
and replace by mips_cpu.options & MIPS_CPU_COUNTER
Diffstat (limited to 'arch/mips/kernel/setup.c')
-rw-r--r--arch/mips/kernel/setup.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 52bf04548..d9af83707 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -59,11 +59,6 @@ struct mips_cpuinfo boot_cpu_data = { 0, NULL, NULL, 0 };
void (*cpu_wait)(void) = NULL;
/*
- * Do we have a cyclecounter available?
- */
-char cyclecounter_available;
-
-/*
* There are several bus types available for MIPS machines. "RISC PC"
* type machines have ISA, EISA, VLB or PCI available, DECstations
* have Turbochannel or Q-Bus, SGI has GIO, there are lots of VME