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authorRalf Baechle <ralf@linux-mips.org>1995-11-14 08:00:00 +0000
committer <ralf@linux-mips.org>1995-11-14 08:00:00 +0000
commite7c2a72e2680827d6a733931273a93461c0d8d1b (patch)
treec9abeda78ef7504062bb2e816bcf3e3c9d680112 /arch/mips/lib/dump_tlb.c
parentec6044459060a8c9ce7f64405c465d141898548c (diff)
Import of Linux/MIPS 1.3.0
Diffstat (limited to 'arch/mips/lib/dump_tlb.c')
-rw-r--r--arch/mips/lib/dump_tlb.c161
1 files changed, 161 insertions, 0 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
new file mode 100644
index 000000000..f730b9fce
--- /dev/null
+++ b/arch/mips/lib/dump_tlb.c
@@ -0,0 +1,161 @@
+/*
+ * Dump R4x00 TLB for debugging purposes.
+ *
+ * Copyright (C) 1994, 1995 by Waldorf Electronics,
+ * written by Ralf Baechle.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/mipsregs.h>
+
+static void
+dump_tlb(int first, int last)
+{
+ int i;
+ int wired;
+ unsigned int pagemask;
+ unsigned long long entryhi, entrylo0, entrylo1;
+
+ wired = read_32bit_cp0_register(CP0_WIRED);
+ printk("Wired: %d", wired);
+
+ for(i=first;i<last;i++)
+ {
+ write_32bit_cp0_register(CP0_INDEX, i);
+ __asm__ __volatile__(
+ ".set\tmips3\n\t"
+ ".set\tnoreorder\n\t"
+ "nop;nop;nop;nop\n\t"
+ "tlbr\n\t"
+ "nop;nop;nop;nop\n\t"
+ ".set\treorder\n\t"
+ ".set\tmips0\n\t");
+ pagemask = read_32bit_cp0_register(CP0_PAGEMASK);
+ entryhi = read_64bit_cp0_register(CP0_ENTRYHI);
+ entrylo0 = read_64bit_cp0_register(CP0_ENTRYLO0);
+ entrylo1 = read_64bit_cp0_register(CP0_ENTRYLO1);
+
+ if((entrylo0|entrylo1) & 2)
+ {
+ /*
+ * Only print entries in use
+ */
+ printk("\nIndex: %2d %08x", i, pagemask);
+
+ printk(" %08x %08x", (unsigned int)(entryhi >> 32),
+ (unsigned int) entryhi);
+ printk(" %08x %08x", (unsigned int)(entrylo0 >> 32),
+ (unsigned int) entrylo0);
+ printk(" %08x %08x", (unsigned int)(entrylo1 >> 32),
+ (unsigned int) entrylo1);
+ }
+ }
+ printk("\n");
+}
+
+void
+dump_tlb_all(void)
+{
+ dump_tlb(0, boot_info.tlb_entries - 1);
+}
+
+void
+dump_tlb_nonwired(void)
+{
+ dump_tlb(read_32bit_cp0_register(CP0_WIRED), boot_info.tlb_entries - 1);
+}
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+
+#include <asm/mipsconfig.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+void
+dump_list_process(struct task_struct *t, void *address)
+{
+ pgd_t *page_dir, *pgd;
+ pmd_t *pmd;
+ pte_t *pte, page;
+ unsigned int addr;
+
+ addr = (unsigned int) address;
+ printk("Addr == %08x\n", addr);
+
+ printk("tasks->tss.pg_dir == %08x\n",
+ (unsigned int) t->tss.pg_dir);
+
+ page_dir = pgd_offset(t, 0);
+ printk("page_dir == %08x\n", (unsigned int) page_dir);
+
+ pgd = pgd_offset(t, addr);
+ printk("pgd == %08x, ", (unsigned int) pgd);
+
+ pmd = pmd_offset(pgd, addr);
+ printk("pmd == %08x, ", (unsigned int) pmd);
+
+ pte = pte_offset(pmd, addr);
+ printk("pte == %08x, ", (unsigned int) pte);
+
+ page = *pte;
+ printk("page == %08x\n", (unsigned int) pte_val(page));
+
+}
+
+void
+dump_list_current(void *address)
+{
+ unsigned int addr, *pt;
+
+ dump_list_process(current, address);
+
+ addr = (unsigned int) address;
+ pt = (unsigned int *) TLB_ROOT + (addr >> 22);
+ printk("L1: *%08x == ", (unsigned int) pt);
+ printk("%08x, ", *pt);
+
+ pt = (unsigned int *) (TLBMAP + ((addr >> 10) & ~3));
+ printk("L2: *%08x == ", (unsigned int) pt);
+ printk("%08x\n", *pt);
+}
+
+#include <asm/segment.h>
+
+unsigned int
+vtop(void *address)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ unsigned int addr, paddr;
+
+ addr = (unsigned int) address;
+ pgd = pgd_offset(current, addr);
+ pmd = pmd_offset(pgd, addr);
+ pte = pte_offset(pmd, addr);
+ paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+ paddr |= (addr & ~PAGE_MASK);
+
+ return paddr;
+}
+
+void
+dump16(unsigned long *p)
+{
+ int i;
+
+ for(i=0;i<8;i++)
+ {
+ printk("*%08lx == %08lx, ",
+ (unsigned long)p, (unsigned long)*p++);
+ printk("*%08lx == %08lx\n",
+ (unsigned long)p, (unsigned long)*p++);
+ }
+}
+