diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2001-02-25 09:40:17 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2001-02-25 09:40:17 +0000 |
| commit | e4d8ca1906ea4139cf3cef237b731d38dd983920 (patch) | |
| tree | a0194b888420ec1313c58b0729c2f05ba828f18b /arch/mips64/lib | |
| parent | 8709bd01cee13852179a1a60f1763904776b3574 (diff) | |
64-bit fixes.
Diffstat (limited to 'arch/mips64/lib')
| -rw-r--r-- | arch/mips64/lib/watch.S | 34 |
1 files changed, 15 insertions, 19 deletions
diff --git a/arch/mips64/lib/watch.S b/arch/mips64/lib/watch.S index 3f3d18c6e..f91434013 100644 --- a/arch/mips64/lib/watch.S +++ b/arch/mips64/lib/watch.S @@ -1,5 +1,4 @@ -/* $Id: watch.S,v 1.1 1999/08/21 21:43:01 ralf Exp $ - * +/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -7,7 +6,7 @@ * Kernel debug stuff to use the Watch registers. * Useful to find stack overflows, dangling pointers etc. * - * Copyright (C) 1995, 1996, 1999 by Ralf Baechle + * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle */ #include <asm/asm.h> #include <asm/mipsregs.h> @@ -15,23 +14,21 @@ .set noreorder /* - * Parameter: a0 - logic address to watch - * Currently only KSEG0 addresses are allowed! + * Parameter: a0 - physical address to watch * a1 - set bit #1 to trap on load references * bit #0 to trap on store references * Results : none */ LEAF(__watch_set) - li t0,0x80000000 - subu a0,t0 - ori a0,7 - xori a0,7 - or a0,a1 - mtc0 a0,CP0_WATCHLO - sw a0,watch_savelo + ori a0, 7 + xori a0, 7 + or a0, a1 + mtc0 a0, CP0_WATCHLO + sd a0, watch_savelo + dsrl32 a0, a0, 0 jr ra - mtc0 zero,CP0_WATCHHI + mtc0 zero, CP0_WATCHHI END(__watch_set) /* @@ -40,7 +37,7 @@ */ LEAF(__watch_clear) jr ra - mtc0 zero,CP0_WATCHLO + mtc0 zero, CP0_WATCHLO END(__watch_clear) /* @@ -48,14 +45,13 @@ * Results : none */ LEAF(__watch_reenable) - lw t0,watch_savelo + ld t0, watch_savelo jr ra - mtc0 t0,CP0_WATCHLO + mtc0 t0, CP0_WATCHLO END(__watch_reenable) /* * Saved value of the c0_watchlo register for watch_reenable() */ - .data -watch_savelo: .word 0 - .text + .local watch_savelo + .comm watch_savelo, 8, 8 |