Look ma - a tank has hit the MIPS sources ...

43 files changed, 3047 insertions, 796 deletions

diff --git a/arch/mips64/arc/console.c b/arch/mips64/arc/console.c
index f16d2a766..61a5296e4 100644
--- a/arch/mips64/arc/console.c
+++ b/arch/mips64/arc/console.c
@@ -4,7 +4,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * console.c: SGI arcs console code.
+ * ARC console code.
  *
  * Copyright (C) 1996 David S. Miller (dm@sgi.com)
  */
@@ -16,7 +16,7 @@ void __init prom_putchar(char c)
 	long cnt;
 	char it = c;
 
-	romvec->write(1, &it, 1, &cnt);
+	ArcWrite(1, &it, 1, &cnt);
 }
 
 char __init prom_getchar(void)
@@ -24,6 +24,7 @@ char __init prom_getchar(void)
 	long cnt;
 	char c;
 
-	romvec->read(0, &c, 1, &cnt);
+	ArcRead(0, &c, 1, &cnt);
+
 	return c;
 }
diff --git a/arch/mips64/arc/env.c b/arch/mips64/arc/env.c
index 55a250047..062a1e2c7 100644
--- a/arch/mips64/arc/env.c
+++ b/arch/mips64/arc/env.c
@@ -12,14 +12,17 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 
+#include <asm/arc/types.h>
 #include <asm/sgialib.h>
 
-char * __init prom_getenv(char *name)
+CHAR * __init
+ArcArcGetEnvironmentVariable(CHAR *name)
 {
-	return romvec->get_evar(name);
+	return (CHAR *) ARC_CALL1(get_evar, name);
 }
 
-long __init prom_setenv(char *name, char *value)
+LONG __init
+ArcSetEnvironmentVariable(CHAR *name, CHAR *value)
 {
-	return romvec->set_evar(name, value);
+	return ARC_CALL2(set_evar, name, value);
 }
diff --git a/arch/mips64/arc/file.c b/arch/mips64/arc/file.c
index f609e7846..958d2adcd 100644
--- a/arch/mips64/arc/file.c
+++ b/arch/mips64/arc/file.c
@@ -10,59 +10,67 @@
  * Copyright (C) 1999 Silicon Graphics, Inc.
  */
 #include <linux/init.h>
+
+#include <asm/arc/types.h>
 #include <asm/sgialib.h>
 
-long __init prom_getvdirent(unsigned long fd, struct linux_vdirent *ent,
-                            unsigned long num, unsigned long *cnt)
+LONG __init
+ArcGetDirectoryEntry(ULONG FileID, struct linux_vdirent *Buffer,
+                     ULONG N, ULONG *Count)
 {
-	return ARC_CALL4(get_vdirent, fd, ent, num, cnt);
+	return ARC_CALL4(get_vdirent, FileID, Buffer, N, Count);
 }
 
-long __init prom_open(char *name, enum linux_omode md, unsigned long *fd)
+LONG __init
+ArcOpen(CHAR *Path, enum linux_omode OpenMode, ULONG *FileID)
 {
-	return ARC_CALL3(open, name, md, fd);
+	return ARC_CALL3(open, Path, OpenMode, FileID);
 }
 
-long __init prom_close(unsigned long fd)
+LONG __init
+ArcClose(ULONG FileID)
 {
-	return ARC_CALL1(close, fd);
+	return ARC_CALL1(close, FileID);
 }
 
-long __init prom_read(unsigned long fd, void *buf, unsigned long num,
-                      unsigned long *cnt)
+LONG __init
+ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count)
 {
-	return ARC_CALL4(read, fd, buf, num, cnt);
+	return ARC_CALL4(read, FileID, Buffer, N, Count);
 }
 
-long __init prom_getrstatus(unsigned long fd)
+LONG __init
+ArcGetReadStatus(ULONG FileID)
 {
-	return ARC_CALL1(get_rstatus, fd);
+	return ARC_CALL1(get_rstatus, FileID);
 }
 
-long __init prom_write(unsigned long fd, void *buf, unsigned long num,
-                       unsigned long *cnt)
+LONG __init
+ArcWrite(ULONG long FileID, void *Buffer, ULONG N, ULONG *Count)
 {
-	return ARC_CALL4(write, fd, buf, num, cnt);
+	return ARC_CALL4(write, FileID, Buffer, N, Count);
 }
 
-long __init prom_seek(unsigned long fd, struct linux_bigint *off,
-                      enum linux_seekmode sm)
+LONG __init
+ArcSeek(ULONG FileID, struct linux_bigint *Position, enum linux_seekmode SeekMode)
 {
-	return ARC_CALL3(seek, fd, off, sm);
+	return ARC_CALL3(seek, FileID, Position, SeekMode);
 }
 
-long __init prom_mount(char *name, enum linux_mountops op)
+LONG __init
+ArcMount(char *name, enum linux_mountops op)
 {
 	return ARC_CALL2(mount, name, op);
 }
 
-long __init prom_getfinfo(unsigned long fd, struct linux_finfo *buf)
+LONG __init
+ArcGetFileInformation(ULONG FileID, struct linux_finfo *Information)
 {
-	return ARC_CALL2(get_finfo, fd, buf);
+	return ARC_CALL2(get_finfo, FileID, Information);
 }
 
-long __init prom_setfinfo(unsigned long fd, unsigned long flags,
-                          unsigned long msk)
+LONG __init ArcSetFileInformation(ULONG FileID, ULONG AttributeFlags,
+                                  ULONG AttributeMask)
 {
-	return ARC_CALL3(set_finfo, fd, flags, msk);
+	return ARC_CALL3(set_finfo, FileID, AttributeFlags, AttributeMask);
 }
diff --git a/arch/mips64/arc/identify.c b/arch/mips64/arc/identify.c
index c2a6809be..958a38595 100644
--- a/arch/mips64/arc/identify.c
+++ b/arch/mips64/arc/identify.c
@@ -22,50 +22,51 @@
 #include <asm/bootinfo.h>
 
 struct smatch {
-    char *name;
-    int group;
-    int type;
-    int flags;
+	char *name;
+	int group;
+	int type;
+	int flags;
 };
 
 static struct smatch mach_table[] = {
-    { "SGI-IP22", MACH_GROUP_SGI, MACH_SGI_INDY, PROM_FLAG_ARCS },
-    { "Microsoft-Jazz", MACH_GROUP_JAZZ, MACH_MIPS_MAGNUM_4000, 0 },
-    { "PICA-61", MACH_GROUP_JAZZ, MACH_ACER_PICA_61, 0 },
-    { "RM200PCI", MACH_GROUP_SNI_RM, MACH_SNI_RM200_PCI, 0 }
+	{ "SGI-IP22", MACH_GROUP_SGI, MACH_SGI_INDY, PROM_FLAG_ARCS },
+	{ "Microsoft-Jazz", MACH_GROUP_JAZZ, MACH_MIPS_MAGNUM_4000, 0 },
+	{ "PICA-61", MACH_GROUP_JAZZ, MACH_ACER_PICA_61, 0 },
+	{ "RM200PCI", MACH_GROUP_SNI_RM, MACH_SNI_RM200_PCI, 0 }
 };
 
 int prom_flags;
 
-static struct smatch * __init string_to_mach(char *s)
+static struct smatch * __init
+string_to_mach(char *s)
 {
-    int i;
+	int i;
     
-    for (i = 0; i < sizeof (mach_table); i++) {
-	if(!strcmp(s, mach_table[i].name))
-	    return &mach_table[i];
-    }
-    prom_printf("\nYeee, could not determine architecture type <%s>\n", s);
-    prom_printf("press a key to reboot\n");
-    prom_getchar();
-    romvec->imode();
-    return NULL;
+	for (i = 0; i < sizeof (mach_table); i++) {
+		if(!strcmp(s, mach_table[i].name))
+			return &mach_table[i];
+	}
+	prom_printf("\nYeee, could not determine architecture type <%s>\n", s);
+	prom_printf("press a key to reboot\n");
+	prom_getchar();
+	ArcEnterInteractiveMode();
+
+	return NULL;
 }
 
-void __init prom_identify_arch(void)
+void __init
+prom_identify_arch(void)
 {
-    pcomponent *p;
-    struct smatch *mach;
-    
-    /* The root component tells us what machine architecture we
-     * have here.
-     */
-    p = prom_getchild(PROM_NULL_COMPONENT);
-    printk("ARCH: %s\n", p->iname);
-    mach = string_to_mach(p->iname);
+	pcomponent *p;
+	struct smatch *mach;
 
-    mips_machgroup = mach->group;
-    mips_machtype = mach->type;
-    prom_flags = mach->flags;
-}
+	/* The root component tells us what machine architecture we
+	   have here.  */
+	p = prom_getchild(PROM_NULL_COMPONENT);
+	printk("ARCH: %s\n", p->iname);
+	mach = string_to_mach(p->iname);
 
+	mips_machgroup = mach->group;
+	mips_machtype = mach->type;
+	prom_flags = mach->flags;
+}
diff --git a/arch/mips64/arc/init.c b/arch/mips64/arc/init.c
index a94f7da27..d1dbdb2f8 100644
--- a/arch/mips64/arc/init.c
+++ b/arch/mips64/arc/init.c
@@ -25,7 +25,8 @@ unsigned short prom_vers, prom_rev;
 
 extern void prom_testtree(void);
 
-int __init prom_init(int argc, char **argv, char **envp)
+int __init
+prom_init(int argc, char **argv, char **envp)
 {
 	struct linux_promblock *pb;
 
@@ -54,7 +55,7 @@ int __init prom_init(int argc, char **argv, char **envp)
 	{
 		prom_printf("Press a key to reboot\n");
 		(void) prom_getchar();
-		romvec->imode();
+		ArcEnterInteractiveMode();
 	}
 #endif
 	return 0;
diff --git a/arch/mips64/arc/memory.c b/arch/mips64/arc/memory.c
index 7212b9e05..ae83ef92c 100644
--- a/arch/mips64/arc/memory.c
+++ b/arch/mips64/arc/memory.c
@@ -24,13 +24,14 @@
 
 #undef DEBUG
 
-struct linux_mdesc * __init prom_getmdesc(struct linux_mdesc *curr)
+struct linux_mdesc * __init
+ArcGetMemoryDescriptor(struct linux_mdesc *Current)
 {
-	return romvec->get_mdesc(curr);
+	return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
 }
 
 #ifdef DEBUG
-static char *arcs_mtypes[8] = {	/* convenient for debugging */
+static char *arcs_mtypes[8] = {		/* convenient for debugging */
 	"Exception Block",
 	"ARCS Romvec Page",
 	"Free/Contig RAM",
@@ -51,8 +52,10 @@ static char *arc_mtypes[8] = {
 	"FirmwarePermanent",
 	"FreeContigiuous"
 };
+
 #define mtypes(a) (prom_flags & PROM_FLAG_ARCS) ? arcs_mtypes[a.arcs] : arc_mtypes[a.arc]
-#endif
+
+#endif /* DEBUG  */
 
 static struct prom_pmemblock prom_pblocks[PROM_MAX_PMEMBLOCKS];
 
@@ -65,35 +68,37 @@ struct prom_pmemblock * __init prom_getpblock_array(void)
 #define MEMTYPE_PROM      1
 #define MEMTYPE_FREE      2
 
-static int __init prom_memtype_classify (union linux_memtypes type)
+static int __init
+prom_memtype_classify (union linux_memtypes type)
 {
-    if (prom_flags & PROM_FLAG_ARCS) {
-	switch (type.arcs) {
-	 case arcs_free:
-	 case arcs_fcontig:
-	    return MEMTYPE_FREE;
-	 case arcs_atmp:
-	 case arcs_aperm:
-	    return MEMTYPE_PROM;
-	 default:
-	    return MEMTYPE_DONTUSE;
-	}
-    } else {
-	switch (type.arc) {
-	 case arc_free:
-	 case arc_fcontig:
-	    return MEMTYPE_FREE;
-	 case arc_rvpage:
-	 case arc_atmp:
-	 case arc_aperm:
-	    return MEMTYPE_PROM;
-	 default:
-	    return MEMTYPE_DONTUSE;
+	if (prom_flags & PROM_FLAG_ARCS) {
+		switch (type.arcs) {
+		case arcs_free:
+		case arcs_fcontig:
+			return MEMTYPE_FREE;
+		case arcs_atmp:
+		case arcs_aperm:
+			return MEMTYPE_PROM;
+		default:
+			return MEMTYPE_DONTUSE;
+		}
+	} else {
+		switch (type.arc) {
+		case arc_free:
+		case arc_fcontig:
+			return MEMTYPE_FREE;
+		case arc_rvpage:
+		case arc_atmp:
+		case arc_aperm:
+			return MEMTYPE_PROM;
+		default:
+			return MEMTYPE_DONTUSE;
+		}
 	}
-    }
 }
 
-static void __init prom_setup_memupper(void)
+static void __init
+prom_setup_memupper(void)
 {
 	struct prom_pmemblock *p, *highest;
 
@@ -106,67 +111,69 @@ static void __init prom_setup_memupper(void)
 	mips_memory_upper = highest->base + highest->size;
 #ifdef DEBUG
 	prom_printf("prom_setup_memupper: mips_memory_upper = %08lx\n",
-		    mips_memory_upper);
+	            mips_memory_upper);
 #endif
 }
 
-void __init prom_meminit(void)
+void __init
+prom_meminit(void)
 {
 	struct linux_mdesc *p;
 	int totram;
 	int i = 0;
 
-	p = prom_getmdesc(PROM_NULL_MDESC);
+	p = ArcGetMemoryDescriptor(PROM_NULL_MDESC);
 #ifdef DEBUG
 	prom_printf("ARCS MEMORY DESCRIPTOR dump:\n");
 	while(p) {
 		prom_printf("[%d,%p]: base<%08lx> pages<%08lx> type<%s>\n",
-			    i, p, p->base, p->pages, mtypes(p->type));
-		p = prom_getmdesc(p);
+		            i, p, p->base, p->pages, mtypes(p->type));
+		p = ArcGetMemoryDescriptor(p);
 		i++;
 	}
 #endif
-	p = prom_getmdesc(PROM_NULL_MDESC);
+	p = ArcGetMemoryDescriptor(PROM_NULL_MDESC);
 	totram = 0;
 	i = 0;
 	while(p) {
-	    prom_pblocks[i].type = prom_memtype_classify (p->type);
-	    prom_pblocks[i].base = ((p->base<<PAGE_SHIFT) + 0x80000000);
-	    prom_pblocks[i].size = p->pages << PAGE_SHIFT;
-	    switch (prom_pblocks[i].type) {
-	     case MEMTYPE_FREE:
-		totram += prom_pblocks[i].size;
+		prom_pblocks[i].type = prom_memtype_classify (p->type);
+		prom_pblocks[i].base = ((p->base<<PAGE_SHIFT) + 0x80000000);
+		prom_pblocks[i].size = p->pages << PAGE_SHIFT;
+		switch (prom_pblocks[i].type) {
+		case MEMTYPE_FREE:
+			totram += prom_pblocks[i].size;
 #ifdef DEBUG
-		prom_printf("free_chunk[%d]: base=%08lx size=%d\n",
-			    i, prom_pblocks[i].base,
-			    prom_pblocks[i].size);
+			prom_printf("free_chunk[%d]: base=%08lx size=%d\n",
+			            i, prom_pblocks[i].base,
+			            prom_pblocks[i].size);
 #endif
-		i++;
-		break;
-	     case MEMTYPE_PROM:
+			i++;
+			break;
+		case MEMTYPE_PROM:
 #ifdef DEBUG
-		prom_printf("prom_chunk[%d]: base=%08lx size=%d\n",
-			    i, prom_pblocks[i].base,
-			    prom_pblocks[i].size);
+			prom_printf("prom_chunk[%d]: base=%08lx size=%d\n",
+			            i, prom_pblocks[i].base,
+			            prom_pblocks[i].size);
 #endif
-		i++;
-		break;
-	     default:
-		break;
-	    }
-	    p = prom_getmdesc(p);
+			i++;
+			break;
+		default:
+			break;
+		}
+		p = ArcGetMemoryDescriptor(p);
 	}
 	prom_pblocks[i].base = 0xdeadbeef;
 	prom_pblocks[i].size = 0; /* indicates last elem. of array */
 	printk("PROMLIB: Total free ram %d bytes (%dK,%dMB)\n",
-		    totram, (totram/1024), (totram/1024/1024));
+	       totram, (totram/1024), (totram/1024/1024));
 
 	/* Setup upper physical memory bound. */
 	prom_setup_memupper();
 }
 
 /* Called from mem_init() to fixup the mem_map page settings. */
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+void __init
+prom_fixup_mem_map(unsigned long start, unsigned long end)
 {
 	struct prom_pmemblock *p;
 	int i, nents;
@@ -179,9 +186,9 @@ void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
 restart:
 	while(start < end) {
 		for(i = 0; i < nents; i++) {
-			if((p[i].type == MEMTYPE_FREE) &&
-			   (start >= (p[i].base)) &&
-			   (start < (p[i].base + p[i].size))) {
+			if ((p[i].type == MEMTYPE_FREE)
+			    && (start >= (p[i].base))
+			    && (start < (p[i].base + p[i].size))) {
 				start = p[i].base + p[i].size;
 				start &= PAGE_MASK;
 				goto restart;
@@ -192,21 +199,22 @@ restart:
 	}
 }
 
-void prom_free_prom_memory (void)
+void
+prom_free_prom_memory (void)
 {
-    struct prom_pmemblock *p;
-    unsigned long addr;
-    unsigned long num_pages = 0;
-
-    for(p = prom_getpblock_array(); p->size != 0; p++) {
-	if (p->type == MEMTYPE_PROM) {
-	    for (addr = p->base; addr < p->base + p->size; addr += PAGE_SIZE) {
-		mem_map[MAP_NR(addr)].flags &= ~(1 << PG_reserved);
-		atomic_set(&mem_map[MAP_NR(addr)].count, 1);
-		free_page(addr);
-		num_pages++;
-	    }
+	struct prom_pmemblock *p;
+	unsigned long addr;
+	unsigned long num_pages = 0;
+
+	for(p = prom_getpblock_array(); p->size != 0; p++) {
+		if (p->type == MEMTYPE_PROM) {
+			for (addr = p->base; addr < p->base + p->size; addr += PAGE_SIZE) {
+				mem_map[MAP_NR(addr)].flags &= ~(1 << PG_reserved);
+				atomic_set(&mem_map[MAP_NR(addr)].count, 1);
+				free_page(addr);
+				num_pages++;
+			}
+		}
 	}
-    }
-    printk ("Freeing prom memory: %ldk freed\n", num_pages * PAGE_SIZE);
+	printk ("Freeing prom memory: %ldk freed\n", num_pages * PAGE_SIZE);
 }
diff --git a/arch/mips64/arc/misc.c b/arch/mips64/arc/misc.c
index 56945035e..86c678a60 100644
--- a/arch/mips64/arc/misc.c
+++ b/arch/mips64/arc/misc.c
@@ -7,12 +7,16 @@
  * Miscellaneous ARCS PROM routines.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999 Silicon Graphics, Inc.
  */
 #include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 
 #include <asm/bcache.h>
+
+#include <asm/arc/types.h>
 #include <asm/sgialib.h>
 #include <asm/bootinfo.h>
 #include <asm/system.h>
@@ -21,7 +25,8 @@ extern unsigned long mips_cputype;
 extern void *sgiwd93_host;
 extern void reset_wd33c93(void *instance);
 
-void prom_halt(void)
+VOID
+ArcHalt(VOID)
 {
 	bcops->bc_disable();
 	cli();
@@ -32,7 +37,8 @@ void prom_halt(void)
 never:	goto never;
 }
 
-void prom_powerdown(void)
+VOID
+ArcPowerDown(VOID)
 {
 	bcops->bc_disable();
 	cli();
@@ -44,7 +50,8 @@ never:	goto never;
 }
 
 /* XXX is this a soft reset basically? XXX */
-void prom_restart(void)
+VOID
+ArcRestart(VOID)
 {
 	bcops->bc_disable();
 	cli();
@@ -55,7 +62,8 @@ void prom_restart(void)
 never:	goto never;
 }
 
-void prom_reboot(void)
+VOID
+ArcReboot(VOID)
 {
 	bcops->bc_disable();
 	cli();
@@ -66,7 +74,8 @@ void prom_reboot(void)
 never:	goto never;
 }
 
-void prom_imode(void)
+VOID
+ArcEnterInteractiveMode(VOID)
 {
 	bcops->bc_disable();
 	cli();
@@ -77,17 +86,20 @@ void prom_imode(void)
 never:	goto never;
 }
 
-long prom_cfgsave(void)
+LONG
+ArcSaveConfiguration(VOID)
 {
 	return ARC_CALL0(cfg_save);
 }
 
-struct linux_sysid *prom_getsysid(void)
+struct linux_sysid *
+ArcGetSystemId(VOID)
 {
 	return (struct linux_sysid *) ARC_CALL0(get_sysid);
 }
 
-void __init prom_cacheflush(void)
+VOID __init
+ArcFlushAllCaches(VOID)
 {
 	ARC_CALL0(cache_flush);
 }
diff --git a/arch/mips64/arc/salone.c b/arch/mips64/arc/salone.c
index 0635c24a0..5cba050a1 100644
--- a/arch/mips64/arc/salone.c
+++ b/arch/mips64/arc/salone.c
@@ -8,19 +8,21 @@
 #include <linux/init.h>
 #include <asm/sgialib.h>
 
-long __init prom_load(char *name, unsigned long end, unsigned long *pc,
-                      unsigned long *eaddr)
+LONG __init
+ArcLoad(CHAR *Path, ULONG TopAddr, ULONG *ExecAddr, ULONG *LowAddr)
 {
-	return romvec->load(name, end, pc, eaddr);
+	return ARC_CALL4(load, Path, TopAddr, ExecAddr, LowAddr);
 }
 
-long __init prom_invoke(unsigned long pc, unsigned long sp, long argc,
-                        char **argv, char **envp))
+LONG __init
+ArcInvoke(ULONG ExecAddr, ULONG StackAddr, ULONG Argc, CHAR *Argv[],
+          CHAR *Envp[])
 {
-	return romvec->invoke(pc, sp, argc, argv, envp);
+	return ARC_CALL5(invoke, ExecAddr, StackAddr, Argc, Argv, Envp);
 }
 
-long __init prom_exec(char *name, long argc, char **argv, char **envp)
+LONG __init
+ArcExecute(CHAR *Path, LONG Argc, CHAR *Argv[], CHAR *Envp[])
 {
-	return romvec->exec(name, argc, argv, envp);
+	return ARC_CALL4(exec, Path, Argc, Argv, Envp);
 }
diff --git a/arch/mips64/arc/time.c b/arch/mips64/arc/time.c
index 378db5331..81289a53b 100644
--- a/arch/mips64/arc/time.c
+++ b/arch/mips64/arc/time.c
@@ -9,14 +9,18 @@
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  */
 #include <linux/init.h>
+
+#include <asm/arc/types.h>
 #include <asm/sgialib.h>
 
-struct __init linux_tinfo *prom_gettinfo(void)
+struct linux_tinfo * __init
+ArcGetTime(VOID)
 {
-	return romvec->get_tinfo();
+	return (struct linux_tinfo *) ARC_CALL0(get_tinfo);
 }
 
-unsigned __init long prom_getrtime(void)
+ULONG __init
+ArcGetRelativeTime(VOID)
 {
-	return romvec->get_rtime();
+	return ARC_CALL0(get_rtime);
 }
diff --git a/arch/mips64/arc/tree.c b/arch/mips64/arc/tree.c
index 12a88230b..ec53c1ac0 100644
--- a/arch/mips64/arc/tree.c
+++ b/arch/mips64/arc/tree.c
@@ -7,70 +7,83 @@
  * PROM component device tree code.
  *
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999 Silicon Graphics, Inc.
  */
 #include <linux/init.h>
+#include <asm/arc/types.h>
 #include <asm/sgialib.h>
 
-#define DEBUG_PROM_TREE
+#undef DEBUG_PROM_TREE
 
-pcomponent * __init prom_getsibling(pcomponent *this)
+pcomponent * __init
+ArcGetPeer(pcomponent *Current)
 {
-	if(this == PROM_NULL_COMPONENT)
+	if (Current == PROM_NULL_COMPONENT)
 		return PROM_NULL_COMPONENT;
-	return romvec->next_component(this);
+
+	return (pcomponent *) ARC_CALL1(next_component, Current);
 }
 
-pcomponent * __init prom_getchild(pcomponent *this)
+pcomponent * __init
+ArcGetChild(pcomponent *Current)
 {
-	return romvec->child_component(this);
+	return (pcomponent *) ARC_CALL1(child_component, Current);
 }
 
-pcomponent * __init prom_getparent(pcomponent *child)
+pcomponent * __init
+ArcGetParent(pcomponent *Current)
 {
-	if(child == PROM_NULL_COMPONENT)
+	if (Current == PROM_NULL_COMPONENT)
 		return PROM_NULL_COMPONENT;
-	return romvec->parent_component(child);
+
+	return (pcomponent *) ARC_CALL1(parent_component, Current);
 }
 
-long __init prom_getcdata(void *buffer, pcomponent *this)
+LONG __init
+ArcGetConfigurationData(VOID *Buffer, pcomponent *Current)
 {
-	return romvec->component_data(buffer, this);
+	return ARC_CALL2(component_data, Buffer, Current);
 }
 
-pcomponent * __init prom_childadd(pcomponent *this, pcomponent *tmp,
-                                  void *data)
+pcomponent * __init
+ArcAddChild(pcomponent *Current, pcomponent *Template, VOID *ConfigurationData)
 {
-	return romvec->child_add(this, tmp, data);
+	return (pcomponent *)
+	       ARC_CALL3(child_add, Current, Template, ConfigurationData);
 }
 
-long __init prom_delcomponent(pcomponent *this)
+LONG __init
+ArcDeleteComponent(pcomponent *ComponentToDelete)
 {
-	return romvec->comp_del(this);
+	return ARC_CALL1(comp_del, ComponentToDelete);
 }
 
-pcomponent * __init prom_componentbypath(char *path)
+pcomponent * __init
+ArcGetComponent(CHAR *Path)
 {
-	return romvec->component_by_path(path);
+	return (pcomponent *)ARC_CALL1(component_by_path, Path);
 }
 
 #ifdef DEBUG_PROM_TREE
+
 static char *classes[] = {
 	"system", "processor", "cache", "adapter", "controller", "peripheral",
 	"memory"
 };
 
 static char *types[] = {
-	"arc", "cpu", "fpu", "picache", "pdcache", "sicache", "sdcache", "sccache",
-	"memdev", "eisa adapter", "tc adapter", "scsi adapter", "dti adapter",
-	"multi-func adapter", "disk controller", "tp controller",
-	"cdrom controller", "worm controller", "serial controller",
-	"net controller", "display controller", "parallel controller",
-	"pointer controller", "keyboard controller", "audio controller",
-	"misc controller", "disk peripheral", "floppy peripheral",
-	"tp peripheral", "modem peripheral", "monitor peripheral",
-	"printer peripheral", "pointer peripheral", "keyboard peripheral",
-	"terminal peripheral", "line peripheral", "net peripheral",
-	"misc peripheral", "anonymous"
+	"arc", "cpu", "fpu", "picache", "pdcache", "sicache", "sdcache",
+	"sccache", "memdev", "eisa adapter", "tc adapter", "scsi adapter",
+	"dti adapter", "multi-func adapter", "disk controller",
+	"tp controller", "cdrom controller", "worm controller",
+	"serial controller", "net controller", "display controller",
+	"parallel controller", "pointer controller", "keyboard controller",
+	"audio controller", "misc controller", "disk peripheral",
+	"floppy peripheral", "tp peripheral", "modem peripheral",
+	"monitor peripheral", "printer peripheral", "pointer peripheral",
+	"keyboard peripheral", "terminal peripheral", "line peripheral",
+	"net peripheral", "misc peripheral", "anonymous"
 };
 
 static char *iflags[] = {
@@ -78,7 +91,8 @@ static char *iflags[] = {
 	"input", "output"
 };
 
-static void __init dump_component(pcomponent *p)
+static void __init
+dump_component(pcomponent *p)
 {
 	prom_printf("[%p]:class<%s>type<%s>flags<%s>ver<%d>rev<%d>",
 		    p, classes[p->class], types[p->type],
@@ -87,7 +101,8 @@ static void __init dump_component(pcomponent *p)
 		    p->key, p->amask, (int)p->cdsize, (int)p->ilen, p->iname);
 }
 
-static void __init traverse(pcomponent *p, int op)
+static void __init
+traverse(pcomponent *p, int op)
 {
 	dump_component(p);
 	if(prom_getchild(p))
@@ -96,7 +111,8 @@ static void __init traverse(pcomponent *p, int op)
 		traverse(prom_getsibling(p), 1);
 }
 
-void __init prom_testtree(void)
+void __init
+prom_testtree(void)
 {
 	pcomponent *p;
 
@@ -110,4 +126,5 @@ void __init prom_testtree(void)
 	prom_printf("press a key\n");
 	prom_getchar();
 }
-#endif
+
+#endif /* DEBUG_PROM_TREE  */
diff --git a/arch/mips64/config.in b/arch/mips64/config.in
index d6e52deca..949937e67 100644
--- a/arch/mips64/config.in
+++ b/arch/mips64/config.in
@@ -1,4 +1,4 @@
-# $Id: config.in,v 1.1 1999/08/18 23:37:46 ralf Exp $
+# $Id: config.in,v 1.2 1999/08/20 21:59:03 ralf Exp $
 #
 # For a description of the syntax of this configuration file,
 # see the Configure script.
@@ -16,12 +16,15 @@ bool 'Support for SGI IP22' CONFIG_SGI_IP22
 endmenu
 
 #
-# Select some configuration options automatically for certain systems
+# Select some configuration options automatically based on user selections
 #
 unset CONFIG_BOOT_ELF32
+unset CONFIG_ARC32
+unset CONFIG_ARC64
 
 if [ "$CONFIG_SGI_IP22" = "y" ]; then
   define_bool CONFIG_BOOT_ELF32 y
+  define_bool CONFIG_ARC32 y
 fi
 
 mainmenu_option next_comment
diff --git a/arch/mips64/defconfig b/arch/mips64/defconfig
index ab202c680..919219576 100644
--- a/arch/mips64/defconfig
+++ b/arch/mips64/defconfig
@@ -11,6 +11,8 @@
 # Machine selection
 #
 CONFIG_SGI_IP22=y
+CONFIG_BOOT_ELF32=y
+CONFIG_ARC32=y
 
 #
 # CPU selection
diff --git a/arch/mips64/kernel/.cvsignore b/arch/mips64/kernel/.cvsignore
new file mode 100644
index 000000000..857dd22e9
--- /dev/null
+++ b/arch/mips64/kernel/.cvsignore
@@ -0,0 +1,2 @@
+.depend
+.*.flags
diff --git a/arch/mips64/kernel/Makefile b/arch/mips64/kernel/Makefile
index 34f033d17..0fada481d 100644
--- a/arch/mips64/kernel/Makefile
+++ b/arch/mips64/kernel/Makefile
@@ -9,11 +9,11 @@
 .S.o:
 	$(CC) $(CFLAGS) -c $< -o $*.o
 
-all:	kernel.o
+all:	kernel.o head.o init_task.o
 
 O_TARGET := kernel.o
-O_OBJS	:=
-OX_OBJS :=
+O_OBJS	:= entry.o setup.o
+OX_OBJS := mips64_ksyms.o
 
 clean:
 
diff --git a/arch/mips64/kernel/entry.S b/arch/mips64/kernel/entry.S
new file mode 100644
index 000000000..dc8a6d4bc
--- /dev/null
+++ b/arch/mips64/kernel/entry.S
@@ -0,0 +1,159 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Low level exception handling
+ *
+ * Copyright (C) 1994 - 1999 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics
+ */
+#include <linux/config.h>
+#include <linux/sys.h>
+
+#include <asm/asm.h>
+#include <asm/current.h>
+#include <asm/errno.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/stackframe.h>
+#include <asm/processor.h>
+#include <asm/regdef.h>
+#include <asm/fpregdef.h>
+#include <asm/unistd.h>
+
+/*
+ * Heia ...  The %lo, %hi and %HI stuff is too strong for the ELF assembler
+ * and the ABI to cope with ...
+ */
+		.text
+		.set	noreorder
+		.set	mips3
+		.align 4
+EXPORT(handle_bottom_half)
+		jal	do_bottom_half
+		 nop
+		b	9f
+		 nop
+
+reschedule:	jal	schedule 
+		 nop
+
+EXPORT(ret_from_sys_call)
+EXPORT(ret_from_irq)
+		lw	t0,bh_mask
+		lw	t1,bh_active		# unused delay slot
+		and	t0,t1
+		bnez	t0,handle_bottom_half
+9:		 lw	t0,PT_STATUS(sp)	# returning to kernel mode?
+
+		andi	t1, t0, 0x10
+		beqz	t1, return		# -> yes
+		 lw	t1, TASK_NEED_RESCHED($28)
+		bnez	t1, reschedule
+		lw	v0, TASK_SIGPENDING($28)
+		 move	a0, zero
+		beqz	v0, return
+		 nop
+		jal	do_signal
+		 move	a1, sp
+
+EXPORT(return)	.set	noat
+		RESTORE_ALL
+		eret
+		.set	at
+
+/*
+ * Common spurious interrupt handler.
+ */
+		.text
+		.align  5
+LEAF(spurious_interrupt)
+		/*
+		 * Someone tried to fool us by sending an interrupt but we
+		 * couldn't find a cause for it.
+		 */
+		lui     t1,%hi(spurious_count)
+		lw      t0,%lo(spurious_count)(t1)
+		addiu   t0,1
+		j	ret_from_irq
+		 sw      t0,%lo(spurious_count)(t1)
+		END(spurious_interrupt)
+
+/*
+ * Build a default exception handler for the exceptions that don't need
+ * special handlers.  If you didn't know yet - I *like* playing games with
+ * the C preprocessor ...
+ */
+		.macro	__build_clear_none
+		.endm
+
+		.macro	__build_clear_sti
+		STI
+		.endm
+
+		.macro	__build_clear_cli
+		CLI
+		.endm
+
+		.macro	__build_clear_fpe
+		cfc1	a1, fcr31
+		li	a2, ~(0x3f << 13)
+		and	a2, a1
+		ctc	a2, fcr31
+		STI
+		.endm
+
+		.macro	__build_clear_ade
+		mfc0	t0, CP0_BADVADDR
+		sd	t0, PT_BVADDR(sp)
+		KMODE
+		.endm
+
+#define __BUILD_silent(exception)
+
+#define fmt "Got %s at %08lx.\n"
+
+#define __BUILD_verbose(exception)                                      \
+		la	a1,8f;                                          \
+		TEXT	(#exception);                                   \
+		ld	a2, PT_EPC(sp);                                 \
+		PRINT(fmt)
+#define __BUILD_count(exception)                                        \
+		.set	reorder;                                        \
+		lw	t0,exception_count_##exception;                 \
+		addiu	t0, 1;                                          \
+		sw	t0,exception_count_##exception;                 \
+		.set	noreorder;                                      \
+		.data;                                                  \
+EXPORT(exception_count_##exception);                                    \
+		.word	0;                                              \
+		.previous;
+#define BUILD_HANDLER(exception,handler,clear,verbose)                  \
+		.align	5;                                              \
+		NESTED(handle_##exception, PT_SIZE, sp);                \
+		.set	noat;                                           \
+		SAVE_ALL;                                               \
+		__BUILD_clear_##clear exception;                        \
+		.set	at;                                             \
+		__BUILD_##verbose(exception);                           \
+		jal	do_##handler;                                   \
+		 move	a0,sp;                                          \
+		j	ret_from_sys_call;                              \
+		 nop;                                                   \
+		END(handle_##exception)
+
+		BUILD_HANDLER(adel,ade,ade,silent)		/* #4  */
+		BUILD_HANDLER(ades,ade,ade,silent)		/* #5  */
+		BUILD_HANDLER(ibe,ibe,cli,verbose)		/* #6  */
+		BUILD_HANDLER(dbe,dbe,cli,silent)		/* #7  */
+		BUILD_HANDLER(bp,bp,sti,silent)			/* #9  */
+		BUILD_HANDLER(ri,ri,sti,silent)			/* #10 */
+		BUILD_HANDLER(cpu,cpu,sti,silent)		/* #11 */
+		BUILD_HANDLER(ov,ov,sti,silent)			/* #12 */
+		BUILD_HANDLER(tr,tr,sti,silent)			/* #13 */
+		BUILD_HANDLER(fpe,fpe,fpe,silent)		/* #15 */
+		BUILD_HANDLER(watch,watch,sti,verbose)		/* #23 */
+		BUILD_HANDLER(reserved,reserved,sti,verbose)	/* others */
diff --git a/arch/mips64/kernel/head.S b/arch/mips64/kernel/head.S
new file mode 100644
index 000000000..c5cf9d987
--- /dev/null
+++ b/arch/mips64/kernel/head.S
@@ -0,0 +1,55 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Head.S contains the MIPS exception handler and startup code.
+ *
+ * Copyright (C) 1994, 1995 Waldorf Electronics
+ * Written by Ralf Baechle and Andreas Busse
+ * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include <asm/processor.h>
+#include <asm/mipsregs.h>
+#include <asm/stackframe.h>
+
+	.text
+
+EXPORT(stext)					# used for profiling
+EXPORT(_stext)
+
+NESTED(kernel_entry, 16, sp)			# kernel entry point
+	CLI					# disable interrupts
+
+	la	$28, init_task_union		# init current pointer
+	daddiu	t0, $28, KERNEL_STACK_SIZE-32
+	sd	t0, kernelsp
+	dsubu	sp, t0, 4*SZREG			# init stack pointer
+
+	jal	start_kernel
+1:	b	1b				# just in case ...
+	END(kernel_entry)
+
+	.comm	kernelsp, 8, 8			# current stackpointer
+
+#define PAGE_SIZE	0x1000
+
+	.macro	page name
+	.globl	\name
+	.org	. + PAGE_SIZE
+\name:	.size	\name, PAGE_SIZE
+	.type	\name, @object
+	.endm
+
+	.data
+
+	page	swapper_pg_dir
+	page	empty_bad_page
+	page	empty_bad_page_table
+	page	invalid_pte_table
+
+	.align	13
diff --git a/arch/mips64/kernel/init_task.c b/arch/mips64/kernel/init_task.c
new file mode 100644
index 000000000..baad4538c
--- /dev/null
+++ b/arch/mips64/kernel/init_task.c
@@ -0,0 +1,26 @@
+#include <linux/mm.h>
+#include <linux/sched.h>
+
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+static struct vm_area_struct init_mmap = INIT_MMAP;
+static struct fs_struct init_fs = INIT_FS;
+static struct file * init_fd_array[NR_OPEN] = { NULL, };
+static struct files_struct init_files = INIT_FILES;
+static struct signal_struct init_signals = INIT_SIGNALS;
+struct mm_struct init_mm = INIT_MM(init_mm);
+
+/*
+ * Initial task structure.
+ *
+ * We need to make sure that this is 8192-byte aligned due to the
+ * way process stacks are handled. This is done by making sure
+ * the linker maps this in the .text segment right after head.S,
+ * and making head.S ensure the proper alignment.
+ *
+ * The things we do for performance..
+ */
+union task_union init_task_union
+	__attribute__((__section__(".text"))) =
+		{ INIT_TASK(init_task_union.task) };
diff --git a/arch/mips64/kernel/mips64_ksyms.c b/arch/mips64/kernel/mips64_ksyms.c
index c76978a32..fc422788e 100644
--- a/arch/mips64/kernel/mips64_ksyms.c
+++ b/arch/mips64/kernel/mips64_ksyms.c
@@ -24,7 +24,6 @@
 #include <asm/io.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include <asm/sgihpc.h>
 #include <asm/softirq.h>
 #include <asm/uaccess.h>
 
@@ -92,19 +91,6 @@ EXPORT_SYMBOL(invalid_pte_table);
 EXPORT_SYMBOL(mips_io_port_base);
 
 /*
- * Architecture specific stuff.
- */
-#ifdef CONFIG_MIPS_JAZZ
-EXPORT_SYMBOL(vdma_alloc);
-EXPORT_SYMBOL(vdma_free);
-EXPORT_SYMBOL(vdma_log2phys);
-#endif
-
-#ifdef CONFIG_SGI_IP22
-EXPORT_SYMBOL(hpc3c0);
-#endif
-
-/*
  * Kernel hacking ...
  */
 #include <asm/branch.h>
@@ -122,4 +108,3 @@ EXPORT_SYMBOL(unregister_fpe);
 #ifdef CONFIG_VT
 EXPORT_SYMBOL(screen_info);
 #endif
-
diff --git a/arch/mips64/kernel/setup.c b/arch/mips64/kernel/setup.c
new file mode 100644
index 000000000..dc5b4e902
--- /dev/null
+++ b/arch/mips64/kernel/setup.c
@@ -0,0 +1,144 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995 Linus Torvalds
+ * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 Ralf Baechle
+ * Copyright (C) 1996 Stoned Elipot
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/stddef.h>
+#include <linux/string.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/malloc.h>
+#include <linux/user.h>
+#include <linux/utsname.h>
+#include <linux/a.out.h>
+#include <linux/tty.h>
+#ifdef CONFIG_BLK_DEV_RAM
+#include <linux/blk.h>
+#endif
+
+#include <asm/asm.h>
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/io.h>
+#include <asm/stackframe.h>
+#include <asm/system.h>
+
+struct mips_cpuinfo boot_cpu_data;
+
+/*
+ * Not all of the MIPS CPUs have the "wait" instruction available.  This
+ * is set to true if it is available.  The wait instruction stops the
+ * pipeline and reduces the power consumption of the CPU very much.
+ */
+char wait_available;
+
+/*
+ * Do we have a cyclecounter available?
+ */
+char cyclecounter_available;
+
+/*
+ * Set if box has EISA slots.
+ */
+int EISA_bus = 0;
+
+#ifdef CONFIG_BLK_DEV_FD
+extern struct fd_ops no_fd_ops;
+struct fd_ops *fd_ops;
+#endif
+
+#ifdef CONFIG_BLK_DEV_IDE
+extern struct ide_ops no_ide_ops;
+struct ide_ops *ide_ops;
+#endif
+
+extern struct rtc_ops no_rtc_ops;
+struct rtc_ops *rtc_ops;
+
+extern struct kbd_ops no_kbd_ops;
+struct kbd_ops *kbd_ops;
+
+/*
+ * Setup information
+ *
+ * These are initialized so they are in the .data section
+ */
+unsigned long mips_memory_upper = KSEG0; /* this is set by kernel_entry() */
+unsigned long mips_cputype = CPU_UNKNOWN;
+unsigned long mips_machtype = MACH_UNKNOWN;
+unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
+
+unsigned char aux_device_present;
+extern int _end;
+
+extern char empty_zero_page[PAGE_SIZE];
+
+static char command_line[CL_SIZE] = { 0, };
+       char saved_command_line[CL_SIZE];
+extern char arcs_cmdline[CL_SIZE];
+
+extern void ip22_setup(void);
+
+void __init setup_arch(char **cmdline_p, unsigned long * memory_start_p,
+                       unsigned long * memory_end_p)
+{
+	unsigned long memory_end;
+#ifdef CONFIG_BLK_DEV_INITRD
+	unsigned long tmp;
+	unsigned long *initrd_header;
+#endif
+
+#ifdef CONFIG_SGI_IP22
+	ip22_setup();
+#endif
+
+	memory_end = mips_memory_upper;
+
+	/*
+	 * Due to prefetching and similar mechanism the CPU sometimes
+	 * generates addresses beyond the end of memory.  We leave the size
+	 * of one cache line at the end of memory unused to make shure we
+	 * don't catch this type of bus errors.
+	 */
+	memory_end -= 128;
+	memory_end &= PAGE_MASK;
+
+	strncpy (command_line, arcs_cmdline, CL_SIZE);
+	memcpy(saved_command_line, command_line, CL_SIZE);
+	saved_command_line[CL_SIZE-1] = '\0';
+
+	*cmdline_p = command_line;
+	*memory_start_p = (unsigned long) &_end;
+	*memory_end_p = memory_end;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
+	if (tmp < (unsigned long)&_end)
+		tmp += PAGE_SIZE;
+	initrd_header = (unsigned long *)tmp;
+	if (initrd_header[0] == 0x494E5244) {
+		initrd_start = (unsigned long)&initrd_header[2];
+		initrd_end = initrd_start + initrd_header[1];
+		initrd_below_start_ok = 1;
+		if (initrd_end > memory_end) {
+			printk("initrd extends beyond end of memory "
+			       "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
+			       initrd_end,memory_end);
+			initrd_start = 0;
+		} else
+			*memory_start_p = initrd_end;
+	}
+#endif
+}
diff --git a/arch/mips64/lib/.cvsignore b/arch/mips64/lib/.cvsignore
new file mode 100644
index 000000000..857dd22e9
--- /dev/null
+++ b/arch/mips64/lib/.cvsignore
@@ -0,0 +1,2 @@
+.depend
+.*.flags
diff --git a/arch/mips64/lib/Makefile b/arch/mips64/lib/Makefile
new file mode 100644
index 000000000..f916d7263
--- /dev/null
+++ b/arch/mips64/lib/Makefile
@@ -0,0 +1,16 @@
+# $Id$
+#
+# Makefile for MIPS-specific library files..
+#
+
+.S.s:
+	$(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+	$(CC) $(CFLAGS) -c $< -o $*.o
+
+L_TARGET = lib.a
+L_OBJS	= csum_partial.o csum_partial_copy.o dump_tlb.o floppy-std.o \
+	  floppy-no.o ide-std.o ide-no.o kbd-std.o kbd-no.o rtc-std.o \
+	  rtc-no.o memset.o memcpy.o strlen_user.o strncpy_user.o watch.o
+
+include $(TOPDIR)/Rules.make
diff --git a/arch/mips64/lib/csum_partial.S b/arch/mips64/lib/csum_partial.S
new file mode 100644
index 000000000..9d31bba49
--- /dev/null
+++ b/arch/mips64/lib/csum_partial.S
@@ -0,0 +1,243 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Quick'n'dirty IP checksum ...
+ *
+ * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+
+#define ADDC(sum,reg)						\
+	addu	sum, reg;					\
+	sltu	v1, sum, reg;					\
+	addu	sum, v1
+
+#define CSUM_BIGCHUNK(src, offset, sum, t0, t1, t2, t3)		\
+	lw	t0, (offset + 0x00)(src);			\
+	lw	t1, (offset + 0x04)(src);			\
+	lw	t2, (offset + 0x08)(src); 			\
+	lw	t3, (offset + 0x0c)(src); 			\
+	ADDC(sum, t0);						\
+	ADDC(sum, t1);						\
+	ADDC(sum, t2);						\
+	ADDC(sum, t3);						\
+	lw	t0, (offset + 0x10)(src);			\
+	lw	t1, (offset + 0x14)(src);			\
+	lw	t2, (offset + 0x18)(src);			\
+	lw	t3, (offset + 0x1c)(src);			\
+	ADDC(sum, t0);						\
+	ADDC(sum, t1);						\
+	ADDC(sum, t2);						\
+	ADDC(sum, t3);						\
+
+/*
+ * a0: source address
+ * a1: length of the area to checksum
+ * a2: partial checksum
+ */
+
+#define src a0
+#define sum v0
+
+	.text
+	.set	noreorder
+
+/* unknown src alignment and < 8 bytes to go  */
+small_csumcpy:
+	move	a1, ta2
+
+	andi	ta0, a1, 4
+	beqz	ta0, 1f
+	 andi	ta0, a1, 2
+
+	/* Still a full word to go  */
+	ulw	ta1, (src)
+	daddiu	src, 4
+	ADDC(sum, ta1)
+
+1:	move	ta1, zero
+	beqz	ta0, 1f
+	 andi	ta0, a1, 1
+
+	/* Still a halfword to go  */
+	ulhu	ta1, (src)
+	daddiu	src, 2
+
+1:	beqz	ta0, 1f
+	 sll	ta1, ta1, 16
+
+	lbu	ta2, (src)
+	 nop
+
+#ifdef __MIPSEB__
+	sll	ta2, ta2, 8
+#endif
+	or	ta1, ta2
+
+1:	ADDC(sum, ta1)
+
+	/* fold checksum */
+	sll	v1, sum, 16
+	addu	sum, v1
+	sltu	v1, sum, v1
+	srl	sum, sum, 16
+	addu	sum, v1
+
+	/* odd buffer alignment? */
+	beqz	t3, 1f
+	 nop
+	sll	v1, sum, 8
+	srl	sum, sum, 8
+	or	sum, v1
+	andi	sum, 0xffff
+1:
+	.set	reorder
+	/* Add the passed partial csum.  */
+	ADDC(sum, a2)
+	jr	ra
+	.set	noreorder
+
+/* ------------------------------------------------------------------------- */
+
+	.align	5
+LEAF(csum_partial)
+	move	sum, zero
+	move	t3, zero
+
+	sltiu	t8, a1, 0x8
+	bnez	t8, small_csumcpy		/* < 8 bytes to copy */
+	 move	ta2, a1
+
+	beqz	a1, out
+	 andi	t3, src, 0x1			/* odd buffer? */
+
+hword_align:
+	beqz	t3, word_align
+	 andi	t8, src, 0x2
+
+	lbu	ta0, (src)
+	dsubu	a1, a1, 0x1
+#ifdef __MIPSEL__
+	sll	ta0, ta0, 8
+#endif
+	ADDC(sum, ta0)
+	daddu	src, src, 0x1
+	andi	t8, src, 0x2
+
+word_align:
+	beqz	t8, dword_align
+	 sltiu	t8, a1, 56
+
+	lhu	ta0, (src)
+	dsubu	a1, a1, 0x2
+	ADDC(sum, ta0)
+	sltiu	t8, a1, 56
+	daddu	src, src, 0x2
+
+dword_align:
+	bnez	t8, do_end_words
+	 move	t8, a1
+
+	andi	t8, src, 0x4
+	beqz	t8, qword_align
+	 andi	t8, src, 0x8
+
+	lw	ta0, 0x00(src)
+	dsubu	a1, a1, 0x4
+	ADDC(sum, ta0)
+	daddu	src, src, 0x4
+	andi	t8, src, 0x8
+
+qword_align:
+	beqz	t8, oword_align
+	 andi	t8, src, 0x10
+
+	lw	ta0, 0x00(src)
+	lw	ta1, 0x04(src)
+	dsubu	a1, a1, 0x8
+	ADDC(sum, ta0)
+	ADDC(sum, ta1)
+	daddu	src, src, 0x8
+	andi	t8, src, 0x10
+
+oword_align:
+	beqz	t8, begin_movement
+	 dsrl	t8, a1, 0x7
+
+	lw	ta3, 0x08(src)
+	lw	t0, 0x0c(src)
+	lw	ta0, 0x00(src)
+	lw	ta1, 0x04(src)
+	ADDC(sum, ta3)
+	ADDC(sum, t0)
+	ADDC(sum, ta0)
+	ADDC(sum, ta1)
+	dsubu	a1, a1, 0x10
+	daddu	src, src, 0x10
+	dsrl	t8, a1, 0x7
+
+begin_movement:
+	beqz	t8, 1f
+	 andi	ta2, a1, 0x40
+
+move_128bytes:
+	CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
+	CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
+	CSUM_BIGCHUNK(src, 0x40, sum, ta0, ta1, ta3, t0)
+	CSUM_BIGCHUNK(src, 0x60, sum, ta0, ta1, ta3, t0)
+	dsubu	t8, t8, 0x01
+	bnez	t8, move_128bytes
+	 daddu	src, src, 0x80
+
+1:
+	beqz	ta2, 1f
+	 andi	ta2, a1, 0x20
+
+move_64bytes:
+	CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
+	CSUM_BIGCHUNK(src, 0x20, sum, ta0, ta1, ta3, t0)
+	daddu	src, src, 0x40
+
+1:
+	beqz	ta2, do_end_words
+	 andi	t8, a1, 0x1c
+
+move_32bytes:
+	CSUM_BIGCHUNK(src, 0x00, sum, ta0, ta1, ta3, t0)
+	andi	t8, a1, 0x1c
+	daddu	src, src, 0x20
+
+do_end_words:
+	beqz	t8, maybe_end_cruft
+	 dsrl	t8, t8, 0x2
+
+end_words:
+	lw	ta0, (src)
+	dsubu	t8, t8, 0x1
+	ADDC(sum, ta0)
+	bnez	t8, end_words
+	 daddu	src, src, 0x4
+
+maybe_end_cruft:
+	andi	ta2, a1, 0x3
+
+small_memcpy:
+ j small_csumcpy; move a1, ta2		/* XXX ??? */
+	beqz	t2, out
+	 move	a1, ta2
+
+end_bytes:
+	lb	ta0, (src)
+	dsubu	a1, a1, 0x1
+	bnez	a2, end_bytes
+	 daddu	src, src, 0x1
+
+out:
+	jr	ra
+	 move	v0, sum
+	END(csum_partial)
diff --git a/arch/mips64/lib/csum_partial_copy.c b/arch/mips64/lib/csum_partial_copy.c
new file mode 100644
index 000000000..235bdbfaa
--- /dev/null
+++ b/arch/mips64/lib/csum_partial_copy.c
@@ -0,0 +1,67 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * MIPS64 specific IP/TCP/UDP checksumming routines
+ *
+ * Copyright (C) 1998, 1999 Ralf Baechle
+ */
+#include <net/checksum.h>
+#include <linux/types.h>
+#include <asm/byteorder.h>
+#include <asm/string.h>
+#include <asm/uaccess.h>
+
+/*
+ * copy while checksumming, otherwise like csum_partial
+ */
+unsigned int csum_partial_copy(const char *src, char *dst, 
+                               int len, unsigned int sum)
+{
+	/*
+	 * It's 2:30 am and I don't feel like doing it real ...
+	 * This is lots slower than the real thing (tm)
+	 */
+	sum = csum_partial(src, len, sum);
+	memcpy(dst, src, len);
+
+	return sum;
+}
+
+/*
+ * Copy from userspace and compute checksum.  If we catch an exception
+ * then zero the rest of the buffer.
+ */
+unsigned int csum_partial_copy_from_user (const char *src, char *dst,
+                                          int len, unsigned int sum,
+                                          int *err_ptr)
+{
+	int missing;
+
+	missing = copy_from_user(dst, src, len);
+	if (missing) {
+		memset(dst + len - missing, 0, missing);
+		*err_ptr = -EFAULT;
+	}
+		
+	return csum_partial(dst, len, sum);
+}
+
+/*
+ * Copy to userspace and compute checksum.
+ */
+unsigned int csum_partial_copy_to_user (const char *src, char *dst,
+                                        int len, unsigned int sum,
+                                        int *err_ptr)
+{
+	sum = csum_partial(src, len, sum);
+
+	if (copy_to_user(dst, src, len)) {
+		*err_ptr = -EFAULT;
+		return sum;
+	}
+
+	return sum;
+}
diff --git a/arch/mips64/lib/dump_tlb.c b/arch/mips64/lib/dump_tlb.c
new file mode 100644
index 000000000..f1173ced9
--- /dev/null
+++ b/arch/mips64/lib/dump_tlb.c
@@ -0,0 +1,161 @@
+/*
+ * Dump R4x00 TLB for debugging purposes.
+ *
+ * Copyright (C) 1994, 1995 by Waldorf Electronics,
+ * written by Ralf Baechle.
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+static char *region_map [] = {
+	"u", "s", "k", "!"
+};
+
+void
+dump_tlb(int first, int last)
+{
+	int	i;
+	int	wired;
+	unsigned int pagemask, c0, c1, r;
+	unsigned long long entryhi, entrylo0, entrylo1;
+
+	wired = read_32bit_cp0_register(CP0_WIRED);
+	printk("Wired: %d", wired);
+	
+	for(i=first;i<last;i++)
+	{
+		write_32bit_cp0_register(CP0_INDEX, i);
+		__asm__ __volatile__(
+			".set\tmips3\n\t"
+			".set\tnoreorder\n\t"
+			"nop;nop;nop;nop\n\t"
+			"tlbr\n\t"
+			"nop;nop;nop;nop\n\t"
+			".set\treorder\n\t"
+			".set\tmips0\n\t");
+		pagemask = read_32bit_cp0_register(CP0_PAGEMASK);
+		entryhi  = read_64bit_cp0_register(CP0_ENTRYHI);
+		entrylo0 = read_64bit_cp0_register(CP0_ENTRYLO0);
+		entrylo1 = read_64bit_cp0_register(CP0_ENTRYLO1);
+
+		if((entrylo0|entrylo1) & 2)
+		{
+			/*
+			 * Only print entries in use
+			 */
+			printk("\nIndex: %2d pgmask=%08x ", i, pagemask);
+
+			r  = entryhi >> 62;
+			c0 = (entrylo0 >> 3) & 7;
+			c1 = (entrylo1 >> 3) & 7;
+
+			printk("%s vpn2=%08Lx "
+			       "[pfn=%06Lx c=%d d=%d v=%d g=%Ld]"
+			       "[pfn=%06Lx c=%d d=%d v=%d g=%Ld]",
+			       region_map [r], (entryhi >> 13) & 0xffffffff,
+			       (entrylo0 >> 6) & 0xffffff, c0,
+			       (entrylo0 & 4) ? 1 : 0,
+			       (entrylo0 & 2) ? 1 : 0,
+			       (entrylo0 & 1),
+			       (entrylo1 >> 6) & 0xffffff, c1,
+			       (entrylo1 & 4) ? 1 : 0,
+			       (entrylo1 & 2) ? 1 : 0,
+			       (entrylo1 & 1));
+			       
+		}
+	}
+	printk("\n");
+}
+
+void
+dump_tlb_all(void)
+{
+	dump_tlb(0, mips_tlb_entries - 1);
+}
+
+void
+dump_tlb_wired(void)
+{
+	dump_tlb(0, read_32bit_cp0_register(CP0_WIRED));
+}
+
+void
+dump_tlb_nonwired(void)
+{
+	dump_tlb(read_32bit_cp0_register(CP0_WIRED), mips_tlb_entries - 1);
+}
+
+void
+dump_list_process(struct task_struct *t, void *address)
+{
+	pgd_t	*page_dir, *pgd;
+	pmd_t	*pmd;
+	pte_t	*pte, page;
+	unsigned long addr;
+
+	addr = (unsigned long) address;
+
+	printk("Addr              == %08lx\n", addr);
+	printk("tasks->tss.pg_dir == %08lx\n", (unsigned long) t->tss.pg_dir);
+	printk("tasks->mm.pgd     == %08lx\n", (unsigned long) t->mm->pgd);
+
+	page_dir = pgd_offset(t->mm, 0);
+	printk("page_dir == %08lx\n", (unsigned long) page_dir);
+
+	pgd = pgd_offset(t->mm, addr);
+	printk("pgd == %08lx, ", (unsigned long) pgd);
+
+	pmd = pmd_offset(pgd, addr);
+	printk("pmd == %08lx, ", (unsigned long) pmd);
+
+	pte = pte_offset(pmd, addr);
+	printk("pte == %08lx, ", (unsigned long) pte);
+
+	page = *pte;
+	printk("page == %08lx\n", (unsigned long) pte_val(page));
+}
+
+void
+dump_list_current(void *address)
+{
+	dump_list_process(current, address);
+}
+
+unsigned long
+vtop(void *address)
+{
+	pgd_t	*pgd;
+	pmd_t	*pmd;
+	pte_t	*pte;
+	unsigned long addr, paddr;
+
+	addr = (unsigned long) address;
+	pgd = pgd_offset(current->mm, addr);
+	pmd = pmd_offset(pgd, addr);
+	pte = pte_offset(pmd, addr);
+	paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+	paddr |= (addr & ~PAGE_MASK);
+
+	return paddr;
+}
+
+void
+dump16(unsigned long *p)
+{
+	int i;
+
+	for(i=0; i<8; i++) {
+		printk("*%08lx == %08lx, ",
+		       (unsigned long)p, (unsigned long)*p++);
+		printk("*%08lx == %08lx\n",
+		       (unsigned long)p, (unsigned long)*p++);
+	}
+}
diff --git a/arch/mips64/lib/floppy-no.c b/arch/mips64/lib/floppy-no.c
new file mode 100644
index 000000000..45b174a03
--- /dev/null
+++ b/arch/mips64/lib/floppy-no.c
@@ -0,0 +1,58 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Dummy file for machines without standard floppy drives.
+ *
+ * Copyright (C) 1998 by Ralf Baechle
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <asm/floppy.h>
+
+/*
+ * How to access the FDC's registers.
+ */
+static void no_fd_dummy(void)
+{
+	panic("no_fd_dummy called - shouldn't happen");
+}
+
+static unsigned long no_fd_getfdaddr1(void)
+{
+	return (unsigned long)-1;	/* No FDC nowhere ... */
+}
+
+static unsigned long no_fd_drive_type(unsigned long n)
+{
+	return 0;
+}
+
+struct fd_ops no_fd_ops = {
+	/*
+	 * How to access the floppy controller's ports
+	 */
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	/*
+	 * How to access the floppy DMA functions.
+	 */
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	no_fd_getfdaddr1,
+	(void *) no_fd_dummy,
+	(void *) no_fd_dummy,
+	no_fd_drive_type
+};
diff --git a/arch/mips64/lib/floppy-std.c b/arch/mips64/lib/floppy-std.c
new file mode 100644
index 000000000..77d7298ae
--- /dev/null
+++ b/arch/mips64/lib/floppy-std.c
@@ -0,0 +1,166 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Access the floppy hardware on PC style hardware
+ *
+ * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
+ */
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/linkage.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/dma.h>
+#include <asm/floppy.h>
+#include <asm/keyboard.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mc146818rtc.h>
+#include <asm/pgtable.h>
+
+/*
+ * How to access the FDC's registers.
+ */
+static unsigned char std_fd_inb(unsigned int port)
+{
+	return inb_p(port);
+}
+
+static void std_fd_outb(unsigned char value, unsigned int port)
+{
+	outb_p(value, port);
+}
+
+/*
+ * How to access the floppy DMA functions.
+ */
+static void std_fd_enable_dma(int channel)
+{
+	enable_dma(channel);
+}
+
+static void std_fd_disable_dma(int channel)
+{
+	disable_dma(channel);
+}
+
+static int std_fd_request_dma(int channel)
+{
+	return request_dma(channel, "floppy");
+}
+
+static void std_fd_free_dma(int channel)
+{
+	free_dma(channel);
+}
+
+static void std_fd_clear_dma_ff(int channel)
+{
+	clear_dma_ff(channel);
+}
+
+static void std_fd_set_dma_mode(int channel, char mode)
+{
+	set_dma_mode(channel, mode);
+}
+
+static void std_fd_set_dma_addr(int channel, unsigned int addr)
+{
+	set_dma_addr(channel, addr);
+}
+
+static void std_fd_set_dma_count(int channel, unsigned int count)
+{
+	set_dma_count(channel, count);
+}
+
+static int std_fd_get_dma_residue(int channel)
+{
+	return get_dma_residue(channel);
+}
+
+static void std_fd_enable_irq(int irq)
+{
+	enable_irq(irq);
+}
+
+static void std_fd_disable_irq(int irq)
+{
+	disable_irq(irq);
+}
+
+static unsigned long std_fd_getfdaddr1(void)
+{
+	return 0x3f0;
+}
+
+/* Pure 2^n version of get_order */
+static int __get_order(unsigned long size)
+{
+	int order;
+
+	size = (size-1) >> (PAGE_SHIFT-1);
+	order = -1;
+	do {
+		size >>= 1;
+		order++;
+	} while (size);
+	return order;
+}
+
+static unsigned long std_fd_dma_mem_alloc(unsigned long size)
+{
+	int order = __get_order(size);
+	unsigned long mem;
+
+	mem = __get_dma_pages(GFP_KERNEL,order);
+
+	return mem;
+}
+
+static void std_fd_dma_mem_free(unsigned long addr, unsigned long size)
+{       
+	free_pages(addr, __get_order(size));	
+}
+
+static unsigned long std_fd_drive_type(unsigned long n)
+{
+	if (n == 0)
+		return 4;	/* 3,5", 1.44mb */
+
+	return 0;
+}
+
+struct fd_ops std_fd_ops = {
+	/*
+	 * How to access the floppy controller's ports
+	 */
+	std_fd_inb,
+	std_fd_outb,
+	/*
+	 * How to access the floppy DMA functions.
+	 */
+	std_fd_enable_dma,
+	std_fd_disable_dma,
+	std_fd_request_dma,
+	std_fd_free_dma,
+	std_fd_clear_dma_ff,
+	std_fd_set_dma_mode,
+	std_fd_set_dma_addr,
+	std_fd_set_dma_count,
+	std_fd_get_dma_residue,
+	std_fd_enable_irq,
+	std_fd_disable_irq,
+        std_fd_getfdaddr1,
+        std_fd_dma_mem_alloc,
+        std_fd_dma_mem_free,
+	std_fd_drive_type
+};
diff --git a/arch/mips64/lib/ide-no.c b/arch/mips64/lib/ide-no.c
new file mode 100644
index 000000000..6fdadc7df
--- /dev/null
+++ b/arch/mips64/lib/ide-no.c
@@ -0,0 +1,71 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Stub IDE routines to keep Linux from crashing on machine which don't
+ * have IDE like the Indy.
+ *
+ * Copyright (C) 1998, 1999 by Ralf Baechle
+ */
+#include <linux/hdreg.h>
+#include <linux/kernel.h>
+#include <linux/ide.h>
+#include <asm/hdreg.h>
+#include <asm/ptrace.h>
+
+static int no_ide_default_irq(ide_ioreg_t base)
+{
+	return 0;
+}
+
+static ide_ioreg_t no_ide_default_io_base(int index)
+{
+	return 0;
+}
+
+static void no_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
+                                    ide_ioreg_t ctrl_port, int *irq)
+{
+}
+
+static int no_ide_request_irq(unsigned int irq,
+                              void (*handler)(int,void *, struct pt_regs *),
+                              unsigned long flags, const char *device,
+                              void *dev_id)
+{
+	panic("no_no_ide_request_irq called - shouldn't happen");
+}			
+
+static void no_ide_free_irq(unsigned int irq, void *dev_id)
+{
+	panic("no_ide_free_irq called - shouldn't happen");
+}
+
+static int no_ide_check_region(ide_ioreg_t from, unsigned int extent)
+{
+	panic("no_ide_check_region called - shouldn't happen");
+}
+
+static void no_ide_request_region(ide_ioreg_t from, unsigned int extent,
+                                    const char *name)
+{
+	panic("no_ide_request_region called - shouldn't happen");
+}
+
+static void no_ide_release_region(ide_ioreg_t from, unsigned int extent)
+{
+	panic("no_ide_release_region called - shouldn't happen");
+}
+
+struct ide_ops no_ide_ops = {
+	&no_ide_default_irq,
+	&no_ide_default_io_base,
+	&no_ide_init_hwif_ports,
+	&no_ide_request_irq,
+	&no_ide_free_irq,
+	&no_ide_check_region,
+	&no_ide_request_region,
+	&no_ide_release_region
+};
diff --git a/arch/mips64/lib/ide-std.c b/arch/mips64/lib/ide-std.c
new file mode 100644
index 000000000..1538ffde9
--- /dev/null
+++ b/arch/mips64/lib/ide-std.c
@@ -0,0 +1,103 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * IDE routines for typical pc-like standard configurations.
+ *
+ * Copyright (C) 1998, 1999 by Ralf Baechle
+ */
+#include <linux/sched.h>
+#include <linux/ide.h>
+#include <linux/ioport.h>
+#include <linux/hdreg.h>
+#include <asm/ptrace.h>
+#include <asm/hdreg.h>
+
+static int std_ide_default_irq(ide_ioreg_t base)
+{
+	switch (base) {
+		case 0x1f0: return 14;
+		case 0x170: return 15;
+		case 0x1e8: return 11;
+		case 0x168: return 10;
+		case 0x1e0: return 8;
+		case 0x160: return 12;
+		default:
+			return 0;
+	}
+}
+
+static ide_ioreg_t std_ide_default_io_base(int index)
+{
+	switch (index) {
+		case 0:	return 0x1f0;
+		case 1:	return 0x170;
+		case 2: return 0x1e8;
+		case 3: return 0x168;
+		case 4: return 0x1e0;
+		case 5: return 0x160;
+		default:
+			return 0;
+	}
+}
+
+static void std_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
+                                     ide_ioreg_t ctrl_port, int *irq)
+{
+	ide_ioreg_t reg = data_port;
+	int i;
+
+	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += 1;
+	}
+	if (ctrl_port) {
+		hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+	} else {
+		hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
+	}
+	if (irq != NULL)
+		*irq = 0;
+}
+
+static int std_ide_request_irq(unsigned int irq,
+                                void (*handler)(int,void *, struct pt_regs *),
+                                unsigned long flags, const char *device,
+                                void *dev_id)
+{
+	return request_irq(irq, handler, flags, device, dev_id);
+}			
+
+static void std_ide_free_irq(unsigned int irq, void *dev_id)
+{
+	free_irq(irq, dev_id);
+}
+
+static int std_ide_check_region(ide_ioreg_t from, unsigned int extent)
+{
+	return check_region(from, extent);
+}
+
+static void std_ide_request_region(ide_ioreg_t from, unsigned int extent,
+                                    const char *name)
+{
+	request_region(from, extent, name);
+}
+
+static void std_ide_release_region(ide_ioreg_t from, unsigned int extent)
+{
+	release_region(from, extent);
+}
+
+struct ide_ops std_ide_ops = {
+	&std_ide_default_irq,
+	&std_ide_default_io_base,
+	&std_ide_init_hwif_ports,
+	&std_ide_request_irq,
+	&std_ide_free_irq,
+	&std_ide_check_region,
+	&std_ide_request_region,
+	&std_ide_release_region
+};
diff --git a/arch/mips64/lib/kbd-no.c b/arch/mips64/lib/kbd-no.c
new file mode 100644
index 000000000..5da1be2b7
--- /dev/null
+++ b/arch/mips64/lib/kbd-no.c
@@ -0,0 +1,63 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Stub keyboard and psaux routines to keep Linux from crashing on machines
+ * without a keyboard.
+ *
+ * Copyright (C) 1998 by Ralf Baechle
+ */
+#include <linux/sched.h>
+#include <asm/keyboard.h>
+
+static void no_kbd_request_region(void)
+{
+	/* No I/O ports are being used on the Indy.  */
+}
+
+static int no_kbd_request_irq(void (*handler)(int, void *, struct pt_regs *))
+{
+	return -ENODEV;
+}
+
+static int no_aux_request_irq(void (*handler)(int, void *, struct pt_regs *))
+{
+	return -ENODEV;
+}
+
+static void no_aux_free_irq(void)
+{
+}
+
+static unsigned char no_kbd_read_input(void)
+{
+	return 0;
+}
+
+static void no_kbd_write_output(unsigned char val)
+{
+}
+
+static void no_kbd_write_command(unsigned char val)
+{
+}
+
+static unsigned char no_kbd_read_status(void)
+{
+	return 0;
+}
+
+struct kbd_ops no_kbd_ops = {
+	no_kbd_request_region,
+	no_kbd_request_irq,
+
+	no_aux_request_irq,
+	no_aux_free_irq,
+
+	no_kbd_read_input,
+	no_kbd_write_output,
+	no_kbd_write_command,
+	no_kbd_read_status
+};
diff --git a/arch/mips64/lib/kbd-std.c b/arch/mips64/lib/kbd-std.c
new file mode 100644
index 000000000..1a1bbcbf7
--- /dev/null
+++ b/arch/mips64/lib/kbd-std.c
@@ -0,0 +1,81 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Routines for standard PC style keyboards accessible via I/O ports.
+ *
+ * Copyright (C) 1998, 1999 by Ralf Baechle
+ */
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/pc_keyb.h>
+#include <asm/keyboard.h>
+#include <asm/io.h>
+
+#define KEYBOARD_IRQ 1
+#define AUX_IRQ 12
+
+static void std_kbd_request_region(void)
+{
+	request_region(0x60, 16, "keyboard");
+}
+
+static int std_kbd_request_irq(void (*handler)(int, void *, struct pt_regs *))
+{
+	return request_irq(KEYBOARD_IRQ, handler, 0, "keyboard", NULL);
+}
+
+static int std_aux_request_irq(void (*handler)(int, void *, struct pt_regs *))
+{
+	return request_irq(AUX_IRQ, handler, 0, "PS/2 Mouse", NULL);
+}
+
+static void std_aux_free_irq(void)
+{
+	free_irq(AUX_IRQ, NULL);
+}
+
+static unsigned char std_kbd_read_input(void)
+{
+	return inb(KBD_DATA_REG);
+}
+
+static void std_kbd_write_output(unsigned char val)
+{
+	int status;
+
+	do {
+		status = inb(KBD_CNTL_REG);
+	} while (status & KBD_STAT_IBF);
+	outb(val, KBD_DATA_REG);
+}
+
+static void std_kbd_write_command(unsigned char val)
+{
+	int status;
+
+	do {
+		status = inb(KBD_CNTL_REG);
+	} while (status & KBD_STAT_IBF);
+	outb(val, KBD_CNTL_REG);
+}
+
+static unsigned char std_kbd_read_status(void)
+{
+	return inb(KBD_STATUS_REG);
+}
+
+struct kbd_ops std_kbd_ops = {
+	std_kbd_request_region,
+	std_kbd_request_irq,
+
+	std_aux_request_irq,
+	std_aux_free_irq,
+
+	std_kbd_read_input,
+	std_kbd_write_output,
+	std_kbd_write_command,
+	std_kbd_read_status
+};
diff --git a/arch/mips64/lib/memcpy.S b/arch/mips64/lib/memcpy.S
new file mode 100644
index 000000000..8efad1581
--- /dev/null
+++ b/arch/mips64/lib/memcpy.S
@@ -0,0 +1,708 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Unified implementation of memcpy, memmove and the __copy_user backend.
+ *
+ * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ *
+ * For __rmemcpy and memmove an exception is always a kernel bug, therefore
+ * they're not protected.  In order to keep the exception fixup routine
+ * simple all memory accesses in __copy_user to src rsp. dst are stricly
+ * incremental.  The fixup routine depends on $at not being changed.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+/*
+ * The fixup routine for copy_to_user depends on copying strictly in
+ * increasing order.  Gas expands the ulw/usw macros in the wrong order for
+ * little endian machines, so we cannot depend on them.
+ */
+#ifdef __MIPSEB__
+#define uswL	swl
+#define uswU	swr
+#define ulwL	lwl
+#define ulwU	lwr
+#endif
+#ifdef __MIPSEL__
+#define uswL	swr
+#define uswU	swl
+#define ulwL	lwr
+#define ulwU	lwl
+#endif
+
+#define EX(insn,reg,addr,handler)			\
+9:	insn	reg, addr;				\
+	.section __ex_table,"a"; 			\
+	PTR	9b, handler; 				\
+	.previous
+
+#define UEX(insn,reg,addr,handler)			\
+9:	insn ## L reg, addr;				\
+10:	insn ## U reg, 3 + addr;			\
+	.section __ex_table,"a"; 			\
+	PTR	9b, handler; 				\
+	PTR	10b, handler; 				\
+	.previous
+
+/* ascending order, destination aligned  */
+#define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
+	EX(lw, t0, (offset + 0x00)(src), l_fixup); \
+	EX(lw, t1, (offset + 0x04)(src), l_fixup); \
+	EX(lw, t2, (offset + 0x08)(src), l_fixup); \
+	EX(lw, t3, (offset + 0x0c)(src), l_fixup); \
+	EX(sw, t0, (offset + 0x00)(dst), s_fixup); \
+	EX(sw, t1, (offset + 0x04)(dst), s_fixup); \
+	EX(sw, t2, (offset + 0x08)(dst), s_fixup); \
+	EX(sw, t3, (offset + 0x0c)(dst), s_fixup); \
+	EX(lw, t0, (offset + 0x10)(src), l_fixup); \
+	EX(lw, t1, (offset + 0x14)(src), l_fixup); \
+	EX(lw, t2, (offset + 0x18)(src), l_fixup); \
+	EX(lw, t3, (offset + 0x1c)(src), l_fixup); \
+	EX(sw, t0, (offset + 0x10)(dst), s_fixup); \
+	EX(sw, t1, (offset + 0x14)(dst), s_fixup); \
+	EX(sw, t2, (offset + 0x18)(dst), s_fixup); \
+	EX(sw, t3, (offset + 0x1c)(dst), s_fixup)
+
+/* ascending order, destination unaligned  */
+#define UMOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
+	EX(lw, t0, (offset + 0x00)(src), l_fixup); \
+	EX(lw, t1, (offset + 0x04)(src), l_fixup); \
+	EX(lw, t2, (offset + 0x08)(src), l_fixup); \
+	EX(lw, t3, (offset + 0x0c)(src), l_fixup); \
+	UEX(usw, t0, (offset + 0x00)(dst), s_fixup); \
+	UEX(usw, t1, (offset + 0x04)(dst), s_fixup); \
+	UEX(usw, t2, (offset + 0x08)(dst), s_fixup); \
+	UEX(usw, t3, (offset + 0x0c)(dst), s_fixup); \
+	EX(lw, t0, (offset + 0x10)(src), l_fixup); \
+	EX(lw, t1, (offset + 0x14)(src), l_fixup); \
+	EX(lw, t2, (offset + 0x18)(src), l_fixup); \
+	EX(lw, t3, (offset + 0x1c)(src), l_fixup); \
+	UEX(usw, t0, (offset + 0x10)(dst), s_fixup); \
+	UEX(usw, t1, (offset + 0x14)(dst), s_fixup); \
+	UEX(usw, t2, (offset + 0x18)(dst), s_fixup); \
+	UEX(usw, t3, (offset + 0x1c)(dst), s_fixup)
+
+	.text
+	.set	noreorder
+	.set	noat
+
+	.align	5
+LEAF(memcpy)					/* a0=dst a1=src a2=len */
+	move	v0, a0				/* return value */
+__memcpy:
+EXPORT(__copy_user)
+	xor	ta0, a0, a1
+	andi	ta0, ta0, 0x3
+	move	t3, a0
+	beqz	ta0, can_align
+	 sltiu	t8, a2, 0x8
+
+	b	memcpy_u_src			# bad alignment
+	 move	ta2, a2
+
+can_align:
+	bnez	t8, small_memcpy		# < 8 bytes to copy
+	 move	ta2, a2
+
+	beqz	a2, out
+	 andi	t8, a1, 0x1
+
+hword_align:
+	beqz	t8, word_align
+	 andi	t8, a1, 0x2
+
+	EX(lb, ta0, (a1), l_fixup)
+	dsubu	a2, a2, 0x1
+	EX(sb, ta0, (a0), s_fixup)
+	daddu	a1, a1, 0x1
+	daddu	a0, a0, 0x1
+	andi	t8, a1, 0x2
+
+word_align:
+	beqz	t8, dword_align
+	 sltiu	t8, a2, 56
+	
+	EX(lh, ta0, (a1), l_fixup)
+	dsubu	a2, a2, 0x2
+	EX(sh, ta0, (a0), s_fixup)
+	sltiu	t8, a2, 56
+	daddu	a0, a0, 0x2
+	daddu	a1, a1, 0x2
+
+dword_align:
+	bnez	t8, do_end_words
+	 move	t8, a2
+
+	andi	t8, a1, 0x4
+	beqz	t8, qword_align
+	 andi	t8, a1, 0x8
+
+	EX(lw, ta0, 0x00(a1), l_fixup)
+	dsubu	a2, a2, 0x4
+	EX(sw, ta0, 0x00(a0), s_fixup)
+	daddu	a1, a1, 0x4
+	daddu	a0, a0, 0x4
+	andi	t8, a1, 0x8
+
+qword_align:
+	beqz	t8, oword_align
+	 andi	t8, a1, 0x10
+
+	EX(lw, ta0, 0x00(a1), l_fixup)
+	EX(lw, ta1, 0x04(a1), l_fixup)
+	dsubu	a2, a2, 0x8
+	EX(sw, ta0, 0x00(a0), s_fixup)
+	EX(sw, ta1, 0x04(a0), s_fixup)
+	daddu	a1, a1, 0x8
+	andi	t8, a1, 0x10
+	daddu	a0, a0, 0x8
+
+oword_align:
+	beqz	t8, begin_movement
+	 srl	t8, a2, 0x7
+
+	EX(lw, ta3, 0x00(a1), l_fixup)
+	EX(lw, t0, 0x04(a1), l_fixup)
+	EX(lw, ta0, 0x08(a1), l_fixup)
+	EX(lw, ta1, 0x0c(a1), l_fixup)
+	EX(sw, ta3, 0x00(a0), s_fixup)
+	EX(sw, t0, 0x04(a0), s_fixup)
+	EX(sw, ta0, 0x08(a0), s_fixup)
+	EX(sw, ta1, 0x0c(a0), s_fixup)
+	dsubu	a2, a2, 0x10
+	daddu	a1, a1, 0x10
+	srl	t8, a2, 0x7
+	daddu	a0, a0, 0x10
+
+begin_movement:
+	beqz	t8, 0f
+	 andi	ta2, a2, 0x40
+
+move_128bytes:
+	MOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	MOVE_BIGCHUNK(a1, a0, 0x20, ta0, ta1, ta3, t0)
+	MOVE_BIGCHUNK(a1, a0, 0x40, ta0, ta1, ta3, t0)
+	MOVE_BIGCHUNK(a1, a0, 0x60, ta0, ta1, ta3, t0)
+	dsubu	t8, t8, 0x01
+	daddu	a1, a1, 0x80
+	bnez	t8, move_128bytes
+	 daddu	a0, a0, 0x80
+
+0:
+	beqz	ta2, 1f
+	 andi	ta2, a2, 0x20
+
+move_64bytes:
+	MOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	MOVE_BIGCHUNK(a1, a0, 0x20, ta0, ta1, ta3, t0)
+	daddu	a1, a1, 0x40
+	daddu	a0, a0, 0x40
+
+1:
+	beqz	ta2, do_end_words
+	 andi	t8, a2, 0x1c
+
+move_32bytes:
+	MOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	andi	t8, a2, 0x1c
+	daddu	a1, a1, 0x20
+	daddu	a0, a0, 0x20
+
+do_end_words:
+	beqz	t8, maybe_end_cruft
+	 srl	t8, t8, 0x2
+
+end_words:
+	EX(lw, ta0, (a1), l_fixup)
+	dsubu	t8, t8, 0x1
+	EX(sw, ta0, (a0), s_fixup)
+	daddu	a1, a1, 0x4
+	bnez	t8, end_words
+	 daddu	a0, a0, 0x4
+
+maybe_end_cruft:
+	andi	ta2, a2, 0x3
+
+small_memcpy:
+	beqz	ta2, out
+	 move	a2, ta2
+
+end_bytes:
+	EX(lb, ta0, (a1), l_fixup)
+	dsubu	a2, a2, 0x1
+	EX(sb, ta0, (a0), s_fixup)
+	daddu	a1, a1, 0x1
+	bnez	a2, end_bytes
+	 daddu	a0, a0, 0x1
+
+out:	jr	ra
+	 move	a2, zero
+
+/* ------------------------------------------------------------------------- */
+
+/* Bad, bad.  At least try to align the source  */
+
+memcpy_u_src:
+	bnez	t8, small_memcpy		# < 8 bytes?
+	 move	ta2, a2
+
+	daddiu	ta0, a1, 7			# ta0: how much to align
+	ori	ta0, 7
+	xori	ta0, 7
+	dsubu	ta0, a1
+
+	UEX(ulw, ta1, 0(a1), l_fixup)		# dword alignment
+	UEX(ulw, ta2, 4(a1), l_fixup)
+	UEX(usw, ta1, 0(a0), s_fixup)
+	UEX(usw, ta2, 4(a0), s_fixup)
+
+	daddu	a1, ta0				# src
+	daddu	a0, ta0				# dst
+	dsubu	a2, ta0				# len
+
+	sltiu	t8, a2, 56
+	bnez	t8, u_do_end_words
+	 andi	t8, a2, 0x3c
+
+	andi	t8, a1, 8			# now qword aligned?
+
+u_qword_align:
+	beqz	t8, u_oword_align
+	 andi	t8, a1, 0x10
+
+	EX(lw, ta0, 0x00(a1), l_fixup)
+	EX(lw, ta1, 0x04(a1), l_fixup)
+	dsubu	a2, a2, 0x8
+	UEX(usw, ta0, 0x00(a0), s_fixup)
+	UEX(usw, ta1, 0x04(a0), s_fixup)
+	daddu	a1, a1, 0x8
+	andi	t8, a1, 0x10
+	daddu	a0, a0, 0x8
+
+u_oword_align:
+	beqz	t8, u_begin_movement
+	 srl	t8, a2, 0x7
+
+	EX(lw, ta3, 0x08(a1), l_fixup)
+	EX(lw, t0, 0x0c(a1), l_fixup)
+	EX(lw, ta0, 0x00(a1), l_fixup)
+	EX(lw, ta1, 0x04(a1), l_fixup)
+	UEX(usw, ta3, 0x08(a0), s_fixup)
+	UEX(usw, t0, 0x0c(a0), s_fixup)
+	UEX(usw, ta0, 0x00(a0), s_fixup)
+	UEX(usw, ta1, 0x04(a0), s_fixup)
+	dsubu	a2, a2, 0x10
+	daddu	a1, a1, 0x10
+	srl	t8, a2, 0x7
+	daddu	a0, a0, 0x10
+
+u_begin_movement:
+	beqz	t8, 0f
+	 andi	ta2, a2, 0x40
+
+u_move_128bytes:
+	UMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	UMOVE_BIGCHUNK(a1, a0, 0x20, ta0, ta1, ta3, t0)
+	UMOVE_BIGCHUNK(a1, a0, 0x40, ta0, ta1, ta3, t0)
+	UMOVE_BIGCHUNK(a1, a0, 0x60, ta0, ta1, ta3, t0)
+	dsubu	t8, t8, 0x01
+	daddu	a1, a1, 0x80
+	bnez	t8, u_move_128bytes
+	 daddu	a0, a0, 0x80
+
+0:
+	beqz	ta2, 1f
+	 andi	ta2, a2, 0x20
+
+u_move_64bytes:
+	UMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	UMOVE_BIGCHUNK(a1, a0, 0x20, ta0, ta1, ta3, t0)
+	daddu	a1, a1, 0x40
+	daddu	a0, a0, 0x40
+
+1:
+	beqz	ta2, u_do_end_words
+	 andi	t8, a2, 0x1c
+
+u_move_32bytes:
+	UMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	andi	t8, a2, 0x1c
+	daddu	a1, a1, 0x20
+	daddu	a0, a0, 0x20
+
+u_do_end_words:
+	beqz	t8, u_maybe_end_cruft
+	 srl	t8, t8, 0x2
+
+u_end_words:
+	EX(lw, ta0, 0x00(a1), l_fixup)
+	dsubu	t8, t8, 0x1
+	UEX(usw, ta0, 0x00(a0), s_fixup)
+	daddu	a1, a1, 0x4
+	bnez	t8, u_end_words
+	 daddu	a0, a0, 0x4
+
+u_maybe_end_cruft:
+	andi	ta2, a2, 0x3
+
+u_cannot_optimize:
+	beqz	ta2, out
+	 move	a2, ta2
+
+u_end_bytes:
+	EX(lb, ta0, (a1), l_fixup)
+	dsubu	a2, a2, 0x1
+	EX(sb, ta0, (a0), s_fixup)
+	daddu	a1, a1, 0x1
+	bnez	a2, u_end_bytes
+	 daddu	a0, a0, 0x1
+
+	jr	ra
+	 move	a2, zero
+	END(memcpy)
+
+/* descending order, destination aligned  */
+#define RMOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
+	lw	t0, (offset + 0x10)(src); \
+	lw	t1, (offset + 0x14)(src); \
+	lw	t2, (offset + 0x18)(src); \
+	lw	t3, (offset + 0x1c)(src); \
+	sw	t0, (offset + 0x10)(dst); \
+	sw	t1, (offset + 0x14)(dst); \
+	sw	t2, (offset + 0x18)(dst); \
+	sw	t3, (offset + 0x1c)(dst); \
+	lw	t0, (offset + 0x00)(src); \
+	lw	t1, (offset + 0x04)(src); \
+	lw	t2, (offset + 0x08)(src); \
+	lw	t3, (offset + 0x0c)(src); \
+	sw	t0, (offset + 0x00)(dst); \
+	sw	t1, (offset + 0x04)(dst); \
+	sw	t2, (offset + 0x08)(dst); \
+	sw	t3, (offset + 0x0c)(dst)
+
+/* descending order, destination ununaligned  */
+#define RUMOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3) \
+	lw	t0, (offset + 0x10)(src); \
+	lw	t1, (offset + 0x14)(src); \
+	lw	t2, (offset + 0x18)(src); \
+	lw	t3, (offset + 0x1c)(src); \
+	usw	t0, (offset + 0x10)(dst); \
+	usw	t1, (offset + 0x14)(dst); \
+	usw	t2, (offset + 0x18)(dst); \
+	usw	t3, (offset + 0x1c)(dst); \
+	lw	t0, (offset + 0x00)(src); \
+	lw	t1, (offset + 0x04)(src); \
+	lw	t2, (offset + 0x08)(src); \
+	lw	t3, (offset + 0x0c)(src); \
+	usw	t0, (offset + 0x00)(dst); \
+	usw	t1, (offset + 0x04)(dst); \
+	usw	t2, (offset + 0x08)(dst); \
+	usw	t3, (offset + 0x0c)(dst)
+
+	.align	5
+LEAF(memmove)
+	sltu	ta0, a0, a1			# dst < src -> memcpy
+	bnez	ta0, memcpy
+	 daddu	v0, a0, a2
+	sltu	ta0, v0, a1			# dst + len < src -> non-
+	bnez	ta0, __memcpy			# overlapping, can use memcpy
+	 move	v0, a0				/* return value */
+	END(memmove)
+
+LEAF(__rmemcpy)					/* a0=dst a1=src a2=len */
+	daddu	a0, a2				# dst = dst + len
+	daddu	a1, a2				# src = src + len
+
+#if 0 /* Horror fix */
+	xor	ta0, a0, a1
+	andi	ta0, ta0, 0x3
+	move	t3, a0
+	beqz	ta0, r_can_align
+	 sltiu	t8, a2, 0x8
+
+	b	r_memcpy_u_src			# bad alignment
+	 move	ta2, a2
+
+r_can_align:
+	bnez	t8, r_small_memcpy		# < 8 bytes to copy
+	 move	ta2, a2
+
+	beqz	a2, r_out
+	 andi	t8, a1, 0x1
+
+r_hword_align:
+	beqz	t8, r_word_align
+	 andi	t8, a1, 0x2
+
+	lb	ta0, -1(a1)
+	dsubu	a2, a2, 0x1
+	sb	ta0, -1(a0)
+	dsubu	a1, a1, 0x1
+	dsubu	a0, a0, 0x1
+	andi	t8, a1, 0x2
+
+r_word_align:
+	beqz	t8, r_dword_align
+	 sltiu	t8, a2, 56
+	
+	lh	ta0, -2(a1)
+	dsubu	a2, a2, 0x2
+	sh	ta0, -2(a0)
+	sltiu	t8, a2, 56
+	dsubu	a0, a0, 0x2
+	dsubu	a1, a1, 0x2
+
+r_dword_align:
+	bnez	t8, r_do_end_words
+	 move	t8, a2
+
+	andi	t8, a1, 0x4
+	beqz	t8, r_qword_align
+	 andi	t8, a1, 0x8
+
+	lw	ta0, -4(a1)
+	dsubu	a2, a2, 0x4
+	sw	ta0, -4(a0)
+	dsubu	a1, a1, 0x4
+	dsubu	a0, a0, 0x4
+	andi	t8, a1, 0x8
+
+r_qword_align:
+	beqz	t8, r_oword_align
+	 andi	t8, a1, 0x10
+
+	dsubu	a1, a1, 0x8
+	lw	ta0, 0x04(a1)
+	lw	ta1, 0x00(a1)
+	dsubu	a0, a0, 0x8
+	sw	ta0, 0x04(a0)
+	sw	ta1, 0x00(a0)
+	dsubu	a2, a2, 0x8
+
+	andi	t8, a1, 0x10
+
+r_oword_align:
+	beqz	t8, r_begin_movement
+	 srl	t8, a2, 0x7
+
+	dsubu	a1, a1, 0x10
+	lw	ta3, 0x08(a1)			# assumes subblock ordering
+	lw	t0, 0x0c(a1)
+	lw	ta0, 0x00(a1)
+	lw	ta1, 0x04(a1)
+	dsubu	a0, a0, 0x10
+	sw	ta3, 0x08(a0)
+	sw	t0, 0x0c(a0)
+	sw	ta0, 0x00(a0)
+	sw	ta1, 0x04(a0)
+	dsubu	a2, a2, 0x10
+	srl	t8, a2, 0x7
+
+r_begin_movement:
+	beqz	t8, 0f
+	 andi	ta2, a2, 0x40
+
+r_move_128bytes:
+	RMOVE_BIGCHUNK(a1, a0, -0x80, ta0, ta1, ta3, t0)
+	RMOVE_BIGCHUNK(a1, a0, -0x60, ta0, ta1, ta3, t0)
+	RMOVE_BIGCHUNK(a1, a0, -0x40, ta0, ta1, ta3, t0)
+	RMOVE_BIGCHUNK(a1, a0, -0x20, ta0, ta1, ta3, t0)
+	dsubu	t8, t8, 0x01
+	dsubu	a1, a1, 0x80
+	bnez	t8, r_move_128bytes
+	 dsubu	a0, a0, 0x80
+
+0:
+	beqz	ta2, 1f
+	 andi	ta2, a2, 0x20
+
+r_move_64bytes:
+	dsubu	a1, a1, 0x40
+	dsubu	a0, a0, 0x40
+	RMOVE_BIGCHUNK(a1, a0, 0x20, ta0, ta1, ta3, t0)
+	RMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+
+1:
+	beqz	ta2, r_do_end_words
+	 andi	t8, a2, 0x1c
+
+r_move_32bytes:
+	dsubu	a1, a1, 0x20
+	dsubu	a0, a0, 0x20
+	RMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	andi	t8, a2, 0x1c
+
+r_do_end_words:
+	beqz	t8, r_maybe_end_cruft
+	 srl	t8, t8, 0x2
+
+r_end_words:
+	lw	ta0, -4(a1)
+	dsubu	t8, t8, 0x1
+	sw	ta0, -4(a0)
+	dsubu	a1, a1, 0x4
+	bnez	t8, r_end_words
+	 dsubu	a0, a0, 0x4
+
+r_maybe_end_cruft:
+	andi	ta2, a2, 0x3
+
+r_small_memcpy:
+	beqz	ta2, r_out
+	 move	a2, ta2
+#endif /* Horror fix */
+
+r_end_bytes:
+	lb	ta0, -1(a1)
+	dsubu	a2, a2, 0x1
+	sb	ta0, -1(a0)
+	dsubu	a1, a1, 0x1
+	bnez	a2, r_end_bytes
+	 dsubu	a0, a0, 0x1
+
+r_out:
+	jr	ra
+	 move	a2, zero
+
+#if 0 /* Horror fix */
+/* ------------------------------------------------------------------------- */
+
+/* Bad, bad.  At least try to align the source  */
+
+r_memcpy_u_src:
+	bnez	t8, r_small_memcpy		# < 8 bytes?
+	 move	ta2, a2
+
+	andi	ta0, a1, 7			# ta0: how much to align
+
+	ulw	ta1, -8(a1)			# dword alignment
+	ulw	ta2, -4(a1)
+	usw	ta1, -8(a0)
+	usw	ta2, -4(a0)
+
+	dsubu	a1, ta0				# src
+	dsubu	a0, ta0				# dst
+	dsubu	a2, ta0				# len
+
+	sltiu	t8, a2, 56
+	bnez	t8, ru_do_end_words
+	 andi	t8, a2, 0x3c
+
+	andi	t8, a1, 8			# now qword aligned?
+
+ru_qword_align:
+	beqz	t8, ru_oword_align
+	 andi	t8, a1, 0x10
+
+	dsubu	a1, a1, 0x8
+	lw	ta0, 0x00(a1)
+	lw	ta1, 0x04(a1)
+	dsubu	a0, a0, 0x8
+	usw	ta0, 0x00(a0)
+	usw	ta1, 0x04(a0)
+	dsubu	a2, a2, 0x8
+
+	andi	t8, a1, 0x10
+
+ru_oword_align:
+	beqz	t8, ru_begin_movement
+	 srl	t8, a2, 0x7
+
+	dsubu	a1, a1, 0x10
+	lw	ta3, 0x08(a1)			# assumes subblock ordering
+	lw	t0, 0x0c(a1)
+	lw	ta0, 0x00(a1)
+	lw	ta1, 0x04(a1)
+	dsubu	a0, a0, 0x10
+	usw	ta3, 0x08(a0)
+	usw	t0, 0x0c(a0)
+	usw	ta0, 0x00(a0)
+	usw	ta1, 0x04(a0)
+	dsubu	a2, a2, 0x10
+
+	srl	t8, a2, 0x7
+
+ru_begin_movement:
+	beqz	t8, 0f
+	 andi	ta2, a2, 0x40
+
+ru_move_128bytes:
+	RUMOVE_BIGCHUNK(a1, a0, -0x80, ta0, ta1, ta3, t0)
+	RUMOVE_BIGCHUNK(a1, a0, -0x60, ta0, ta1, ta3, t0)
+	RUMOVE_BIGCHUNK(a1, a0, -0x40, ta0, ta1, ta3, t0)
+	RUMOVE_BIGCHUNK(a1, a0, -0x20, ta0, ta1, ta3, t0)
+	dsubu	t8, t8, 0x01
+	dsubu	a1, a1, 0x80
+	bnez	t8, ru_move_128bytes
+	 dsubu	a0, a0, 0x80
+
+0:
+	beqz	ta2, 1f
+	 andi	ta2, a2, 0x20
+
+ru_move_64bytes:
+	dsubu	a1, a1, 0x40
+	dsubu	a0, a0, 0x40
+	RUMOVE_BIGCHUNK(a1, a0, 0x20, ta0, ta1, ta3, t0)
+	RUMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+
+1:
+	beqz	ta2, ru_do_end_words
+	 andi	t8, a2, 0x1c
+
+ru_move_32bytes:
+	dsubu	a1, a1, 0x20
+	dsubu	a0, a0, 0x20
+	RUMOVE_BIGCHUNK(a1, a0, 0x00, ta0, ta1, ta3, t0)
+	andi	t8, a2, 0x1c
+
+ru_do_end_words:
+	beqz	t8, ru_maybe_end_cruft
+	 srl	t8, t8, 0x2
+
+ru_end_words:
+	lw	ta0, -4(a1)
+	usw	ta0, -4(a0)
+	dsubu	t8, t8, 0x1
+	dsubu	a1, a1, 0x4
+	bnez	t8, ru_end_words
+	 dsubu	a0, a0, 0x4
+
+ru_maybe_end_cruft:
+	andi	ta2, a2, 0x3
+
+ru_cannot_optimize:
+	beqz	ta2, r_out
+	 move	a2, ta2
+
+ru_end_bytes:
+	lb	ta0, -1(a1)
+	dsubu	a2, a2, 0x1
+	sb	ta0, -1(a0)
+	dsubu	a1, a1, 0x1
+	bnez	a2, ru_end_bytes
+	 dsubu	a0, a0, 0x1
+
+	jr	ra
+	 move	a2, zero
+	END(__rmemcpy)
+#endif /* Horror fix */
+
+l_fixup:					# clear the rest of the buffer
+	ld	ta0, THREAD_BUADDR($28)
+	 nop
+	dsubu	a2, AT, ta0			# a2 bytes to go
+	daddu	a0, ta0				# compute start address in a1
+	dsubu	a0, a1
+	j	__bzero
+	 move	a1, zero
+
+s_fixup:
+	jr	ra
+	 nop
diff --git a/arch/mips64/lib/memset.S b/arch/mips64/lib/memset.S
new file mode 100644
index 000000000..25afb2c89
--- /dev/null
+++ b/arch/mips64/lib/memset.S
@@ -0,0 +1,134 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 1999 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler)			\
+9:	insn	reg, addr;				\
+	.section __ex_table,"a"; 			\
+	PTR	9b, handler; 				\
+	.previous
+
+#define F_FILL64(dst, offset, val, fixup)		\
+	EX(sw, val, (offset + 0x00)(dst), fixup);	\
+	EX(sw, val, (offset + 0x08)(dst), fixup);	\
+	EX(sw, val, (offset + 0x10)(dst), fixup);	\
+	EX(sw, val, (offset + 0x18)(dst), fixup);	\
+	EX(sw, val, (offset + 0x20)(dst), fixup);	\
+	EX(sw, val, (offset + 0x28)(dst), fixup);	\
+	EX(sw, val, (offset + 0x30)(dst), fixup);	\
+	EX(sw, val, (offset + 0x38)(dst), fixup)
+
+/*
+ * memset(void *s, int c, size_t n)
+ *
+ * a0: start of area to clear
+ * a1: char to fill with
+ * a2: size of area to clear
+ */
+	.set	noreorder
+	.align	5
+LEAF(memset)
+	beqz	a1, 1f
+	 move	v0, a0				/* result */
+
+	andi	a1, 0xff			/* spread fillword */
+	dsll	t1, a1, 8
+	or	a1, t1
+	dsll	t1, a1, 16
+	or	a1, t1
+	dsll	t1, a1, 32
+	or	a1, t1
+
+1:
+
+EXPORT(__bzero)
+	sltiu	t0, a2, 8			/* very small region? */
+	bnez	t0, small_memset
+	 andi	t0, a0, 7			/* aligned? */
+
+	beqz	t0, 1f
+	 dsubu	t0, 8				/* alignment in bytes */
+
+#ifdef __MIPSEB__
+	EX(sdl, a1, (a0), first_fixup)		/* make dword aligned */
+#endif
+#ifdef __MIPSEL__
+	EX(sdr, a1, (a0), first_fixup)		/* make dword aligned */
+#endif
+	dsubu	a0, t0				/* dword align ptr */
+	daddu	a2, t0				/* correct size */
+
+1:	ori	t1, a2, 0x3f			/* # of full blocks */
+	xori	t1, 0x3f
+	beqz	t1, memset_partial		/* no block to fill */
+	 andi	t0, a2, 0x38
+
+	daddu	t1, a0				/* end address */
+	.set	reorder
+1:	daddiu	a0, 64
+	F_FILL64(a0, -64, a1, fwd_fixup)
+	bne	t1, a0, 1b
+	.set	noreorder
+
+memset_partial:
+	la	t1, 2f				/* where to start */
+	dsubu	t1, t0
+	jr	t1
+	 daddu	a0, t0				/* dest ptr */
+
+	F_FILL64(a0, -64, a1, partial_fixup)	/* ... but first do dwds ... */
+2:	andi	a2, 7				/* 0 <= n <= 3 to go */
+
+	beqz	a2, 1f
+	 daddu	a0, a2				/* What's left */
+#ifdef __MIPSEB__
+	EX(sdr, a1, -1(a0), last_fixup)
+#endif
+#ifdef __MIPSEL__
+	EX(sdl, a1, -1(a0), last_fixup)
+#endif
+1:	jr	ra
+	 move	a2, zero
+
+small_memset:
+	beqz	a2, 2f
+	 daddu	t1, a0, a2
+
+1:	daddiu	a0, 1				/* fill bytewise */
+	bne	t1, a0, 1b
+	 sb	a1, -1(a0)
+
+2:	jr	ra				/* done */
+	 move	a2, zero
+	END(memset)
+
+first_fixup:
+	jr	ra
+	 nop
+
+fwd_fixup:
+	ld	t0, THREAD_BUADDR($28)
+	andi	a2, 0x3f
+	daddu	a2, t1
+	jr	ra
+	 dsubu	a2, t0
+
+partial_fixup:
+	ld	t0, THREAD_BUADDR($28)
+	andi	a2, 3
+	daddu	a2, t1
+	jr	ra
+	 dsubu	a2, t0
+
+last_fixup:
+	jr	ra
+	 andi	v1, a2, 7
diff --git a/arch/mips64/lib/rtc-no.c b/arch/mips64/lib/rtc-no.c
new file mode 100644
index 000000000..c471da824
--- /dev/null
+++ b/arch/mips64/lib/rtc-no.c
@@ -0,0 +1,34 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Stub RTC routines to keep Linux from crashing on machine which don't
+ * have a RTC chip.
+ *
+ * Copyright (C) 1998 by Ralf Baechle
+ */
+#include <linux/kernel.h>
+#include <linux/mc146818rtc.h>
+
+static unsigned char no_rtc_read_data(unsigned long addr)
+{
+	panic("no_rtc_read_data called - shouldn't happen.");
+}
+
+static void no_rtc_write_data(unsigned char data, unsigned long addr)
+{
+	panic("no_rtc_write_data called - shouldn't happen.");
+}
+
+static int no_rtc_bcd_mode(void)
+{
+	panic("no_rtc_bcd_mode called - shouldn't happen.");
+}
+
+struct rtc_ops no_rtc_ops = {
+	&no_rtc_read_data,
+	&no_rtc_write_data,
+	&no_rtc_bcd_mode
+};
diff --git a/arch/mips64/lib/rtc-std.c b/arch/mips64/lib/rtc-std.c
new file mode 100644
index 000000000..7369db07d
--- /dev/null
+++ b/arch/mips64/lib/rtc-std.c
@@ -0,0 +1,35 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * RTC routines for PC style attached Dallas chip.
+ *
+ * Copyright (C) 1998 by Ralf Baechle
+ */
+#include <linux/mc146818rtc.h>
+#include <asm/io.h>
+
+static unsigned char std_rtc_read_data(unsigned long addr)
+{
+	outb_p(addr, RTC_PORT(0));
+	return inb_p(RTC_PORT(1));
+}
+
+static void std_rtc_write_data(unsigned char data, unsigned long addr)
+{
+	outb_p(addr, RTC_PORT(0));
+	outb_p(data, RTC_PORT(1));
+}
+
+static int std_rtc_bcd_mode(void)
+{
+	return 1;
+}
+
+struct rtc_ops std_rtc_ops = {
+	&std_rtc_read_data,
+	&std_rtc_write_data,
+	&std_rtc_bcd_mode
+};
diff --git a/arch/mips64/lib/strlen_user.S b/arch/mips64/lib/strlen_user.S
new file mode 100644
index 000000000..da37c0c2a
--- /dev/null
+++ b/arch/mips64/lib/strlen_user.S
@@ -0,0 +1,46 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler)			\
+9:	insn	reg, addr;				\
+	.section __ex_table,"a";			\
+	PTR	9b, handler;				\
+	.previous
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 for error
+ */
+LEAF(__strlen_user_nocheck_asm)
+	LONG_L		v0, THREAD_CURDS($28)			# pointer ok?
+	LONG_SUBU	v0, zero, v0
+	and		v0, a0
+	not		v0
+	beqz		v0, fault
+EXPORT(__strlen_user_asm)
+	move		v0, a0
+1:	EX(lb, t0, (v0), fault)
+	LONG_ADDIU	v0, 1
+	bnez		t0, 1b
+	LONG_SUBU	v0, a0
+	jr		ra
+	END(__strlen_user_nocheck_asm)
+
+	.section	__ex_table,"a"
+	PTR		1b, fault
+	.previous
+
+fault:	move		v0, zero
+	jr		ra
diff --git a/arch/mips64/lib/strncpy_user.S b/arch/mips64/lib/strncpy_user.S
new file mode 100644
index 000000000..aad14c263
--- /dev/null
+++ b/arch/mips64/lib/strncpy_user.S
@@ -0,0 +1,60 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1999 by Ralf Baechle
+ */
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler)			\
+9:	insn	reg, addr;				\
+	.section __ex_table,"a";			\
+	PTR	9b, handler;				\
+	.previous
+
+/*
+ * Returns: -EFAULT if exception before terminator, N if the entire
+ * buffer filled, else strlen.
+ */
+
+/*
+ * Ugly special case have to check: we might get passed a user space
+ * pointer which wraps into the kernel space.  We don't deal with that.  If
+ * it happens at most some bytes of the exceptions handlers will be copied.
+ */
+
+LEAF(__strncpy_from_user_asm)
+	LONG_L		v0, THREAD_CURDS($28)		# pointer ok?
+	LONG_SUBU	v0, zero, v0
+	and		v0, a1
+	not		v0
+	beqz		v0, fault
+EXPORT(__strncpy_from_user_nocheck_asm)
+	move		v0,zero
+	move		v1,a1
+	.set		noreorder
+1:	EX(lbu,	 t0, (v1), fault)
+	LONG_ADDIU	v1,1
+	beqz		t0,2f
+	 sb		t0,(a0)
+	LONG_ADDIU	v0,1
+	bne		v0,a2,1b
+	 LONG_ADDIU	a0,1
+	.set		reorder
+2:	LONG_ADDU	t0,a1,v0
+	xor		t0,a1
+	bltz		t0,fault
+	jr		ra			# return n
+	END(__strncpy_from_user_asm)
+
+fault:	li		v0, -EFAULT
+	jr		ra
+
+	.section	__ex_table,"a"
+	PTR		1b, fault
+	.previous
diff --git a/arch/mips64/lib/watch.S b/arch/mips64/lib/watch.S
new file mode 100644
index 000000000..ee9559522
--- /dev/null
+++ b/arch/mips64/lib/watch.S
@@ -0,0 +1,61 @@
+/* $Id$
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Kernel debug stuff to use the Watch registers.
+ * Useful to find stack overflows, dangling pointers etc.
+ *
+ * Copyright (C) 1995, 1996, 1999 by Ralf Baechle
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/regdef.h>
+
+		.set	noreorder
+/*
+ * Parameter: a0 - logic address to watch
+ *                 Currently only KSEG0 addresses are allowed!
+ *            a1 - set bit #1 to trap on load references
+ *                     bit #0 to trap on store references
+ * Results  : none
+ */
+		LEAF(__watch_set)
+		li	t0,0x80000000
+		subu	a0,t0
+		ori	a0,7
+		xori	a0,7
+		or	a0,a1
+		mtc0	a0,CP0_WATCHLO
+		sw	a0,watch_savelo
+
+		jr	ra
+		 mtc0	zero,CP0_WATCHHI
+		END(__watch_set)
+
+/*
+ * Parameter: none
+ * Results  : none
+ */
+		LEAF(__watch_clear)
+		jr	ra
+		 mtc0	zero,CP0_WATCHLO
+		END(__watch_clear)
+
+/*
+ * Parameter: none
+ * Results  : none
+ */
+		LEAF(__watch_reenable)
+		lw	t0,watch_savelo
+		jr	ra
+		 mtc0	t0,CP0_WATCHLO
+		END(__watch_reenable)
+
+/*
+ * Saved value of the c0_watchlo register for watch_reenable()
+ */
+		.data
+watch_savelo:	.word	0
+		.text
diff --git a/arch/mips64/mm/andes.c b/arch/mips64/mm/andes.c
index 13be21622..e048a1203 100644
--- a/arch/mips64/mm/andes.c
+++ b/arch/mips64/mm/andes.c
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: andes.c,v 1.1 1999/08/18 23:37:47 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -94,13 +94,6 @@ andes_pgd_init(unsigned long page)
 {
 }
 
-static void
-andes_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
-                      unsigned long entryhi, unsigned long pagemask)
-{
-        /* XXX */
-}
-
 static int
 andes_user_mode(struct pt_regs *regs)
 {
@@ -120,10 +113,7 @@ void __init ld_mmu_andes(void)
 	flush_tlb_mm = andes_flush_tlb_mm;
 	flush_tlb_range = andes_flush_tlb_range;
 	flush_tlb_page = andes_flush_tlb_page;
-	andes_asid_setup();
     
-	add_wired_entry = andes_add_wired_entry;
-
 	user_mode = andes_user_mode;
 
 	load_pgd = andes_load_pgd;
diff --git a/arch/mips64/mm/init.c b/arch/mips64/mm/init.c
index 903c2541c..6a0e3c195 100644
--- a/arch/mips64/mm/init.c
+++ b/arch/mips64/mm/init.c
@@ -1,4 +1,4 @@
-/* $Id: init.c,v 1.2 1999/08/19 22:56:32 ralf Exp $
+/* $Id: init.c,v 1.3 1999/08/20 21:59:05 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -28,7 +28,6 @@
 #include <asm/bootinfo.h>
 #include <asm/cachectl.h>
 #include <asm/dma.h>
-#include <asm/jazzdma.h>
 #include <asm/system.h>
 #include <asm/pgtable.h>
 #ifdef CONFIG_SGI_IP22
@@ -41,13 +40,13 @@ extern void show_net_buffers(void);
 void __bad_pte_kernel(pmd_t *pmd)
 {
 	printk("Bad pmd in pte_alloc_kernel: %08lx\n", pmd_val(*pmd));
-	pmd_val(*pmd) = BAD_PAGETABLE;
+	pmd_set(pmd, BAD_PAGETABLE);
 }
 
 void __bad_pte(pmd_t *pmd)
 {
 	printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd));
-	pmd_val(*pmd) = BAD_PAGETABLE;
+	pmd_set(pmd, BAD_PAGETABLE);
 }
 
 pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long offset)
@@ -58,10 +57,10 @@ pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long offset)
 	if (pmd_none(*pmd)) {
 		if (page) {
 			clear_page((unsigned long)page);
-			pmd_val(*pmd) = (unsigned long)page;
+			pmd_set(pmd, page);
 			return page + offset;
 		}
-		pmd_val(*pmd) = BAD_PAGETABLE;
+		pmd_set(pmd, BAD_PAGETABLE);
 		return NULL;
 	}
 	free_page((unsigned long)page);
@@ -83,7 +82,7 @@ pte_t *get_pte_slow(pmd_t *pmd, unsigned long offset)
 			pmd_val(*pmd) = (unsigned long)page;
 			return page + offset;
 		}
-		pmd_val(*pmd) = BAD_PAGETABLE;
+		pmd_set(pmd, BAD_PAGETABLE);
 		return NULL;
 	}
 	free_page((unsigned long)page);
@@ -177,58 +176,26 @@ int do_check_pgt_cache(int low, int high)
 pte_t * __bad_pagetable(void)
 {
 	extern char empty_bad_page_table[PAGE_SIZE];
-	unsigned long page;
-	unsigned long dummy1, dummy2;
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4)
-	unsigned long dummy3;
-#endif
+	unsigned long dummy1, dummy2, page;
 
 	page = (unsigned long) empty_bad_page_table;
-	/*
-	 * As long as we only save the low 32 bit of the 64 bit wide
-	 * R4000 registers on interrupt we cannot use 64 bit memory accesses
-	 * to the main memory.
-	 */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4)
-        /*
-         * Use 64bit code even for Linux/MIPS 32bit on R4000
-         */
 	__asm__ __volatile__(
-		".set\tnoreorder\n"
+		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"dsll32\t$1,%2,0\n\t"
-		"dsrl32\t%2,$1,0\n\t"
-		"or\t%2,$1\n"
-		"1:\tsd\t%2,(%0)\n\t"
-		"subu\t%1,1\n\t"
-		"bnez\t%1,1b\n\t"
-		"addiu\t%0,8\n\t"
-		".set\tmips0\n\t"
-		".set\tat\n"
+		"dsll\t$1, %1, 32\n\t"
+		"dsrl\t%1, $1, 32\n\t"
+		"or\t%1, $1\n\t"
+		"daddiu\t$1, %0, %4\n"
+		"1:\tdaddiu\t%0, 8\n\t"
+		"bne\t$1, %0, 1b\n\t"
+		" sd\t%1, -8(%0)\n\t"
+		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1),
-		 "=r" (dummy2),
-		 "=r" (dummy3)
-		:"0" (page),
-		 "1" (PAGE_SIZE/8),
-		 "2" (pte_val(BAD_PAGE)));
-#else /* (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) */
-	__asm__ __volatile__(
-		".set\tnoreorder\n"
-		"1:\tsw\t%2,(%0)\n\t"
-		"subu\t%1,1\n\t"
-		"bnez\t%1,1b\n\t"
-		"addiu\t%0,4\n\t"
-		".set\treorder"
-		:"=r" (dummy1),
-		 "=r" (dummy2)
-		:"r" (pte_val(BAD_PAGE)),
-		 "0" (page),
-		 "1" (PAGE_SIZE/4));
-#endif
+		:"=r" (dummy1), "=r" (dummy2)
+		:"0" (page), "1" (pte_val(BAD_PAGE)), "i" (PAGE_SIZE)
+		:"$1");
 
-	return (pte_t *)page;
+	return (pte_t *) page;
 }
 
 pte_t __bad_page(void)
@@ -346,6 +313,7 @@ mem_init(unsigned long start_mem, unsigned long end_mem)
 }
 
 extern char __init_begin, __init_end;
+extern void prom_free_prom_memory(void);
 
 void
 free_initmem(void)
@@ -360,14 +328,14 @@ free_initmem(void)
 		set_page_count(mem_map + MAP_NR(addr), 1);
 		free_page(addr);
 	}
-	printk("Freeing unused kernel memory: %dk freed\n",
+	printk("Freeing unused kernel memory: %ldk freed\n",
 	       (&__init_end - &__init_begin) >> 10);
 }
 
 void
 si_meminfo(struct sysinfo *val)
 {
-	int i;
+	long i;
 
 	i = MAP_NR(high_memory);
 	val->totalram = 0;
diff --git a/arch/mips64/mm/loadmmu.c b/arch/mips64/mm/loadmmu.c
index a96ab901c..0c9be7291 100644
--- a/arch/mips64/mm/loadmmu.c
+++ b/arch/mips64/mm/loadmmu.c
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: loadmmu.c,v 1.1 1999/08/18 23:37:48 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -52,9 +52,6 @@ void (*update_mmu_cache)(struct vm_area_struct * vma,
 
 void (*show_regs)(struct pt_regs *);
 
-void (*add_wired_entry)(unsigned long entrylo0, unsigned long entrylo1,
-			unsigned long entryhi, unsigned long pagemask);
-
 int (*user_mode)(struct pt_regs *);
 
 asmlinkage void *(*resume)(void *last, void *next);
diff --git a/arch/mips64/mm/r4xx0.c b/arch/mips64/mm/r4xx0.c
index f6b31f4ba..a3a55fc33 100644
--- a/arch/mips64/mm/r4xx0.c
+++ b/arch/mips64/mm/r4xx0.c
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: r4xx0.c,v 1.1 1999/08/18 23:37:48 ralf Exp $
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -17,8 +17,8 @@
 
 #include <asm/bcache.h>
 #include <asm/io.h>
-#include <asm/sgi.h>
-#include <asm/sgimc.h>
+//#include <asm/sgi.h>
+//#include <asm/sgimc.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -81,7 +81,6 @@ static void r4k_clear_page_d16(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -97,14 +96,11 @@ static void r4k_clear_page_d16(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_D)
-		:"$1","memory");
+		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		:"$1", "memory");
 }
 
 static void r4k_clear_page_d32(unsigned long page)
@@ -112,7 +108,6 @@ static void r4k_clear_page_d32(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -126,14 +121,11 @@ static void r4k_clear_page_d32(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_D)
-		:"$1","memory");
+		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		:"$1", "memory");
 }
 
 
@@ -169,7 +161,6 @@ static void r4k_clear_page_r4600_v1(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tnop\n\t"
 		"nop\n\t"
@@ -190,14 +181,13 @@ static void r4k_clear_page_r4600_v1(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
 		:"0" (page),
 		 "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D)
-		:"$1","memory");
+		:"$1", "memory");
 }
 
 /*
@@ -207,12 +197,11 @@ static void r4k_clear_page_r4600_v2(unsigned long page)
 {
 	unsigned int flags;
 
-	save_and_cli(flags);
+	__save_and_cli(flags);
 	*(volatile unsigned int *)KSEG1;
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -226,15 +215,12 @@ static void r4k_clear_page_r4600_v2(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_D)
-		:"$1","memory");
-	restore_flags(flags);
+		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		:"$1", "memory");
+	__restore_flags(flags);
 }
 
 /*
@@ -251,7 +237,6 @@ static void r4k_clear_page_s16(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -267,13 +252,10 @@ static void r4k_clear_page_s16(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_SD)
+		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
 		:"$1","memory");
 }
 
@@ -282,7 +264,6 @@ static void r4k_clear_page_s32(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -296,13 +277,10 @@ static void r4k_clear_page_s32(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_SD)
+		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
 		:"$1","memory");
 }
 
@@ -311,7 +289,6 @@ static void r4k_clear_page_s64(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -324,7 +301,6 @@ static void r4k_clear_page_s64(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
@@ -339,7 +315,6 @@ static void r4k_clear_page_s128(unsigned long page)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%2\n"
 		"1:\tcache\t%3,(%0)\n\t"
 		"sd\t$0,(%0)\n\t"
@@ -360,14 +335,13 @@ static void r4k_clear_page_s128(unsigned long page)
 		"sd\t$0,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
 		"sd\t$0,-8(%0)\n\t"
-		".set\tmips0\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (page)
 		:"0" (page),
 		 "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_SD)
-		:"$1","memory");
+		:"$1", "memory");
 }
 
 
@@ -378,117 +352,75 @@ static void r4k_clear_page_s128(unsigned long page)
 
 static void r4k_copy_page_d16(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
-		"1:\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"cache\t%9,16(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
-		"cache\t%9,32(%0)\n\t"
+		"daddiu\t$1,%0,%6\n"
+		"1:\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"cache\t%7,16(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
+		"cache\t%7,32(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"cache\t%9,-16(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"cache\t%7,-16(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%4,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D));
 }
 
 static void r4k_copy_page_d32(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
-		"1:\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
-		"cache\t%9,32(%0)\n\t"
+		"daddiu\t$1,%0,%6\n"
+		"1:\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
+		"cache\t%7,32(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%3,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D));
 }
 
@@ -497,135 +429,93 @@ static void r4k_copy_page_d32(unsigned long to, unsigned long from)
  */
 static void r4k_copy_page_r4600_v1(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
+		"daddiu\t$1,%0,%6\n"
 		"1:\tnop\n\t"
 		"nop\n\t"
 		"nop\n\t"
 		"nop\n\t"
-		"\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
+		"\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
 		"nop\n\t"
 		"nop\n\t"
 		"nop\n\t"
 		"nop\n\t"
-		"cache\t%9,32(%0)\n\t"
+		"cache\t%7,32(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%3,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D));
 }
 
 static void r4k_copy_page_r4600_v2(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 	unsigned int flags;
 
 	__save_and_cli(flags);
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
+		"daddiu\t$1,%0,%6\n"
 		"1:\tnop\n\t"
 		"nop\n\t"
 		"nop\n\t"
 		"nop\n\t"
-		"\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
+		"\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
 		"nop\n\t"
 		"nop\n\t"
 		"nop\n\t"
 		"nop\n\t"
-		"cache\t%9,32(%0)\n\t"
+		"cache\t%7,32(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%3,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_D));
-	restore_flags(flags);
+	__restore_flags(flags);
 }
 
 /*
@@ -633,173 +523,110 @@ static void r4k_copy_page_r4600_v2(unsigned long to, unsigned long from)
  */
 static void r4k_copy_page_s16(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
-		"1:\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"cache\t%9,16(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
-		"cache\t%9,32(%0)\n\t"
+		"daddiu\t$1,%0,%6\n"
+		"1:\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"cache\t%7,16(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
+		"cache\t%7,32(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"cache\t%9,-16(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"cache\t%7,-16(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%3,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_SD));
 }
 
 static void r4k_copy_page_s32(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
-		"1:\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
-		"cache\t%9,32(%0)\n\t"
+		"daddiu\t$1,%0,%6\n"
+		"1:\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
+		"cache\t%7,32(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%3,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_SD));
 }
 
 static void r4k_copy_page_s64(unsigned long to, unsigned long from)
 {
-	unsigned long dummy1, dummy2;
-	unsigned long reg1, reg2, reg3, reg4;
+	unsigned long dummy1, dummy2, reg1, reg2;
 
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
-		"daddiu\t$1,%0,%8\n"
-		"1:\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
+		"daddiu\t$1,%0,%6\n"
+		"1:\tcache\t%7,(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"ld\t%2,16(%1)\n\t"
+		"ld\t%3,24(%1)\n\t"
+		"sd\t%2,16(%0)\n\t"
+		"sd\t%3,24(%0)\n\t"
 		"daddiu\t%0,64\n\t"
 		"daddiu\t%1,64\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"ld\t%2,-16(%1)\n\t"
+		"ld\t%3,-8(%1)\n\t"
+		"sd\t%2,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%3,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (dummy1), "=r" (dummy2),
-		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
-		:"0" (to), "1" (from),
-		 "I" (PAGE_SIZE),
+		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
+		:"0" (to), "1" (from), "I" (PAGE_SIZE),
 		 "i" (Create_Dirty_Excl_SD));
 }
 
@@ -811,77 +638,43 @@ static void r4k_copy_page_s128(unsigned long to, unsigned long from)
 	__asm__ __volatile__(
 		".set\tnoreorder\n\t"
 		".set\tnoat\n\t"
-		".set\tmips3\n\t"
 		"daddiu\t$1,%0,%8\n"
 		"1:\tcache\t%9,(%0)\n\t"
-		"lw\t%2,(%1)\n\t"
-		"lw\t%3,4(%1)\n\t"
-		"lw\t%4,8(%1)\n\t"
-		"lw\t%5,12(%1)\n\t"
-		"sw\t%2,(%0)\n\t"
-		"sw\t%3,4(%0)\n\t"
-		"sw\t%4,8(%0)\n\t"
-		"sw\t%5,12(%0)\n\t"
-		"lw\t%2,16(%1)\n\t"
-		"lw\t%3,20(%1)\n\t"
-		"lw\t%4,24(%1)\n\t"
-		"lw\t%5,28(%1)\n\t"
-		"sw\t%2,16(%0)\n\t"
-		"sw\t%3,20(%0)\n\t"
-		"sw\t%4,24(%0)\n\t"
-		"sw\t%5,28(%0)\n\t"
-		"lw\t%2,32(%1)\n\t"
-		"lw\t%3,36(%1)\n\t"
-		"lw\t%4,40(%1)\n\t"
-		"lw\t%5,44(%1)\n\t"
-		"sw\t%2,32(%0)\n\t"
-		"sw\t%3,36(%0)\n\t"
-		"sw\t%4,40(%0)\n\t"
-		"sw\t%5,44(%0)\n\t"
-		"lw\t%2,48(%1)\n\t"
-		"lw\t%3,52(%1)\n\t"
-		"lw\t%4,56(%1)\n\t"
-		"lw\t%5,60(%1)\n\t"
-		"sw\t%2,48(%0)\n\t"
-		"sw\t%3,52(%0)\n\t"
-		"sw\t%4,56(%0)\n\t"
-		"sw\t%5,60(%0)\n\t"
+		"ld\t%2,(%1)\n\t"
+		"ld\t%3,8(%1)\n\t"
+		"ld\t%4,16(%1)\n\t"
+		"ld\t%5,24(%1)\n\t"
+		"sd\t%2,(%0)\n\t"
+		"sd\t%3,8(%0)\n\t"
+		"sd\t%4,16(%0)\n\t"
+		"sd\t%5,24(%0)\n\t"
+		"ld\t%2,32(%1)\n\t"
+		"ld\t%3,40(%1)\n\t"
+		"ld\t%4,48(%1)\n\t"
+		"ld\t%5,56(%1)\n\t"
+		"sd\t%2,32(%0)\n\t"
+		"sd\t%3,40(%0)\n\t"
+		"sd\t%4,48(%0)\n\t"
+		"sd\t%5,56(%0)\n\t"
 		"daddiu\t%0,128\n\t"
 		"daddiu\t%1,128\n\t"
-		"lw\t%2,-64(%1)\n\t"
-		"lw\t%3,-60(%1)\n\t"
-		"lw\t%4,-56(%1)\n\t"
-		"lw\t%5,-52(%1)\n\t"
-		"sw\t%2,-64(%0)\n\t"
-		"sw\t%3,-60(%0)\n\t"
-		"sw\t%4,-56(%0)\n\t"
-		"sw\t%5,-52(%0)\n\t"
-		"lw\t%2,-48(%1)\n\t"
-		"lw\t%3,-44(%1)\n\t"
-		"lw\t%4,-40(%1)\n\t"
-		"lw\t%5,-36(%1)\n\t"
-		"sw\t%2,-48(%0)\n\t"
-		"sw\t%3,-44(%0)\n\t"
-		"sw\t%4,-40(%0)\n\t"
-		"sw\t%5,-36(%0)\n\t"
-		"lw\t%2,-32(%1)\n\t"
-		"lw\t%3,-28(%1)\n\t"
-		"lw\t%4,-24(%1)\n\t"
-		"lw\t%5,-20(%1)\n\t"
-		"sw\t%2,-32(%0)\n\t"
-		"sw\t%3,-28(%0)\n\t"
-		"sw\t%4,-24(%0)\n\t"
-		"sw\t%5,-20(%0)\n\t"
-		"lw\t%2,-16(%1)\n\t"
-		"lw\t%3,-12(%1)\n\t"
-		"lw\t%4,-8(%1)\n\t"
-		"lw\t%5,-4(%1)\n\t"
-		"sw\t%2,-16(%0)\n\t"
-		"sw\t%3,-12(%0)\n\t"
-		"sw\t%4,-8(%0)\n\t"
+		"ld\t%2,-64(%1)\n\t"
+		"ld\t%3,-56(%1)\n\t"
+		"ld\t%4,-48(%1)\n\t"
+		"ld\t%5,-40(%1)\n\t"
+		"sd\t%2,-64(%0)\n\t"
+		"sd\t%3,-56(%0)\n\t"
+		"sd\t%4,-48(%0)\n\t"
+		"sd\t%5,-40(%0)\n\t"
+		"ld\t%2,-32(%1)\n\t"
+		"ld\t%3,-24(%1)\n\t"
+		"ld\t%4,-16(%1)\n\t"
+		"ld\t%5,-8(%1)\n\t"
+		"sd\t%2,-32(%0)\n\t"
+		"sd\t%3,-24(%0)\n\t"
+		"sd\t%4,-16(%0)\n\t"
 		"bne\t$1,%0,1b\n\t"
-		"sw\t%5,-4(%0)\n\t"
-		".set\tmips0\n\t"
+		" sd\t%5,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
 		:"=r" (dummy1), "=r" (dummy2),
@@ -987,8 +780,7 @@ static inline void r4k_flush_cache_all_d32i32(void)
 }
 
 static void
-r4k_flush_cache_range_s16d16i16(struct mm_struct *mm,
-                                unsigned long start,
+r4k_flush_cache_range_s16d16i16(struct mm_struct *mm, unsigned long start,
                                 unsigned long end)
 {
 	struct vm_area_struct *vma;
@@ -1028,8 +820,7 @@ r4k_flush_cache_range_s16d16i16(struct mm_struct *mm,
 }
 
 static void
-r4k_flush_cache_range_s32d16i16(struct mm_struct *mm,
-                                unsigned long start,
+r4k_flush_cache_range_s32d16i16(struct mm_struct *mm, unsigned long start,
                                 unsigned long end)
 {
 	struct vm_area_struct *vma;
@@ -1068,9 +859,9 @@ r4k_flush_cache_range_s32d16i16(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_s64d16i16(struct mm_struct *mm,
-					    unsigned long start,
-					    unsigned long end)
+static void
+r4k_flush_cache_range_s64d16i16(struct mm_struct *mm, unsigned long start,
+                                unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1108,9 +899,9 @@ static void r4k_flush_cache_range_s64d16i16(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_s128d16i16(struct mm_struct *mm,
-					     unsigned long start,
-					     unsigned long end)
+static void
+r4k_flush_cache_range_s128d16i16(struct mm_struct *mm, unsigned long start,
+                                 unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1148,9 +939,9 @@ static void r4k_flush_cache_range_s128d16i16(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_s32d32i32(struct mm_struct *mm,
-					    unsigned long start,
-					    unsigned long end)
+static void
+r4k_flush_cache_range_s32d32i32(struct mm_struct *mm, unsigned long start,
+                                unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1188,9 +979,9 @@ static void r4k_flush_cache_range_s32d32i32(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_s64d32i32(struct mm_struct *mm,
-					    unsigned long start,
-					    unsigned long end)
+static void
+r4k_flush_cache_range_s64d32i32(struct mm_struct *mm, unsigned long start,
+                                unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1228,9 +1019,9 @@ static void r4k_flush_cache_range_s64d32i32(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_s128d32i32(struct mm_struct *mm,
-					     unsigned long start,
-					     unsigned long end)
+static void
+r4k_flush_cache_range_s128d32i32(struct mm_struct *mm, unsigned long start,
+                                 unsigned long end)
 {
 	struct vm_area_struct *vma;
 	unsigned long flags;
@@ -1268,9 +1059,9 @@ static void r4k_flush_cache_range_s128d32i32(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_d16i16(struct mm_struct *mm,
-					 unsigned long start,
-					 unsigned long end)
+static void
+r4k_flush_cache_range_d16i16(struct mm_struct *mm, unsigned long start,
+                             unsigned long end)
 {
 	if(mm->context != 0) {
 		unsigned long flags;
@@ -1284,9 +1075,9 @@ static void r4k_flush_cache_range_d16i16(struct mm_struct *mm,
 	}
 }
 
-static void r4k_flush_cache_range_d32i32(struct mm_struct *mm,
-					 unsigned long start,
-					 unsigned long end)
+static void
+r4k_flush_cache_range_d32i32(struct mm_struct *mm, unsigned long start,
+                             unsigned long end)
 {
 	if(mm->context != 0) {
 		unsigned long flags;
@@ -1395,8 +1186,8 @@ static void r4k_flush_cache_mm_d32i32(struct mm_struct *mm)
 	}
 }
 
-static void r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma,
-					   unsigned long page)
+static void
+r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1449,8 +1240,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma,
-					   unsigned long page)
+static void
+r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1502,8 +1293,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma,
-					   unsigned long page)
+static void
+r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1556,8 +1347,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma,
-					    unsigned long page)
+static void
+r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1611,8 +1402,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma,
-					   unsigned long page)
+static void
+r4k_flush_cache_page_s32d32i32(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1667,8 +1458,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma,
-					   unsigned long page)
+static void
+r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1723,8 +1514,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma,
-					    unsigned long page)
+static void
+r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1777,8 +1568,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
-					unsigned long page)
+static void
+r4k_flush_cache_page_d16i16(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1833,8 +1624,8 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_d32i32(struct vm_area_struct *vma,
-					unsigned long page)
+static void
+r4k_flush_cache_page_d32i32(struct vm_area_struct *vma, unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -1891,8 +1682,9 @@ out:
 	restore_flags(flags);
 }
 
-static void r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
-					      unsigned long page)
+static void
+r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
+                                  unsigned long page)
 {
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long flags;
@@ -2478,37 +2270,6 @@ static void r4k_show_regs(struct pt_regs * regs)
 	printk("epc   : %08lx\nStatus: %08lx\nCause : %08lx\n",
 	       regs->cp0_epc, regs->cp0_status, regs->cp0_cause);
 }
-			
-static void r4k_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
-				      unsigned long entryhi, unsigned long pagemask)
-{
-        unsigned long flags;
-        unsigned long wired;
-        unsigned long old_pagemask;
-        unsigned long old_ctx;
-
-        save_and_cli(flags);
-        /* Save old context and create impossible VPN2 value */
-        old_ctx = (get_entryhi() & 0xff);
-        old_pagemask = get_pagemask();
-        wired = get_wired();
-        set_wired (wired + 1);
-        set_index (wired);
-        BARRIER;    
-        set_pagemask (pagemask);
-        set_entryhi(entryhi);
-        set_entrylo0(entrylo0);
-        set_entrylo1(entrylo1);
-        BARRIER;    
-        tlb_write_indexed();
-        BARRIER;    
-    
-        set_entryhi(old_ctx);
-        BARRIER;    
-        set_pagemask (old_pagemask);
-        flush_tlb_all();    
-        restore_flags(flags);
-}
 
 /* Detect and size the various r4k caches. */
 static void __init probe_icache(unsigned long config)
@@ -2582,19 +2343,13 @@ static int __init probe_scache(unsigned long config)
 	set_taghi(0);
 	__asm__ __volatile__("nop; nop; nop; nop;"); /* avoid the hazard */
 	__asm__ __volatile__("\n\t.set noreorder\n\t"
-			     ".set mips3\n\t"
 			     "cache 8, (%0)\n\t"
-			     ".set mips0\n\t"
 			     ".set reorder\n\t" : : "r" (begin));
 	__asm__ __volatile__("\n\t.set noreorder\n\t"
-			     ".set mips3\n\t"
 			     "cache 9, (%0)\n\t"
-			     ".set mips0\n\t"
 			     ".set reorder\n\t" : : "r" (begin));
 	__asm__ __volatile__("\n\t.set noreorder\n\t"
-			     ".set mips3\n\t"
 			     "cache 11, (%0)\n\t"
-			     ".set mips0\n\t"
 			     ".set reorder\n\t" : : "r" (begin));
 
 	/* Now search for the wrap around point. */
@@ -2602,9 +2357,7 @@ static int __init probe_scache(unsigned long config)
 	tmp = 0;
 	for(addr = (begin + (128 * 1024)); addr < (end); addr = (begin + pow2)) {
 		__asm__ __volatile__("\n\t.set noreorder\n\t"
-				     ".set mips3\n\t"
 				     "cache 7, (%0)\n\t"
-				     ".set mips0\n\t"
 				     ".set reorder\n\t" : : "r" (addr));
 		__asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */
 		if(!get_taglo())
@@ -2794,7 +2547,6 @@ void __init ld_mmu_r4xx0(void)
 	flush_tlb_mm = r4k_flush_tlb_mm;
 	flush_tlb_range = r4k_flush_tlb_range;
 	flush_tlb_page = r4k_flush_tlb_page;
-	r4xx0_asid_setup();
 
 	load_pgd = r4k_load_pgd;
 	pgd_init = r4k_pgd_init;
@@ -2802,8 +2554,6 @@ void __init ld_mmu_r4xx0(void)
 
 	show_regs = r4k_show_regs;
     
-        add_wired_entry = r4k_add_wired_entry;
-
 	user_mode = r4k_user_mode;
 
 	flush_cache_all();
diff --git a/arch/mips64/mm/tfp.c b/arch/mips64/mm/tfp.c
index 30e87bde1..e4083d65f 100644
--- a/arch/mips64/mm/tfp.c
+++ b/arch/mips64/mm/tfp.c
@@ -1,4 +1,4 @@
-/* $Id$
+/* $Id: tfp.c,v 1.1 1999/08/18 23:37:48 ralf Exp $
  *
  * tfp.c: MMU and cache routines specific to the r8000 (TFP).
  *
@@ -82,12 +82,6 @@ static void tfp_pgd_init(unsigned long page)
 {
 }
 
-static void tfp_add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
-				unsigned long entryhi, unsigned long pagemask)
-{
-        /* XXX */
-}
-
 static int tfp_user_mode(struct pt_regs *regs)
 {
 	return (regs->cp0_status & ST0_KSU) == KSU_USER;
@@ -106,9 +100,6 @@ __initfunc(void ld_mmu_tfp(void))
 	flush_tlb_mm = tfp_flush_tlb_mm;
 	flush_tlb_range = tfp_flush_tlb_range;
 	flush_tlb_page = tfp_flush_tlb_page;
-	tfp_asid_setup();
-
-        add_wired_entry = tfp_add_wired_entry;
 
 	user_mode = tfp_user_mode;
 
diff --git a/arch/mips64/sgi-ip22/ip22-setup.c b/arch/mips64/sgi-ip22/ip22-setup.c
index d6051f166..6657d0592 100644
--- a/arch/mips64/sgi-ip22/ip22-setup.c
+++ b/arch/mips64/sgi-ip22/ip22-setup.c
@@ -20,6 +20,7 @@
 #include <linux/sched.h>
 #include <linux/mc146818rtc.h>
 #include <linux/pc_keyb.h>
+#include <linux/tty.h>
 
 #include <asm/addrspace.h>
 #include <asm/bcache.h>
@@ -116,7 +117,7 @@ static void __init sgi_irq_setup(void)
 	sgint_init();
 }
 
-void __init sgi_setup(void)
+void __init ip22_setup(void)
 {
 #ifdef CONFIG_SERIAL_CONSOLE
 	char *ctype;
@@ -152,12 +153,24 @@ void __init sgi_setup(void)
 #ifdef CONFIG_SGI_PROM_CONSOLE
 	console_setup("ttyS0");
 #endif
-	  
+
 	sgi_volume_set(simple_strtoul(prom_getenv("volume"), NULL, 10));
 
 #ifdef CONFIG_VT
 #ifdef CONFIG_SGI_NEWPORT_CONSOLE
 	conswitchp = &newport_con;
+
+	screen_info = (struct screen_info) {
+		0, 0,		/* orig-x, orig-y */
+		0,		/* unused */
+		0,		/* orig_video_page */
+		0,		/* orig_video_mode */
+		160,		/* orig_video_cols */
+		0, 0, 0,	/* unused, ega_bx, unused */
+		64,		/* orig_video_lines */
+		0,		/* orig_video_isVGA */
+		16		/* orig_video_points */
+	};
 #else
 	conswitchp = &dummy_con;
 #endif