Minor compile fixes. Partly R300 related.

4 files changed, 19 insertions, 14 deletions

diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index fe769515f..06a121f58 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -6,6 +6,7 @@
 #include <linux/init.h>
 #include <linux/config.h>
 #include <asm/bootinfo.h>
+#include <asm/cpu.h>
 #include "prom.h"
 
 /*
@@ -99,7 +100,7 @@ int __init prom_init(int argc, char **argv,
 	}
 #endif
 
-#if defined(CONFIG_CPU_R4x00)
+#if defined(CONFIG_CPU_R4X00)
 	if ((mips_cpu.cputype == CPU_R3000) ||
 	    (mips_cpu.cputype == CPU_R3000A)) {
 		prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
@@ -114,3 +115,4 @@ int __init prom_init(int argc, char **argv,
 
 	return 0;
 }
+
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index c94037a24..693c07ade 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -30,8 +30,8 @@
 	.align	5
 
 /*
- * task_struct *r4xx0_resume(task_struct *prev,
- *                           task_struct *next)
+ * task_struct *resume(task_struct *prev,
+ *                     task_struct *next)
  */
 LEAF(resume)
 	.set	reorder
@@ -94,14 +94,20 @@ LEAF(lazy_fpu_switch)
 /*
  * Save a thread's fp context.
  */
-	.set	noreorder
 LEAF(save_fp)
 	FPU_SAVE_SINGLE(a0, t1)			# clobbers t1
 	jr	ra
-	 swc1	$f0, (THREAD_FPU + 0x00)(a0)
 	END(save_fp)
 
 /*
+ * Restore a thread's fp context.
+ */
+LEAF(restore_fp)
+	FPU_RESTORE_SINGLE(a0, t1)		# clobbers t1
+	jr	ra
+	END(restore_fp)
+
+/*
  * Load the FPU with signalling NANS.  This bit pattern we're using has
  * the property that no matter wether considered as single or as double
  * precission represents signaling NANS.
@@ -111,6 +117,8 @@ LEAF(save_fp)
 
 #define FPU_DEFAULT  0x00000000
 
+	.set	noreorder
+
 LEAF(init_fpu)
 	mfc0	t0, CP0_STATUS
 	li	t1, 0x20000000
@@ -156,3 +164,4 @@ LEAF(init_fpu)
 	jr	ra
 	 mtc1	t0, $f31
 	END(init_fpu)
+
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index b43248c72..15be0d1dc 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -172,7 +172,7 @@ static inline void cpu_probe(void)
 		mips_cpu.cputype = CPU_R2000;
 		mips_cpu.isa_level = MIPS_CPU_ISA_I;
 		mips_cpu.options = MIPS_CPU_TLB;
-		mips_cpu.tlbsize = 32;
+		mips_cpu.tlbsize = 64;
 		break;
 	case PRID_IMP_R3000:
 		if ((mips_cpu.processor_id & 0xff) == PRID_REV_R3000A)
@@ -184,7 +184,7 @@ static inline void cpu_probe(void)
 			 mips_cpu.cputype = CPU_R3000;
 		mips_cpu.isa_level = MIPS_CPU_ISA_I;
 		mips_cpu.options = MIPS_CPU_TLB;
-		mips_cpu.tlbsize = 32;
+		mips_cpu.tlbsize = 64;
 		break;
 	case PRID_IMP_R4000:
 		if ((mips_cpu.processor_id & 0xff) == PRID_REV_R4400)
@@ -477,3 +477,4 @@ void r4k_wait(void)
 		"wait\n\t"
 		".set\tmips0");
 }
+
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 779b72805..27451eb37 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -756,7 +756,6 @@ void __init trap_init(void)
 	extern char except_vec0_r4600, except_vec0_r2300;
 	extern char except_vec1_generic, except_vec2_generic;
 	extern char except_vec3_generic, except_vec3_r4000;
-	extern char except_vec_ejtag_debug;
 	unsigned long i;
 
 	if(mips_machtype == MACH_MIPS_MAGNUM_4000 ||
@@ -777,12 +776,6 @@ void __init trap_init(void)
 	for(i = 0; i <= 31; i++)
 		(void)set_except_vector(i, handle_reserved);
 
-	/* 
-	 * Copy the EJTAG debug exception vector handler code to it's final 
-	 * destination.
-	 */
-	memcpy((void *)(KSEG0 + 0x300), &except_vec_ejtag_debug, 0x80);
-
 	/*
 	 * Only some CPUs have the watch exceptions or a dedicated
 	 * interrupt vector.