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authorRalf Baechle <ralf@linux-mips.org>2000-03-02 02:36:47 +0000
committerRalf Baechle <ralf@linux-mips.org>2000-03-02 02:36:47 +0000
commit8624512aa908741ba2795200133eae0d7f4557ea (patch)
treed5d3036fccf2604f4c98dedc11e8adb929d6b52e /arch/ppc/kernel/head.S
parent7b8f5d6f1d45d9f9de1d26e7d3c32aa5af11b488 (diff)
Merge with 2.3.48.
Diffstat (limited to 'arch/ppc/kernel/head.S')
-rw-r--r--arch/ppc/kernel/head.S7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index dd16b8c27..b6d44ecb3 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -1328,18 +1328,15 @@ load_up_mmu:
/* Load the SDR1 register (hash table base & size) */
lis r6,_SDR1@ha
tophys(r6,r6)
-#ifdef CONFIG_PPC64
- ld r6,_SDR1@l(r6)
+ lwz r6,_SDR1@l(r6)
mtspr SDR1,r6
+#ifdef CONFIG_PPC64
/* clear the v bit in the ASR so we can
* behave as if we have segment registers
* -- Cort
*/
clrldi r6,r6,63
mtasr r6
-#else
- lwz r6,_SDR1@l(r6)
- mtspr SDR1,r6
#endif /* CONFIG_PPC64 */
li r0,16 /* load up segment register values */
mtctr r0 /* for context 0 */