diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2000-06-19 22:45:37 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2000-06-19 22:45:37 +0000 |
| commit | 6d403070f28cd44860fdb3a53be5da0275c65cf4 (patch) | |
| tree | 0d0e7fe7b5fb7568d19e11d7d862b77a866ce081 /arch/ppc/kernel/ppc_asm.h | |
| parent | ecf1bf5f6c2e668d03b0a9fb026db7aa41e292e1 (diff) | |
Merge with 2.4.0-test1-ac21 + pile of MIPS cleanups to make merging
possible. Chainsawed RM200 kernel to compile again. Jazz machine
status unknown.
Diffstat (limited to 'arch/ppc/kernel/ppc_asm.h')
| -rw-r--r-- | arch/ppc/kernel/ppc_asm.h | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/ppc/kernel/ppc_asm.h b/arch/ppc/kernel/ppc_asm.h index d9093c9e1..42b8c9c39 100644 --- a/arch/ppc/kernel/ppc_asm.h +++ b/arch/ppc/kernel/ppc_asm.h @@ -73,11 +73,13 @@ /* * This instruction is not implemented on the PPC 603 or 601; however, on * the 403GCX and 405GP tlbia IS defined and tlbie is not. + * All of these instructions exist in the 8xx, they have magical powers, + * and they must be used. */ -#if !defined(CONFIG_4xx) +#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx) #define tlbia \ - li r4,128; \ + li r4,1024; \ mtctr r4; \ lis r4,KERNELBASE@h; \ 0: tlbie r4; \ @@ -102,3 +104,25 @@ .align 1; \ .long 0b; \ .previous + +/* + * On 64-bit cpus, we use the rfid instruction instead of rfi, but + * we then have to make sure we preserve the top 32 bits except for + * the 64-bit mode bit, which we clear. + */ +#ifdef CONFIG_PPC64BRIDGE +#define FIX_SRR1(ra, rb) \ + mr rb,ra; \ + mfmsr ra; \ + clrldi ra,ra,1; /* turn off 64-bit mode */ \ + rldimi ra,rb,0,32 +#define RFI .long 0x4c000024 /* rfid instruction */ +#define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */ +#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */ + +#else +#define FIX_SRR1(ra, rb) +#define RFI rfi +#define MTMSRD(r) mtmsr r +#define CLR_TOP32(r) +#endif /* CONFIG_PPC64BRIDGE */ |