Merge with Linux 2.4.3.

Note that mingetty does no longer work with serial console, you have to
switch to another getty like getty_ps.  This commit also includes a
fix for a setitimer bug which did prevent getty_ps from working on
older kernels.

4 files changed, 153 insertions, 27 deletions

diff --git a/arch/sparc64/lib/U3copy_in_user.S b/arch/sparc64/lib/U3copy_in_user.S
index 0fc169b9d..e28d34ac0 100644
--- a/arch/sparc64/lib/U3copy_in_user.S
+++ b/arch/sparc64/lib/U3copy_in_user.S
@@ -1,4 +1,4 @@
-/* $Id: U3copy_in_user.S,v 1.3 2000/11/01 09:29:19 davem Exp $
+/* $Id: U3copy_in_user.S,v 1.4 2001/03/21 05:58:47 davem Exp $
  * U3memcpy.S: UltraSparc-III optimized copy within userspace.
  *
  * Copyright (C) 1999, 2000 David S. Miller (davem@redhat.com)
@@ -231,25 +231,25 @@ U3copy_in_user_enter:
 
 	.align		64
 U3copy_in_user_begin:
-	prefetch	[%o1 + 0x000], #one_read	! MS	Group1
-	prefetch	[%o1 + 0x040], #one_read	! MS	Group2
+	prefetcha	[%o1 + 0x000] %asi, #one_read	! MS	Group1
+	prefetcha	[%o1 + 0x040] %asi, #one_read	! MS	Group2
 	andn		%o2, (0x40 - 1), %o4		! A0
-	prefetch	[%o1 + 0x080], #one_read	! MS	Group3
+	prefetcha	[%o1 + 0x080] %asi, #one_read	! MS	Group3
 	cmp		%o4, 0x140			! A0
-	prefetch	[%o1 + 0x0c0], #one_read	! MS	Group4
+	prefetcha	[%o1 + 0x0c0] %asi, #one_read	! MS	Group4
 	EX(ldda [%o1 + 0x000] %asi, %f0, add %o2, %g0)	! MS	Group5 (%f0 results at G8)
 	bge,a,pt	%icc, 1f			! BR
 
-	 prefetch	[%o1 + 0x100], #one_read	! MS	Group6
+	 prefetcha	[%o1 + 0x100] %asi, #one_read	! MS	Group6
 1:	EX(ldda [%o1 + 0x008] %asi, %f2, add %o2, %g0)	! AX	       (%f2 results at G9)
 	cmp		%o4, 0x180			! A1
 	bge,a,pt	%icc, 1f			! BR
-	 prefetch	[%o1 + 0x140], #one_read	! MS	Group7
+	 prefetcha	[%o1 + 0x140] %asi, #one_read	! MS	Group7
 1:	EX(ldda [%o1 + 0x010] %asi, %f4, add %o2, %g0)	! AX	       (%f4 results at G10)
 	cmp		%o4, 0x1c0			! A1
 	bge,a,pt	%icc, 1f			! BR
 
-	 prefetch	[%o1 + 0x180], #one_read	! MS	Group8
+	 prefetcha	[%o1 + 0x180] %asi, #one_read	! MS	Group8
 1:	faligndata	%f0, %f2, %f16			! FGA	Group9 (%f16 at G12)
 	EX(ldda [%o1 + 0x018] %asi, %f6, add %o2, %g0)	! AX	       (%f6 results at G12)
 	faligndata	%f2, %f4, %f18			! FGA	Group10 (%f18 results at G13)
@@ -305,7 +305,7 @@ U3copy_in_user_loop1:
 
 	faligndata	%f8, %f10, %f24			! FGA	Group16	(%f24 results at G19)
 	EXBLK1(ldda [%o1 + 0x040] %asi, %f0)		! AX		(%f0 results at G19)
-	prefetch	[%o1 + 0x180], #one_read	! MS
+	prefetcha	[%o1 + 0x180] %asi, #one_read	! MS
 	faligndata	%f10, %f12, %f26		! FGA	Group17	(%f26 results at G20)
 	subcc		%o4, 0x40, %o4			! A0
 	add		%o1, 0x40, %o1			! A1
diff --git a/arch/sparc64/lib/VISbzero.S b/arch/sparc64/lib/VISbzero.S
index 610740d37..c8713995c 100644
--- a/arch/sparc64/lib/VISbzero.S
+++ b/arch/sparc64/lib/VISbzero.S
@@ -1,4 +1,4 @@
-/* $Id: VISbzero.S,v 1.10 1999/05/25 16:52:56 jj Exp $
+/* $Id: VISbzero.S,v 1.11 2001/03/15 08:51:24 anton Exp $
  * VISbzero.S: High speed clear operations utilizing the UltraSparc
  *        Visual Instruction Set.
  *
@@ -83,6 +83,8 @@
 	.text
 	.align		32
 #ifdef __KERNEL__
+	.globl		__bzero_begin
+__bzero_begin:
 	.globl		__bzero, __bzero_noasi
 __bzero_noasi:
 	rd		%asi, %g5
@@ -272,3 +274,5 @@ VISbzerofixup_zb:
 	ba,pt		%xcc, VISbzerofixup_ret0
 	 sub		%o1, %g2, %o0
 #endif
+	.globl		__bzero_end
+__bzero_end:
diff --git a/arch/sparc64/lib/VISsave.S b/arch/sparc64/lib/VISsave.S
index 2254ba5c5..d1b257174 100644
--- a/arch/sparc64/lib/VISsave.S
+++ b/arch/sparc64/lib/VISsave.S
@@ -1,4 +1,4 @@
-/* $Id: VISsave.S,v 1.4 1999/07/30 09:35:37 davem Exp $
+/* $Id: VISsave.S,v 1.5 2001/03/08 22:08:51 davem Exp $
  * VISsave.S: Code for saving FPU register state for
  *            VIS routines. One should not call this directly,
  *            but use macros provided in <asm/visasm.h>.
@@ -37,14 +37,15 @@ vis1:	ldub		[%g6 + AOFF_task_thread + AOFF_thread_fpsaved], %g3
 	clr		%g1
 	ba,pt		%xcc, 3f
 
-	 stb		%g3, [%g6 + AOFF_task_thread + AOFF_thread_gsr]
+	 stx		%g3, [%g6 + AOFF_task_thread + AOFF_thread_gsr]
 2:	add		%g6, %g1, %g3
 	cmp		%o5, FPRS_DU
 	be,pn		%icc, 6f
 	 sll		%g1, 3, %g1
 	stb		%o5, [%g3 + AOFF_task_thread + AOFF_thread_fpsaved]
 	rd		%gsr, %g2
-	stb		%g2, [%g3 + AOFF_task_thread + AOFF_thread_gsr]
+	add		%g6, %g1, %g3
+	stx		%g2, [%g3 + AOFF_task_thread + AOFF_thread_gsr]
 
 	add		%g6, %g1, %g2
 	stx		%fsr, [%g2 + AOFF_task_thread + AOFF_thread_xfsr]
@@ -106,7 +107,8 @@ VISenterhalf:
 	stb		%g2, [%g3 + AOFF_task_thread + AOFF_thread_fpsaved]
 
 	rd		%gsr, %g2
-	stb		%g2, [%g3 + AOFF_task_thread + AOFF_thread_gsr]
+	add		%g6, %g1, %g3
+	stx		%g2, [%g3 + AOFF_task_thread + AOFF_thread_gsr]
 	add		%g6, %g1, %g2
 	stx		%fsr, [%g2 + AOFF_task_thread + AOFF_thread_xfsr]
 	sll		%g1, 5, %g1
diff --git a/arch/sparc64/lib/blockops.S b/arch/sparc64/lib/blockops.S
index 8d2b749e1..006ab5228 100644
--- a/arch/sparc64/lib/blockops.S
+++ b/arch/sparc64/lib/blockops.S
@@ -1,4 +1,4 @@
-/* $Id: blockops.S,v 1.27 2000/07/14 01:12:49 davem Exp $
+/* $Id: blockops.S,v 1.30 2001/03/22 13:10:10 davem Exp $
  * blockops.S: UltraSparc block zero optimized routines.
  *
  * Copyright (C) 1996, 1998, 1999, 2000 David S. Miller (davem@redhat.com)
@@ -83,6 +83,8 @@ copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
 	or		%g2, %g3, %g2
 	add		%o0, %o3, %o0
 	add		%o0, %o1, %o1
+#define FIX_INSN_1	0x96102068 /* mov (13 << 3), %o3 */
+cheetah_patch_1:
 	mov		TLBTEMP_ENT1, %o3
 	rdpr		%pstate, %g3
 	wrpr		%g3, PSTATE_IE, %pstate
@@ -96,16 +98,14 @@ copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
 	/* Spitfire Errata #32 workaround */
 	mov		0x8, %o4
 	stxa		%g0, [%o4] ASI_DMMU
-	sethi		%hi(empty_zero_page), %o4
-	flush		%o4
+	membar		#Sync
 
 	ldxa		[%o3] ASI_DTLB_TAG_READ, %o4
 
 	/* Spitfire Errata #32 workaround */
 	mov		0x8, %o5
 	stxa		%g0, [%o5] ASI_DMMU
-	sethi		%hi(empty_zero_page), %o5
-	flush		%o5
+	membar		#Sync
 
 	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %o5
 	stxa		%o0, [%o2] ASI_DMMU
@@ -116,16 +116,14 @@ copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
 	/* Spitfire Errata #32 workaround */
 	mov		0x8, %g5
 	stxa		%g0, [%g5] ASI_DMMU
-	sethi		%hi(empty_zero_page), %g5
-	flush		%g5
+	membar		#Sync
 
 	ldxa		[%o3] ASI_DTLB_TAG_READ, %g5
 
 	/* Spitfire Errata #32 workaround */
 	mov		0x8, %g7
 	stxa		%g0, [%g7] ASI_DMMU
-	sethi		%hi(empty_zero_page), %g7
-	flush		%g7
+	membar		#Sync
 
 	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g7
 	stxa		%o1, [%o2] ASI_DMMU
@@ -136,6 +134,107 @@ copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
 	bne,pn		%xcc, copy_page_using_blkcommit
 	 nop
 
+	rdpr		%ver, %g3
+	sllx		%g3, 16, %g3
+	srlx		%g3, 32 + 16, %g3
+	cmp		%g3, 0x14
+	bne,pt		%icc, spitfire_copy_user_page
+	 nop
+
+cheetah_copy_user_page:
+	mov		121, %o2			! A0 Group
+	prefetch	[%o1 + 0x000], #one_read	! MS
+	prefetch	[%o1 + 0x040], #one_read	! MS Group
+	prefetch	[%o1 + 0x080], #one_read	! MS Group
+	prefetch	[%o1 + 0x0c0], #one_read	! MS Group
+	ldd		[%o1 + 0x000], %f0		! MS Group
+	prefetch	[%o1 + 0x100], #one_read	! MS Group
+	ldd		[%o1 + 0x008], %f2		! AX
+	prefetch	[%o1 + 0x140], #one_read	! MS Group
+	ldd		[%o1 + 0x010], %f4		! AX
+	prefetch	[%o1 + 0x180], #one_read	! MS Group
+	fmovd		%f0, %f32			! FGA Group
+	ldd		[%o1 + 0x018], %f6		! AX
+	fmovd		%f2, %f34			! FGA Group
+	ldd		[%o1 + 0x020], %f8		! MS
+	fmovd		%f4, %f36			! FGA Group
+	ldd		[%o1 + 0x028], %f10		! AX
+	membar		#StoreStore			! MS
+	fmovd		%f6, %f38			! FGA Group
+	ldd		[%o1 + 0x030], %f12		! MS
+	fmovd		%f8, %f40			! FGA Group
+	ldd		[%o1 + 0x038], %f14		! AX
+	fmovd		%f10, %f42			! FGA Group
+	ldd		[%o1 + 0x040], %f16		! MS
+1:	ldd		[%o1 + 0x048], %f2		! AX (Group)
+	fmovd		%f12, %f44			! FGA
+	ldd		[%o1 + 0x050], %f4		! MS
+	fmovd		%f14, %f46			! FGA Group
+	stda		%f32, [%o0] ASI_BLK_P		! MS
+	ldd		[%o1 + 0x058], %f6		! AX
+	fmovd		%f16, %f32			! FGA Group (8-cycle stall)
+	ldd		[%o1 + 0x060], %f8		! MS
+	fmovd		%f2, %f34			! FGA Group
+	ldd		[%o1 + 0x068], %f10		! AX
+	fmovd		%f4, %f36			! FGA Group
+	ldd		[%o1 + 0x070], %f12		! MS
+	fmovd		%f6, %f38			! FGA Group
+	ldd		[%o1 + 0x078], %f14		! AX
+	fmovd		%f8, %f40			! FGA Group
+	ldd		[%o1 + 0x080], %f16		! AX
+	prefetch	[%o1 + 0x180], #one_read	! MS
+	fmovd		%f10, %f42			! FGA Group
+	subcc		%o2, 1, %o2			! A0
+	add		%o0, 0x40, %o0			! A1
+	bne,pt		%xcc, 1b			! BR
+	 add		%o1, 0x40, %o1			! A0 Group
+
+	mov		5, %o2				! A0 Group
+1:	ldd		[%o1 + 0x048], %f2		! AX
+	fmovd		%f12, %f44			! FGA
+	ldd		[%o1 + 0x050], %f4		! MS
+	fmovd		%f14, %f46			! FGA Group
+	stda		%f32, [%o0] ASI_BLK_P		! MS
+	ldd		[%o1 + 0x058], %f6		! AX
+	fmovd		%f16, %f32			! FGA Group (8-cycle stall)
+	ldd		[%o1 + 0x060], %f8		! MS
+	fmovd		%f2, %f34			! FGA Group
+	ldd		[%o1 + 0x068], %f10		! AX
+	fmovd		%f4, %f36			! FGA Group
+	ldd		[%o1 + 0x070], %f12		! MS
+	fmovd		%f6, %f38			! FGA Group
+	ldd		[%o1 + 0x078], %f14		! AX
+	fmovd		%f8, %f40			! FGA Group
+	ldd		[%o1 + 0x080], %f16		! MS
+	fmovd		%f10, %f42			! FGA Group
+	subcc		%o2, 1, %o2			! A0
+	add		%o0, 0x40, %o0			! A1
+	bne,pt		%xcc, 1b			! BR
+	 add		%o1, 0x40, %o1			! A0 Group
+
+	ldd		[%o1 + 0x048], %f2		! AX
+	fmovd		%f12, %f44			! FGA
+	ldd		[%o1 + 0x050], %f4		! MS
+	fmovd		%f14, %f46			! FGA Group
+	stda		%f32, [%o0] ASI_BLK_P		! MS
+	ldd		[%o1 + 0x058], %f6		! AX
+	fmovd		%f16, %f32			! FGA Group (8-cycle stall)
+	ldd		[%o1 + 0x060], %f8		! MS
+	fmovd		%f2, %f34			! FGA Group
+	ldd		[%o1 + 0x068], %f10		! AX
+	fmovd		%f4, %f36			! FGA Group
+	ldd		[%o1 + 0x070], %f12		! MS
+	fmovd		%f6, %f38			! FGA Group
+	add		%o0, 0x40, %o0			! A0
+	ldd		[%o1 + 0x078], %f14		! AX
+	fmovd		%f8, %f40			! FGA Group
+	fmovd		%f10, %f42			! FGA Group
+	fmovd		%f12, %f44			! FGA Group
+	fmovd		%f14, %f46			! FGA Group
+	stda		%f32, [%o0] ASI_BLK_P		! MS
+	ba,a,pt		%xcc, copy_user_page_continue
+
+spitfire_copy_user_page:
 	ldda		[%o1] ASI_BLK_P, %f0
 	add		%o1, 0x40, %o1
 	ldda		[%o1] ASI_BLK_P, %f16
@@ -237,6 +336,8 @@ clear_user_page:	/* %o0=dest, %o1=vaddr */
 	or		%g3, (_PAGE_CP | _PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W), %g3
 	or		%g1, %g3, %g1
 	add		%o0, %o3, %o0
+#define FIX_INSN_2	0x96102070 /* mov (14 << 3), %o3 */
+cheetah_patch_2:
 	mov		TLBTEMP_ENT2, %o3
 	rdpr		%pstate, %g3
 	wrpr		%g3, PSTATE_IE, %pstate
@@ -244,16 +345,14 @@ clear_user_page:	/* %o0=dest, %o1=vaddr */
 	/* Spitfire Errata #32 workaround */
 	mov		0x8, %g5
 	stxa		%g0, [%g5] ASI_DMMU
-	sethi		%hi(empty_zero_page), %g5
-	flush		%g5
+	membar		#Sync
 
 	ldxa		[%o3] ASI_DTLB_TAG_READ, %g5
 
 	/* Spitfire Errata #32 workaround */
 	mov		0x8, %g7
 	stxa		%g0, [%g7] ASI_DMMU
-	sethi		%hi(empty_zero_page), %g7
-	flush		%g7
+	membar		#Sync
 
 	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g7
 	stxa		%o0, [%o2] ASI_DMMU
@@ -299,3 +398,24 @@ clear_page_common:
 	membar		#Sync
 	jmpl		%o7 + 0x8, %g0
 	 wrpr		%g3, 0x0, %pstate
+
+	/* We will write cheetah optimized versions later. */
+	.globl		cheetah_patch_pgcopyops
+cheetah_patch_pgcopyops:
+	sethi		%hi(FIX_INSN_1), %g1
+	or		%g1, %lo(FIX_INSN_1), %g1
+	sethi		%hi(cheetah_patch_1), %g2
+	or		%g2, %lo(cheetah_patch_1), %g2
+	stw		%g1, [%g2]
+	flush		%g2
+	sethi		%hi(FIX_INSN_2), %g1
+	or		%g1, %lo(FIX_INSN_2), %g1
+	sethi		%hi(cheetah_patch_2), %g2
+	or		%g2, %lo(cheetah_patch_2), %g2
+	stw		%g1, [%g2]
+	flush		%g2
+	retl
+	 nop
+
+#undef FIX_INSN1
+#undef FIX_INSN2