diff options
author | Ralf Baechle <ralf@linux-mips.org> | 1999-02-15 02:15:32 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 1999-02-15 02:15:32 +0000 |
commit | 86464aed71025541805e7b1515541aee89879e33 (patch) | |
tree | e01a457a4912a8553bc65524aa3125d51f29f810 /drivers/video/cvisionppc.h | |
parent | 88f99939ecc6a95a79614574cb7d95ffccfc3466 (diff) |
Merge with Linux 2.2.1.
Diffstat (limited to 'drivers/video/cvisionppc.h')
-rw-r--r-- | drivers/video/cvisionppc.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/drivers/video/cvisionppc.h b/drivers/video/cvisionppc.h new file mode 100644 index 000000000..4a137548f --- /dev/null +++ b/drivers/video/cvisionppc.h @@ -0,0 +1,51 @@ +/* + * Phase5 CybervisionPPC (TVP4020) definitions for the Permedia2 framebuffer + * driver. + * + * Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) + * -------------------------------------------------------------------------- + * $Id: cvisionppc.h,v 1.1.2.1 1999/01/12 19:52:59 geert Exp $ + * -------------------------------------------------------------------------- + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file README.legal in the main directory of this archive + * for more details. + */ + +#ifndef CVISIONPPC_H +#define CVISIONPPC_H + +#ifndef PM2FB_H +#include "pm2fb.h" +#endif + +struct cvppc_par { + unsigned char* pci_config; + unsigned char* pci_bridge; + unsigned long user_flags; +}; + +#define CSPPC_PCI_BRIDGE 0xfffe0000 +#define CSPPC_BRIDGE_ENDIAN 0x0000 +#define CSPPC_BRIDGE_INT 0x0010 + +#define CVPPC_PCI_CONFIG 0xfffc0000 +#define CVPPC_ROM_ADDRESS 0xe2000001 +#define CVPPC_REGS_REGION 0xef000000 +#define CVPPC_FB_APERTURE_ONE 0xe0000000 +#define CVPPC_FB_APERTURE_TWO 0xe1000000 +#define CVPPC_FB_SIZE 0x00800000 +#define CVPPC_MEM_CONFIG_OLD 0xed61fcaa /* FIXME Fujitsu?? */ +#define CVPPC_MEM_CONFIG_NEW 0xed41c532 /* FIXME USA?? */ +#define CVPPC_MEMCLOCK 83000 /* in KHz */ + +/* CVPPC_BRIDGE_ENDIAN */ +#define CSPPCF_BRIDGE_BIG_ENDIAN 0x02 + +/* CVPPC_BRIDGE_INT */ +#define CSPPCF_BRIDGE_ACTIVE_INT2 0x01 + +#endif /* CVISIONPPC_H */ + +/***************************************************************************** + * That's all folks! + *****************************************************************************/ |